blob: be73e9d579c5923954647987d4ec28a0e68e0499 [file] [log] [blame]
Kyle Swenson8d8f6542021-03-15 11:02:55 -06001/*
2 * Disk Array driver for Compaq SMART2 Controllers
3 * Copyright 1998 Compaq Computer Corporation
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
13 * NON INFRINGEMENT. See the GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
18 *
19 * Questions/Comments/Bugfixes to iss_storagedev@hp.com
20 *
21 * If you want to make changes, improve or add functionality to this
22 * driver, you'll probably need the Compaq Array Controller Interface
23 * Specificiation (Document number ECG086/1198)
24 */
25#ifndef CPQARRAY_H
26#define CPQARRAY_H
27
28#ifdef __KERNEL__
29#include <linux/blkdev.h>
30#include <linux/slab.h>
31#include <linux/proc_fs.h>
32#include <linux/timer.h>
33#endif
34
35#include "ida_cmd.h"
36
37#define IO_OK 0
38#define IO_ERROR 1
39#define NWD 16
40#define NWD_SHIFT 4
41
42#define IDA_TIMER (5*HZ)
43#define IDA_TIMEOUT (10*HZ)
44
45#define MISC_NONFATAL_WARN 0x01
46
47typedef struct {
48 unsigned blk_size;
49 unsigned nr_blks;
50 unsigned cylinders;
51 unsigned heads;
52 unsigned sectors;
53 int usage_count;
54} drv_info_t;
55
56#ifdef __KERNEL__
57
58struct ctlr_info;
59typedef struct ctlr_info ctlr_info_t;
60
61struct access_method {
62 void (*submit_command)(ctlr_info_t *h, cmdlist_t *c);
63 void (*set_intr_mask)(ctlr_info_t *h, unsigned long val);
64 unsigned long (*fifo_full)(ctlr_info_t *h);
65 unsigned long (*intr_pending)(ctlr_info_t *h);
66 unsigned long (*command_completed)(ctlr_info_t *h);
67};
68
69struct board_type {
70 __u32 board_id;
71 char *product_name;
72 struct access_method *access;
73};
74
75struct ctlr_info {
76 int ctlr;
77 char devname[8];
78 __u32 log_drv_map;
79 __u32 drv_assign_map;
80 __u32 drv_spare_map;
81 __u32 mp_failed_drv_map;
82
83 char firm_rev[4];
84 int ctlr_sig;
85
86 int log_drives;
87 int phys_drives;
88
89 struct pci_dev *pci_dev; /* NULL if EISA */
90 __u32 board_id;
91 char *product_name;
92
93 void __iomem *vaddr;
94 unsigned long paddr;
95 unsigned long io_mem_addr;
96 unsigned long io_mem_length;
97 int intr;
98 int usage_count;
99 drv_info_t drv[NWD];
100 struct proc_dir_entry *proc;
101
102 struct access_method access;
103
104 cmdlist_t *reqQ;
105 cmdlist_t *cmpQ;
106 cmdlist_t *cmd_pool;
107 dma_addr_t cmd_pool_dhandle;
108 unsigned long *cmd_pool_bits;
109 struct request_queue *queue;
110 spinlock_t lock;
111
112 unsigned int Qdepth;
113 unsigned int maxQsinceinit;
114
115 unsigned int nr_requests;
116 unsigned int nr_allocs;
117 unsigned int nr_frees;
118 struct timer_list timer;
119 unsigned int misc_tflags;
120};
121
122#define IDA_LOCK(i) (&hba[i]->lock)
123
124#endif
125
126#endif /* CPQARRAY_H */