blob: 01e111e72d4bb273c344b409119a134cd2a73a98 [file] [log] [blame]
Kyle Swenson8d8f6542021-03-15 11:02:55 -06001/**
2 * opt3001.c - Texas Instruments OPT3001 Light Sensor
3 *
4 * Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com
5 *
6 * Author: Andreas Dannenberg <dannenberg@ti.com>
7 * Based on previous work from: Felipe Balbi <balbi@ti.com>
8 *
9 * This program is free software: you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License version 2 of the License
11 * as published by the Free Software Foundation.
12 *
13 * This program is distributed in the hope that it will be useful, but WITHOUT
14 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
16 * more details.
17 */
18
19#include <linux/bitops.h>
20#include <linux/delay.h>
21#include <linux/device.h>
22#include <linux/i2c.h>
23#include <linux/interrupt.h>
24#include <linux/irq.h>
25#include <linux/kernel.h>
26#include <linux/module.h>
27#include <linux/mutex.h>
28#include <linux/slab.h>
29#include <linux/types.h>
30
31#include <linux/iio/events.h>
32#include <linux/iio/iio.h>
33#include <linux/iio/sysfs.h>
34
35#define OPT3001_RESULT 0x00
36#define OPT3001_CONFIGURATION 0x01
37#define OPT3001_LOW_LIMIT 0x02
38#define OPT3001_HIGH_LIMIT 0x03
39#define OPT3001_MANUFACTURER_ID 0x7e
40#define OPT3001_DEVICE_ID 0x7f
41
42#define OPT3001_CONFIGURATION_RN_MASK (0xf << 12)
43#define OPT3001_CONFIGURATION_RN_AUTO (0xc << 12)
44
45#define OPT3001_CONFIGURATION_CT BIT(11)
46
47#define OPT3001_CONFIGURATION_M_MASK (3 << 9)
48#define OPT3001_CONFIGURATION_M_SHUTDOWN (0 << 9)
49#define OPT3001_CONFIGURATION_M_SINGLE (1 << 9)
50#define OPT3001_CONFIGURATION_M_CONTINUOUS (2 << 9) /* also 3 << 9 */
51
52#define OPT3001_CONFIGURATION_OVF BIT(8)
53#define OPT3001_CONFIGURATION_CRF BIT(7)
54#define OPT3001_CONFIGURATION_FH BIT(6)
55#define OPT3001_CONFIGURATION_FL BIT(5)
56#define OPT3001_CONFIGURATION_L BIT(4)
57#define OPT3001_CONFIGURATION_POL BIT(3)
58#define OPT3001_CONFIGURATION_ME BIT(2)
59
60#define OPT3001_CONFIGURATION_FC_MASK (3 << 0)
61
62/* The end-of-conversion enable is located in the low-limit register */
63#define OPT3001_LOW_LIMIT_EOC_ENABLE 0xc000
64
65#define OPT3001_REG_EXPONENT(n) ((n) >> 12)
66#define OPT3001_REG_MANTISSA(n) ((n) & 0xfff)
67
68/*
69 * Time to wait for conversion result to be ready. The device datasheet
70 * worst-case max value is 880ms. Add some slack to be on the safe side.
71 */
72#define OPT3001_RESULT_READY_TIMEOUT msecs_to_jiffies(1000)
73
74struct opt3001 {
75 struct i2c_client *client;
76 struct device *dev;
77
78 struct mutex lock;
79 u16 ok_to_ignore_lock:1;
80 u16 result_ready:1;
81 wait_queue_head_t result_ready_queue;
82 u16 result;
83
84 u32 int_time;
85 u32 mode;
86
87 u16 high_thresh_mantissa;
88 u16 low_thresh_mantissa;
89
90 u8 high_thresh_exp;
91 u8 low_thresh_exp;
92};
93
94struct opt3001_scale {
95 int val;
96 int val2;
97};
98
99static const struct opt3001_scale opt3001_scales[] = {
100 {
101 .val = 40,
102 .val2 = 950000,
103 },
104 {
105 .val = 81,
106 .val2 = 900000,
107 },
108 {
109 .val = 163,
110 .val2 = 800000,
111 },
112 {
113 .val = 327,
114 .val2 = 600000,
115 },
116 {
117 .val = 655,
118 .val2 = 200000,
119 },
120 {
121 .val = 1310,
122 .val2 = 400000,
123 },
124 {
125 .val = 2620,
126 .val2 = 800000,
127 },
128 {
129 .val = 5241,
130 .val2 = 600000,
131 },
132 {
133 .val = 10483,
134 .val2 = 200000,
135 },
136 {
137 .val = 20966,
138 .val2 = 400000,
139 },
140 {
141 .val = 83865,
142 .val2 = 600000,
143 },
144};
145
146static int opt3001_find_scale(const struct opt3001 *opt, int val,
147 int val2, u8 *exponent)
148{
149 int i;
150
151 for (i = 0; i < ARRAY_SIZE(opt3001_scales); i++) {
152 const struct opt3001_scale *scale = &opt3001_scales[i];
153
154 /*
155 * Combine the integer and micro parts for comparison
156 * purposes. Use milli lux precision to avoid 32-bit integer
157 * overflows.
158 */
159 if ((val * 1000 + val2 / 1000) <=
160 (scale->val * 1000 + scale->val2 / 1000)) {
161 *exponent = i;
162 return 0;
163 }
164 }
165
166 return -EINVAL;
167}
168
169static void opt3001_to_iio_ret(struct opt3001 *opt, u8 exponent,
170 u16 mantissa, int *val, int *val2)
171{
172 int lux;
173
174 lux = 10 * (mantissa << exponent);
175 *val = lux / 1000;
176 *val2 = (lux - (*val * 1000)) * 1000;
177}
178
179static void opt3001_set_mode(struct opt3001 *opt, u16 *reg, u16 mode)
180{
181 *reg &= ~OPT3001_CONFIGURATION_M_MASK;
182 *reg |= mode;
183 opt->mode = mode;
184}
185
186static IIO_CONST_ATTR_INT_TIME_AVAIL("0.1 0.8");
187
188static struct attribute *opt3001_attributes[] = {
189 &iio_const_attr_integration_time_available.dev_attr.attr,
190 NULL
191};
192
193static const struct attribute_group opt3001_attribute_group = {
194 .attrs = opt3001_attributes,
195};
196
197static const struct iio_event_spec opt3001_event_spec[] = {
198 {
199 .type = IIO_EV_TYPE_THRESH,
200 .dir = IIO_EV_DIR_RISING,
201 .mask_separate = BIT(IIO_EV_INFO_VALUE) |
202 BIT(IIO_EV_INFO_ENABLE),
203 },
204 {
205 .type = IIO_EV_TYPE_THRESH,
206 .dir = IIO_EV_DIR_FALLING,
207 .mask_separate = BIT(IIO_EV_INFO_VALUE) |
208 BIT(IIO_EV_INFO_ENABLE),
209 },
210};
211
212static const struct iio_chan_spec opt3001_channels[] = {
213 {
214 .type = IIO_LIGHT,
215 .info_mask_separate = BIT(IIO_CHAN_INFO_PROCESSED) |
216 BIT(IIO_CHAN_INFO_INT_TIME),
217 .event_spec = opt3001_event_spec,
218 .num_event_specs = ARRAY_SIZE(opt3001_event_spec),
219 },
220 IIO_CHAN_SOFT_TIMESTAMP(1),
221};
222
223static int opt3001_get_lux(struct opt3001 *opt, int *val, int *val2)
224{
225 int ret;
226 u16 mantissa;
227 u16 reg;
228 u8 exponent;
229 u16 value;
230
231 /*
232 * Enable the end-of-conversion interrupt mechanism. Note that doing
233 * so will overwrite the low-level limit value however we will restore
234 * this value later on.
235 */
236 ret = i2c_smbus_write_word_swapped(opt->client, OPT3001_LOW_LIMIT,
237 OPT3001_LOW_LIMIT_EOC_ENABLE);
238 if (ret < 0) {
239 dev_err(opt->dev, "failed to write register %02x\n",
240 OPT3001_LOW_LIMIT);
241 return ret;
242 }
243
244 /* Reset data-ready indicator flag (will be set in the IRQ routine) */
245 opt->result_ready = false;
246
247 /* Allow IRQ to access the device despite lock being set */
248 opt->ok_to_ignore_lock = true;
249
250 /* Configure for single-conversion mode and start a new conversion */
251 ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_CONFIGURATION);
252 if (ret < 0) {
253 dev_err(opt->dev, "failed to read register %02x\n",
254 OPT3001_CONFIGURATION);
255 goto err;
256 }
257
258 reg = ret;
259 opt3001_set_mode(opt, &reg, OPT3001_CONFIGURATION_M_SINGLE);
260
261 ret = i2c_smbus_write_word_swapped(opt->client, OPT3001_CONFIGURATION,
262 reg);
263 if (ret < 0) {
264 dev_err(opt->dev, "failed to write register %02x\n",
265 OPT3001_CONFIGURATION);
266 goto err;
267 }
268
269 /* Wait for the IRQ to indicate the conversion is complete */
270 ret = wait_event_timeout(opt->result_ready_queue, opt->result_ready,
271 OPT3001_RESULT_READY_TIMEOUT);
272
273err:
274 /* Disallow IRQ to access the device while lock is active */
275 opt->ok_to_ignore_lock = false;
276
277 if (ret == 0)
278 return -ETIMEDOUT;
279 else if (ret < 0)
280 return ret;
281
282 /*
283 * Disable the end-of-conversion interrupt mechanism by restoring the
284 * low-level limit value (clearing OPT3001_LOW_LIMIT_EOC_ENABLE). Note
285 * that selectively clearing those enable bits would affect the actual
286 * limit value due to bit-overlap and therefore can't be done.
287 */
288 value = (opt->low_thresh_exp << 12) | opt->low_thresh_mantissa;
289 ret = i2c_smbus_write_word_swapped(opt->client, OPT3001_LOW_LIMIT,
290 value);
291 if (ret < 0) {
292 dev_err(opt->dev, "failed to write register %02x\n",
293 OPT3001_LOW_LIMIT);
294 return ret;
295 }
296
297 exponent = OPT3001_REG_EXPONENT(opt->result);
298 mantissa = OPT3001_REG_MANTISSA(opt->result);
299
300 opt3001_to_iio_ret(opt, exponent, mantissa, val, val2);
301
302 return IIO_VAL_INT_PLUS_MICRO;
303}
304
305static int opt3001_get_int_time(struct opt3001 *opt, int *val, int *val2)
306{
307 *val = 0;
308 *val2 = opt->int_time;
309
310 return IIO_VAL_INT_PLUS_MICRO;
311}
312
313static int opt3001_set_int_time(struct opt3001 *opt, int time)
314{
315 int ret;
316 u16 reg;
317
318 ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_CONFIGURATION);
319 if (ret < 0) {
320 dev_err(opt->dev, "failed to read register %02x\n",
321 OPT3001_CONFIGURATION);
322 return ret;
323 }
324
325 reg = ret;
326
327 switch (time) {
328 case 100000:
329 reg &= ~OPT3001_CONFIGURATION_CT;
330 opt->int_time = 100000;
331 break;
332 case 800000:
333 reg |= OPT3001_CONFIGURATION_CT;
334 opt->int_time = 800000;
335 break;
336 default:
337 return -EINVAL;
338 }
339
340 return i2c_smbus_write_word_swapped(opt->client, OPT3001_CONFIGURATION,
341 reg);
342}
343
344static int opt3001_read_raw(struct iio_dev *iio,
345 struct iio_chan_spec const *chan, int *val, int *val2,
346 long mask)
347{
348 struct opt3001 *opt = iio_priv(iio);
349 int ret;
350
351 if (opt->mode == OPT3001_CONFIGURATION_M_CONTINUOUS)
352 return -EBUSY;
353
354 if (chan->type != IIO_LIGHT)
355 return -EINVAL;
356
357 mutex_lock(&opt->lock);
358
359 switch (mask) {
360 case IIO_CHAN_INFO_PROCESSED:
361 ret = opt3001_get_lux(opt, val, val2);
362 break;
363 case IIO_CHAN_INFO_INT_TIME:
364 ret = opt3001_get_int_time(opt, val, val2);
365 break;
366 default:
367 ret = -EINVAL;
368 }
369
370 mutex_unlock(&opt->lock);
371
372 return ret;
373}
374
375static int opt3001_write_raw(struct iio_dev *iio,
376 struct iio_chan_spec const *chan, int val, int val2,
377 long mask)
378{
379 struct opt3001 *opt = iio_priv(iio);
380 int ret;
381
382 if (opt->mode == OPT3001_CONFIGURATION_M_CONTINUOUS)
383 return -EBUSY;
384
385 if (chan->type != IIO_LIGHT)
386 return -EINVAL;
387
388 if (mask != IIO_CHAN_INFO_INT_TIME)
389 return -EINVAL;
390
391 if (val != 0)
392 return -EINVAL;
393
394 mutex_lock(&opt->lock);
395 ret = opt3001_set_int_time(opt, val2);
396 mutex_unlock(&opt->lock);
397
398 return ret;
399}
400
401static int opt3001_read_event_value(struct iio_dev *iio,
402 const struct iio_chan_spec *chan, enum iio_event_type type,
403 enum iio_event_direction dir, enum iio_event_info info,
404 int *val, int *val2)
405{
406 struct opt3001 *opt = iio_priv(iio);
407 int ret = IIO_VAL_INT_PLUS_MICRO;
408
409 mutex_lock(&opt->lock);
410
411 switch (dir) {
412 case IIO_EV_DIR_RISING:
413 opt3001_to_iio_ret(opt, opt->high_thresh_exp,
414 opt->high_thresh_mantissa, val, val2);
415 break;
416 case IIO_EV_DIR_FALLING:
417 opt3001_to_iio_ret(opt, opt->low_thresh_exp,
418 opt->low_thresh_mantissa, val, val2);
419 break;
420 default:
421 ret = -EINVAL;
422 }
423
424 mutex_unlock(&opt->lock);
425
426 return ret;
427}
428
429static int opt3001_write_event_value(struct iio_dev *iio,
430 const struct iio_chan_spec *chan, enum iio_event_type type,
431 enum iio_event_direction dir, enum iio_event_info info,
432 int val, int val2)
433{
434 struct opt3001 *opt = iio_priv(iio);
435 int ret;
436
437 u16 mantissa;
438 u16 value;
439 u16 reg;
440
441 u8 exponent;
442
443 if (val < 0)
444 return -EINVAL;
445
446 mutex_lock(&opt->lock);
447
448 ret = opt3001_find_scale(opt, val, val2, &exponent);
449 if (ret < 0) {
450 dev_err(opt->dev, "can't find scale for %d.%06u\n", val, val2);
451 goto err;
452 }
453
454 mantissa = (((val * 1000) + (val2 / 1000)) / 10) >> exponent;
455 value = (exponent << 12) | mantissa;
456
457 switch (dir) {
458 case IIO_EV_DIR_RISING:
459 reg = OPT3001_HIGH_LIMIT;
460 opt->high_thresh_mantissa = mantissa;
461 opt->high_thresh_exp = exponent;
462 break;
463 case IIO_EV_DIR_FALLING:
464 reg = OPT3001_LOW_LIMIT;
465 opt->low_thresh_mantissa = mantissa;
466 opt->low_thresh_exp = exponent;
467 break;
468 default:
469 ret = -EINVAL;
470 goto err;
471 }
472
473 ret = i2c_smbus_write_word_swapped(opt->client, reg, value);
474 if (ret < 0) {
475 dev_err(opt->dev, "failed to write register %02x\n", reg);
476 goto err;
477 }
478
479err:
480 mutex_unlock(&opt->lock);
481
482 return ret;
483}
484
485static int opt3001_read_event_config(struct iio_dev *iio,
486 const struct iio_chan_spec *chan, enum iio_event_type type,
487 enum iio_event_direction dir)
488{
489 struct opt3001 *opt = iio_priv(iio);
490
491 return opt->mode == OPT3001_CONFIGURATION_M_CONTINUOUS;
492}
493
494static int opt3001_write_event_config(struct iio_dev *iio,
495 const struct iio_chan_spec *chan, enum iio_event_type type,
496 enum iio_event_direction dir, int state)
497{
498 struct opt3001 *opt = iio_priv(iio);
499 int ret;
500 u16 mode;
501 u16 reg;
502
503 if (state && opt->mode == OPT3001_CONFIGURATION_M_CONTINUOUS)
504 return 0;
505
506 if (!state && opt->mode == OPT3001_CONFIGURATION_M_SHUTDOWN)
507 return 0;
508
509 mutex_lock(&opt->lock);
510
511 mode = state ? OPT3001_CONFIGURATION_M_CONTINUOUS
512 : OPT3001_CONFIGURATION_M_SHUTDOWN;
513
514 ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_CONFIGURATION);
515 if (ret < 0) {
516 dev_err(opt->dev, "failed to read register %02x\n",
517 OPT3001_CONFIGURATION);
518 goto err;
519 }
520
521 reg = ret;
522 opt3001_set_mode(opt, &reg, mode);
523
524 ret = i2c_smbus_write_word_swapped(opt->client, OPT3001_CONFIGURATION,
525 reg);
526 if (ret < 0) {
527 dev_err(opt->dev, "failed to write register %02x\n",
528 OPT3001_CONFIGURATION);
529 goto err;
530 }
531
532err:
533 mutex_unlock(&opt->lock);
534
535 return ret;
536}
537
538static const struct iio_info opt3001_info = {
539 .driver_module = THIS_MODULE,
540 .attrs = &opt3001_attribute_group,
541 .read_raw = opt3001_read_raw,
542 .write_raw = opt3001_write_raw,
543 .read_event_value = opt3001_read_event_value,
544 .write_event_value = opt3001_write_event_value,
545 .read_event_config = opt3001_read_event_config,
546 .write_event_config = opt3001_write_event_config,
547};
548
549static int opt3001_read_id(struct opt3001 *opt)
550{
551 char manufacturer[2];
552 u16 device_id;
553 int ret;
554
555 ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_MANUFACTURER_ID);
556 if (ret < 0) {
557 dev_err(opt->dev, "failed to read register %02x\n",
558 OPT3001_MANUFACTURER_ID);
559 return ret;
560 }
561
562 manufacturer[0] = ret >> 8;
563 manufacturer[1] = ret & 0xff;
564
565 ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_DEVICE_ID);
566 if (ret < 0) {
567 dev_err(opt->dev, "failed to read register %02x\n",
568 OPT3001_DEVICE_ID);
569 return ret;
570 }
571
572 device_id = ret;
573
574 dev_info(opt->dev, "Found %c%c OPT%04x\n", manufacturer[0],
575 manufacturer[1], device_id);
576
577 return 0;
578}
579
580static int opt3001_configure(struct opt3001 *opt)
581{
582 int ret;
583 u16 reg;
584
585 ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_CONFIGURATION);
586 if (ret < 0) {
587 dev_err(opt->dev, "failed to read register %02x\n",
588 OPT3001_CONFIGURATION);
589 return ret;
590 }
591
592 reg = ret;
593
594 /* Enable automatic full-scale setting mode */
595 reg &= ~OPT3001_CONFIGURATION_RN_MASK;
596 reg |= OPT3001_CONFIGURATION_RN_AUTO;
597
598 /* Reflect status of the device's integration time setting */
599 if (reg & OPT3001_CONFIGURATION_CT)
600 opt->int_time = 800000;
601 else
602 opt->int_time = 100000;
603
604 /* Ensure device is in shutdown initially */
605 opt3001_set_mode(opt, &reg, OPT3001_CONFIGURATION_M_SHUTDOWN);
606
607 /* Configure for latched window-style comparison operation */
608 reg |= OPT3001_CONFIGURATION_L;
609 reg &= ~OPT3001_CONFIGURATION_POL;
610 reg &= ~OPT3001_CONFIGURATION_ME;
611 reg &= ~OPT3001_CONFIGURATION_FC_MASK;
612
613 ret = i2c_smbus_write_word_swapped(opt->client, OPT3001_CONFIGURATION,
614 reg);
615 if (ret < 0) {
616 dev_err(opt->dev, "failed to write register %02x\n",
617 OPT3001_CONFIGURATION);
618 return ret;
619 }
620
621 ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_LOW_LIMIT);
622 if (ret < 0) {
623 dev_err(opt->dev, "failed to read register %02x\n",
624 OPT3001_LOW_LIMIT);
625 return ret;
626 }
627
628 opt->low_thresh_mantissa = OPT3001_REG_MANTISSA(ret);
629 opt->low_thresh_exp = OPT3001_REG_EXPONENT(ret);
630
631 ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_HIGH_LIMIT);
632 if (ret < 0) {
633 dev_err(opt->dev, "failed to read register %02x\n",
634 OPT3001_HIGH_LIMIT);
635 return ret;
636 }
637
638 opt->high_thresh_mantissa = OPT3001_REG_MANTISSA(ret);
639 opt->high_thresh_exp = OPT3001_REG_EXPONENT(ret);
640
641 return 0;
642}
643
644static irqreturn_t opt3001_irq(int irq, void *_iio)
645{
646 struct iio_dev *iio = _iio;
647 struct opt3001 *opt = iio_priv(iio);
648 int ret;
649
650 if (!opt->ok_to_ignore_lock)
651 mutex_lock(&opt->lock);
652
653 ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_CONFIGURATION);
654 if (ret < 0) {
655 dev_err(opt->dev, "failed to read register %02x\n",
656 OPT3001_CONFIGURATION);
657 goto out;
658 }
659
660 if ((ret & OPT3001_CONFIGURATION_M_MASK) ==
661 OPT3001_CONFIGURATION_M_CONTINUOUS) {
662 if (ret & OPT3001_CONFIGURATION_FH)
663 iio_push_event(iio,
664 IIO_UNMOD_EVENT_CODE(IIO_LIGHT, 0,
665 IIO_EV_TYPE_THRESH,
666 IIO_EV_DIR_RISING),
667 iio_get_time_ns());
668 if (ret & OPT3001_CONFIGURATION_FL)
669 iio_push_event(iio,
670 IIO_UNMOD_EVENT_CODE(IIO_LIGHT, 0,
671 IIO_EV_TYPE_THRESH,
672 IIO_EV_DIR_FALLING),
673 iio_get_time_ns());
674 } else if (ret & OPT3001_CONFIGURATION_CRF) {
675 ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_RESULT);
676 if (ret < 0) {
677 dev_err(opt->dev, "failed to read register %02x\n",
678 OPT3001_RESULT);
679 goto out;
680 }
681 opt->result = ret;
682 opt->result_ready = true;
683 wake_up(&opt->result_ready_queue);
684 }
685
686out:
687 if (!opt->ok_to_ignore_lock)
688 mutex_unlock(&opt->lock);
689
690 return IRQ_HANDLED;
691}
692
693static int opt3001_probe(struct i2c_client *client,
694 const struct i2c_device_id *id)
695{
696 struct device *dev = &client->dev;
697
698 struct iio_dev *iio;
699 struct opt3001 *opt;
700 int irq = client->irq;
701 int ret;
702
703 iio = devm_iio_device_alloc(dev, sizeof(*opt));
704 if (!iio)
705 return -ENOMEM;
706
707 opt = iio_priv(iio);
708 opt->client = client;
709 opt->dev = dev;
710
711 mutex_init(&opt->lock);
712 init_waitqueue_head(&opt->result_ready_queue);
713 i2c_set_clientdata(client, iio);
714
715 ret = opt3001_read_id(opt);
716 if (ret)
717 return ret;
718
719 ret = opt3001_configure(opt);
720 if (ret)
721 return ret;
722
723 iio->name = client->name;
724 iio->channels = opt3001_channels;
725 iio->num_channels = ARRAY_SIZE(opt3001_channels);
726 iio->dev.parent = dev;
727 iio->modes = INDIO_DIRECT_MODE;
728 iio->info = &opt3001_info;
729
730 ret = devm_iio_device_register(dev, iio);
731 if (ret) {
732 dev_err(dev, "failed to register IIO device\n");
733 return ret;
734 }
735
736 ret = request_threaded_irq(irq, NULL, opt3001_irq,
737 IRQF_TRIGGER_FALLING | IRQF_ONESHOT,
738 "opt3001", iio);
739 if (ret) {
740 dev_err(dev, "failed to request IRQ #%d\n", irq);
741 return ret;
742 }
743
744 return 0;
745}
746
747static int opt3001_remove(struct i2c_client *client)
748{
749 struct iio_dev *iio = i2c_get_clientdata(client);
750 struct opt3001 *opt = iio_priv(iio);
751 int ret;
752 u16 reg;
753
754 free_irq(client->irq, iio);
755
756 ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_CONFIGURATION);
757 if (ret < 0) {
758 dev_err(opt->dev, "failed to read register %02x\n",
759 OPT3001_CONFIGURATION);
760 return ret;
761 }
762
763 reg = ret;
764 opt3001_set_mode(opt, &reg, OPT3001_CONFIGURATION_M_SHUTDOWN);
765
766 ret = i2c_smbus_write_word_swapped(opt->client, OPT3001_CONFIGURATION,
767 reg);
768 if (ret < 0) {
769 dev_err(opt->dev, "failed to write register %02x\n",
770 OPT3001_CONFIGURATION);
771 return ret;
772 }
773
774 return 0;
775}
776
777static const struct i2c_device_id opt3001_id[] = {
778 { "opt3001", 0 },
779 { } /* Terminating Entry */
780};
781MODULE_DEVICE_TABLE(i2c, opt3001_id);
782
783static const struct of_device_id opt3001_of_match[] = {
784 { .compatible = "ti,opt3001" },
785 { }
786};
787
788static struct i2c_driver opt3001_driver = {
789 .probe = opt3001_probe,
790 .remove = opt3001_remove,
791 .id_table = opt3001_id,
792
793 .driver = {
794 .name = "opt3001",
795 .of_match_table = of_match_ptr(opt3001_of_match),
796 },
797};
798
799module_i2c_driver(opt3001_driver);
800
801MODULE_LICENSE("GPL v2");
802MODULE_AUTHOR("Andreas Dannenberg <dannenberg@ti.com>");
803MODULE_DESCRIPTION("Texas Instruments OPT3001 Light Sensor Driver");