Kyle Swenson | 8d8f654 | 2021-03-15 11:02:55 -0600 | [diff] [blame^] | 1 | Clock bindings for ST-Ericsson Ux500 clocks |
| 2 | |
| 3 | Required properties : |
| 4 | - compatible : shall contain only one of the following: |
| 5 | "stericsson,u8500-clks" |
| 6 | "stericsson,u8540-clks" |
| 7 | "stericsson,u9540-clks" |
| 8 | - reg : shall contain base register location and length for |
| 9 | CLKRST1, 2, 3, 5, and 6 in an array. Note the absence of |
| 10 | CLKRST4, which does not exist. |
| 11 | |
| 12 | Required subnodes: |
| 13 | - prcmu-clock: a subnode with one clock cell for PRCMU (power, |
| 14 | reset, control unit) clocks. The cell indicates which PRCMU |
| 15 | clock in the prcmu-clock node the consumer wants to use. |
| 16 | - prcc-periph-clock: a subnode with two clock cells for |
| 17 | PRCC (programmable reset- and clock controller) peripheral clocks. |
| 18 | The first cell indicates which PRCC block the consumer |
| 19 | wants to use, possible values are 1, 2, 3, 5, 6. The second |
| 20 | cell indicates which clock inside the PRCC block it wants, |
| 21 | possible values are 0 thru 31. |
| 22 | - prcc-kernel-clock: a subnode with two clock cells for |
| 23 | PRCC (programmable reset- and clock controller) kernel clocks |
| 24 | The first cell indicates which PRCC block the consumer |
| 25 | wants to use, possible values are 1, 2, 3, 5, 6. The second |
| 26 | cell indicates which clock inside the PRCC block it wants, |
| 27 | possible values are 0 thru 31. |
| 28 | - rtc32k-clock: a subnode with zero clock cells for the 32kHz |
| 29 | RTC clock. |
| 30 | - smp-twd-clock: a subnode for the ARM SMP Timer Watchdog cluster |
| 31 | with zero clock cells. |
| 32 | |
| 33 | Example: |
| 34 | |
| 35 | clocks { |
| 36 | compatible = "stericsson,u8500-clks"; |
| 37 | /* |
| 38 | * Registers for the CLKRST block on peripheral |
| 39 | * groups 1, 2, 3, 5, 6, |
| 40 | */ |
| 41 | reg = <0x8012f000 0x1000>, <0x8011f000 0x1000>, |
| 42 | <0x8000f000 0x1000>, <0xa03ff000 0x1000>, |
| 43 | <0xa03cf000 0x1000>; |
| 44 | |
| 45 | prcmu_clk: prcmu-clock { |
| 46 | #clock-cells = <1>; |
| 47 | }; |
| 48 | |
| 49 | prcc_pclk: prcc-periph-clock { |
| 50 | #clock-cells = <2>; |
| 51 | }; |
| 52 | |
| 53 | prcc_kclk: prcc-kernel-clock { |
| 54 | #clock-cells = <2>; |
| 55 | }; |
| 56 | |
| 57 | rtc_clk: rtc32k-clock { |
| 58 | #clock-cells = <0>; |
| 59 | }; |
| 60 | |
| 61 | smp_twd_clk: smp-twd-clock { |
| 62 | #clock-cells = <0>; |
| 63 | }; |
| 64 | }; |