Kyle Swenson | 8d8f654 | 2021-03-15 11:02:55 -0600 | [diff] [blame^] | 1 | Tegra SOC USB controllers |
| 2 | |
| 3 | The device node for a USB controller that is part of a Tegra |
| 4 | SOC is as described in the document "Open Firmware Recommended |
| 5 | Practice : Universal Serial Bus" with the following modifications |
| 6 | and additions : |
| 7 | |
| 8 | Required properties : |
| 9 | - compatible : For Tegra20, must contain "nvidia,tegra20-ehci". |
| 10 | For Tegra30, must contain "nvidia,tegra30-ehci". Otherwise, must contain |
| 11 | "nvidia,<chip>-ehci" plus at least one of the above, where <chip> is |
| 12 | tegra114, tegra124, tegra132, or tegra210. |
| 13 | - nvidia,phy : phandle of the PHY that the controller is connected to. |
| 14 | - clocks : Must contain one entry, for the module clock. |
| 15 | See ../clocks/clock-bindings.txt for details. |
| 16 | - resets : Must contain an entry for each entry in reset-names. |
| 17 | See ../reset/reset.txt for details. |
| 18 | - reset-names : Must include the following entries: |
| 19 | - usb |
| 20 | |
| 21 | Optional properties: |
| 22 | - nvidia,needs-double-reset : boolean is to be set for some of the Tegra20 |
| 23 | USB ports, which need reset twice due to hardware issues. |