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gerrit.nordix.org / codeaurora / cp-linux / 8d8f6542b666daf5e87de156590e635c2c4da0c0 / . / arch / arm / boot / dts / am4372.dtsi
blob: de8791a4d1311883577f51e243769a3c6906a61a [file] [log] [blame]
Kyle Swenson8d8f6542021-03-15 11:02:55 -0600[diff] [blame^]1/*
2 * Device Tree Source for AM4372 SoC
3 *
4 * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
5 *
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
9 */
10
11#include <dt-bindings/gpio/gpio.h>
12#include <dt-bindings/interrupt-controller/arm-gic.h>
13
14#include "skeleton.dtsi"
15
16/ {
17 compatible = "ti,am4372", "ti,am43";
18 interrupt-parent = <&wakeupgen>;
19
20
21 aliases {
22 i2c0 = &i2c0;
23 i2c1 = &i2c1;
24 i2c2 = &i2c2;
25 serial0 = &uart0;
26 serial1 = &uart1;
27 serial2 = &uart2;
28 serial3 = &uart3;
29 serial4 = &uart4;
30 serial5 = &uart5;
31 ethernet0 = &cpsw_emac0;
32 ethernet1 = &cpsw_emac1;
33 };
34
35 cpus {
36 #address-cells = <1>;
37 #size-cells = <0>;
38 cpu: cpu@0 {
39 compatible = "arm,cortex-a9";
40 device_type = "cpu";
41 reg = <0>;
42
43 clocks = <&dpll_mpu_ck>;
44 clock-names = "cpu";
45
46 clock-latency = <300000>; /* From omap-cpufreq driver */
47 };
48 };
49
50 gic: interrupt-controller@48241000 {
51 compatible = "arm,cortex-a9-gic";
52 interrupt-controller;
53 #interrupt-cells = <3>;
54 reg = <0x48241000 0x1000>,
55 <0x48240100 0x0100>;
56 interrupt-parent = <&gic>;
57 };
58
59 wakeupgen: interrupt-controller@48281000 {
60 compatible = "ti,omap4-wugen-mpu";
61 interrupt-controller;
62 #interrupt-cells = <3>;
63 reg = <0x48281000 0x1000>;
64 interrupt-parent = <&gic>;
65 };
66
67 scu: scu@48240000 {
68 compatible = "arm,cortex-a9-scu";
69 reg = <0x48240000 0x100>;
70 };
71
72 global_timer: timer@48240200 {
73 compatible = "arm,cortex-a9-global-timer";
74 reg = <0x48240200 0x100>;
75 interrupts = <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH>;
76 interrupt-parent = <&gic>;
77 clocks = <&mpu_periphclk>;
78 };
79
80 local_timer: timer@48240600 {
81 compatible = "arm,cortex-a9-twd-timer";
82 reg = <0x48240600 0x100>;
83 interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>;
84 interrupt-parent = <&gic>;
85 clocks = <&mpu_periphclk>;
86 };
87
88 l2-cache-controller@48242000 {
89 compatible = "arm,pl310-cache";
90 reg = <0x48242000 0x1000>;
91 cache-unified;
92 cache-level = <2>;
93 };
94
95 ocp {
96 compatible = "ti,am4372-l3-noc", "simple-bus";
97 #address-cells = <1>;
98 #size-cells = <1>;
99 ranges;
100 ti,hwmods = "l3_main";
101 reg = <0x44000000 0x400000
102 0x44800000 0x400000>;
103 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
104 <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
105
106 l4_wkup: l4_wkup@44c00000 {
107 compatible = "ti,am4-l4-wkup", "simple-bus";
108 #address-cells = <1>;
109 #size-cells = <1>;
110 ranges = <0 0x44c00000 0x287000>;
111
112 wkup_m3: wkup_m3@100000 {
113 compatible = "ti,am4372-wkup-m3";
114 reg = <0x100000 0x4000>,
115 <0x180000 0x2000>;
116 reg-names = "umem", "dmem";
117 ti,hwmods = "wkup_m3";
118 ti,pm-firmware = "am335x-pm-firmware.elf";
119 };
120
121 prcm: prcm@1f0000 {
122 compatible = "ti,am4-prcm";
123 reg = <0x1f0000 0x11000>;
124 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
125
126 prcm_clocks: clocks {
127 #address-cells = <1>;
128 #size-cells = <0>;
129 };
130
131 prcm_clockdomains: clockdomains {
132 };
133 };
134
135 scm: scm@210000 {
136 compatible = "ti,am4-scm", "simple-bus";
137 reg = <0x210000 0x4000>;
138 #address-cells = <1>;
139 #size-cells = <1>;
140 ranges = <0 0x210000 0x4000>;
141
142 am43xx_pinmux: pinmux@800 {
143 compatible = "ti,am437-padconf",
144 "pinctrl-single";
145 reg = <0x800 0x31c>;
146 #address-cells = <1>;
147 #size-cells = <0>;
148 #interrupt-cells = <1>;
149 interrupt-controller;
150 pinctrl-single,register-width = <32>;
151 pinctrl-single,function-mask = <0xffffffff>;
152 };
153
154 scm_conf: scm_conf@0 {
155 compatible = "syscon";
156 reg = <0x0 0x800>;
157 #address-cells = <1>;
158 #size-cells = <1>;
159
160 scm_clocks: clocks {
161 #address-cells = <1>;
162 #size-cells = <0>;
163 };
164 };
165
166 wkup_m3_ipc: wkup_m3_ipc@1324 {
167 compatible = "ti,am4372-wkup-m3-ipc";
168 reg = <0x1324 0x44>;
169 interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
170 ti,rproc = <&wkup_m3>;
171 mboxes = <&mailbox &mbox_wkupm3>;
172 };
173
174 scm_clockdomains: clockdomains {
175 };
176 };
177 };
178
179 emif: emif@4c000000 {
180 compatible = "ti,emif-am4372";
181 reg = <0x4c000000 0x1000000>;
182 ti,hwmods = "emif";
183 };
184
185 edma: edma@49000000 {
186 compatible = "ti,edma3";
187 ti,hwmods = "tpcc", "tptc0", "tptc1", "tptc2";
188 reg = <0x49000000 0x10000>,
189 <0x44e10f90 0x10>;
190 interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
191 <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
192 <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
193 #dma-cells = <1>;
194 };
195
196 uart0: serial@44e09000 {
197 compatible = "ti,am4372-uart","ti,omap2-uart";
198 reg = <0x44e09000 0x2000>;
199 interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
200 ti,hwmods = "uart1";
201 };
202
203 uart1: serial@48022000 {
204 compatible = "ti,am4372-uart","ti,omap2-uart";
205 reg = <0x48022000 0x2000>;
206 interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
207 ti,hwmods = "uart2";
208 status = "disabled";
209 };
210
211 uart2: serial@48024000 {
212 compatible = "ti,am4372-uart","ti,omap2-uart";
213 reg = <0x48024000 0x2000>;
214 interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
215 ti,hwmods = "uart3";
216 status = "disabled";
217 };
218
219 uart3: serial@481a6000 {
220 compatible = "ti,am4372-uart","ti,omap2-uart";
221 reg = <0x481a6000 0x2000>;
222 interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
223 ti,hwmods = "uart4";
224 status = "disabled";
225 };
226
227 uart4: serial@481a8000 {
228 compatible = "ti,am4372-uart","ti,omap2-uart";
229 reg = <0x481a8000 0x2000>;
230 interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
231 ti,hwmods = "uart5";
232 status = "disabled";
233 };
234
235 uart5: serial@481aa000 {
236 compatible = "ti,am4372-uart","ti,omap2-uart";
237 reg = <0x481aa000 0x2000>;
238 interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
239 ti,hwmods = "uart6";
240 status = "disabled";
241 };
242
243 mailbox: mailbox@480C8000 {
244 compatible = "ti,omap4-mailbox";
245 reg = <0x480C8000 0x200>;
246 interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
247 ti,hwmods = "mailbox";
248 #mbox-cells = <1>;
249 ti,mbox-num-users = <4>;
250 ti,mbox-num-fifos = <8>;
251 mbox_wkupm3: wkup_m3 {
252 ti,mbox-tx = <0 0 0>;
253 ti,mbox-rx = <0 0 3>;
254 };
255 };
256
257 timer1: timer@44e31000 {
258 compatible = "ti,am4372-timer-1ms","ti,am335x-timer-1ms";
259 reg = <0x44e31000 0x400>;
260 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
261 ti,timer-alwon;
262 ti,hwmods = "timer1";
263 };
264
265 timer2: timer@48040000 {
266 compatible = "ti,am4372-timer","ti,am335x-timer";
267 reg = <0x48040000 0x400>;
268 interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
269 ti,hwmods = "timer2";
270 };
271
272 timer3: timer@48042000 {
273 compatible = "ti,am4372-timer","ti,am335x-timer";
274 reg = <0x48042000 0x400>;
275 interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
276 ti,hwmods = "timer3";
277 status = "disabled";
278 };
279
280 timer4: timer@48044000 {
281 compatible = "ti,am4372-timer","ti,am335x-timer";
282 reg = <0x48044000 0x400>;
283 interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>;
284 ti,timer-pwm;
285 ti,hwmods = "timer4";
286 status = "disabled";
287 };
288
289 timer5: timer@48046000 {
290 compatible = "ti,am4372-timer","ti,am335x-timer";
291 reg = <0x48046000 0x400>;
292 interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
293 ti,timer-pwm;
294 ti,hwmods = "timer5";
295 status = "disabled";
296 };
297
298 timer6: timer@48048000 {
299 compatible = "ti,am4372-timer","ti,am335x-timer";
300 reg = <0x48048000 0x400>;
301 interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
302 ti,timer-pwm;
303 ti,hwmods = "timer6";
304 status = "disabled";
305 };
306
307 timer7: timer@4804a000 {
308 compatible = "ti,am4372-timer","ti,am335x-timer";
309 reg = <0x4804a000 0x400>;
310 interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
311 ti,timer-pwm;
312 ti,hwmods = "timer7";
313 status = "disabled";
314 };
315
316 timer8: timer@481c1000 {
317 compatible = "ti,am4372-timer","ti,am335x-timer";
318 reg = <0x481c1000 0x400>;
319 interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
320 ti,hwmods = "timer8";
321 status = "disabled";
322 };
323
324 timer9: timer@4833d000 {
325 compatible = "ti,am4372-timer","ti,am335x-timer";
326 reg = <0x4833d000 0x400>;
327 interrupts = <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>;
328 ti,hwmods = "timer9";
329 status = "disabled";
330 };
331
332 timer10: timer@4833f000 {
333 compatible = "ti,am4372-timer","ti,am335x-timer";
334 reg = <0x4833f000 0x400>;
335 interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
336 ti,hwmods = "timer10";
337 status = "disabled";
338 };
339
340 timer11: timer@48341000 {
341 compatible = "ti,am4372-timer","ti,am335x-timer";
342 reg = <0x48341000 0x400>;
343 interrupts = <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>;
344 ti,hwmods = "timer11";
345 status = "disabled";
346 };
347
348 counter32k: counter@44e86000 {
349 compatible = "ti,am4372-counter32k","ti,omap-counter32k";
350 reg = <0x44e86000 0x40>;
351 ti,hwmods = "counter_32k";
352 };
353
354 rtc: rtc@44e3e000 {
355 compatible = "ti,am4372-rtc", "ti,am3352-rtc",
356 "ti,da830-rtc";
357 reg = <0x44e3e000 0x1000>;
358 interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH
359 GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
360 ti,hwmods = "rtc";
361 clocks = <&clk_32768_ck>;
362 clock-names = "int-clk";
363 status = "disabled";
364 };
365
366 wdt: wdt@44e35000 {
367 compatible = "ti,am4372-wdt","ti,omap3-wdt";
368 reg = <0x44e35000 0x1000>;
369 interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
370 ti,hwmods = "wd_timer2";
371 };
372
373 gpio0: gpio@44e07000 {
374 compatible = "ti,am4372-gpio","ti,omap4-gpio";
375 reg = <0x44e07000 0x1000>;
376 interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
377 gpio-controller;
378 #gpio-cells = <2>;
379 interrupt-controller;
380 #interrupt-cells = <2>;
381 ti,hwmods = "gpio1";
382 status = "disabled";
383 };
384
385 gpio1: gpio@4804c000 {
386 compatible = "ti,am4372-gpio","ti,omap4-gpio";
387 reg = <0x4804c000 0x1000>;
388 interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
389 gpio-controller;
390 #gpio-cells = <2>;
391 interrupt-controller;
392 #interrupt-cells = <2>;
393 ti,hwmods = "gpio2";
394 status = "disabled";
395 };
396
397 gpio2: gpio@481ac000 {
398 compatible = "ti,am4372-gpio","ti,omap4-gpio";
399 reg = <0x481ac000 0x1000>;
400 interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
401 gpio-controller;
402 #gpio-cells = <2>;
403 interrupt-controller;
404 #interrupt-cells = <2>;
405 ti,hwmods = "gpio3";
406 status = "disabled";
407 };
408
409 gpio3: gpio@481ae000 {
410 compatible = "ti,am4372-gpio","ti,omap4-gpio";
411 reg = <0x481ae000 0x1000>;
412 interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
413 gpio-controller;
414 #gpio-cells = <2>;
415 interrupt-controller;
416 #interrupt-cells = <2>;
417 ti,hwmods = "gpio4";
418 status = "disabled";
419 };
420
421 gpio4: gpio@48320000 {
422 compatible = "ti,am4372-gpio","ti,omap4-gpio";
423 reg = <0x48320000 0x1000>;
424 interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
425 gpio-controller;
426 #gpio-cells = <2>;
427 interrupt-controller;
428 #interrupt-cells = <2>;
429 ti,hwmods = "gpio5";
430 status = "disabled";
431 };
432
433 gpio5: gpio@48322000 {
434 compatible = "ti,am4372-gpio","ti,omap4-gpio";
435 reg = <0x48322000 0x1000>;
436 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
437 gpio-controller;
438 #gpio-cells = <2>;
439 interrupt-controller;
440 #interrupt-cells = <2>;
441 ti,hwmods = "gpio6";
442 status = "disabled";
443 };
444
445 hwspinlock: spinlock@480ca000 {
446 compatible = "ti,omap4-hwspinlock";
447 reg = <0x480ca000 0x1000>;
448 ti,hwmods = "spinlock";
449 #hwlock-cells = <1>;
450 };
451
452 i2c0: i2c@44e0b000 {
453 compatible = "ti,am4372-i2c","ti,omap4-i2c";
454 reg = <0x44e0b000 0x1000>;
455 interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
456 ti,hwmods = "i2c1";
457 #address-cells = <1>;
458 #size-cells = <0>;
459 status = "disabled";
460 };
461
462 i2c1: i2c@4802a000 {
463 compatible = "ti,am4372-i2c","ti,omap4-i2c";
464 reg = <0x4802a000 0x1000>;
465 interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
466 ti,hwmods = "i2c2";
467 #address-cells = <1>;
468 #size-cells = <0>;
469 status = "disabled";
470 };
471
472 i2c2: i2c@4819c000 {
473 compatible = "ti,am4372-i2c","ti,omap4-i2c";
474 reg = <0x4819c000 0x1000>;
475 interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
476 ti,hwmods = "i2c3";
477 #address-cells = <1>;
478 #size-cells = <0>;
479 status = "disabled";
480 };
481
482 spi0: spi@48030000 {
483 compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
484 reg = <0x48030000 0x400>;
485 interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
486 ti,hwmods = "spi0";
487 #address-cells = <1>;
488 #size-cells = <0>;
489 status = "disabled";
490 };
491
492 mmc1: mmc@48060000 {
493 compatible = "ti,omap4-hsmmc";
494 reg = <0x48060000 0x1000>;
495 ti,hwmods = "mmc1";
496 ti,dual-volt;
497 ti,needs-special-reset;
498 dmas = <&edma 24
499 &edma 25>;
500 dma-names = "tx", "rx";
501 interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
502 status = "disabled";
503 };
504
505 mmc2: mmc@481d8000 {
506 compatible = "ti,omap4-hsmmc";
507 reg = <0x481d8000 0x1000>;
508 ti,hwmods = "mmc2";
509 ti,needs-special-reset;
510 dmas = <&edma 2
511 &edma 3>;
512 dma-names = "tx", "rx";
513 interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
514 status = "disabled";
515 };
516
517 mmc3: mmc@47810000 {
518 compatible = "ti,omap4-hsmmc";
519 reg = <0x47810000 0x1000>;
520 ti,hwmods = "mmc3";
521 ti,needs-special-reset;
522 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
523 status = "disabled";
524 };
525
526 spi1: spi@481a0000 {
527 compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
528 reg = <0x481a0000 0x400>;
529 interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>;
530 ti,hwmods = "spi1";
531 #address-cells = <1>;
532 #size-cells = <0>;
533 status = "disabled";
534 };
535
536 spi2: spi@481a2000 {
537 compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
538 reg = <0x481a2000 0x400>;
539 interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
540 ti,hwmods = "spi2";
541 #address-cells = <1>;
542 #size-cells = <0>;
543 status = "disabled";
544 };
545
546 spi3: spi@481a4000 {
547 compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
548 reg = <0x481a4000 0x400>;
549 interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>;
550 ti,hwmods = "spi3";
551 #address-cells = <1>;
552 #size-cells = <0>;
553 status = "disabled";
554 };
555
556 spi4: spi@48345000 {
557 compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
558 reg = <0x48345000 0x400>;
559 interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>;
560 ti,hwmods = "spi4";
561 #address-cells = <1>;
562 #size-cells = <0>;
563 status = "disabled";
564 };
565
566 mac: ethernet@4a100000 {
567 compatible = "ti,am4372-cpsw","ti,cpsw";
568 reg = <0x4a100000 0x800
569 0x4a101200 0x100>;
570 interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH
571 GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH
572 GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH
573 GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
574 #address-cells = <1>;
575 #size-cells = <1>;
576 ti,hwmods = "cpgmac0";
577 clocks = <&cpsw_125mhz_gclk>, <&cpsw_cpts_rft_clk>,
578 <&dpll_clksel_mac_clk>;
579 clock-names = "fck", "cpts", "50mclk";
580 assigned-clocks = <&dpll_clksel_mac_clk>;
581 assigned-clock-rates = <50000000>;
582 status = "disabled";
583 cpdma_channels = <8>;
584 ale_entries = <1024>;
585 bd_ram_size = <0x2000>;
586 no_bd_ram = <0>;
587 rx_descs = <64>;
588 mac_control = <0x20>;
589 slaves = <2>;
590 active_slave = <0>;
591 cpts_clock_mult = <0x80000000>;
592 cpts_clock_shift = <29>;
593 ranges;
594 syscon = <&scm_conf>;
595
596 davinci_mdio: mdio@4a101000 {
597 compatible = "ti,am4372-mdio","ti,davinci_mdio";
598 reg = <0x4a101000 0x100>;
599 #address-cells = <1>;
600 #size-cells = <0>;
601 ti,hwmods = "davinci_mdio";
602 bus_freq = <1000000>;
603 status = "disabled";
604 };
605
606 cpsw_emac0: slave@4a100200 {
607 /* Filled in by U-Boot */
608 mac-address = [ 00 00 00 00 00 00 ];
609 };
610
611 cpsw_emac1: slave@4a100300 {
612 /* Filled in by U-Boot */
613 mac-address = [ 00 00 00 00 00 00 ];
614 };
615
616 phy_sel: cpsw-phy-sel@44e10650 {
617 compatible = "ti,am43xx-cpsw-phy-sel";
618 reg= <0x44e10650 0x4>;
619 reg-names = "gmii-sel";
620 };
621 };
622
623 epwmss0: epwmss@48300000 {
624 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
625 reg = <0x48300000 0x10>;
626 #address-cells = <1>;
627 #size-cells = <1>;
628 ranges;
629 ti,hwmods = "epwmss0";
630 status = "disabled";
631
632 ecap0: ecap@48300100 {
633 compatible = "ti,am4372-ecap","ti,am33xx-ecap";
634 #pwm-cells = <3>;
635 reg = <0x48300100 0x80>;
636 ti,hwmods = "ecap0";
637 status = "disabled";
638 };
639
640 ehrpwm0: ehrpwm@48300200 {
641 compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
642 #pwm-cells = <3>;
643 reg = <0x48300200 0x80>;
644 ti,hwmods = "ehrpwm0";
645 status = "disabled";
646 };
647 };
648
649 epwmss1: epwmss@48302000 {
650 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
651 reg = <0x48302000 0x10>;
652 #address-cells = <1>;
653 #size-cells = <1>;
654 ranges;
655 ti,hwmods = "epwmss1";
656 status = "disabled";
657
658 ecap1: ecap@48302100 {
659 compatible = "ti,am4372-ecap","ti,am33xx-ecap";
660 #pwm-cells = <3>;
661 reg = <0x48302100 0x80>;
662 ti,hwmods = "ecap1";
663 status = "disabled";
664 };
665
666 ehrpwm1: ehrpwm@48302200 {
667 compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
668 #pwm-cells = <3>;
669 reg = <0x48302200 0x80>;
670 ti,hwmods = "ehrpwm1";
671 status = "disabled";
672 };
673 };
674
675 epwmss2: epwmss@48304000 {
676 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
677 reg = <0x48304000 0x10>;
678 #address-cells = <1>;
679 #size-cells = <1>;
680 ranges;
681 ti,hwmods = "epwmss2";
682 status = "disabled";
683
684 ecap2: ecap@48304100 {
685 compatible = "ti,am4372-ecap","ti,am33xx-ecap";
686 #pwm-cells = <3>;
687 reg = <0x48304100 0x80>;
688 ti,hwmods = "ecap2";
689 status = "disabled";
690 };
691
692 ehrpwm2: ehrpwm@48304200 {
693 compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
694 #pwm-cells = <3>;
695 reg = <0x48304200 0x80>;
696 ti,hwmods = "ehrpwm2";
697 status = "disabled";
698 };
699 };
700
701 epwmss3: epwmss@48306000 {
702 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
703 reg = <0x48306000 0x10>;
704 #address-cells = <1>;
705 #size-cells = <1>;
706 ranges;
707 ti,hwmods = "epwmss3";
708 status = "disabled";
709
710 ehrpwm3: ehrpwm@48306200 {
711 compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
712 #pwm-cells = <3>;
713 reg = <0x48306200 0x80>;
714 ti,hwmods = "ehrpwm3";
715 status = "disabled";
716 };
717 };
718
719 epwmss4: epwmss@48308000 {
720 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
721 reg = <0x48308000 0x10>;
722 #address-cells = <1>;
723 #size-cells = <1>;
724 ranges;
725 ti,hwmods = "epwmss4";
726 status = "disabled";
727
728 ehrpwm4: ehrpwm@48308200 {
729 compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
730 #pwm-cells = <3>;
731 reg = <0x48308200 0x80>;
732 ti,hwmods = "ehrpwm4";
733 status = "disabled";
734 };
735 };
736
737 epwmss5: epwmss@4830a000 {
738 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
739 reg = <0x4830a000 0x10>;
740 #address-cells = <1>;
741 #size-cells = <1>;
742 ranges;
743 ti,hwmods = "epwmss5";
744 status = "disabled";
745
746 ehrpwm5: ehrpwm@4830a200 {
747 compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
748 #pwm-cells = <3>;
749 reg = <0x4830a200 0x80>;
750 ti,hwmods = "ehrpwm5";
751 status = "disabled";
752 };
753 };
754
755 tscadc: tscadc@44e0d000 {
756 compatible = "ti,am3359-tscadc";
757 reg = <0x44e0d000 0x1000>;
758 ti,hwmods = "adc_tsc";
759 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
760 clocks = <&adc_tsc_fck>;
761 clock-names = "fck";
762 status = "disabled";
763
764 tsc {
765 compatible = "ti,am3359-tsc";
766 };
767
768 adc {
769 #io-channel-cells = <1>;
770 compatible = "ti,am3359-adc";
771 };
772
773 };
774
775 sham: sham@53100000 {
776 compatible = "ti,omap5-sham";
777 ti,hwmods = "sham";
778 reg = <0x53100000 0x300>;
779 dmas = <&edma 36>;
780 dma-names = "rx";
781 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
782 };
783
784 aes: aes@53501000 {
785 compatible = "ti,omap4-aes";
786 ti,hwmods = "aes";
787 reg = <0x53501000 0xa0>;
788 interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
789 dmas = <&edma 6
790 &edma 5>;
791 dma-names = "tx", "rx";
792 };
793
794 des: des@53701000 {
795 compatible = "ti,omap4-des";
796 ti,hwmods = "des";
797 reg = <0x53701000 0xa0>;
798 interrupts = <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>;
799 dmas = <&edma 34
800 &edma 33>;
801 dma-names = "tx", "rx";
802 };
803
804 mcasp0: mcasp@48038000 {
805 compatible = "ti,am33xx-mcasp-audio";
806 ti,hwmods = "mcasp0";
807 reg = <0x48038000 0x2000>,
808 <0x46000000 0x400000>;
809 reg-names = "mpu", "dat";
810 interrupts = <80>, <81>;
811 interrupt-names = "tx", "rx";
812 status = "disabled";
813 dmas = <&edma 8>,
814 <&edma 9>;
815 dma-names = "tx", "rx";
816 };
817
818 mcasp1: mcasp@4803C000 {
819 compatible = "ti,am33xx-mcasp-audio";
820 ti,hwmods = "mcasp1";
821 reg = <0x4803C000 0x2000>,
822 <0x46400000 0x400000>;
823 reg-names = "mpu", "dat";
824 interrupts = <82>, <83>;
825 interrupt-names = "tx", "rx";
826 status = "disabled";
827 dmas = <&edma 10>,
828 <&edma 11>;
829 dma-names = "tx", "rx";
830 };
831
832 elm: elm@48080000 {
833 compatible = "ti,am3352-elm";
834 reg = <0x48080000 0x2000>;
835 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
836 ti,hwmods = "elm";
837 clocks = <&l4ls_gclk>;
838 clock-names = "fck";
839 status = "disabled";
840 };
841
842 gpmc: gpmc@50000000 {
843 compatible = "ti,am3352-gpmc";
844 ti,hwmods = "gpmc";
845 clocks = <&l3s_gclk>;
846 clock-names = "fck";
847 reg = <0x50000000 0x2000>;
848 interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
849 gpmc,num-cs = <7>;
850 gpmc,num-waitpins = <2>;
851 #address-cells = <2>;
852 #size-cells = <1>;
853 status = "disabled";
854 };
855
856 am43xx_control_usb2phy1: control-phy@44e10620 {
857 compatible = "ti,control-phy-usb2-am437";
858 reg = <0x44e10620 0x4>;
859 reg-names = "power";
860 };
861
862 am43xx_control_usb2phy2: control-phy@0x44e10628 {
863 compatible = "ti,control-phy-usb2-am437";
864 reg = <0x44e10628 0x4>;
865 reg-names = "power";
866 };
867
868 ocp2scp0: ocp2scp@483a8000 {
869 compatible = "ti,am437x-ocp2scp", "ti,omap-ocp2scp";
870 #address-cells = <1>;
871 #size-cells = <1>;
872 ranges;
873 ti,hwmods = "ocp2scp0";
874
875 usb2_phy1: phy@483a8000 {
876 compatible = "ti,am437x-usb2";
877 reg = <0x483a8000 0x8000>;
878 ctrl-module = <&am43xx_control_usb2phy1>;
879 clocks = <&usb_phy0_always_on_clk32k>,
880 <&usb_otg_ss0_refclk960m>;
881 clock-names = "wkupclk", "refclk";
882 #phy-cells = <0>;
883 status = "disabled";
884 };
885 };
886
887 ocp2scp1: ocp2scp@483e8000 {
888 compatible = "ti,am437x-ocp2scp", "ti,omap-ocp2scp";
889 #address-cells = <1>;
890 #size-cells = <1>;
891 ranges;
892 ti,hwmods = "ocp2scp1";
893
894 usb2_phy2: phy@483e8000 {
895 compatible = "ti,am437x-usb2";
896 reg = <0x483e8000 0x8000>;
897 ctrl-module = <&am43xx_control_usb2phy2>;
898 clocks = <&usb_phy1_always_on_clk32k>,
899 <&usb_otg_ss1_refclk960m>;
900 clock-names = "wkupclk", "refclk";
901 #phy-cells = <0>;
902 status = "disabled";
903 };
904 };
905
906 dwc3_1: omap_dwc3@48380000 {
907 compatible = "ti,am437x-dwc3";
908 ti,hwmods = "usb_otg_ss0";
909 reg = <0x48380000 0x10000>;
910 interrupts = <GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH>;
911 #address-cells = <1>;
912 #size-cells = <1>;
913 utmi-mode = <1>;
914 ranges;
915
916 usb1: usb@48390000 {
917 compatible = "synopsys,dwc3";
918 reg = <0x48390000 0x10000>;
919 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>,
920 <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>,
921 <GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH>;
922 interrupt-names = "peripheral",
923 "host",
924 "otg";
925 phys = <&usb2_phy1>;
926 phy-names = "usb2-phy";
927 maximum-speed = "high-speed";
928 dr_mode = "otg";
929 status = "disabled";
930 snps,dis_u3_susphy_quirk;
931 snps,dis_u2_susphy_quirk;
932 };
933 };
934
935 dwc3_2: omap_dwc3@483c0000 {
936 compatible = "ti,am437x-dwc3";
937 ti,hwmods = "usb_otg_ss1";
938 reg = <0x483c0000 0x10000>;
939 interrupts = <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>;
940 #address-cells = <1>;
941 #size-cells = <1>;
942 utmi-mode = <1>;
943 ranges;
944
945 usb2: usb@483d0000 {
946 compatible = "synopsys,dwc3";
947 reg = <0x483d0000 0x10000>;
948 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>,
949 <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>,
950 <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>;
951 interrupt-names = "peripheral",
952 "host",
953 "otg";
954 phys = <&usb2_phy2>;
955 phy-names = "usb2-phy";
956 maximum-speed = "high-speed";
957 dr_mode = "otg";
958 status = "disabled";
959 snps,dis_u3_susphy_quirk;
960 snps,dis_u2_susphy_quirk;
961 };
962 };
963
964 qspi: qspi@47900000 {
965 compatible = "ti,am4372-qspi";
966 reg = <0x47900000 0x100>;
967 #address-cells = <1>;
968 #size-cells = <0>;
969 ti,hwmods = "qspi";
970 interrupts = <0 138 0x4>;
971 num-cs = <4>;
972 status = "disabled";
973 };
974
975 hdq: hdq@48347000 {
976 compatible = "ti,am4372-hdq";
977 reg = <0x48347000 0x1000>;
978 interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>;
979 clocks = <&func_12m_clk>;
980 clock-names = "fck";
981 ti,hwmods = "hdq1w";
982 status = "disabled";
983 };
984
985 dss: dss@4832a000 {
986 compatible = "ti,omap3-dss";
987 reg = <0x4832a000 0x200>;
988 status = "disabled";
989 ti,hwmods = "dss_core";
990 clocks = <&disp_clk>;
991 clock-names = "fck";
992 #address-cells = <1>;
993 #size-cells = <1>;
994 ranges;
995
996 dispc: dispc@4832a400 {
997 compatible = "ti,omap3-dispc";
998 reg = <0x4832a400 0x400>;
999 interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
1000 ti,hwmods = "dss_dispc";
1001 clocks = <&disp_clk>;
1002 clock-names = "fck";
1003 };
1004
1005 rfbi: rfbi@4832a800 {
1006 compatible = "ti,omap3-rfbi";
1007 reg = <0x4832a800 0x100>;
1008 ti,hwmods = "dss_rfbi";
1009 clocks = <&disp_clk>;
1010 clock-names = "fck";
1011 status = "disabled";
1012 };
1013 };
1014
1015 ocmcram: ocmcram@40300000 {
1016 compatible = "mmio-sram";
1017 reg = <0x40300000 0x40000>; /* 256k */
1018 };
1019
1020 dcan0: can@481cc000 {
1021 compatible = "ti,am4372-d_can", "ti,am3352-d_can";
1022 ti,hwmods = "d_can0";
1023 clocks = <&dcan0_fck>;
1024 clock-names = "fck";
1025 reg = <0x481cc000 0x2000>;
1026 syscon-raminit = <&scm_conf 0x644 0>;
1027 interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
1028 status = "disabled";
1029 };
1030
1031 dcan1: can@481d0000 {
1032 compatible = "ti,am4372-d_can", "ti,am3352-d_can";
1033 ti,hwmods = "d_can1";
1034 clocks = <&dcan1_fck>;
1035 clock-names = "fck";
1036 reg = <0x481d0000 0x2000>;
1037 syscon-raminit = <&scm_conf 0x644 1>;
1038 interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
1039 status = "disabled";
1040 };
1041
1042 vpfe0: vpfe@48326000 {
1043 compatible = "ti,am437x-vpfe";
1044 reg = <0x48326000 0x2000>;
1045 interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
1046 ti,hwmods = "vpfe0";
1047 status = "disabled";
1048 };
1049
1050 vpfe1: vpfe@48328000 {
1051 compatible = "ti,am437x-vpfe";
1052 reg = <0x48328000 0x2000>;
1053 interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
1054 ti,hwmods = "vpfe1";
1055 status = "disabled";
1056 };
1057 };
1058};
1059
1060/include/ "am43xx-clocks.dtsi"