| Kyle Swenson | 8d8f654 | 2021-03-15 11:02:55 -0600 | [diff] [blame^] | 1 | /* |
| 2 | * DTS file for all SPEAr3xx SoCs |
| 3 | * |
| 4 | * Copyright 2012 Viresh Kumar <vireshk@kernel.org> |
| 5 | * |
| 6 | * The code contained herein is licensed under the GNU General Public |
| 7 | * License. You may obtain a copy of the GNU General Public License |
| 8 | * Version 2 or later at the following locations: |
| 9 | * |
| 10 | * http://www.opensource.org/licenses/gpl-license.html |
| 11 | * http://www.gnu.org/copyleft/gpl.html |
| 12 | */ |
| 13 | |
| 14 | /include/ "skeleton.dtsi" |
| 15 | |
| 16 | / { |
| 17 | interrupt-parent = <&vic>; |
| 18 | |
| 19 | cpus { |
| 20 | #address-cells = <0>; |
| 21 | #size-cells = <0>; |
| 22 | |
| 23 | cpu { |
| 24 | compatible = "arm,arm926ej-s"; |
| 25 | device_type = "cpu"; |
| 26 | }; |
| 27 | }; |
| 28 | |
| 29 | memory { |
| 30 | device_type = "memory"; |
| 31 | reg = <0 0x40000000>; |
| 32 | }; |
| 33 | |
| 34 | ahb { |
| 35 | #address-cells = <1>; |
| 36 | #size-cells = <1>; |
| 37 | compatible = "simple-bus"; |
| 38 | ranges = <0xd0000000 0xd0000000 0x30000000>; |
| 39 | |
| 40 | vic: interrupt-controller@f1100000 { |
| 41 | compatible = "arm,pl190-vic"; |
| 42 | interrupt-controller; |
| 43 | reg = <0xf1100000 0x1000>; |
| 44 | #interrupt-cells = <1>; |
| 45 | }; |
| 46 | |
| 47 | dma@fc400000 { |
| 48 | compatible = "arm,pl080", "arm,primecell"; |
| 49 | reg = <0xfc400000 0x1000>; |
| 50 | interrupt-parent = <&vic>; |
| 51 | interrupts = <8>; |
| 52 | status = "disabled"; |
| 53 | }; |
| 54 | |
| 55 | gmac: eth@e0800000 { |
| 56 | compatible = "st,spear600-gmac"; |
| 57 | reg = <0xe0800000 0x8000>; |
| 58 | interrupts = <23 22>; |
| 59 | interrupt-names = "macirq", "eth_wake_irq"; |
| 60 | phy-mode = "mii"; |
| 61 | status = "disabled"; |
| 62 | }; |
| 63 | |
| 64 | smi: flash@fc000000 { |
| 65 | compatible = "st,spear600-smi"; |
| 66 | #address-cells = <1>; |
| 67 | #size-cells = <1>; |
| 68 | reg = <0xfc000000 0x1000>; |
| 69 | interrupts = <9>; |
| 70 | status = "disabled"; |
| 71 | }; |
| 72 | |
| 73 | spi0: spi@d0100000 { |
| 74 | compatible = "arm,pl022", "arm,primecell"; |
| 75 | reg = <0xd0100000 0x1000>; |
| 76 | interrupts = <20>; |
| 77 | #address-cells = <1>; |
| 78 | #size-cells = <0>; |
| 79 | status = "disabled"; |
| 80 | }; |
| 81 | |
| 82 | ehci@e1800000 { |
| 83 | compatible = "st,spear600-ehci", "usb-ehci"; |
| 84 | reg = <0xe1800000 0x1000>; |
| 85 | interrupts = <26>; |
| 86 | status = "disabled"; |
| 87 | }; |
| 88 | |
| 89 | ohci@e1900000 { |
| 90 | compatible = "st,spear600-ohci", "usb-ohci"; |
| 91 | reg = <0xe1900000 0x1000>; |
| 92 | interrupts = <25>; |
| 93 | status = "disabled"; |
| 94 | }; |
| 95 | |
| 96 | ohci@e2100000 { |
| 97 | compatible = "st,spear600-ohci", "usb-ohci"; |
| 98 | reg = <0xe2100000 0x1000>; |
| 99 | interrupts = <27>; |
| 100 | status = "disabled"; |
| 101 | }; |
| 102 | |
| 103 | apb { |
| 104 | #address-cells = <1>; |
| 105 | #size-cells = <1>; |
| 106 | compatible = "simple-bus"; |
| 107 | ranges = <0xd0000000 0xd0000000 0x30000000>; |
| 108 | |
| 109 | gpio0: gpio@fc980000 { |
| 110 | compatible = "arm,pl061", "arm,primecell"; |
| 111 | reg = <0xfc980000 0x1000>; |
| 112 | interrupts = <11>; |
| 113 | gpio-controller; |
| 114 | #gpio-cells = <2>; |
| 115 | interrupt-controller; |
| 116 | #interrupt-cells = <2>; |
| 117 | status = "disabled"; |
| 118 | }; |
| 119 | |
| 120 | i2c0: i2c@d0180000 { |
| 121 | #address-cells = <1>; |
| 122 | #size-cells = <0>; |
| 123 | compatible = "snps,designware-i2c"; |
| 124 | reg = <0xd0180000 0x1000>; |
| 125 | interrupts = <21>; |
| 126 | status = "disabled"; |
| 127 | }; |
| 128 | |
| 129 | rtc@fc900000 { |
| 130 | compatible = "st,spear600-rtc"; |
| 131 | reg = <0xfc900000 0x1000>; |
| 132 | interrupts = <10>; |
| 133 | status = "disabled"; |
| 134 | }; |
| 135 | |
| 136 | serial@d0000000 { |
| 137 | compatible = "arm,pl011", "arm,primecell"; |
| 138 | reg = <0xd0000000 0x1000>; |
| 139 | interrupts = <19>; |
| 140 | status = "disabled"; |
| 141 | }; |
| 142 | |
| 143 | wdt@fc880000 { |
| 144 | compatible = "arm,sp805", "arm,primecell"; |
| 145 | reg = <0xfc880000 0x1000>; |
| 146 | interrupts = <12>; |
| 147 | status = "disabled"; |
| 148 | }; |
| 149 | |
| 150 | timer@f0000000 { |
| 151 | compatible = "st,spear-timer"; |
| 152 | reg = <0xf0000000 0x400>; |
| 153 | interrupts = <2>; |
| 154 | }; |
| 155 | }; |
| 156 | }; |
| 157 | }; |