Kyle Swenson | 8d8f654 | 2021-03-15 11:02:55 -0600 | [diff] [blame^] | 1 | /* io.h: FRV I/O operations |
| 2 | * |
| 3 | * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved. |
| 4 | * Written by David Howells (dhowells@redhat.com) |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or |
| 7 | * modify it under the terms of the GNU General Public License |
| 8 | * as published by the Free Software Foundation; either version |
| 9 | * 2 of the License, or (at your option) any later version. |
| 10 | * |
| 11 | * This gets interesting when talking to the PCI bus - the CPU is in big endian |
| 12 | * mode, the PCI bus is little endian and the hardware in the middle can do |
| 13 | * byte swapping |
| 14 | */ |
| 15 | #ifndef _ASM_IO_H |
| 16 | #define _ASM_IO_H |
| 17 | |
| 18 | #ifdef __KERNEL__ |
| 19 | |
| 20 | #define ARCH_HAS_IOREMAP_WT |
| 21 | |
| 22 | #include <linux/types.h> |
| 23 | #include <asm/virtconvert.h> |
| 24 | #include <asm/string.h> |
| 25 | #include <asm/mb-regs.h> |
| 26 | #include <asm-generic/pci_iomap.h> |
| 27 | #include <linux/delay.h> |
| 28 | |
| 29 | /* |
| 30 | * swap functions are sometimes needed to interface little-endian hardware |
| 31 | */ |
| 32 | |
| 33 | static inline unsigned short _swapw(unsigned short v) |
| 34 | { |
| 35 | return ((v << 8) | (v >> 8)); |
| 36 | } |
| 37 | |
| 38 | static inline unsigned long _swapl(unsigned long v) |
| 39 | { |
| 40 | return ((v << 24) | ((v & 0xff00) << 8) | ((v & 0xff0000) >> 8) | (v >> 24)); |
| 41 | } |
| 42 | |
| 43 | //#define __iormb() asm volatile("membar") |
| 44 | //#define __iowmb() asm volatile("membar") |
| 45 | |
| 46 | #define __raw_readb __builtin_read8 |
| 47 | #define __raw_readw __builtin_read16 |
| 48 | #define __raw_readl __builtin_read32 |
| 49 | |
| 50 | #define __raw_writeb(datum, addr) __builtin_write8(addr, datum) |
| 51 | #define __raw_writew(datum, addr) __builtin_write16(addr, datum) |
| 52 | #define __raw_writel(datum, addr) __builtin_write32(addr, datum) |
| 53 | |
| 54 | static inline void io_outsb(unsigned int addr, const void *buf, int len) |
| 55 | { |
| 56 | unsigned long __ioaddr = (unsigned long) addr; |
| 57 | const uint8_t *bp = buf; |
| 58 | |
| 59 | while (len--) |
| 60 | __builtin_write8((volatile void __iomem *) __ioaddr, *bp++); |
| 61 | } |
| 62 | |
| 63 | static inline void io_outsw(unsigned int addr, const void *buf, int len) |
| 64 | { |
| 65 | unsigned long __ioaddr = (unsigned long) addr; |
| 66 | const uint16_t *bp = buf; |
| 67 | |
| 68 | while (len--) |
| 69 | __builtin_write16((volatile void __iomem *) __ioaddr, (*bp++)); |
| 70 | } |
| 71 | |
| 72 | extern void __outsl_ns(unsigned int addr, const void *buf, int len); |
| 73 | extern void __outsl_sw(unsigned int addr, const void *buf, int len); |
| 74 | static inline void __outsl(unsigned int addr, const void *buf, int len, int swap) |
| 75 | { |
| 76 | unsigned long __ioaddr = (unsigned long) addr; |
| 77 | |
| 78 | if (!swap) |
| 79 | __outsl_ns(__ioaddr, buf, len); |
| 80 | else |
| 81 | __outsl_sw(__ioaddr, buf, len); |
| 82 | } |
| 83 | |
| 84 | static inline void io_insb(unsigned long addr, void *buf, int len) |
| 85 | { |
| 86 | uint8_t *bp = buf; |
| 87 | |
| 88 | while (len--) |
| 89 | *bp++ = __builtin_read8((volatile void __iomem *) addr); |
| 90 | } |
| 91 | |
| 92 | static inline void io_insw(unsigned long addr, void *buf, int len) |
| 93 | { |
| 94 | uint16_t *bp = buf; |
| 95 | |
| 96 | while (len--) |
| 97 | *bp++ = __builtin_read16((volatile void __iomem *) addr); |
| 98 | } |
| 99 | |
| 100 | extern void __insl_ns(unsigned long addr, void *buf, int len); |
| 101 | extern void __insl_sw(unsigned long addr, void *buf, int len); |
| 102 | static inline void __insl(unsigned long addr, void *buf, int len, int swap) |
| 103 | { |
| 104 | if (!swap) |
| 105 | __insl_ns(addr, buf, len); |
| 106 | else |
| 107 | __insl_sw(addr, buf, len); |
| 108 | } |
| 109 | |
| 110 | #define mmiowb() mb() |
| 111 | |
| 112 | /* |
| 113 | * make the short names macros so specific devices |
| 114 | * can override them as required |
| 115 | */ |
| 116 | |
| 117 | static inline void memset_io(volatile void __iomem *addr, unsigned char val, int count) |
| 118 | { |
| 119 | memset((void __force *) addr, val, count); |
| 120 | } |
| 121 | |
| 122 | static inline void memcpy_fromio(void *dst, const volatile void __iomem *src, int count) |
| 123 | { |
| 124 | memcpy(dst, (void __force *) src, count); |
| 125 | } |
| 126 | |
| 127 | static inline void memcpy_toio(volatile void __iomem *dst, const void *src, int count) |
| 128 | { |
| 129 | memcpy((void __force *) dst, src, count); |
| 130 | } |
| 131 | |
| 132 | static inline uint8_t inb(unsigned long addr) |
| 133 | { |
| 134 | return __builtin_read8((void __iomem *)addr); |
| 135 | } |
| 136 | |
| 137 | static inline uint16_t inw(unsigned long addr) |
| 138 | { |
| 139 | uint16_t ret = __builtin_read16((void __iomem *)addr); |
| 140 | |
| 141 | if (__is_PCI_IO(addr)) |
| 142 | ret = _swapw(ret); |
| 143 | |
| 144 | return ret; |
| 145 | } |
| 146 | |
| 147 | static inline uint32_t inl(unsigned long addr) |
| 148 | { |
| 149 | uint32_t ret = __builtin_read32((void __iomem *)addr); |
| 150 | |
| 151 | if (__is_PCI_IO(addr)) |
| 152 | ret = _swapl(ret); |
| 153 | |
| 154 | return ret; |
| 155 | } |
| 156 | |
| 157 | static inline void outb(uint8_t datum, unsigned long addr) |
| 158 | { |
| 159 | __builtin_write8((void __iomem *)addr, datum); |
| 160 | } |
| 161 | |
| 162 | static inline void outw(uint16_t datum, unsigned long addr) |
| 163 | { |
| 164 | if (__is_PCI_IO(addr)) |
| 165 | datum = _swapw(datum); |
| 166 | __builtin_write16((void __iomem *)addr, datum); |
| 167 | } |
| 168 | |
| 169 | static inline void outl(uint32_t datum, unsigned long addr) |
| 170 | { |
| 171 | if (__is_PCI_IO(addr)) |
| 172 | datum = _swapl(datum); |
| 173 | __builtin_write32((void __iomem *)addr, datum); |
| 174 | } |
| 175 | |
| 176 | #define inb_p(addr) inb(addr) |
| 177 | #define inw_p(addr) inw(addr) |
| 178 | #define inl_p(addr) inl(addr) |
| 179 | #define outb_p(x,addr) outb(x,addr) |
| 180 | #define outw_p(x,addr) outw(x,addr) |
| 181 | #define outl_p(x,addr) outl(x,addr) |
| 182 | |
| 183 | #define outsb(a,b,l) io_outsb(a,b,l) |
| 184 | #define outsw(a,b,l) io_outsw(a,b,l) |
| 185 | #define outsl(a,b,l) __outsl(a,b,l,0) |
| 186 | |
| 187 | #define insb(a,b,l) io_insb(a,b,l) |
| 188 | #define insw(a,b,l) io_insw(a,b,l) |
| 189 | #define insl(a,b,l) __insl(a,b,l,0) |
| 190 | |
| 191 | #define IO_SPACE_LIMIT 0xffffffff |
| 192 | |
| 193 | static inline uint8_t readb(const volatile void __iomem *addr) |
| 194 | { |
| 195 | return __builtin_read8((__force void volatile __iomem *) addr); |
| 196 | } |
| 197 | |
| 198 | static inline uint16_t readw(const volatile void __iomem *addr) |
| 199 | { |
| 200 | uint16_t ret = __builtin_read16((__force void volatile __iomem *)addr); |
| 201 | |
| 202 | if (__is_PCI_MEM(addr)) |
| 203 | ret = _swapw(ret); |
| 204 | return ret; |
| 205 | } |
| 206 | |
| 207 | static inline uint32_t readl(const volatile void __iomem *addr) |
| 208 | { |
| 209 | uint32_t ret = __builtin_read32((__force void volatile __iomem *)addr); |
| 210 | |
| 211 | if (__is_PCI_MEM(addr)) |
| 212 | ret = _swapl(ret); |
| 213 | |
| 214 | return ret; |
| 215 | } |
| 216 | |
| 217 | #define readb_relaxed readb |
| 218 | #define readw_relaxed readw |
| 219 | #define readl_relaxed readl |
| 220 | |
| 221 | static inline void writeb(uint8_t datum, volatile void __iomem *addr) |
| 222 | { |
| 223 | __builtin_write8(addr, datum); |
| 224 | if (__is_PCI_MEM(addr)) |
| 225 | __flush_PCI_writes(); |
| 226 | } |
| 227 | |
| 228 | static inline void writew(uint16_t datum, volatile void __iomem *addr) |
| 229 | { |
| 230 | if (__is_PCI_MEM(addr)) |
| 231 | datum = _swapw(datum); |
| 232 | |
| 233 | __builtin_write16(addr, datum); |
| 234 | if (__is_PCI_MEM(addr)) |
| 235 | __flush_PCI_writes(); |
| 236 | } |
| 237 | |
| 238 | static inline void writel(uint32_t datum, volatile void __iomem *addr) |
| 239 | { |
| 240 | if (__is_PCI_MEM(addr)) |
| 241 | datum = _swapl(datum); |
| 242 | |
| 243 | __builtin_write32(addr, datum); |
| 244 | if (__is_PCI_MEM(addr)) |
| 245 | __flush_PCI_writes(); |
| 246 | } |
| 247 | |
| 248 | #define writeb_relaxed writeb |
| 249 | #define writew_relaxed writew |
| 250 | #define writel_relaxed writel |
| 251 | |
| 252 | /* Values for nocacheflag and cmode */ |
| 253 | #define IOMAP_FULL_CACHING 0 |
| 254 | #define IOMAP_NOCACHE_SER 1 |
| 255 | #define IOMAP_NOCACHE_NONSER 2 |
| 256 | #define IOMAP_WRITETHROUGH 3 |
| 257 | |
| 258 | extern void __iomem *__ioremap(unsigned long physaddr, unsigned long size, int cacheflag); |
| 259 | |
| 260 | static inline void __iomem *ioremap(unsigned long physaddr, unsigned long size) |
| 261 | { |
| 262 | return __ioremap(physaddr, size, IOMAP_NOCACHE_SER); |
| 263 | } |
| 264 | |
| 265 | static inline void __iomem *ioremap_nocache(unsigned long physaddr, unsigned long size) |
| 266 | { |
| 267 | return __ioremap(physaddr, size, IOMAP_NOCACHE_SER); |
| 268 | } |
| 269 | |
| 270 | static inline void __iomem *ioremap_wt(unsigned long physaddr, unsigned long size) |
| 271 | { |
| 272 | return __ioremap(physaddr, size, IOMAP_WRITETHROUGH); |
| 273 | } |
| 274 | |
| 275 | static inline void __iomem *ioremap_fullcache(unsigned long physaddr, unsigned long size) |
| 276 | { |
| 277 | return __ioremap(physaddr, size, IOMAP_FULL_CACHING); |
| 278 | } |
| 279 | |
| 280 | #define ioremap_wc ioremap_nocache |
| 281 | #define ioremap_uc ioremap_nocache |
| 282 | |
| 283 | extern void iounmap(void volatile __iomem *addr); |
| 284 | |
| 285 | static inline void __iomem *ioport_map(unsigned long port, unsigned int nr) |
| 286 | { |
| 287 | return (void __iomem *) port; |
| 288 | } |
| 289 | |
| 290 | static inline void ioport_unmap(void __iomem *p) |
| 291 | { |
| 292 | } |
| 293 | |
| 294 | static inline void flush_write_buffers(void) |
| 295 | { |
| 296 | __asm__ __volatile__ ("membar" : : :"memory"); |
| 297 | } |
| 298 | |
| 299 | /* |
| 300 | * do appropriate I/O accesses for token type |
| 301 | */ |
| 302 | static inline unsigned int ioread8(void __iomem *p) |
| 303 | { |
| 304 | return __builtin_read8(p); |
| 305 | } |
| 306 | |
| 307 | static inline unsigned int ioread16(void __iomem *p) |
| 308 | { |
| 309 | uint16_t ret = __builtin_read16(p); |
| 310 | if (__is_PCI_addr(p)) |
| 311 | ret = _swapw(ret); |
| 312 | return ret; |
| 313 | } |
| 314 | |
| 315 | static inline unsigned int ioread32(void __iomem *p) |
| 316 | { |
| 317 | uint32_t ret = __builtin_read32(p); |
| 318 | if (__is_PCI_addr(p)) |
| 319 | ret = _swapl(ret); |
| 320 | return ret; |
| 321 | } |
| 322 | |
| 323 | static inline void iowrite8(u8 val, void __iomem *p) |
| 324 | { |
| 325 | __builtin_write8(p, val); |
| 326 | if (__is_PCI_MEM(p)) |
| 327 | __flush_PCI_writes(); |
| 328 | } |
| 329 | |
| 330 | static inline void iowrite16(u16 val, void __iomem *p) |
| 331 | { |
| 332 | if (__is_PCI_addr(p)) |
| 333 | val = _swapw(val); |
| 334 | __builtin_write16(p, val); |
| 335 | if (__is_PCI_MEM(p)) |
| 336 | __flush_PCI_writes(); |
| 337 | } |
| 338 | |
| 339 | static inline void iowrite32(u32 val, void __iomem *p) |
| 340 | { |
| 341 | if (__is_PCI_addr(p)) |
| 342 | val = _swapl(val); |
| 343 | __builtin_write32(p, val); |
| 344 | if (__is_PCI_MEM(p)) |
| 345 | __flush_PCI_writes(); |
| 346 | } |
| 347 | |
| 348 | #define ioread16be(addr) be16_to_cpu(ioread16(addr)) |
| 349 | #define ioread32be(addr) be32_to_cpu(ioread32(addr)) |
| 350 | #define iowrite16be(v, addr) iowrite16(cpu_to_be16(v), (addr)) |
| 351 | #define iowrite32be(v, addr) iowrite32(cpu_to_be32(v), (addr)) |
| 352 | |
| 353 | static inline void ioread8_rep(void __iomem *p, void *dst, unsigned long count) |
| 354 | { |
| 355 | io_insb((unsigned long) p, dst, count); |
| 356 | } |
| 357 | |
| 358 | static inline void ioread16_rep(void __iomem *p, void *dst, unsigned long count) |
| 359 | { |
| 360 | io_insw((unsigned long) p, dst, count); |
| 361 | } |
| 362 | |
| 363 | static inline void ioread32_rep(void __iomem *p, void *dst, unsigned long count) |
| 364 | { |
| 365 | __insl_ns((unsigned long) p, dst, count); |
| 366 | } |
| 367 | |
| 368 | static inline void iowrite8_rep(void __iomem *p, const void *src, unsigned long count) |
| 369 | { |
| 370 | io_outsb((unsigned long) p, src, count); |
| 371 | } |
| 372 | |
| 373 | static inline void iowrite16_rep(void __iomem *p, const void *src, unsigned long count) |
| 374 | { |
| 375 | io_outsw((unsigned long) p, src, count); |
| 376 | } |
| 377 | |
| 378 | static inline void iowrite32_rep(void __iomem *p, const void *src, unsigned long count) |
| 379 | { |
| 380 | __outsl_ns((unsigned long) p, src, count); |
| 381 | } |
| 382 | |
| 383 | /* Create a virtual mapping cookie for a PCI BAR (memory or IO) */ |
| 384 | struct pci_dev; |
| 385 | static inline void pci_iounmap(struct pci_dev *dev, void __iomem *p) |
| 386 | { |
| 387 | } |
| 388 | |
| 389 | |
| 390 | /* |
| 391 | * Convert a physical pointer to a virtual kernel pointer for /dev/mem |
| 392 | * access |
| 393 | */ |
| 394 | #define xlate_dev_mem_ptr(p) __va(p) |
| 395 | |
| 396 | /* |
| 397 | * Convert a virtual cached pointer to an uncached pointer |
| 398 | */ |
| 399 | #define xlate_dev_kmem_ptr(p) p |
| 400 | |
| 401 | #endif /* __KERNEL__ */ |
| 402 | |
| 403 | #endif /* _ASM_IO_H */ |