Kyle Swenson | 8d8f654 | 2021-03-15 11:02:55 -0600 | [diff] [blame^] | 1 | /* |
| 2 | * w83627hf/thf WDT driver |
| 3 | * |
| 4 | * (c) Copyright 2013 Guenter Roeck |
| 5 | * converted to watchdog infrastructure |
| 6 | * |
| 7 | * (c) Copyright 2007 Vlad Drukker <vlad@storewiz.com> |
| 8 | * added support for W83627THF. |
| 9 | * |
| 10 | * (c) Copyright 2003,2007 Pádraig Brady <P@draigBrady.com> |
| 11 | * |
| 12 | * Based on advantechwdt.c which is based on wdt.c. |
| 13 | * Original copyright messages: |
| 14 | * |
| 15 | * (c) Copyright 2000-2001 Marek Michalkiewicz <marekm@linux.org.pl> |
| 16 | * |
| 17 | * (c) Copyright 1996 Alan Cox <alan@lxorguk.ukuu.org.uk>, |
| 18 | * All Rights Reserved. |
| 19 | * |
| 20 | * This program is free software; you can redistribute it and/or |
| 21 | * modify it under the terms of the GNU General Public License |
| 22 | * as published by the Free Software Foundation; either version |
| 23 | * 2 of the License, or (at your option) any later version. |
| 24 | * |
| 25 | * Neither Alan Cox nor CymruNet Ltd. admit liability nor provide |
| 26 | * warranty for any of this software. This material is provided |
| 27 | * "AS-IS" and at no charge. |
| 28 | * |
| 29 | * (c) Copyright 1995 Alan Cox <alan@lxorguk.ukuu.org.uk> |
| 30 | */ |
| 31 | |
| 32 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt |
| 33 | |
| 34 | #include <linux/module.h> |
| 35 | #include <linux/moduleparam.h> |
| 36 | #include <linux/types.h> |
| 37 | #include <linux/watchdog.h> |
| 38 | #include <linux/ioport.h> |
| 39 | #include <linux/notifier.h> |
| 40 | #include <linux/reboot.h> |
| 41 | #include <linux/init.h> |
| 42 | #include <linux/io.h> |
| 43 | |
| 44 | #define WATCHDOG_NAME "w83627hf/thf/hg/dhg WDT" |
| 45 | #define WATCHDOG_TIMEOUT 60 /* 60 sec default timeout */ |
| 46 | |
| 47 | static int wdt_io; |
| 48 | static int cr_wdt_timeout; /* WDT timeout register */ |
| 49 | static int cr_wdt_control; /* WDT control register */ |
| 50 | |
| 51 | enum chips { w83627hf, w83627s, w83697hf, w83697ug, w83637hf, w83627thf, |
| 52 | w83687thf, w83627ehf, w83627dhg, w83627uhg, w83667hg, w83627dhg_p, |
| 53 | w83667hg_b, nct6775, nct6776, nct6779, nct6791, nct6792 }; |
| 54 | |
| 55 | static int timeout; /* in seconds */ |
| 56 | module_param(timeout, int, 0); |
| 57 | MODULE_PARM_DESC(timeout, |
| 58 | "Watchdog timeout in seconds. 1 <= timeout <= 255, default=" |
| 59 | __MODULE_STRING(WATCHDOG_TIMEOUT) "."); |
| 60 | |
| 61 | static bool nowayout = WATCHDOG_NOWAYOUT; |
| 62 | module_param(nowayout, bool, 0); |
| 63 | MODULE_PARM_DESC(nowayout, |
| 64 | "Watchdog cannot be stopped once started (default=" |
| 65 | __MODULE_STRING(WATCHDOG_NOWAYOUT) ")"); |
| 66 | |
| 67 | static int early_disable; |
| 68 | module_param(early_disable, int, 0); |
| 69 | MODULE_PARM_DESC(early_disable, "Disable watchdog at boot time (default=0)"); |
| 70 | |
| 71 | /* |
| 72 | * Kernel methods. |
| 73 | */ |
| 74 | |
| 75 | #define WDT_EFER (wdt_io+0) /* Extended Function Enable Registers */ |
| 76 | #define WDT_EFIR (wdt_io+0) /* Extended Function Index Register |
| 77 | (same as EFER) */ |
| 78 | #define WDT_EFDR (WDT_EFIR+1) /* Extended Function Data Register */ |
| 79 | |
| 80 | #define W83627HF_LD_WDT 0x08 |
| 81 | |
| 82 | #define W83627HF_ID 0x52 |
| 83 | #define W83627S_ID 0x59 |
| 84 | #define W83697HF_ID 0x60 |
| 85 | #define W83697UG_ID 0x68 |
| 86 | #define W83637HF_ID 0x70 |
| 87 | #define W83627THF_ID 0x82 |
| 88 | #define W83687THF_ID 0x85 |
| 89 | #define W83627EHF_ID 0x88 |
| 90 | #define W83627DHG_ID 0xa0 |
| 91 | #define W83627UHG_ID 0xa2 |
| 92 | #define W83667HG_ID 0xa5 |
| 93 | #define W83627DHG_P_ID 0xb0 |
| 94 | #define W83667HG_B_ID 0xb3 |
| 95 | #define NCT6775_ID 0xb4 |
| 96 | #define NCT6776_ID 0xc3 |
| 97 | #define NCT6779_ID 0xc5 |
| 98 | #define NCT6791_ID 0xc8 |
| 99 | #define NCT6792_ID 0xc9 |
| 100 | |
| 101 | #define W83627HF_WDT_TIMEOUT 0xf6 |
| 102 | #define W83697HF_WDT_TIMEOUT 0xf4 |
| 103 | |
| 104 | #define W83627HF_WDT_CONTROL 0xf5 |
| 105 | #define W83697HF_WDT_CONTROL 0xf3 |
| 106 | |
| 107 | static void superio_outb(int reg, int val) |
| 108 | { |
| 109 | outb(reg, WDT_EFER); |
| 110 | outb(val, WDT_EFDR); |
| 111 | } |
| 112 | |
| 113 | static inline int superio_inb(int reg) |
| 114 | { |
| 115 | outb(reg, WDT_EFER); |
| 116 | return inb(WDT_EFDR); |
| 117 | } |
| 118 | |
| 119 | static int superio_enter(void) |
| 120 | { |
| 121 | if (!request_muxed_region(wdt_io, 2, WATCHDOG_NAME)) |
| 122 | return -EBUSY; |
| 123 | |
| 124 | outb_p(0x87, WDT_EFER); /* Enter extended function mode */ |
| 125 | outb_p(0x87, WDT_EFER); /* Again according to manual */ |
| 126 | |
| 127 | return 0; |
| 128 | } |
| 129 | |
| 130 | static void superio_select(int ld) |
| 131 | { |
| 132 | superio_outb(0x07, ld); |
| 133 | } |
| 134 | |
| 135 | static void superio_exit(void) |
| 136 | { |
| 137 | outb_p(0xAA, WDT_EFER); /* Leave extended function mode */ |
| 138 | release_region(wdt_io, 2); |
| 139 | } |
| 140 | |
| 141 | static int w83627hf_init(struct watchdog_device *wdog, enum chips chip) |
| 142 | { |
| 143 | int ret; |
| 144 | unsigned char t; |
| 145 | |
| 146 | ret = superio_enter(); |
| 147 | if (ret) |
| 148 | return ret; |
| 149 | |
| 150 | superio_select(W83627HF_LD_WDT); |
| 151 | |
| 152 | /* set CR30 bit 0 to activate GPIO2 */ |
| 153 | t = superio_inb(0x30); |
| 154 | if (!(t & 0x01)) |
| 155 | superio_outb(0x30, t | 0x01); |
| 156 | |
| 157 | switch (chip) { |
| 158 | case w83627hf: |
| 159 | case w83627s: |
| 160 | t = superio_inb(0x2B) & ~0x10; |
| 161 | superio_outb(0x2B, t); /* set GPIO24 to WDT0 */ |
| 162 | break; |
| 163 | case w83697hf: |
| 164 | /* Set pin 119 to WDTO# mode (= CR29, WDT0) */ |
| 165 | t = superio_inb(0x29) & ~0x60; |
| 166 | t |= 0x20; |
| 167 | superio_outb(0x29, t); |
| 168 | break; |
| 169 | case w83697ug: |
| 170 | /* Set pin 118 to WDTO# mode */ |
| 171 | t = superio_inb(0x2b) & ~0x04; |
| 172 | superio_outb(0x2b, t); |
| 173 | break; |
| 174 | case w83627thf: |
| 175 | t = (superio_inb(0x2B) & ~0x08) | 0x04; |
| 176 | superio_outb(0x2B, t); /* set GPIO3 to WDT0 */ |
| 177 | break; |
| 178 | case w83627dhg: |
| 179 | case w83627dhg_p: |
| 180 | t = superio_inb(0x2D) & ~0x01; /* PIN77 -> WDT0# */ |
| 181 | superio_outb(0x2D, t); /* set GPIO5 to WDT0 */ |
| 182 | t = superio_inb(cr_wdt_control); |
| 183 | t |= 0x02; /* enable the WDTO# output low pulse |
| 184 | * to the KBRST# pin */ |
| 185 | superio_outb(cr_wdt_control, t); |
| 186 | break; |
| 187 | case w83637hf: |
| 188 | break; |
| 189 | case w83687thf: |
| 190 | t = superio_inb(0x2C) & ~0x80; /* PIN47 -> WDT0# */ |
| 191 | superio_outb(0x2C, t); |
| 192 | break; |
| 193 | case w83627ehf: |
| 194 | case w83627uhg: |
| 195 | case w83667hg: |
| 196 | case w83667hg_b: |
| 197 | case nct6775: |
| 198 | case nct6776: |
| 199 | case nct6779: |
| 200 | case nct6791: |
| 201 | case nct6792: |
| 202 | /* |
| 203 | * These chips have a fixed WDTO# output pin (W83627UHG), |
| 204 | * or support more than one WDTO# output pin. |
| 205 | * Don't touch its configuration, and hope the BIOS |
| 206 | * does the right thing. |
| 207 | */ |
| 208 | t = superio_inb(cr_wdt_control); |
| 209 | t |= 0x02; /* enable the WDTO# output low pulse |
| 210 | * to the KBRST# pin */ |
| 211 | superio_outb(cr_wdt_control, t); |
| 212 | break; |
| 213 | default: |
| 214 | break; |
| 215 | } |
| 216 | |
| 217 | t = superio_inb(cr_wdt_timeout); |
| 218 | if (t != 0) { |
| 219 | if (early_disable) { |
| 220 | pr_warn("Stopping previously enabled watchdog until userland kicks in\n"); |
| 221 | superio_outb(cr_wdt_timeout, 0); |
| 222 | } else { |
| 223 | pr_info("Watchdog already running. Resetting timeout to %d sec\n", |
| 224 | wdog->timeout); |
| 225 | superio_outb(cr_wdt_timeout, wdog->timeout); |
| 226 | } |
| 227 | } |
| 228 | |
| 229 | /* set second mode & disable keyboard turning off watchdog */ |
| 230 | t = superio_inb(cr_wdt_control) & ~0x0C; |
| 231 | superio_outb(cr_wdt_control, t); |
| 232 | |
| 233 | /* reset trigger, disable keyboard & mouse turning off watchdog */ |
| 234 | t = superio_inb(0xF7) & ~0xD0; |
| 235 | superio_outb(0xF7, t); |
| 236 | |
| 237 | superio_exit(); |
| 238 | |
| 239 | return 0; |
| 240 | } |
| 241 | |
| 242 | static int wdt_set_time(unsigned int timeout) |
| 243 | { |
| 244 | int ret; |
| 245 | |
| 246 | ret = superio_enter(); |
| 247 | if (ret) |
| 248 | return ret; |
| 249 | |
| 250 | superio_select(W83627HF_LD_WDT); |
| 251 | superio_outb(cr_wdt_timeout, timeout); |
| 252 | superio_exit(); |
| 253 | |
| 254 | return 0; |
| 255 | } |
| 256 | |
| 257 | static int wdt_start(struct watchdog_device *wdog) |
| 258 | { |
| 259 | return wdt_set_time(wdog->timeout); |
| 260 | } |
| 261 | |
| 262 | static int wdt_stop(struct watchdog_device *wdog) |
| 263 | { |
| 264 | return wdt_set_time(0); |
| 265 | } |
| 266 | |
| 267 | static int wdt_set_timeout(struct watchdog_device *wdog, unsigned int timeout) |
| 268 | { |
| 269 | wdog->timeout = timeout; |
| 270 | |
| 271 | return 0; |
| 272 | } |
| 273 | |
| 274 | static unsigned int wdt_get_time(struct watchdog_device *wdog) |
| 275 | { |
| 276 | unsigned int timeleft; |
| 277 | int ret; |
| 278 | |
| 279 | ret = superio_enter(); |
| 280 | if (ret) |
| 281 | return 0; |
| 282 | |
| 283 | superio_select(W83627HF_LD_WDT); |
| 284 | timeleft = superio_inb(cr_wdt_timeout); |
| 285 | superio_exit(); |
| 286 | |
| 287 | return timeleft; |
| 288 | } |
| 289 | |
| 290 | /* |
| 291 | * Notifier for system down |
| 292 | */ |
| 293 | static int wdt_notify_sys(struct notifier_block *this, unsigned long code, |
| 294 | void *unused) |
| 295 | { |
| 296 | if (code == SYS_DOWN || code == SYS_HALT) |
| 297 | wdt_set_time(0); /* Turn the WDT off */ |
| 298 | |
| 299 | return NOTIFY_DONE; |
| 300 | } |
| 301 | |
| 302 | /* |
| 303 | * Kernel Interfaces |
| 304 | */ |
| 305 | |
| 306 | static struct watchdog_info wdt_info = { |
| 307 | .options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING | WDIOF_MAGICCLOSE, |
| 308 | .identity = "W83627HF Watchdog", |
| 309 | }; |
| 310 | |
| 311 | static struct watchdog_ops wdt_ops = { |
| 312 | .owner = THIS_MODULE, |
| 313 | .start = wdt_start, |
| 314 | .stop = wdt_stop, |
| 315 | .set_timeout = wdt_set_timeout, |
| 316 | .get_timeleft = wdt_get_time, |
| 317 | }; |
| 318 | |
| 319 | static struct watchdog_device wdt_dev = { |
| 320 | .info = &wdt_info, |
| 321 | .ops = &wdt_ops, |
| 322 | .timeout = WATCHDOG_TIMEOUT, |
| 323 | .min_timeout = 1, |
| 324 | .max_timeout = 255, |
| 325 | }; |
| 326 | |
| 327 | /* |
| 328 | * The WDT needs to learn about soft shutdowns in order to |
| 329 | * turn the timebomb registers off. |
| 330 | */ |
| 331 | |
| 332 | static struct notifier_block wdt_notifier = { |
| 333 | .notifier_call = wdt_notify_sys, |
| 334 | }; |
| 335 | |
| 336 | static int wdt_find(int addr) |
| 337 | { |
| 338 | u8 val; |
| 339 | int ret; |
| 340 | |
| 341 | cr_wdt_timeout = W83627HF_WDT_TIMEOUT; |
| 342 | cr_wdt_control = W83627HF_WDT_CONTROL; |
| 343 | |
| 344 | ret = superio_enter(); |
| 345 | if (ret) |
| 346 | return ret; |
| 347 | superio_select(W83627HF_LD_WDT); |
| 348 | val = superio_inb(0x20); |
| 349 | switch (val) { |
| 350 | case W83627HF_ID: |
| 351 | ret = w83627hf; |
| 352 | break; |
| 353 | case W83627S_ID: |
| 354 | ret = w83627s; |
| 355 | break; |
| 356 | case W83697HF_ID: |
| 357 | ret = w83697hf; |
| 358 | cr_wdt_timeout = W83697HF_WDT_TIMEOUT; |
| 359 | cr_wdt_control = W83697HF_WDT_CONTROL; |
| 360 | break; |
| 361 | case W83697UG_ID: |
| 362 | ret = w83697ug; |
| 363 | cr_wdt_timeout = W83697HF_WDT_TIMEOUT; |
| 364 | cr_wdt_control = W83697HF_WDT_CONTROL; |
| 365 | break; |
| 366 | case W83637HF_ID: |
| 367 | ret = w83637hf; |
| 368 | break; |
| 369 | case W83627THF_ID: |
| 370 | ret = w83627thf; |
| 371 | break; |
| 372 | case W83687THF_ID: |
| 373 | ret = w83687thf; |
| 374 | break; |
| 375 | case W83627EHF_ID: |
| 376 | ret = w83627ehf; |
| 377 | break; |
| 378 | case W83627DHG_ID: |
| 379 | ret = w83627dhg; |
| 380 | break; |
| 381 | case W83627DHG_P_ID: |
| 382 | ret = w83627dhg_p; |
| 383 | break; |
| 384 | case W83627UHG_ID: |
| 385 | ret = w83627uhg; |
| 386 | break; |
| 387 | case W83667HG_ID: |
| 388 | ret = w83667hg; |
| 389 | break; |
| 390 | case W83667HG_B_ID: |
| 391 | ret = w83667hg_b; |
| 392 | break; |
| 393 | case NCT6775_ID: |
| 394 | ret = nct6775; |
| 395 | break; |
| 396 | case NCT6776_ID: |
| 397 | ret = nct6776; |
| 398 | break; |
| 399 | case NCT6779_ID: |
| 400 | ret = nct6779; |
| 401 | break; |
| 402 | case NCT6791_ID: |
| 403 | ret = nct6791; |
| 404 | break; |
| 405 | case NCT6792_ID: |
| 406 | ret = nct6792; |
| 407 | break; |
| 408 | case 0xff: |
| 409 | ret = -ENODEV; |
| 410 | break; |
| 411 | default: |
| 412 | ret = -ENODEV; |
| 413 | pr_err("Unsupported chip ID: 0x%02x\n", val); |
| 414 | break; |
| 415 | } |
| 416 | superio_exit(); |
| 417 | return ret; |
| 418 | } |
| 419 | |
| 420 | static int __init wdt_init(void) |
| 421 | { |
| 422 | int ret; |
| 423 | int chip; |
| 424 | const char * const chip_name[] = { |
| 425 | "W83627HF", |
| 426 | "W83627S", |
| 427 | "W83697HF", |
| 428 | "W83697UG", |
| 429 | "W83637HF", |
| 430 | "W83627THF", |
| 431 | "W83687THF", |
| 432 | "W83627EHF", |
| 433 | "W83627DHG", |
| 434 | "W83627UHG", |
| 435 | "W83667HG", |
| 436 | "W83667DHG-P", |
| 437 | "W83667HG-B", |
| 438 | "NCT6775", |
| 439 | "NCT6776", |
| 440 | "NCT6779", |
| 441 | "NCT6791", |
| 442 | "NCT6792", |
| 443 | }; |
| 444 | |
| 445 | wdt_io = 0x2e; |
| 446 | chip = wdt_find(0x2e); |
| 447 | if (chip < 0) { |
| 448 | wdt_io = 0x4e; |
| 449 | chip = wdt_find(0x4e); |
| 450 | if (chip < 0) |
| 451 | return chip; |
| 452 | } |
| 453 | |
| 454 | pr_info("WDT driver for %s Super I/O chip initialising\n", |
| 455 | chip_name[chip]); |
| 456 | |
| 457 | watchdog_init_timeout(&wdt_dev, timeout, NULL); |
| 458 | watchdog_set_nowayout(&wdt_dev, nowayout); |
| 459 | |
| 460 | ret = w83627hf_init(&wdt_dev, chip); |
| 461 | if (ret) { |
| 462 | pr_err("failed to initialize watchdog (err=%d)\n", ret); |
| 463 | return ret; |
| 464 | } |
| 465 | |
| 466 | ret = register_reboot_notifier(&wdt_notifier); |
| 467 | if (ret != 0) { |
| 468 | pr_err("cannot register reboot notifier (err=%d)\n", ret); |
| 469 | return ret; |
| 470 | } |
| 471 | |
| 472 | ret = watchdog_register_device(&wdt_dev); |
| 473 | if (ret) |
| 474 | goto unreg_reboot; |
| 475 | |
| 476 | pr_info("initialized. timeout=%d sec (nowayout=%d)\n", |
| 477 | wdt_dev.timeout, nowayout); |
| 478 | |
| 479 | return ret; |
| 480 | |
| 481 | unreg_reboot: |
| 482 | unregister_reboot_notifier(&wdt_notifier); |
| 483 | return ret; |
| 484 | } |
| 485 | |
| 486 | static void __exit wdt_exit(void) |
| 487 | { |
| 488 | watchdog_unregister_device(&wdt_dev); |
| 489 | unregister_reboot_notifier(&wdt_notifier); |
| 490 | } |
| 491 | |
| 492 | module_init(wdt_init); |
| 493 | module_exit(wdt_exit); |
| 494 | |
| 495 | MODULE_LICENSE("GPL"); |
| 496 | MODULE_AUTHOR("Pádraig Brady <P@draigBrady.com>"); |
| 497 | MODULE_DESCRIPTION("w83627hf/thf WDT driver"); |