tree 6fcec3d2d5dbb848b184634579f4afcf0b9c1fd2
parent 2f5df47351910a2936c7741cf111855829200943
author Stefan Roese <sr@denx.de> 1173345196 +0100
committer Stefan Roese <sr@denx.de> 1173345196 +0100

[PATCH] Update AMCC Luan 440SP eval board support

The AMCC Luan now uses the common 440SP(e) DDR SPD code for DDR
inititializition. This includes DDR auto calibration and support
for different DIMM modules, instead of the fixed setup used in
the earlier version.

This patch also enables the cache in FLASH for the startup
phase of U-Boot (while running from FLASH). After relocating to
SDRAM the cache is disabled again. This will speed up the boot
process, especially the SDRAM setup, since there are some loops
for memory testing (auto calibration).

Signed-off-by: Stefan Roese <sr@denx.de>