| commit | 2faf5fb82ed6f3df07635cddca0a2a54e3ef74ef | [log] [tgz] |
|---|---|---|
| author | Roger Quadros <rogerq@ti.com> | Mon Nov 11 16:56:38 2013 +0200 |
| committer | Tom Rini <trini@ti.com> | Wed Dec 04 08:12:08 2013 -0500 |
| tree | fb1cfca52da716b2831b87948d5f427afb7e7a1f | |
| parent | d73763a4fbc741b3faee43d0a668dd220a81d772 [diff] |
ahci: Fix cache align error messages Align the ATA ID buffer to the cache-line boundary. This gets rid of the below error mesages on ARM v7 platforms. scanning bus for devices... ERROR: v7_dcache_inval_range - start address is not aligned - 0xfee48618 ERROR: v7_dcache_inval_range - stop address is not aligned - 0xfee48818 CC: Aneesh V <aneesh@ti.com> Signed-off-by: Roger Quadros <rogerq@ti.com>