commit | 37b7b13d4818ca3941dc5f8217ff0fa8d60ce501 | [log] [tgz] |
---|---|---|
author | Marek Vasut <marex@denx.de> | Sun Jul 19 07:03:15 2015 +0200 |
committer | Marek Vasut <marex@denx.de> | Sat Aug 08 14:14:20 2015 +0200 |
tree | cd59f56c4f2665a963ce09dc861f9ac4278eac47 | |
parent | 23e8ea901a87e0a6296ecf135b3b71672d832676 [diff] |
ddr: altera: Clean up rw_mgr_mem_calibrate_vfifo_find_dqs_en_phase() part 3 Clean up odd multiline loop, no functional change. Signed-off-by: Marek Vasut <marex@denx.de>