Merge "ipq6018: Skip uboot relocation and setup CP15 barrier"
diff --git a/arch/arm/cpu/armv7/qca/common/scm.c b/arch/arm/cpu/armv7/qca/common/scm.c
index 38ee2b0..1414b7d 100644
--- a/arch/arm/cpu/armv7/qca/common/scm.c
+++ b/arch/arm/cpu/armv7/qca/common/scm.c
@@ -400,6 +400,7 @@
#endif
static uint8_t tz_buf[CONFIG_SYS_CACHELINE_SIZE] __aligned(CONFIG_SYS_CACHELINE_SIZE);
+#ifndef CONFIG_QCA_DISABLE_SCM
int qca_scm_call(u32 svc_id, u32 cmd_id, void *buf, size_t len)
{
int ret = 0;
@@ -528,6 +529,29 @@
return ret;
}
+#else
+int qca_scm_call(u32 svc_id, u32 cmd_id, void *buf, size_t len)
+{
+ return 0;
+}
+int qca_scm_fuseipq(u32 svc_id, u32 cmd_id, void *buf, size_t len)
+{
+ return 0;
+}
+int qca_scm_auth_kernel(void *cmd_buf,
+ size_t cmd_len)
+{
+ return 0;
+}
+int is_scm_sec_auth_available(u32 svc_id, u32 cmd_id)
+{
+ return 0;
+}
+int qca_scm_secure_authenticate(void *cmd_buf, size_t cmd_len)
+{
+ return 0;
+}
+#endif
int qca_scm_call_write(u32 svc_id, u32 cmd_id, u32 *addr, u32 val)
{
diff --git a/arch/arm/dts/ipq6018-emulation.dts b/arch/arm/dts/ipq6018-emulation.dts
index 14c590a..fcde497 100644
--- a/arch/arm/dts/ipq6018-emulation.dts
+++ b/arch/arm/dts/ipq6018-emulation.dts
@@ -14,13 +14,15 @@
/dts-v1/;
#include "ipq6018-soc.dtsi"
/ {
- model ="QCA, IPQ6018-EMULATION";
- compatible = "qca,ipq6018", "qca,ipq6018-emulation";
+ model ="QCA, IPQ6018-EMULATION-C1";
+ compatible = "qca,ipq6018", "qca,ipq6018-emulation-c1";
machid = <0x08010000>;
+ config_name = "config@1";
aliases {
console = "/serial@78af000";
mmc = "/sdhci@7804000";
+ i2c0 = "/i2c@78b6000";
};
serial@78af000 {
compatible = "qca,ipq-uartdm";
@@ -47,4 +49,30 @@
compatible = "qcom,sdhci-msm";
};
+
+ i2c0: i2c@78b6000 {
+ compatible = "qcom,qup-i2c";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x78b6000 0x600>;
+ clock-frequency = <400000>;
+
+ i2c_gpio {
+ gpio1 {
+ gpio = <42>;
+ func = <2>;
+ pull = <GPIO_NO_PULL>;
+ drvstr = <GPIO_8MA>;
+ oe = <GPIO_OE_ENABLE>;
+ };
+
+ gpio2 {
+ gpio = <43>;
+ func = <2>;
+ pull = <GPIO_NO_PULL>;
+ drvstr = <GPIO_8MA>;
+ oe = <GPIO_OE_ENABLE>;
+ };
+ };
+ };
};
diff --git a/arch/arm/dts/ipq807x-hk08.dts b/arch/arm/dts/ipq807x-hk08.dts
index ca9e1a9..f4372aa 100644
--- a/arch/arm/dts/ipq807x-hk08.dts
+++ b/arch/arm/dts/ipq807x-hk08.dts
@@ -27,11 +27,40 @@
};
ess-switch {
switch_mac_mode = <0x1>;
- switch_mac_mode1 = <0xFF>;
+ switch_mac_mode1 = <0x6>;
switch_mac_mode2 = <0x2>;
8033_port = <0>;
aquantia_port = <5>;
aquantia_gpio = <63>;
+ napa_gpio = <37>;
+ napa_gpio_cnt = <1>;
+ port_phyinfo {
+ port@0 {
+ phy_address = <6>;
+ phy_type = <4>;
+ };
+ port@1 {
+ phy_address = <1>;
+ phy_type = <1>;
+ };
+ port@2 {
+ phy_address = <2>;
+ phy_type = <1>;
+ };
+ port@3 {
+ phy_address = <3>;
+ phy_type = <1>;
+ };
+ port@4 {
+ phy_address = <20>;
+ phy_type = <2>;
+ };
+ port@5 {
+ phy_address = <7>;
+ phy_type = <3>;
+ };
+ };
};
+
};
diff --git a/arch/arm/include/asm/arch-ipq6018/clk.h b/arch/arm/include/asm/arch-ipq6018/clk.h
new file mode 100644
index 0000000..948d067
--- /dev/null
+++ b/arch/arm/include/asm/arch-ipq6018/clk.h
@@ -0,0 +1,22 @@
+/*
+ * Copyright (c) 2015-2016, 2018 The Linux Foundation. All rights reserved.
+
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef IPQ6018_CLK_H
+#define IPQ6018_CLK_H
+
+/* I2C clocks configuration */
+#ifdef CONFIG_IPQ6018_I2C
+void i2c_clock_config(void);
+#endif
+
+#endif /*IPQ6018_CLK_H*/
diff --git a/board/qca/arm/ipq6018/Makefile b/board/qca/arm/ipq6018/Makefile
index a31992e..aac7e1c 100644
--- a/board/qca/arm/ipq6018/Makefile
+++ b/board/qca/arm/ipq6018/Makefile
@@ -1,4 +1,5 @@
ccflags-y += -I$(srctree)/board/qca/arm/ipq6018
cppflags-y += -I$(srctree)/board/qca/arm/ipq6018
obj-y := ipq6018.o
+obj-y += clock.o
diff --git a/board/qca/arm/ipq6018/clock.c b/board/qca/arm/ipq6018/clock.c
new file mode 100644
index 0000000..2c445c4
--- /dev/null
+++ b/board/qca/arm/ipq6018/clock.c
@@ -0,0 +1,23 @@
+/*
+ * Copyright (c) 2015-2016, 2018 The Linux Foundation. All rights reserved.
+
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <common.h>
+#include <asm/arch-ipq6018/clk.h>
+
+#ifdef CONFIG_IPQ6018_I2C
+void i2c_clock_config(void)
+{
+ return;
+}
+#endif
+
diff --git a/board/qca/arm/ipq6018/ipq6018.c b/board/qca/arm/ipq6018/ipq6018.c
index d53ec02..4999e9c 100644
--- a/board/qca/arm/ipq6018/ipq6018.c
+++ b/board/qca/arm/ipq6018/ipq6018.c
@@ -27,6 +27,12 @@
DECLARE_GLOBAL_DATA_PTR;
struct sdhci_host mmc_host;
+const char *rsvd_node = "/reserved-memory";
+const char *del_node[] = {"uboot",
+ "sbl",
+ NULL};
+const add_node_t add_fdt_node[] = {{}};
+
void uart2_configure_mux(void)
{
unsigned long cfg_rcgr;
@@ -240,6 +246,10 @@
icache_disable();
}
+__weak int ipq_get_tz_version(char *version_name, int buf_size)
+{
+ return 1;
+}
/**
* Set the uuid in bootargs variable for mounting rootfilesystem
*/
@@ -258,3 +268,18 @@
while(1);
}
+void ipq_fdt_fixup_socinfo(void *blob)
+{
+ return;
+}
+
+void ipq_fdt_fixup_usb_device_mode(void *blob)
+{
+ return;
+}
+
+void fdt_fixup_auto_restart(void *blob)
+{
+ return;
+}
+
diff --git a/board/qca/arm/ipq6018/ipq6018.h b/board/qca/arm/ipq6018/ipq6018.h
index d67ef0e..8d32f4a 100644
--- a/board/qca/arm/ipq6018/ipq6018.h
+++ b/board/qca/arm/ipq6018/ipq6018.h
@@ -116,6 +116,10 @@
SMEM_MAX_SIZE = SMEM_SPI_FLASH_ADDR_LEN + 1,
} smem_mem_type_t;
+extern const char *rsvd_node;
+extern const char *del_node[];
+extern const add_node_t add_fdt_node[];
+
#define MSM_SDC1_BASE 0x7800000
#define MSM_SDC1_SDHCI_BASE 0x7804000
diff --git a/drivers/net/ipq807x/ipq807x_edma.c b/drivers/net/ipq807x/ipq807x_edma.c
index c64465c..97151c3 100755
--- a/drivers/net/ipq807x/ipq807x_edma.c
+++ b/drivers/net/ipq807x/ipq807x_edma.c
@@ -1875,6 +1875,7 @@
ipq_qca8033_phy_init(&ipq807x_edma_dev[i]->ops[phy_id], phy_addr);
break;
case QCA8081_PHY:
+ case QCA8081_1_1_PHY:
ipq_qca8081_phy_init(&ipq807x_edma_dev[i]->ops[phy_id], phy_addr);
break;
case AQUANTIA_PHY_107:
diff --git a/drivers/net/ipq_common/ipq_phy.h b/drivers/net/ipq_common/ipq_phy.h
index 61a3026..5fd29c3 100755
--- a/drivers/net/ipq_common/ipq_phy.h
+++ b/drivers/net/ipq_common/ipq_phy.h
@@ -38,6 +38,7 @@
#define QCA8033_PHY 0x004DD074
#define QCA8033_PHY_ADDR 0x6
#define QCA8081_PHY 0x004DD100
+#define QCA8081_1_1_PHY 0x004DD101
#define AQUANTIA_PHY_107 0x03a1b4e2
#define AQUANTIA_PHY_109 0x03a1b502
#define AQUANTIA_PHY_111 0x03a1b610
@@ -100,6 +101,7 @@
MALIBU_PHY_TYPE = 1,
QCA8081_PHY_TYPE = 2,
AQ_PHY_TYPE = 3,
+ QCA8033_PHY_TYPE = 4,
};
typedef struct {
diff --git a/include/configs/ipq6018.h b/include/configs/ipq6018.h
index 390b1c4..f647215 100644
--- a/include/configs/ipq6018.h
+++ b/include/configs/ipq6018.h
@@ -19,6 +19,7 @@
#endif
#define CONFIG_IPQ6018
+#define CONFIG_QCA_DISABLE_SCM
#define CONFIG_BOARD_EARLY_INIT_F
#define CONFIG_BOARD_LATE_INIT
@@ -66,6 +67,12 @@
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE -\
CONFIG_SYS_MALLOC_LEN - CONFIG_ENV_SIZE -\
GENERATED_BD_INFO_SIZE)
+#define CONFIG_IPQ6018_I2C 1
+#ifdef CONFIG_IPQ6018_I2C
+#define CONFIG_SYS_I2C_QUP
+#define CONFIG_CMD_I2C
+#define CONFIG_DM_I2C
+#endif
#define CONFIG_SYS_MAXARGS 16
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
@@ -161,6 +168,7 @@
#define CONFIG_MMC_ADMA
#endif
+#define CONFIG_CMD_UBI
/*
* NAND Flash Configs
@@ -202,7 +210,7 @@
#define CONFIG_SYS_HUSH_PARSER
/* NSS firmware loaded using bootm */
-#define CONFIG_BOOTCOMMAND "bootm"
+#define CONFIG_BOOTCOMMAND "bootipq"
#define CONFIG_BOOTARGS "console=ttyMSM0,115200n8"
#define QCA_ROOT_FS_PART_NAME "rootfs"
@@ -219,6 +227,10 @@
#define CONFIG_CMD_BOOTZ
#define CONFIG_FDT_FIXUP_PARTITIONS
+#define CONFIG_OF_BOARD_SETUP
+
+#ifdef CONFIG_OF_BOARD_SETUP
+#define DLOAD_DISABLE 0x1
/*
* Below Configs need to be updated after enabling reset_crashdump
* Included now to avoid build failure
@@ -228,6 +240,10 @@
#define SCM_CMD_TZ_CONFIG_HW_FOR_RAM_DUMP_ID 0x9
#define SCM_CMD_TZ_FORCE_DLOAD_ID 0x10
#define SCM_CMD_TZ_PSHOLD 0x15
+#define BOOT_VERSION 0
+#define TZ_VERSION 1
+#define RPM_VERSION 3
+#endif
/* L1 cache line size is 64 bytes, L2 cache line size is 128 bytes
* Cache flush and invalidation based on L1 cache, so the cache line
* size is configured to 64 */