Fix new found CFG_
Also fix some minor typos.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Wolfgang Denk <wd@denx.de>
diff --git a/board/esd/pmc440/cmd_pmc440.c b/board/esd/pmc440/cmd_pmc440.c
index 3f0dca0..16c9c7e 100644
--- a/board/esd/pmc440/cmd_pmc440.c
+++ b/board/esd/pmc440/cmd_pmc440.c
@@ -364,7 +364,7 @@
base -= LOGBUFF_LEN + LOGBUFF_OVERHEAD;
#endif
/*
- * gd->bd->bi_memsize == physical ram size - CFG_MEM_TOP_HIDE
+ * gd->bd->bi_memsize == physical ram size - CONFIG_SYS_MEM_TOP_HIDE
*/
param = base - (pram << 10);
printf("PARAM: @%08x\n", param);
diff --git a/board/xilinx/ppc405-generic/u-boot-ram.lds b/board/xilinx/ppc405-generic/u-boot-ram.lds
index 0004d61..6bbd3bd 100644
--- a/board/xilinx/ppc405-generic/u-boot-ram.lds
+++ b/board/xilinx/ppc405-generic/u-boot-ram.lds
@@ -127,7 +127,7 @@
*(COMMON)
}
- ppcenv_assert = ASSERT(. < 0xFFFFB000, ".bss section too big, overlaps .ppcenv section. Please update your confguration: CFG_MONITOR_BASE, CFG_MONITOR_LEN and TEXT_BASE may need to be modified.");
+ ppcenv_assert = ASSERT(. < 0xFFFFB000, ".bss section too big, overlaps .ppcenv section. Please update your configuration: CONFIG_SYS_MONITOR_BASE, CONFIG_SYS_MONITOR_LEN and TEXT_BASE may need to be modified.");
_end = . ;
PROVIDE (end = .);
diff --git a/board/xilinx/ppc405-generic/u-boot-rom.lds b/board/xilinx/ppc405-generic/u-boot-rom.lds
index d2bac9f..d094006 100644
--- a/board/xilinx/ppc405-generic/u-boot-rom.lds
+++ b/board/xilinx/ppc405-generic/u-boot-rom.lds
@@ -137,7 +137,7 @@
*(COMMON)
}
- ppcenv_assert = ASSERT(. < 0xFFFFB000, ".bss section too big, overlaps .ppcenv section. Please update your confguration: CFG_MONITOR_BASE, CFG_MONITOR_LEN and TEXT_BASE may need to be modified.");
+ ppcenv_assert = ASSERT(. < 0xFFFFB000, ".bss section too big, overlaps .ppcenv section. Please update your configuration: CONFIG_SYS_MONITOR_BASE, CONFIG_SYS_MONITOR_LEN and TEXT_BASE may need to be modified.");
_end = . ;
PROVIDE (end = .);
diff --git a/cpu/arm926ejs/at91/usb.c b/cpu/arm926ejs/at91/usb.c
index 2f5c337..a15ab16 100644
--- a/cpu/arm926ejs/at91/usb.c
+++ b/cpu/arm926ejs/at91/usb.c
@@ -35,7 +35,7 @@
#if defined(CONFIG_AT91CAP9) || defined(CONFIG_AT91SAM9260) || \
defined(CONFIG_AT91SAM9263)
/* Enable PLLB */
- at91_sys_write(AT91_CKGR_PLLBR, CFG_AT91_PLLB);
+ at91_sys_write(AT91_CKGR_PLLBR, CONFIG_SYS_AT91_PLLB);
while ((at91_sys_read(AT91_PMC_SR) & AT91_PMC_LOCKB) != AT91_PMC_LOCKB)
;
#endif
diff --git a/cpu/mpc86xx/release.S b/cpu/mpc86xx/release.S
index b524e50..95efbb4 100644
--- a/cpu/mpc86xx/release.S
+++ b/cpu/mpc86xx/release.S
@@ -125,7 +125,7 @@
mtspr HID0, r5 /* enable + invalidate */
mtspr HID0, r3 /* enable */
sync
-#ifdef CFG_L2
+#ifdef CONFIG_SYS_L2
sync
lis r3, L2_ENABLE@h
ori r3, r3, L2_ENABLE@l
diff --git a/include/configs/PMC440.h b/include/configs/PMC440.h
index 7219bb8..d0e3cda 100644
--- a/include/configs/PMC440.h
+++ b/include/configs/PMC440.h
@@ -219,8 +219,8 @@
#if !defined(CONFIG_NAND_U_BOOT) && !defined(CONFIG_NAND_SPL)
#define CONFIG_DDR_DATA_EYE /* use DDR2 optimization */
#endif
-#define CFG_MEM_TOP_HIDE (4 << 10) /* don't use last 4kbytes */
- /* 440EPx errata CHIP 11 */
+#define CONFIG_SYS_MEM_TOP_HIDE (4 << 10) /* don't use last 4kbytes */
+ /* 440EPx errata CHIP 11 */
/*-----------------------------------------------------------------------
* I2C
@@ -490,8 +490,8 @@
#endif
/* Memory Bank 1 (RESET) initialization */
-#define CFG_EBC_PB1AP 0x7f817200 //0x03017200
-#define CFG_EBC_PB1CR (CFG_RESET_BASE | 0x1c000)
+#define CONFIG_SYS_EBC_PB1AP 0x7f817200 //0x03017200
+#define CONFIG_SYS_EBC_PB1CR (CONFIG_SYS_RESET_BASE | 0x1c000)
/* Memory Bank 4 (FPGA / 32Bit) initialization */
#define CONFIG_SYS_EBC_PB4AP 0x03840f40 /* BME=0,TWT=7,CSN=1,TH=7,RE=1,SOR=0,BEM=1 */
diff --git a/include/configs/afeb9260.h b/include/configs/afeb9260.h
index f077ad9..90e553d 100644
--- a/include/configs/afeb9260.h
+++ b/include/configs/afeb9260.h
@@ -29,7 +29,7 @@
/* ARM asynchronous clock */
#define AT91_MAIN_CLOCK 18429952 /* from 18.432 MHz crystal */
#define AT91_MASTER_CLOCK 89999598 /* peripheral = main / 2 */
-#define CFG_AT91_PLLB 0x107c3e18 /* PLLB settings for USB */
+#define CONFIG_SYS_AT91_PLLB 0x107c3e18 /* PLLB settings for USB */
#define CONFIG_SYS_HZ 1000000 /* 1us resolution */
#define AT91_SLOW_CLOCK 32768 /* slow clock */
@@ -150,7 +150,7 @@
#define CONFIG_SYS_CBSIZE 256
#define CONFIG_SYS_MAXARGS 16
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
-#define CFG_LONGHELP 1
+#define CONFIG_SYS_LONGHELP 1
#define CONFIG_CMDLINE_EDITING 1
#define ROUND(A, B) (((A) + (B)) & ~((B) - 1))
diff --git a/include/configs/at91cap9adk.h b/include/configs/at91cap9adk.h
index aeb06ac..363df67 100644
--- a/include/configs/at91cap9adk.h
+++ b/include/configs/at91cap9adk.h
@@ -32,7 +32,7 @@
#define AT91_MAIN_CLOCK 12000000 /* 12 MHz crystal */
#define AT91_MASTER_CLOCK 100000000 /* peripheral */
#define AT91_CPU_CLOCK 200000000 /* cpu */
-#define CFG_AT91_PLLB 0x10073e01 /* PLLB settings for USB */
+#define CONFUG_SYS_AT91_PLLB 0x10073e01 /* PLLB settings for USB */
#define CONFIG_SYS_HZ 1000000 /* 1us resolution */
#define AT91_SLOW_CLOCK 32768 /* slow clock */
diff --git a/include/configs/at91sam9260ek.h b/include/configs/at91sam9260ek.h
index 2df8d54..1538929 100644
--- a/include/configs/at91sam9260ek.h
+++ b/include/configs/at91sam9260ek.h
@@ -32,7 +32,7 @@
#define AT91_MAIN_CLOCK 18432000 /* 18.432 MHz crystal */
#define AT91_MASTER_CLOCK 100000000 /* peripheral */
#define AT91_CPU_CLOCK 200000000 /* cpu */
-#define CFG_AT91_PLLB 0x107c3e18 /* PLLB settings for USB */
+#define CONFIG_SYS_AT91_PLLB 0x107c3e18 /* PLLB settings for USB */
#define CONFIG_SYS_HZ 1000000 /* 1us resolution */
#define AT91_SLOW_CLOCK 32768 /* slow clock */
diff --git a/include/configs/at91sam9263ek.h b/include/configs/at91sam9263ek.h
index fc7c941..d9ebc87 100644
--- a/include/configs/at91sam9263ek.h
+++ b/include/configs/at91sam9263ek.h
@@ -32,7 +32,7 @@
#define AT91_MAIN_CLOCK 16367660 /* 16.367 MHz crystal */
#define AT91_MASTER_CLOCK 100000000 /* peripheral */
#define AT91_CPU_CLOCK 200000000 /* cpu */
-#define CFG_AT91_PLLB 0x133a3e8d /* PLLB settings for USB */
+#define CONFIG_SYS_AT91_PLLB 0x133a3e8d /* PLLB settings for USB */
#define CONFIG_SYS_HZ 1000000 /* 1us resolution */
#define AT91_SLOW_CLOCK 32768 /* slow clock */