| commit | 481549f8c1fa3a40729d0ff15c25380a043b6d41 | [log] [tgz] |
|---|---|---|
| author | Stefan Roese <sr@denx.de> | Sun Nov 16 12:47:00 2014 +0100 |
| committer | Marek Vasut <marex@denx.de> | Sat Dec 06 13:52:47 2014 +0100 |
| tree | 35fb86dea8c991d3a6c1ab32eb03ebb4d3e8815f | |
| parent | c877eaa8a04858c23ce7ebb82c59f7cf838545ef [diff] |
arm: socfpga: Add missing DW master SPI clock prototyp to clock_manager.h Signed-off-by: Stefan Roese <sr@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@altera.com> Cc: Vince Bridgers <vbridger@altera.com> Cc: Marek Vasut <marex@denx.de> Acked-by: Pavel Machek <pavel@denx.de>