diff --git a/CREDITS b/CREDITS
index dead57d..933104c 100644
--- a/CREDITS
+++ b/CREDITS
@@ -161,7 +161,7 @@
 
 N: Frank Gottschling
 E: fgottschling@eltec.de
-D: Support for ELTEC MHPC/BAB7xx/ELPPC boards, cfb-console, i8042, SMI LynxEM
+D: Support for ELTEC MHPC/ELPPC boards, cfb-console, i8042, SMI LynxEM
 W: www.eltec.de
 
 N: Marius Groeger
@@ -183,7 +183,7 @@
 
 N: Andreas Heppel
 E: aheppel@sysgo.de
-D: CPU Support for MPC 75x; board support for Eltec BAB750 [obsolete!]
+D: CPU Support for MPC 75x
 
 N: Josh Huber
 E: huber@alum.wpi.edu
diff --git a/MAINTAINERS b/MAINTAINERS
index 2ecc664..8bb7572 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -107,7 +107,6 @@
 	LANTEC		MPC850
 	LWMON		MPC823
 	R360MPI		MPC823
-	RMU		MPC850
 	RRvision	MPC823
 	SM850		MPC850
 	SPD823TS	MPC823
@@ -214,8 +213,6 @@
 
 	MHPC		MPC8xx
 
-	BAB7xx		MPC740/MPC750
-
 Wolfgang Grandegger <wg@denx.de>
 
 	ipek01		MPC5200
diff --git a/Makefile b/Makefile
index f23bed6..de65a17 100644
--- a/Makefile
+++ b/Makefile
@@ -798,6 +798,7 @@
 	@rm -f $(obj)u-boot.sb
 	@rm -f $(obj)tools/inca-swap-bytes
 	@rm -f $(obj)arch/powerpc/cpu/mpc824x/bedbug_603e.c
+	@rm -f $(obj)arch/powerpc/cpu/mpc83xx/ddr-gen?.c
 	@rm -fr $(obj)include/asm/proc $(obj)include/asm/arch $(obj)include/asm
 	@rm -fr $(obj)include/generated
 	@[ ! -d $(obj)nand_spl ] || find $(obj)nand_spl -name "*" -type l -print | xargs rm -f
diff --git a/README b/README
index 3ddec77..e9d1891 100644
--- a/README
+++ b/README
@@ -564,7 +564,7 @@
 
 		CONFIG_CFB_CONSOLE
 		Enables console device for a color framebuffer. Needs following
-		defines (cf. smiLynxEM, i8042, board/eltec/bab7xx)
+		defines (cf. smiLynxEM, i8042)
 			VIDEO_FB_LITTLE_ENDIAN	graphic memory organisation
 						(default big endian)
 			VIDEO_HW_RECTFILL	graphic chip supports
diff --git a/arch/powerpc/cpu/mpc83xx/Makefile b/arch/powerpc/cpu/mpc83xx/Makefile
index b353036..b5c499d 100644
--- a/arch/powerpc/cpu/mpc83xx/Makefile
+++ b/arch/powerpc/cpu/mpc83xx/Makefile
@@ -42,15 +42,15 @@
 COBJS-$(CONFIG_OF_LIBFDT) += fdt.o
 
 ifdef CONFIG_FSL_DDR2
-COBJS-$(CONFIG_MPC8349) += ddr-gen2.o
+COBJS_LN-$(CONFIG_MPC8349) += ddr-gen2.o
 else
 COBJS-y += spd_sdram.o
 endif
 COBJS-$(CONFIG_FSL_DDR2) += law.o
 
 COBJS	:= $(COBJS-y)
-SRCS	:= $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS	:= $(addprefix $(obj),$(SOBJS) $(COBJS))
+SRCS	:= $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c) $(addprefix $(obj),$(COBJS_LN-y:.o=.c))
+OBJS	:= $(addprefix $(obj),$(SOBJS) $(COBJS) $(COBJS_LN-y))
 START	:= $(addprefix $(obj),$(START))
 
 all:	$(obj).depend $(START) $(LIB)
@@ -59,15 +59,12 @@
 	$(call cmd_link_o_target, $(OBJS))
 
 $(obj)ddr-gen1.c:
-	@rm -f $(obj)ddr-gen1.c
 	ln -sf $(SRCTREE)/arch/powerpc/cpu/mpc85xx/ddr-gen1.c $(obj)ddr-gen1.c
 
 $(obj)ddr-gen2.c:
-	@rm -f $(obj)ddr-gen2.c
 	ln -sf $(SRCTREE)/arch/powerpc/cpu/mpc85xx/ddr-gen2.c $(obj)ddr-gen2.c
 
 $(obj)ddr-gen3.c:
-	@rm -f $(obj)ddr-gen3.c
 	ln -sf $(SRCTREE)/arch/powerpc/cpu/mpc85xx/ddr-gen3.c $(obj)ddr-gen3.c
 
 #########################################################################
diff --git a/arch/powerpc/cpu/ppc4xx/Makefile b/arch/powerpc/cpu/ppc4xx/Makefile
index d97ca20..3d62255 100644
--- a/arch/powerpc/cpu/ppc4xx/Makefile
+++ b/arch/powerpc/cpu/ppc4xx/Makefile
@@ -61,7 +61,6 @@
 COBJS	+= traps.o
 COBJS	+= usb.o
 COBJS	+= usb_ohci.o
-COBJS	+= usbdev.o
 COBJS-$(CONFIG_XILINX_440) += xilinx_irq.o
 ifndef CONFIG_XILINX_440
 COBJS	+= 4xx_uart.o
diff --git a/arch/powerpc/cpu/ppc4xx/usb.c b/arch/powerpc/cpu/ppc4xx/usb.c
index 592efe7..8c71f75 100644
--- a/arch/powerpc/cpu/ppc4xx/usb.c
+++ b/arch/powerpc/cpu/ppc4xx/usb.c
@@ -30,8 +30,6 @@
 DECLARE_GLOBAL_DATA_PTR;
 #endif
 
-#include "usbdev.h"
-
 int usb_cpu_init(void)
 {
 #ifdef CONFIG_4xx_DCACHE
@@ -39,9 +37,6 @@
 	change_tlb(gd->bd->bi_memstart, gd->bd->bi_memsize, TLB_WORD2_I_ENABLE);
 #endif
 
-#if defined(CONFIG_440EP) || defined(CONFIG_440EPX)
-	usb_dev_init();
-#endif
 	return 0;
 }
 
diff --git a/arch/powerpc/cpu/ppc4xx/usb_ohci.c b/arch/powerpc/cpu/ppc4xx/usb_ohci.c
index 065730d..4fb7031 100644
--- a/arch/powerpc/cpu/ppc4xx/usb_ohci.c
+++ b/arch/powerpc/cpu/ppc4xx/usb_ohci.c
@@ -44,8 +44,6 @@
 #include <usb.h>
 #include "usb_ohci.h"
 
-#include "usbdev.h"
-
 #define OHCI_USE_NPS		/* force NoPowerSwitching mode */
 #undef OHCI_VERBOSE_DEBUG	/* not always helpful */
 #undef DEBUG
@@ -1623,11 +1621,6 @@
 	ohci_inited = 1;
 	urb_finished = 1;
 
-#if defined(CONFIG_440EP) || defined(CONFIG_440EPX)
-	/* init the device driver */
-	usb_dev_init();
-#endif
-
 	return 0;
 }
 
diff --git a/arch/powerpc/cpu/ppc4xx/usbdev.c b/arch/powerpc/cpu/ppc4xx/usbdev.c
deleted file mode 100644
index fe398af..0000000
--- a/arch/powerpc/cpu/ppc4xx/usbdev.c
+++ /dev/null
@@ -1,230 +0,0 @@
-/*USB 1.1,2.0 device*/
-
-#include <common.h>
-#include <asm/processor.h>
-
-#if (defined(CONFIG_440EP) || defined(CONFIG_440EPX)) && defined(CONFIG_CMD_USB)
-
-#include <usb.h>
-#include <asm/ppc4xx-uic.h>
-#include "usbdev.h"
-
-#define USB_DT_DEVICE        0x01
-#define USB_DT_CONFIG        0x02
-#define USB_DT_STRING        0x03
-#define USB_DT_INTERFACE     0x04
-#define USB_DT_ENDPOINT      0x05
-
-int set_value = -1;
-
-void process_endpoints(unsigned short usb2d0_intrin)
-{
-	/*will hold the packet received */
-	struct usb_device_descriptor usb_device_packet;
-	struct usb_configuration_descriptor usb_config_packet;
-	struct usb_string_descriptor usb_string_packet;
-	struct devrequest setup_packet;
-	unsigned int *setup_packet_pt;
-	unsigned char *packet_pt = NULL;
-	int temp, temp1;
-
-	int i;
-
-	/*printf("{USB device} - endpoint 0x%X \n", usb2d0_intrin); */
-
-	/*set usb address, seems to not work unless it is done in the next
-	   interrupt, so that is why it is done this way */
-	if (set_value != -1)
-		*(unsigned char *)USB2D0_FADDR_8 = (unsigned char)set_value;
-
-	/*endpoint 1 */
-	if (usb2d0_intrin & 0x01) {
-		setup_packet_pt = (unsigned int *)&setup_packet;
-
-		/*copy packet */
-		setup_packet_pt[0] = *(unsigned int *)USB2D0_FIFO_0;
-		setup_packet_pt[1] = *(unsigned int *)USB2D0_FIFO_0;
-		temp = *(unsigned int *)USB2D0_FIFO_0;
-		temp1 = *(unsigned int *)USB2D0_FIFO_0;
-
-		/*do some swapping */
-		setup_packet.value = swap_16(setup_packet.value);
-		setup_packet.index = swap_16(setup_packet.index);
-		setup_packet.length = swap_16(setup_packet.length);
-
-		/*clear rx packet */
-		*(unsigned short *)USB2D0_INCSR0_8 = 0x48;
-
-		/*printf("0x%X 0x%X 0x%X 0x%X 0x%X 0x%X 0x%X\n", setup_packet.requesttype,
-		   setup_packet.request, setup_packet.value,
-		   setup_packet.index, setup_packet.length, temp, temp1 ); */
-
-		switch (setup_packet.request) {
-		case USB_REQ_GET_DESCRIPTOR:
-
-			switch (setup_packet.value >> 8) {
-			case USB_DT_DEVICE:
-				/*create packet */
-				usb_device_packet.bLength = 18;
-				usb_device_packet.bDescriptorType =
-				    USB_DT_DEVICE;
-#ifdef USB_2_0_DEVICE
-				usb_device_packet.bcdUSB = swap_16(0x200);
-#else
-				usb_device_packet.bcdUSB = swap_16(0x110);
-#endif
-				usb_device_packet.bDeviceClass = 0xff;
-				usb_device_packet.bDeviceSubClass = 0;
-				usb_device_packet.bDeviceProtocol = 0;
-				usb_device_packet.bMaxPacketSize0 = 32;
-				usb_device_packet.idVendor = swap_16(1);
-				usb_device_packet.idProduct = swap_16(2);
-				usb_device_packet.bcdDevice = swap_16(0x300);
-				usb_device_packet.iManufacturer = 1;
-				usb_device_packet.iProduct = 1;
-				usb_device_packet.iSerialNumber = 1;
-				usb_device_packet.bNumConfigurations = 1;
-
-				/*put packet in fifo */
-				packet_pt = (unsigned char *)&usb_device_packet;
-				break;
-
-			case USB_DT_CONFIG:
-				/*create packet */
-				usb_config_packet.bLength = 9;
-				usb_config_packet.bDescriptorType =
-				    USB_DT_CONFIG;
-				usb_config_packet.wTotalLength = swap_16(25);
-				usb_config_packet.bNumInterfaces = 1;
-				usb_config_packet.bConfigurationValue = 1;
-				usb_config_packet.iConfiguration = 0;
-				usb_config_packet.bmAttributes = 0x40;
-				usb_config_packet.bMaxPower = 0;
-
-				/*put packet in fifo */
-				packet_pt = (unsigned char *)&usb_config_packet;
-				break;
-
-			case USB_DT_STRING:
-				/*create packet */
-				usb_string_packet.bLength = 2;
-				usb_string_packet.bDescriptorType =
-				    USB_DT_STRING;
-				usb_string_packet.wData[0] = 0x0094;
-
-				/*put packet in fifo */
-				packet_pt = (unsigned char *)&usb_string_packet;
-				break;
-			}
-
-			/*put packet in fifo */
-			for (i = 0; i < (setup_packet.length); i++) {
-				*(unsigned char *)USB2D0_FIFO_0 = packet_pt[i];
-			}
-
-			/*give tx command */
-			*(unsigned short *)USB2D0_INCSR0_8 = 0x0a;
-
-			break;
-
-		case USB_REQ_SET_ADDRESS:
-
-			/*copy usb address */
-			set_value = setup_packet.value;
-
-			break;
-		}
-
-	}
-}
-
-void process_other(unsigned char usb2d0_intrusb)
-{
-
-	/*check for sof */
-	if (usb2d0_intrusb & 0x08) {
-		/*printf("{USB device} - sof detected\n"); */
-	}
-
-	/*check for reset */
-	if (usb2d0_intrusb & 0x04) {
-		/*printf("{USB device} - reset detected\n"); */
-
-		/*copy usb address of zero, need to do this when usb reset */
-		set_value = 0;
-	}
-
-	if (usb2d0_intrusb & 0x02) {
-		/*printf("{USB device} - resume detected\n"); */
-	}
-
-	if (usb2d0_intrusb & 0x01) {
-		/*printf("{USB device} - suspend detected\n"); */
-	}
-}
-
-int usbInt(void)
-{
-	/*Must read these 2 registers and use values to clear interrupts.  If you
-	   do not read them then the interrupt will not be cleared.  If you do not
-	   use the variable the optimizer will not do a read. */
-	volatile unsigned short usb2d0_intrin =
-	    *(unsigned short *)USB2D0_INTRIN_16;
-	volatile unsigned char usb2d0_intrusb =
-	    *(unsigned char *)USB2D0_INTRUSB_8;
-
-	/*check if there was an endpoint interrupt */
-	if (usb2d0_intrin != 0) {
-		process_endpoints(usb2d0_intrin);
-	}
-
-	/*check for other interrupts */
-	if (usb2d0_intrusb != 0) {
-		process_other(usb2d0_intrusb);
-	}
-
-	return 0;
-}
-
-#if defined(CONFIG_440EPX)
-void usb_dev_init()
-{
-	printf("USB 2.0 Device init\n");
-
-	/*usb dev init */
-	*(unsigned char *)USB2D0_POWER_8 = 0xa1;	/* 2.0 */
-
-	/*enable interrupts */
-	*(unsigned char *)USB2D0_INTRUSBE_8 = 0x0f;
-
-	irq_install_handler(VECNUM_USBDEV, (interrupt_handler_t *) usbInt,
-			    NULL);
-}
-#else
-void usb_dev_init()
-{
-#ifdef USB_2_0_DEVICE
-	printf("USB 2.0 Device init\n");
-	/*select 2.0 device */
-	mtsdr(SDR0_USB0, 0x0);	/* 2.0 */
-
-	/*usb dev init */
-	*(unsigned char *)USB2D0_POWER_8 = 0xa1;	/* 2.0 */
-#else
-	printf("USB 1.1 Device init\n");
-	/*select 1.1 device */
-	mtsdr(SDR0_USB0, 0x2);	/* 1.1 */
-
-	/*usb dev init */
-	*(unsigned char *)USB2D0_POWER_8 = 0xc0;	/* 1.1 */
-#endif
-
-	/*enable interrupts */
-	*(unsigned char *)USB2D0_INTRUSBE_8 = 0x0f;
-
-	irq_install_handler(VECNUM_USBDEV, (interrupt_handler_t *) usbInt,
-			    NULL);
-}
-#endif
-
-#endif /* CONFIG_440EP || CONFIG_440EPX */
diff --git a/arch/powerpc/cpu/ppc4xx/usbdev.h b/arch/powerpc/cpu/ppc4xx/usbdev.h
deleted file mode 100644
index ef6a2da..0000000
--- a/arch/powerpc/cpu/ppc4xx/usbdev.h
+++ /dev/null
@@ -1,31 +0,0 @@
-#include <config.h>
-
-/*Common Registers*/
-#define USB2D0_INTRIN_16   (CONFIG_SYS_USB_DEVICE | 0x100)
-#define USB2D0_POWER_8     (CONFIG_SYS_USB_DEVICE | 0x102)
-#define USB2D0_FADDR_8     (CONFIG_SYS_USB_DEVICE | 0x103)
-#define USB2D0_INTRINE_16  (CONFIG_SYS_USB_DEVICE | 0x104)
-#define USB2D0_INTROUT_16  (CONFIG_SYS_USB_DEVICE | 0x106)
-#define USB2D0_INTRUSBE_8  (CONFIG_SYS_USB_DEVICE | 0x108)
-#define USB2D0_INTRUSB_8   (CONFIG_SYS_USB_DEVICE | 0x109)
-#define USB2D0_INTROUTE_16 (CONFIG_SYS_USB_DEVICE | 0x10a)
-#define USB2D0_TSTMODE_8   (CONFIG_SYS_USB_DEVICE | 0x10c)
-#define USB2D0_INDEX_8     (CONFIG_SYS_USB_DEVICE | 0x10d)
-#define USB2D0_FRAME_16    (CONFIG_SYS_USB_DEVICE | 0x10e)
-
-/*Indexed Registers*/
-#define USB2D0_INCSR0_8    (CONFIG_SYS_USB_DEVICE | 0x110)
-#define USB2D0_INCSR_16    (CONFIG_SYS_USB_DEVICE | 0x110)
-#define USB2D0_INMAXP_16   (CONFIG_SYS_USB_DEVICE | 0x112)
-#define USB2D0_OUTCSR_16   (CONFIG_SYS_USB_DEVICE | 0x114)
-#define USB2D0_OUTMAXP_16  (CONFIG_SYS_USB_DEVICE | 0x116)
-#define USB2D0_OUTCOUNT0_8 (CONFIG_SYS_USB_DEVICE | 0x11a)
-#define USB2D0_OUTCOUNT_16 (CONFIG_SYS_USB_DEVICE | 0x11a)
-
-/*FIFOs*/
-#define USB2D0_FIFO_0 (CONFIG_SYS_USB_DEVICE | 0x120)
-#define USB2D0_FIFO_1 (CONFIG_SYS_USB_DEVICE | 0x124)
-#define USB2D0_FIFO_2 (CONFIG_SYS_USB_DEVICE | 0x128)
-#define USB2D0_FIFO_3 (CONFIG_SYS_USB_DEVICE | 0x12c)
-
-void usb_dev_init(void);
diff --git a/arch/powerpc/lib/Makefile b/arch/powerpc/lib/Makefile
index 724d8ee..cdd62a2 100644
--- a/arch/powerpc/lib/Makefile
+++ b/arch/powerpc/lib/Makefile
@@ -23,6 +23,19 @@
 
 include $(TOPDIR)/config.mk
 
+## Build a couple of necessary functions into a private libgcc
+LIBGCC	= $(obj)libgcc.o
+GLSOBJS	+= _ashldi3.o
+GLSOBJS	+= _ashrdi3.o
+GLSOBJS	+= _lshrdi3.o
+LGOBJS	:= $(addprefix $(obj),$(GLSOBJS)) \
+	   $(addprefix $(obj),$(GLCOBJS))
+
+## But only build it if the user asked for it
+ifdef USE_PRIVATE_LIBGCC
+TARGETS	+= $(LIBGCC)
+endif
+
 LIB	= $(obj)lib$(ARCH).o
 
 SOBJS-y	+= ppccache.o
@@ -53,9 +66,14 @@
 
 COBJS	+= $(sort $(COBJS-y))
 
-SRCS	:= $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
+SRCS	:= $(GLSOBJS:.o=.S) $(GLCOBJS:.o=.c) \
+	   $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
 OBJS	:= $(addprefix $(obj),$(SOBJS-y) $(COBJS-y))
 
+TARGETS += $(LIB)
+
+all: $(TARGETS)
+
 $(LIB):	$(obj).depend $(OBJS)
 	@if ! $(CROSS_COMPILE)readelf -S $(OBJS) | grep -q '\.fixup.*PROGBITS';\
 	then \
@@ -65,6 +83,9 @@
 	fi;
 	$(call cmd_link_o_target, $(OBJS))
 
+$(LIBGCC): $(obj).depend $(LGOBJS)
+	$(call cmd_link_o_target, $(LGOBJS))
+
 #########################################################################
 
 # defines $(obj).depend target
diff --git a/arch/powerpc/lib/_ashldi3.S b/arch/powerpc/lib/_ashldi3.S
new file mode 100644
index 0000000..e452f56
--- /dev/null
+++ b/arch/powerpc/lib/_ashldi3.S
@@ -0,0 +1,45 @@
+/*
+ * This code was copied from arch/powerpc/kernel/misc_32.S in the Linux
+ * kernel sources (commit 85e2efbb1db9a18d218006706d6e4fbeb0216213, also
+ * known as 2.6.38-rc5).  The source file copyrights are as follows:
+ *
+ * (C) Copyright 1995-1996 Gary Thomas (gdt@linuxppc.org)
+ *
+ * Largely rewritten by Cort Dougan (cort@cs.nmt.edu)
+ * and Paul Mackerras.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ */
+
+#include <ppc_asm.tmpl>
+#include <ppc_defs.h>
+#include <config.h>
+
+/*
+ * Extended precision shifts.
+ *
+ * Updated to be valid for shift counts from 0 to 63 inclusive.
+ * -- Gabriel
+ *
+ * R3/R4 has 64 bit value
+ * R5    has shift count
+ * result in R3/R4
+ *
+ *  ashrdi3: arithmetic right shift (sign propagation)
+ *  lshrdi3: logical right shift
+ *  ashldi3: left shift
+ */
+	.globl __ashldi3
+__ashldi3:
+	subfic	r6,r5,32
+	slw	r3,r3,r5	# MSW = count > 31 ? 0 : MSW << count
+	addi	r7,r5,32	# could be xori, or addi with -32
+	srw	r6,r4,r6	# t1 = count > 31 ? 0 : LSW >> (32-count)
+	slw	r7,r4,r7	# t2 = count < 32 ? 0 : LSW << (count-32)
+	or	r3,r3,r6	# MSW |= t1
+	slw	r4,r4,r5	# LSW = LSW << count
+	or	r3,r3,r7	# MSW |= t2
+	blr
diff --git a/arch/powerpc/lib/_ashrdi3.S b/arch/powerpc/lib/_ashrdi3.S
new file mode 100644
index 0000000..f28ab49
--- /dev/null
+++ b/arch/powerpc/lib/_ashrdi3.S
@@ -0,0 +1,47 @@
+/*
+ * This code was copied from arch/powerpc/kernel/misc_32.S in the Linux
+ * kernel sources (commit 85e2efbb1db9a18d218006706d6e4fbeb0216213, also
+ * known as 2.6.38-rc5).  The source file copyrights are as follows:
+ *
+ * (C) Copyright 1995-1996 Gary Thomas (gdt@linuxppc.org)
+ *
+ * Largely rewritten by Cort Dougan (cort@cs.nmt.edu)
+ * and Paul Mackerras.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ */
+
+#include <ppc_asm.tmpl>
+#include <ppc_defs.h>
+#include <config.h>
+
+/*
+ * Extended precision shifts.
+ *
+ * Updated to be valid for shift counts from 0 to 63 inclusive.
+ * -- Gabriel
+ *
+ * R3/R4 has 64 bit value
+ * R5    has shift count
+ * result in R3/R4
+ *
+ *  ashrdi3: arithmetic right shift (sign propagation)
+ *  lshrdi3: logical right shift
+ *  ashldi3: left shift
+ */
+	.globl __ashrdi3
+__ashrdi3:
+	subfic	r6,r5,32
+	srw	r4,r4,r5	# LSW = count > 31 ? 0 : LSW >> count
+	addi	r7,r5,32	# could be xori, or addi with -32
+	slw	r6,r3,r6	# t1 = count > 31 ? 0 : MSW << (32-count)
+	rlwinm	r8,r7,0,32	# t3 = (count < 32) ? 32 : 0
+	sraw	r7,r3,r7	# t2 = MSW >> (count-32)
+	or	r4,r4,r6	# LSW |= t1
+	slw	r7,r7,r8	# t2 = (count < 32) ? 0 : t2
+	sraw	r3,r3,r5	# MSW = MSW >> count
+	or	r4,r4,r7	# LSW |= t2
+	blr
diff --git a/arch/powerpc/lib/_lshrdi3.S b/arch/powerpc/lib/_lshrdi3.S
new file mode 100644
index 0000000..c1bbe7b
--- /dev/null
+++ b/arch/powerpc/lib/_lshrdi3.S
@@ -0,0 +1,45 @@
+/*
+ * This code was copied from arch/powerpc/kernel/misc_32.S in the Linux
+ * kernel sources (commit 85e2efbb1db9a18d218006706d6e4fbeb0216213, also
+ * known as 2.6.38-rc5).  The source file copyrights are as follows:
+ *
+ * (C) Copyright 1995-1996 Gary Thomas (gdt@linuxppc.org)
+ *
+ * Largely rewritten by Cort Dougan (cort@cs.nmt.edu)
+ * and Paul Mackerras.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ */
+
+#include <ppc_asm.tmpl>
+#include <ppc_defs.h>
+#include <config.h>
+
+/*
+ * Extended precision shifts.
+ *
+ * Updated to be valid for shift counts from 0 to 63 inclusive.
+ * -- Gabriel
+ *
+ * R3/R4 has 64 bit value
+ * R5    has shift count
+ * result in R3/R4
+ *
+ *  ashrdi3: arithmetic right shift (sign propagation)
+ *  lshrdi3: logical right shift
+ *  ashldi3: left shift
+ */
+	.globl __lshrdi3
+__lshrdi3:
+	subfic	r6,r5,32
+	srw	r4,r4,r5	# LSW = count > 31 ? 0 : LSW >> count
+	addi	r7,r5,32	# could be xori, or addi with -32
+	slw	r6,r3,r6	# t1 = count > 31 ? 0 : MSW << (32-count)
+	srw	r7,r3,r7	# t2 = count < 32 ? 0 : MSW >> (count-32)
+	or	r4,r4,r6	# LSW |= t1
+	srw	r3,r3,r5	# MSW = MSW >> count
+	or	r4,r4,r7	# LSW |= t2
+	blr
diff --git a/board/eltec/bab7xx/Makefile b/board/eltec/bab7xx/Makefile
deleted file mode 100644
index 9606ddc..0000000
--- a/board/eltec/bab7xx/Makefile
+++ /dev/null
@@ -1,46 +0,0 @@
-#
-# (C) Copyright 2000-2006
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB	= $(obj)lib$(BOARD).o
-
-COBJS	= $(BOARD).o flash.o pci.o misc.o el_srom.o dc_srom.o l2cache.o
-
-SOBJS	= asm_init.o
-
-SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS	:= $(addprefix $(obj),$(COBJS))
-SOBJS	:= $(addprefix $(obj),$(SOBJS))
-
-$(LIB):	$(obj).depend $(OBJS) $(SOBJS)
-	$(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
diff --git a/board/eltec/bab7xx/asm_init.S b/board/eltec/bab7xx/asm_init.S
deleted file mode 100644
index a85fb8b..0000000
--- a/board/eltec/bab7xx/asm_init.S
+++ /dev/null
@@ -1,1476 +0,0 @@
-/*
- * (C) Copyright 2001 ELTEC Elektronik AG
- * Frank Gottschling <fgottschling@eltec.de>
- *
- * ELTEC BAB PPC RAM initialization
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <config.h>
-#include <asm/processor.h>
-#include <74xx_7xx.h>
-#include <mpc106.h>
-#include <version.h>
-
-#include <ppc_asm.tmpl>
-#include <ppc_defs.h>
-
-/*
- * This following contains the entry code for the initialization code
- * for the MPC 106, a PCI Bridge/Memory Controller.
- * Register usage:
- * r0  = ramtest scratch register, toggleError loop counter
- * r1  = 0xfec0 0cf8 CONFIG_ADDRESS
- * r2  = 0xfee0 0cfc CONFIG_DATA
- * r3  = scratch register, subroutine argument and return value, ramtest size
- * r4  = scratch register, spdRead clock mask, OutHex loop count
- * r5  = ramtest scratch register
- * r6  = toggleError 1st value, spdRead port mask
- * r7  = toggleError 2nd value, ramtest scratch register,
- *       spdRead scratch register (0x00)
- * r8  = ramtest scratch register, spdRead scratch register (0x80)
- * r9  = ramtest scratch register, toggleError loop end, OutHex digit
- * r10 = ramtest scratch register, spdWriteByte parameter,
- *        spdReadByte return value, printf pointer to COM1
- * r11 = startType
- * r12 = ramtest scratch register, spdRead data mask
- * r13 = pointer to message block
- * r14 = pointer to GOT
- * r15 = scratch register, SPD save
- * r16 = bank0 size, total memory size
- * r17 = bank1 size
- * r18 = bank2 size
- * r19 = bank3 size
- * r20 = MCCR1, MSAR1
- * r21 = MCCR3, MEAR1
- * r22 = MCCR4, MBER
- * r23 = EMSAR1
- * r24 = EMEAR1
- * r25 = save link register 1st level
- * r26 = save link register 2nd level
- * r27 = save link register 3rd level
- * r30 = pointer to GPIO for spdRead
- */
-
-
-.globl board_asm_init
-board_asm_init:
-/*
- * setup pointer to message block
- */
-    mflr    r25             /* save away link register */
-    bl      get_lnk_reg     /* r3=addr of next instruction */
-    subi    r4, r3, 8       /* r4=board_asm_init addr */
-    addi    r13, r4, (MessageBlock-board_asm_init)
-/*
- * dcache_disable
- */
-    mfspr   r3, HID0
-    li      r4, HID0_DCE
-    andc    r3, r3, r4
-    mr      r2, r3
-    ori     r3, r3, HID0_DCI
-    sync
-    mtspr   HID0, r3
-    mtspr   HID0, r2
-    isync
-    sync
-/*
- * icache_disable
- */
-    mfspr   r3, HID0
-    li      r4, 0
-    ori     r4, r4, HID0_ICE
-    andc    r3, r3, r4
-    sync
-    mtspr   HID0, r3
-/*
- * invalidate caches
- */
-    ori     r3, r3, (HID0_ICE | HID0_ICFI | HID0_DCI | HID0_DCE)
-    or      r4, r4, r3
-    isync
-    mtspr   HID0, r4
-    andc    r4, r4, r3
-    isync
-    mtspr   HID0, r4
-    isync
-/*
- * icache_enable
- */
-    mfspr   r3, HID0
-    ori     r3, r3, (HID0_ICE | HID0_ICFI)
-    sync
-    mtspr   HID0, r3
-
-    lis     r1, 0xfec0
-    ori     r1, r1, 0x0cf8
-    lis     r2, 0xfee0
-    ori     r2, r2, 0xcfc
-
-#ifdef CONFIG_SYS_ADDRESS_MAP_A
-/*
- * Switch to address map A if necessary.
- */
-    lis     r3, MPC106_REG@h
-    ori     r3, r3, PCI_PICR1
-    stwbrx  r3, 0, r1
-    sync
-    lwbrx   r4, 0, r2
-    sync
-    lis     r0, PICR1_XIO_MODE@h
-    ori     r0, r0, PICR1_XIO_MODE@l
-    andc    r4, r4, r0
-    lis     r0, PICR1_ADDRESS_MAP@h
-    ori     r0, r0, PICR1_ADDRESS_MAP@l
-    or      r4, r4, r0
-    stwbrx  r4, 0, r2
-    sync
-#endif
-
-/*
- * Do the init for the SIO.
- */
-    bl      .sioInit
-
-    addi    r3, r13, (MinitLogo-MessageBlock)
-    bl      Printf
-
-    addi    r3, r13, (Mspd01-MessageBlock)
-    bl      Printf
-/*
- * Memory cofiguration using SPD information stored on the SODIMMs
- */
-    li      r17, 0
-    li      r18, 0
-    li      r19, 0
-
-    li      r3, 0x0002          /* get RAM type from spd for bank0/1 */
-    bl      spdRead
-
-    cmpi    0, 0, r3, -1        /* error ? */
-    bne     noSpdError
-
-    addi    r3, r13, (Mfail-MessageBlock)
-    bl      Printf
-
-    li      r6, 0xe0            /* error codes in r6 and r7  */
-    li      r7, 0x00
-    b       toggleError         /* fail - loop forever */
-
-noSpdError:
-    mr      r15, r3             /* save r3 */
-
-    addi    r3, r13, (Mok-MessageBlock)
-    bl      Printf
-
-    cmpli   0, 0, r15, 0x0001   /* FPM ? */
-    beq     configFPM
-    cmpli   0, 0, r15, 0x0002   /* EDO ? */
-    beq     configEDO
-    cmpli   0, 0, r15, 0x0004   /* SDRAM ? */
-    beq     configSDRAM
-
-    li      r6, 0xe0            /* error codes in r6 and r7  */
-    li      r7, 0x01
-    b       toggleError         /* fail - loop forever */
-
-configSDRAM:
-    addi    r3, r13, (MsdRam-MessageBlock)
-    bl      Printf
-/*
- * set the Memory Configuration Reg. 1
- */
-    li      r3, 0x001f          /* get bank size from spd bank0/1 */
-    bl      spdRead
-
-    andi.   r3, r3, 0x0038
-    beq     SD16MB2B
-
-    li      r3, 0x0011          /* get number of internal banks */
-				/* from spd for bank0/1 */
-    bl      spdRead
-
-    cmpli   0, 0, r3, 0x02
-    beq     SD64MB2B
-
-    cmpli   0, 0, r3, 0x04
-    beq     SD64MB4B
-
-    li      r6, 0xe0            /* error codes in r6 and r7  */
-    li      r7, 0x02
-    b       toggleError         /* fail - loop forever */
-
-SD64MB2B:
-    li      r20, 0x0005         /* 64-Mbit SDRAM 2 banks */
-    b       SDRow2nd
-
-SD64MB4B:
-    li      r20, 0x0000         /* 64-Mbit SDRAM 4 banks */
-    b       SDRow2nd
-
-SD16MB2B:
-    li      r20, 0x000f         /* 16-Mbit SDRAM 2 banks */
-
-SDRow2nd:
-    li      r3, 0x0102          /* get RAM type spd for bank2/3 */
-    bl      spdRead
-
-    cmpli   0, 0, r3, 0x0004
-    bne     S2D64MB4B           /* bank2/3 isn't present or no SDRAM */
-
-    li      r3, 0x011f          /* get bank size from spd bank2/3 */
-    bl      spdRead
-
-    andi.   r3, r3, 0x0038
-    beq     S2D16MB2B
-/*
- * set the Memory Configuration Reg. 2
- */
-    li      r3, 0x0111          /* get number of internal banks */
-				/* from spd for bank2/3 */
-    bl      spdRead
-
-    cmpli   0, 0, r3, 0x02
-    beq     S2D64MB2B
-
-    cmpli   0, 0, r3, 0x04
-    beq     S2D64MB4B
-
-    li      r6, 0xe0            /* error codes in r6 and r7 */
-    li      r7, 0x03
-    b       toggleError         /* fail - loop forever */
-
-S2D64MB2B:
-    ori     r20, r20, 0x0050    /* 64-Mbit SDRAM 2 banks */
-    b       S2D64MB4B
-
-S2D16MB2B:
-    ori     r20, r20, 0x00f0    /* 16-Mbit SDRAM 2 banks */
-
-/*
- * set the Memory Configuration Reg. 3
- */
-S2D64MB4B:
-    lis     r21, 0x8630         /* BSTOPRE = 0x80, REFREC = 6, */
-				/* RDLAT = 3 */
-
-/*
- * set the Memory Configuration Reg. 4
- */
-    lis     r22, 0x2430         /* PRETOACT = 2, ACTOPRE = 4, */
-				/* WCBUF = 1, RCBUF = 1 */
-    ori     r22, r22, 0x2220    /* SDMODE = 0x022, ACTORW = 2 */
-
-/*
- * get the size of bank 0-3
- */
-    li      r3, 0x001f          /* get bank size from spd bank0/1 */
-    bl      spdRead
-
-    rlwinm  r16, r3, 2, 24, 29  /* calculate size in MByte */
-				/* (128 MB max.) */
-
-    li      r3, 0x0005          /* get number of banks from spd */
-				/* for bank0/1 */
-    bl      spdRead
-
-    cmpi    0, 0, r3, 2         /* 2 banks ? */
-    bne     SDRAMnobank1
-
-    mr      r17, r16
-
-SDRAMnobank1:
-    addi    r3, r13, (Mspd23-MessageBlock)
-    bl      Printf
-
-    li      r3, 0x0102          /* get RAM type spd for bank2/3 */
-    bl      spdRead
-
-    cmpli   0, 0, r3, 0x0001    /* FPM ? */
-    bne     noFPM23             /* handle as EDO */
-    addi    r3, r13, (Mok-MessageBlock)
-    bl      Printf
-    addi    r3, r13, (MfpmRam-MessageBlock)
-    bl      Printf
-    b       configRAMcommon
-noFPM23:
-    cmpli   0, 0, r3, 0x0002    /* EDO ? */
-    bne     noEDO23
-    addi    r3, r13, (Mok-MessageBlock)
-    bl      Printf
-    addi    r3, r13, (MedoRam-MessageBlock)
-    bl      Printf
-    b       configRAMcommon
-noEDO23:
-    cmpli   0, 0, r3, 0x0004    /* SDRAM ? */
-    bne    noSDRAM23
-    addi    r3, r13, (Mok-MessageBlock)
-    bl      Printf
-    addi    r3, r13, (MsdRam-MessageBlock)
-    bl      Printf
-    b       configSDRAM23
-noSDRAM23:
-    addi    r3, r13, (Mna-MessageBlock)
-    bl      Printf
-    b       configRAMcommon     /* bank2/3 isn't present or no SDRAM */
-
-configSDRAM23:
-    li      r3, 0x011f          /* get bank size from spd bank2/3 */
-    bl      spdRead
-
-    rlwinm  r18, r3, 2, 24, 29  /* calculate size in MByte */
-				/* (128 MB max.) */
-
-    li      r3, 0x0105          /* get number of banks from */
-				/* spd bank0/1 */
-    bl      spdRead
-
-    cmpi    0, 0, r3, 2         /* 2 banks ? */
-    bne     SDRAMnobank3
-
-    mr    r19, r18
-
-SDRAMnobank3:
-    b       configRAMcommon
-
-configFPM:
-    addi    r3, r13, (MfpmRam-MessageBlock)
-    bl      Printf
-    b       configEDO0
-/*
- * set the Memory Configuration Reg. 1
- */
-configEDO:
-    addi    r3, r13, (MedoRam-MessageBlock)
-    bl      Printf
-configEDO0:
-    lis     r20, MCCR1_TYPE_EDO@h
-
-getSpdRowBank01:
-    li      r3, 0x0003          /* get number of row bits from */
-				/* spd from bank0/1 */
-    bl      spdRead
-    ori     r20, r20, (MCCR1_BK0_9BITS | MCCR1_BK1_9BITS)
-    cmpli   0, 0, r3, 0x0009    /* bank0 -  9 row bits */
-    beq     getSpdRowBank23
-
-    ori     r20, r20, (MCCR1_BK0_10BITS | MCCR1_BK1_10BITS)
-    cmpli   0, 0, r3, 0x000a    /* bank0 -  10 row bits */
-    beq     getSpdRowBank23
-
-    ori     r20, r20, (MCCR1_BK0_11BITS | MCCR1_BK1_11BITS)
-    cmpli   0, 0, r3, 0x000b    /* bank0 -  11 row bits */
-    beq     getSpdRowBank23
-
-    ori     r20, r20, (MCCR1_BK0_12BITS | MCCR1_BK1_12BITS)
-    cmpli   0, 0, r3, 0x000c    /* bank0 -  12 row bits */
-    beq     getSpdRowBank23
-
-    cmpli   0, 0, r3, 0x000d    /* bank0 -  13 row bits */
-    beq     getSpdRowBank23
-
-    li      r6, 0xe0            /* error codes in r6 and r7 */
-    li      r7, 0x10
-    b       toggleError         /* fail - loop forever */
-
-getSpdRowBank23:
-    li     r3, 0x0103           /* get number of row bits from */
-				/* spd for bank2/3 */
-    bl      spdRead
-
-    ori     r20, r20, (MCCR1_BK2_9BITS | MCCR1_BK3_9BITS)
-    cmpli   0, 0, r3, 0x0009    /* bank0 -  9 row bits */
-    beq     writeRowBits
-
-    ori     r20, r20, (MCCR1_BK2_10BITS | MCCR1_BK3_10BITS)
-    cmpli   0, 0, r3, 0x000a    /* bank0 -  10 row bits */
-    beq     writeRowBits
-
-    ori     r20, r20, (MCCR1_BK2_11BITS | MCCR1_BK3_11BITS)
-    cmpli   0, 0, r3, 0x000b    /* bank0 -  11 row bits */
-    beq     writeRowBits
-
-    ori     r20, r20, (MCCR1_BK2_12BITS | MCCR1_BK3_12BITS)
-
-/*
- * set the Memory Configuration Reg. 3
- */
-writeRowBits:
-    lis     r21, 0x000a         /* CPX = 1, RAS6P = 4 */
-    ori     r21, r21, 0x2293    /* CAS5 = 2, CP4 = 1, */
-				/* CAS3 = 2, RCD2 = 2, RP = 3 */
-/*
- * set the Memory Configuration Reg. 4
- */
-    lis     r22, 0x0010         /* all SDRAM parameter 0, */
-				/* WCBUF flow through, */
-				/* RCBUF registered */
-/*
- * get the size of bank 0-3
- */
-    li      r3, 0x0003          /* get row bits from spd  bank0/1 */
-    bl      spdRead
-
-    li      r16, 0              /* bank size is: */
-				/* (8*2^row*2^column)/0x100000 MB */
-    ori     r16, r16, 0x8000
-    rlwnm   r16, r16, r3, 0, 31
-
-    li      r3, 0x0004          /* get column bits from spd bank0/1 */
-    bl      spdRead
-
-    rlwnm   r16, r16, r3, 0, 31
-
-    li      r3, 0x0005          /* get number of banks from */
-				/* spd for bank0/1 */
-    bl      spdRead
-
-    cmpi    0, 0, r3, 2         /* 2 banks ? */
-    bne     EDOnobank1
-
-    mr      r17, r16
-
-EDOnobank1:
-    addi    r3, r13, (Mspd23-MessageBlock)
-    bl      Printf
-
-    li      r3, 0x0102          /* get RAM type spd for bank2/3 */
-    bl      spdRead
-
-    cmpli   0, 0, r3, 0x0001    /* FPM ? */
-    bne     noFPM231            /* handle as EDO */
-    addi    r3, r13, (Mok-MessageBlock)
-    bl      Printf
-    addi    r3, r13, (MfpmRam-MessageBlock)
-    bl      Printf
-    b       EDObank2
-noFPM231:
-    cmpli   0, 0, r3, 0x0002    /* EDO ? */
-    bne     noEDO231
-    addi    r3, r13, (Mok-MessageBlock)
-    bl      Printf
-    addi    r3, r13, (MedoRam-MessageBlock)
-    bl      Printf
-    b       EDObank2
-noEDO231:
-    cmpli   0, 0, r3, 0x0004    /* SDRAM ? */
-    bne     noSDRAM231
-    addi    r3, r13, (Mok-MessageBlock)
-    bl      Printf
-    addi    r3, r13, (MsdRam-MessageBlock)
-    bl      Printf
-    b       configRAMcommon
-noSDRAM231:
-    addi    r3, r13, (Mfail-MessageBlock)
-    bl      Printf
-    b       configRAMcommon     /* bank2/3 isn't present or no SDRAM */
-
-EDObank2:
-    li      r3, 0x0103          /* get row bits from spd for bank2/3 */
-    bl      spdRead
-
-    li      r18, 0              /* bank size is: */
-				/* (8*2^row*2^column)/0x100000 MB */
-    ori     r18, r18, 0x8000
-    rlwnm   r18, r18, r3, 0, 31
-
-    li      r3, 0x0104          /* get column bits from spd bank2/3 */
-    bl      spdRead
-
-    rlwnm   r18, r18, r3, 0, 31
-
-    li      r3, 0x0105          /* get number of banks from */
-				/* spd for bank2/3 */
-    bl      spdRead
-
-    cmpi    0, 0, r3, 2         /* 2 banks ? */
-    bne     configRAMcommon
-
-    mr      r19, r18
-
-configRAMcommon:
-    lis     r1, MPC106_REG_ADDR@h
-    ori     r1, r1, MPC106_REG_ADDR@l
-    lis     r2, MPC106_REG_DATA@h
-    ori     r2, r2, MPC106_REG_DATA@l
-
-    li      r0, 0
-
-/*
- * If we are already running in RAM (debug mode), we should
- * NOT reset the MEMGO flag. Otherwise we will stop all memory
- * accesses.
- */
-#ifdef IN_RAM
-    lis     r4, MCCR1_MEMGO@h
-    ori     r4, r4, MCCR1_MEMGO@l
-    or      r20, r20, r4
-#endif
-
-/*
- * set the Memory Configuration Reg. 1
- */
-    lis     r3, MPC106_REG@h        /* start building new reg number */
-    ori     r3, r3, MPC106_MCCR1    /* register number 0xf0 */
-    stwbrx  r3, r0, r1              /* write this value to CONFIG_ADDR */
-    eieio                           /* make sure mem. access is complete */
-    stwbrx  r20, r0, r2             /* write data to CONFIG_DATA */
-/*
- * set the Memory Configuration Reg. 3
- */
-    lis     r3, MPC106_REG@h        /* start building new reg number */
-    ori     r3, r3, MPC106_MCCR3    /* register number 0xf8 */
-    stwbrx  r3, r0, r1              /* write this value to CONFIG_ADDR */
-    eieio                           /* make sure mem. access is complete */
-    stwbrx    r21, r0, r2           /* write data to CONFIG_DATA */
-/*
- * set the Memory Configuration Reg. 4
- */
-    lis     r3, MPC106_REG@h        /* start building new reg number */
-    ori     r3, r3, MPC106_MCCR4    /* register number 0xfc */
-    stwbrx  r3, r0, r1              /* write this value to CONFIG_ADDR */
-    eieio                           /* make sure mem. access is complete */
-    stwbrx  r22, r0, r2             /* write data to CONFIG_DATA */
-/*
- * set the memory boundary registers for bank 0-3
- */
-    li      r20, 0
-    li      r23, 0
-    li      r24, 0
-    subi    r21, r16, 1         /* calculate end address bank0 */
-    li      r22, (MBER_BANK0)
-
-    cmpi    0, 0, r17, 0        /* bank1 present ? */
-    beq     nobank1
-
-    rlwinm  r3, r16, 8, 16, 23  /* calculate start address of bank1 */
-    or      r20, r20, r3
-    add     r16, r16, r17       /* add to total memory size */
-    subi    r3, r16, 1          /* calculate end address of bank1 */
-    rlwinm  r3, r3, 8, 16, 23
-    or      r21, r21, r3
-    ori     r22, r22, (MBER_BANK1)      /* enable bank1 */
-    b       bank2
-
-nobank1:
-    ori     r23, r23, 0x0300    /* set bank1 start to unused area */
-    ori     r24, r24, 0x0300    /* set bank1 end to unused area */
-
-bank2:
-    cmpi    0, 0, r18, 0        /* bank2 present ? */
-    beq     nobank2
-
-    andi.   r3, r16, 0x00ff     /* calculate start address of bank2 */
-    andi.   r4, r16, 0x0300
-    rlwinm  r3, r3, 16, 8, 15
-    or      r20, r20, r3
-    rlwinm  r3, r4, 8, 8, 15
-    or      r23, r23, r3
-    add     r16, r16, r18       /* add to total memory size */
-    subi    r3, r16, 1          /* calculate end address of bank2 */
-    andi.   r4, r3, 0x0300
-    andi.   r3, r3, 0x00ff
-    rlwinm  r3, r3, 16, 8, 15
-    or      r21, r21, r3
-    rlwinm  r3, r4, 8, 8, 15
-    or      r24, r24, r3
-    ori     r22, r22, (MBER_BANK2)    /* enable bank2 */
-    b       bank3
-
-nobank2:
-    lis     r3, 0x0003
-    or      r23, r23, r3        /* set bank2 start to unused area */
-    or      r24, r24, r3        /* set bank2 end to unused area */
-
-bank3:
-    cmpi    0, 0, r19, 0        /* bank3 present ? */
-    beq     nobank3
-
-    andi.   r3, r16, 0x00ff     /* calculate start address of bank3 */
-    andi.   r4, r16, 0x0300
-    rlwinm  r3, r3, 24, 0, 7
-    or      r20, r20, r3
-    rlwinm  r3, r4, 16, 0, 7
-    or      r23, r23, r3
-    add     r16, r16, r19       /* add to total memory size */
-    subi    r3, r16, 1          /* calculate end address of bank3 */
-    andi.   r4, r3, 0x0300
-    andi.   r3, r3, 0x00ff
-    rlwinm  r3, r3, 24, 0, 7
-    or      r21, r21, r3
-    rlwinm  r3, r4, 16, 0, 7
-    or      r24, r24, r3
-    ori     r22, r22, (MBER_BANK3)    /* enable bank3 */
-    b       writebound
-
-nobank3:
-    lis     r3, 0x0300
-    or      r23, r23, r3        /* set bank3 start to unused area */
-    or      r24, r24, r3        /* set bank3 end to unused area */
-
-writebound:
-    lis     r3, MPC106_REG@h    /* start building new reg number */
-    ori     r3, r3, MPC106_MSAR1    /* register number 0x80 */
-    stwbrx  r3, r0, r1          /* write this value to CONFIG_ADDR */
-    eieio                       /* make sure mem. access is complete */
-    stwbrx  r20, r0, r2         /* write data to CONFIG_DATA */
-
-    lis     r3, MPC106_REG@h    /* start building new reg number */
-    ori     r3, r3, MPC106_MEAR1    /* register number 0x90 */
-    stwbrx  r3, r0, r1          /* write this value to CONFIG_ADDR */
-    eieio                       /* make sure mem. access is complete */
-    stwbrx  r21, r0, r2         /* write data to CONFIG_DATA */
-
-    lis     r3, MPC106_REG@h    /* start building new reg number */
-    ori     r3, r3, MPC106_EMSAR1    /* register number 0x88 */
-    stwbrx  r3, r0, r1          /* write this value to CONFIG_ADDR */
-    eieio                       /* make sure mem. access is complete */
-    stwbrx  r23, r0, r2         /* write data to CONFIG_DATA */
-
-    lis     r3, MPC106_REG@h    /* start building new reg number */
-    ori     r3, r3, MPC106_EMEAR1    /* register number 0x98 */
-    stwbrx  r3, r0, r1          /* write this value to CONFIG_ADDR */
-    eieio                       /* make sure mem. access is complete */
-    stwbrx  r24, r0, r2         /* write data to CONFIG_DATA */
-
-/*
- * set boundaries of unused banks to unused address space
- */
-    lis     r4, 0x0303
-    ori     r4, r4, 0x0303      /* bank 4-7 start and end adresses */
-    lis     r3, MPC106_REG@h    /* start building new reg number */
-    ori     r3, r3, MPC106_EMSAR2    /* register number 0x8C */
-    stwbrx  r3, r0, r1          /* write this value to CONFIG_ADDR */
-    eieio                       /* make sure mem. access is complete */
-    stwbrx  r4, r0, r2          /* write data to CONFIG_DATA */
-
-    lis     r3, MPC106_REG@h    /* start building new reg number */
-    ori     r3, r3, MPC106_EMEAR2    /* register number 0x9C */
-    stwbrx  r3, r0, r1          /* write this value to CONFIG_ADDR */
-    eieio                       /* make sure mem. access is complete */
-    stwbrx  r4, r0, r2          /* write data to CONFIG_DATA */
-
-/*
- * set the Memory Configuration Reg. 2
- */
-    lis     r3, MPC106_REG@h    /* start building new reg number */
-    ori     r3, r3, MPC106_MCCR2    /* register number 0xf4 */
-    stwbrx  r3, r0, r1          /* write this value to CONFIG_ADDR */
-    eieio                       /* make sure mem. access is complete */
-
-    li      r3, 0x000c          /* get refresh from spd for bank0/1 */
-    bl      spdRead
-
-    cmpi    0, 0, r3, -1        /* error ? */
-    bne     common1
-
-    li      r6, 0xe0            /* error codes in r6 and r7  */
-    li      r7, 0x20
-    b       toggleError         /* fail - loop forever */
-
-common1:
-    andi.   r15, r3, 0x007f     /* mask selfrefresh bit */
-    li      r3, 0x010c          /* get refresh from spd for bank2/3 */
-    bl      spdRead
-
-    cmpi    0, 0, r3, -1        /* error ? */
-    beq     common2
-    andi.   r3, r3, 0x007f      /* mask selfrefresh bit */
-    cmp     0, 0, r3, r15       /* find the lower */
-    blt     common3
-
-common2:
-    mr      r3, r15
-
-common3:
-    li      r4, 0x1010          /* refesh cycle 1028 clocks */
-				/*  left shifted 2 */
-    cmpli   0, 0, r3, 0x0000    /* 15.6 us ? */
-    beq     writeRefresh
-
-    li      r4, 0x0808          /* refesh cycle 514 clocks */
-				/* left shifted 2 */
-    cmpli   0, 0, r3, 0x0002    /* 7.8 us ? */
-    beq     writeRefresh
-
-    li      r4, 0x2020          /* refesh cycle 2056 clocks */
-				/* left shifted 2 */
-    cmpli   0, 0, r3, 0x0003    /* 31.3 us ? */
-    beq     writeRefresh
-
-    li      r4, 0x4040          /* refesh cycle 4112 clocks */
-				/* left shifted 2 */
-    cmpli   0, 0, r3, 0x0004    /* 62.5 us ? */
-    beq     writeRefresh
-
-    li      r4, 0
-    ori     r4, r4, 0x8080      /* refesh cycle 8224 clocks */
-				/* left shifted 2 */
-    cmpli   0, 0, r3, 0x0005    /* 125 us ? */
-    beq     writeRefresh
-
-    li      r6, 0xe0            /* error codes in r6 and r7 */
-    li      r7, 0x21
-    b       toggleError         /* fail - loop forever */
-
-writeRefresh:
-    stwbrx  r4, r0, r2          /* write data to CONFIG_DATA */
-
-/*
- * DRAM BANKS SHOULD BE ENABLED
- */
-    addi    r3, r13, (Mactivate-MessageBlock)
-    bl      Printf
-    mr      r3, r16
-    bl      OutDec
-    addi    r3, r13, (Mmbyte-MessageBlock)
-    bl      Printf
-
-    lis     r3, MPC106_REG@h    /* start building new reg number */
-    ori     r3, r3, MPC106_MBER /* register number 0xa0 */
-    stwbrx  r3, r0, r1          /* write this value to CONFIG_ADDR */
-    eieio                       /* make sure mem. access is complete */
-    stb     r22, 0(r2)          /* write data to CONFIG_DATA */
-    li      r8, 0x63            /* PGMAX = 99 */
-    stb     r8, 3(r2)           /* write data to CONFIG_DATA */
-
-/*
- *  DRAM SHOULD NOW BE CONFIGURED AND ENABLED
- *  MUST WAIT 200us BEFORE ACCESSING
- */
-    li      r0, 0x7800
-    mtctr   r0
-
-wait200us:
-    bdnz    wait200us
-
-    lis     r3, MPC106_REG@h    /* start building new reg number */
-    ori     r3, r3, MPC106_MCCR1    /* register number 0xf0 */
-    stwbrx  r3, r0, r1          /* write this value to CONFIG_ADDR */
-    eieio                       /* make sure mem. access is complete */
-
-    lwbrx   r4, r0, r2          /* load r4 from CONFIG_DATA */
-
-    lis     r0, MCCR1_MEMGO@h   /* MEMGO=1 */
-    ori     r0, r0, MCCR1_MEMGO@l
-    or      r4, r4, r0          /* set the MEMGO bit */
-    stwbrx  r4, r0, r2          /* write mdfd data to CONFIG_DATA */
-
-    li      r0, 0x7000
-    mtctr   r0
-
-wait8ref:
-    bdnz    wait8ref
-
-    addi    r3, r13, (Mok-MessageBlock)
-    bl      Printf
-
-    mtlr    r25
-    blr
-
-/*
- * Infinite loop called in case of an error during RAM initialisation.
- * error codes in r6 and r7.
- */
-toggleError:
-    li      r0, 0
-    lis     r9, 127
-    ori     r9, r9, 65535
-toggleError1:
-    addic   r0, r0, 1
-    cmpw    cr1, r0, r9
-    ble     cr1, toggleError1
-    li      r0, 0
-    lis     r9, 127
-    ori     r9, r9, 65535
-toggleError2:
-    addic   r0, r0, 1
-    cmpw    cr1, r0, r9
-    ble     cr1, toggleError2
-    b       toggleError
-
-
-/******************************************************************************
- * This function performs a basic initialisation of the superio chip
- * to enable basic console output and SPD access during RAM initialisation.
- *
- * Upon completion, SIO resource registers are mapped as follows:
- * Resource     Enabled         Address
- * UART1        Yes             3F8-3FF COM1
- * UART2        Yes             2F8-2FF COM2
- * GPIO         Yes             220-227
- */
-.set    SIO_LUNINDEX, 0x07      /* SIO LUN index register */
-.set    SIO_CNFG1, 0x21         /* SIO configuration #1 register */
-.set    SIO_PCSCI, 0x23         /* SIO PCS configuration index reg */
-.set    SIO_PCSCD, 0x24         /* SIO PCS configuration data reg */
-.set    SIO_ACTIVATE, 0x30      /* SIO activate register */
-.set    SIO_IOBASEHI, 0x60      /* SIO I/O port base address, 15:8 */
-.set    SIO_IOBASELO, 0x61      /* SIO I/O port base address, 7:0 */
-.set    SIO_LUNENABLE, 0x01     /* SIO LUN enable */
-
-.sioInit:
-    mfspr   r7, 8               /* save link register */
-
-.sioInit_87308:
-
-/*
- * Get base addr of ISA I/O space
- */
-    lis     r6, CONFIG_SYS_ISA_IO@h
-    ori     r6, r6, CONFIG_SYS_ISA_IO@l
-
-/*
- * Set offset to base address for config registers.
- */
-#if defined(CONFIG_SYS_NS87308_BADDR_0x)
-    addi    r4, r0, 0x0279
-#elif defined(CONFIG_SYS_NS87308_BADDR_10)
-    addi    r4, r0, 0x015C
-#elif defined(CONFIG_SYS_NS87308_BADDR_11)
-    addi    r4, r0, 0x002E
-#endif
-    add     r6, r6, r4          /* add offset to base */
-    or      r3, r6, r6          /* make a copy */
-
-/*
- * PMC (LUN 8)
- */
-    addi    r4, r0, SIO_LUNINDEX    /* select PMC LUN */
-    addi    r5, r0, 0x8
-    bl      .sio_bw
-    addi    r4, r0, SIO_IOBASEHI    /* initialize PMC address to 0x460 */
-    addi    r5, r0, 0x04
-    bl      .sio_bw
-    addi    r4, r0, SIO_IOBASELO
-    addi    r5, r0, 0x60
-    bl      .sio_bw
-    addi    r4, r0, SIO_ACTIVATE    /* enable PMC */
-    addi    r5, r0, SIO_LUNENABLE
-    bl      .sio_bw
-
-    lis     r8, CONFIG_SYS_ISA_IO@h
-    ori     r8, r8, 0x0460
-    li      r9, 0x03
-    stb     r9, 0(r8)               /* select PMC2 register */
-    eieio
-    li      r9, 0x00
-    stb     r9, 1(r8)               /* SuperI/O clock src: 24MHz via X1 */
-    eieio
-
-/*
- * map UART1 (LUN 6) or UART2 (LUN 5) to COM1 (0x3F8)
- */
-    addi    r4, r0, SIO_LUNINDEX    /* select COM1 LUN */
-    addi    r5, r0, 0x6
-    bl      .sio_bw
-
-    addi    r4, r0, SIO_IOBASEHI    /* initialize COM1 address to 0x3F8 */
-    addi    r5, r0, 0x03
-    bl      .sio_bw
-
-    addi    r4, r0, SIO_IOBASELO
-    addi    r5, r0, 0xF8
-    bl      .sio_bw
-
-    addi    r4, r0, SIO_ACTIVATE    /* enable COM1 */
-    addi    r5, r0, SIO_LUNENABLE
-    bl      .sio_bw
-
-/*
- * Init COM1 for polled output
- */
-    lis     r8, CONFIG_SYS_ISA_IO@h
-    ori     r8, r8, 0x03f8
-    li      r9, 0x00
-    stb     r9, 1(r8)           /* int disabled */
-    eieio
-    li      r9, 0x00
-    stb     r9, 4(r8)           /* modem ctrl */
-    eieio
-    li      r9, 0x80
-    stb     r9, 3(r8)           /* link ctrl, bank select */
-    eieio
-    li      r9, 115200/CONFIG_BAUDRATE
-    stb     r9, 0(r8)           /* baud rate (LSB)*/
-    eieio
-    rotrwi  r9, r9, 8
-    stb     r9, 1(r8)           /* baud rate (MSB) */
-    eieio
-    li      r9, 0x03
-    stb     r9, 3(r8)           /* 8 data bits, 1 stop bit, */
-				/* no parity */
-    eieio
-    li      r9, 0x0b
-    stb     r9, 4(r8)           /* enable the receiver and transmitter */
-    eieio
-
-waitEmpty:
-    lbz     r9, 5(r8)           /* transmit empty */
-    andi.   r9, r9, 0x40
-    beq     waitEmpty
-    li      r9, 0x47
-    stb     r9, 3(r8)           /* send break, 8 data bits, */
-				/* 2 stop bits, no parity */
-    eieio
-
-    lis     r0, 0x0001
-    mtctr   r0
-
-waitCOM1:
-    lwz     r0, 5(r8)           /* load from port for delay */
-    bdnz    waitCOM1
-
-waitEmpty1:
-    lbz     r9, 5(r8)           /* transmit empty */
-    andi.   r9, r9, 0x40
-    beq     waitEmpty1
-    li      r9, 0x07
-    stb     r9, 3(r8)           /* 8 data bits, 2 stop bits, */
-				/* no parity */
-    eieio
-
-/*
- * GPIO (LUN 7)
- */
-    addi    r4, r0, SIO_LUNINDEX    /* select GPIO LUN */
-    addi    r5, r0, 0x7
-    bl      .sio_bw
-
-    addi    r4, r0, SIO_IOBASEHI    /* initialize GPIO address to 0x220 */
-    addi    r5, r0, 0x02
-    bl      .sio_bw
-
-    addi    r4, r0, SIO_IOBASELO
-    addi    r5, r0, 0x20
-    bl      .sio_bw
-
-    addi    r4, r0, SIO_ACTIVATE    /* enable GPIO */
-    addi    r5, r0, SIO_LUNENABLE
-    bl      .sio_bw
-
-.sioInit_done:
-
-/*
- * Get base addr of ISA I/O space
- */
-    lis     r3, CONFIG_SYS_ISA_IO@h
-    ori     r3, r3, CONFIG_SYS_ISA_IO@l
-
-    addi    r3, r3, 0x015C      /* adjust to superI/O 87308 base */
-    or      r6, r3, r3          /* make a copy */
-/*
- * CS0
- */
-    addi    r4, r0, SIO_PCSCI   /* select PCSCIR */
-    addi    r5, r0, 0x00
-    bl      .sio_bw
-    addi    r4, r0, SIO_PCSCD   /* select PCSCDR */
-    addi    r5, r0, 0x00
-    bl      .sio_bw
-    addi    r4, r0, SIO_PCSCI   /* select PCSCIR */
-    addi    r5, r0, 0x01
-    bl      .sio_bw
-    addi    r4, r0, SIO_PCSCD   /* select PCSCDR */
-    addi    r5, r0, 0x76
-    bl      .sio_bw
-    addi    r4, r0, SIO_PCSCI   /* select PCSCIR */
-    addi    r5, r0, 0x02
-    bl      .sio_bw
-    addi    r4, r0, SIO_PCSCD   /* select PCSCDR */
-    addi    r5, r0, 0x40
-    bl      .sio_bw
-/*
- * CS1
- */
-    addi    r4, r0, SIO_PCSCI   /* select PCSCIR */
-    addi    r5, r0, 0x05
-    bl      .sio_bw
-    addi    r4, r0, SIO_PCSCD   /* select PCSCDR */
-    addi    r5, r0, 0x00
-    bl      .sio_bw
-    addi    r4, r0, SIO_PCSCI   /* select PCSCIR */
-    addi    r5, r0, 0x05
-    bl      .sio_bw
-    addi    r4, r0, SIO_PCSCD   /* select PCSCDR */
-    addi    r5, r0, 0x70
-    bl      .sio_bw
-    addi    r4, r0, SIO_PCSCI   /* select PCSCIR */
-    addi    r5, r0, 0x06
-    bl      .sio_bw
-    addi    r4, r0, SIO_PCSCD   /* select PCSCDR */
-    addi    r5, r0, 0x1C
-    bl      .sio_bw
-/*
- * CS2
- */
-    addi    r4, r0, SIO_PCSCI   /* select PCSCIR */
-    addi    r5, r0, 0x08
-    bl      .sio_bw
-    addi    r4, r0, SIO_PCSCD   /* select PCSCDR */
-    addi    r5, r0, 0x00
-    bl      .sio_bw
-    addi    r4, r0, SIO_PCSCI   /* select PCSCIR */
-    addi    r5, r0, 0x09
-    bl      .sio_bw
-    addi    r4, r0, SIO_PCSCD   /* select PCSCDR */
-    addi    r5, r0, 0x71
-    bl      .sio_bw
-    addi    r4, r0, SIO_PCSCI   /* select PCSCIR */
-    addi    r5, r0, 0x0A
-    bl      .sio_bw
-    addi    r4, r0, SIO_PCSCD   /* select PCSCDR */
-    addi    r5, r0, 0x1C
-    bl      .sio_bw
-
-    mtspr   8, r7               /* restore link register */
-    bclr    20, 0               /* return to caller */
-
-/*
- * this function writes a register to the SIO chip
- */
-.sio_bw:
-    stb     r4, 0(r3)           /* write index register with register offset */
-    eieio
-    sync
-    stb     r5, 1(r3)           /* 1st write */
-    eieio
-    sync
-    stb     r5, 1(r3)           /* 2nd write */
-    eieio
-    sync
-    bclr    20, 0               /* return to caller */
-/*
- * this function reads a register from the SIO chip
- */
-.sio_br:
-    stb     r4, 0(r3)           /* write index register with register offset */
-    eieio
-    sync
-    lbz     r3, 1(r3)           /* retrieve specified reg offset contents */
-    eieio
-    sync
-    bclr    20, 0               /* return to caller */
-
-/*
- * Print a message to COM1 in polling mode
- * r10=COM1 port, r3=(char*)string
- */
-.globl Printf
-Printf:
-    lis     r10, CONFIG_SYS_ISA_IO@h   /* COM1 port */
-    ori     r10, r10, 0x03f8
-
-WaitChr:
-    lbz     r0, 5(r10)          /* read link status */
-    eieio
-    andi.   r0, r0, 0x40        /* mask transmitter empty bit */
-    beq     cr0, WaitChr        /* wait till empty */
-    lbzx    r0, r0, r3          /* get char */
-    stb     r0, 0(r10)          /* write to transmit reg */
-    eieio
-    addi    r3, r3, 1           /* next char */
-    lbzx    r0, r0, r3          /* get char */
-    cmpwi   cr1, r0, 0          /* end of string ? */
-    bne     cr1, WaitChr
-    blr
-
-/*
- * Print 8/4/2 digits hex value to COM1 in polling mode
- * r10=COM1 port, r3=val
- */
-OutHex2:
-    li      r9, 4               /* shift reg for 2 digits */
-    b       OHstart
-OutHex4:
-    li      r9, 12              /* shift reg for 4 digits */
-    b       OHstart
-    .globl OutHex
-OutHex:
-    li      r9, 28              /* shift reg for 8 digits */
-OHstart:
-    lis     r10, CONFIG_SYS_ISA_IO@h   /* COM1 port */
-    ori     r10, r10, 0x03f8
-OutDig:
-    lbz     r0, 5(r10)          /* read link status */
-    eieio
-    andi.   r0, r0, 0x40        /* mask transmitter empty bit */
-    beq     cr0, OutDig
-    sraw    r0, r3, r9
-    clrlwi  r0, r0, 28
-    cmpwi   cr1, r0, 9
-    ble     cr1, digIsNum
-    addic   r0, r0, 55
-    b       nextDig
-digIsNum:
-    addic   r0, r0, 48
-nextDig:
-    stb     r0, 0(r10)          /* write to transmit reg */
-    eieio
-    addic.  r9, r9, -4
-    bge     OutDig
-    blr
-/*
- * Print 3 digits hdec value to COM1 in polling mode
- * r10=COM1 port, r3=val, r7=x00, r8=x0, r9=x, r0, r6=scratch
- */
-.globl OutDec
-OutDec:
-    li      r6, 10
-    divwu   r0, r3, r6          /* r0 = r3 / 10, r9 = r3 mod 10 */
-    mullw   r10, r0, r6
-    subf    r9, r10, r3
-
-    mr      r3, r0
-    divwu   r0, r3, r6          /* r0 = r3 / 10, r8 = r3 mod 10 */
-    mullw   r10, r0, r6
-    subf    r8, r10, r3
-
-    mr      r3, r0
-    divwu   r0, r3, r6          /* r0 = r3 / 10, r7 = r3 mod 10 */
-    mullw   r10, r0, r6
-    subf    r7, r10, r3
-
-    lis     r10, CONFIG_SYS_ISA_IO@h   /* COM1 port */
-    ori     r10, r10, 0x03f8
-
-    or.     r7, r7, r7
-    bne     noblank1
-    li      r3, 0x20
-    b       OutDec4
-
-noblank1:
-    addi    r3, r7, 48          /* convert to ASCII */
-
-OutDec4:
-    lbz     r0, 0(r13)          /* slow down dummy read */
-    lbz     r0, 5(r10)          /* read link status */
-    eieio
-    andi.   r0, r0, 0x40        /* mask transmitter empty bit */
-    beq     cr0, OutDec4
-    stb     r3, 0(r10)          /* x00 to transmit */
-    eieio
-
-    or.     r7, r7, r8
-    beq     OutDec5
-
-    addi    r3, r8, 48          /* convert to ASCII */
-OutDec5:
-    lbz     r0, 0(r13)          /* slow down dummy read */
-    lbz     r0, 5(r10)          /* read link status */
-    eieio
-    andi.   r0, r0, 0x40        /* mask transmitter empty bit */
-    beq     cr0, OutDec5
-    stb     r3, 0(r10)          /* x0  to transmit */
-    eieio
-
-    addi    r3, r9, 48          /* convert to ASCII */
-OutDec6:
-    lbz     r0, 0(r13)          /* slow down dummy read */
-    lbz     r0, 5(r10)          /* read link status */
-    eieio
-    andi.   r0, r0, 0x40        /* mask transmitter empty bit */
-    beq     cr0, OutDec6
-    stb     r3, 0(r10)          /* x   to transmit */
-    eieio
-    blr
-/*
- * Print a char to COM1 in polling mode
- * r10=COM1 port, r3=char
- */
-.globl    OutChr
-OutChr:
-    lis     r10, CONFIG_SYS_ISA_IO@h   /* COM1 port */
-    ori     r10, r10, 0x03f8
-
-OutChr1:
-    lbz     r0, 5(r10)          /* read link status */
-    eieio
-    andi.   r0, r0, 0x40        /* mask transmitter empty bit */
-    beq     cr0, OutChr1        /* wait till empty */
-    stb     r3, 0(r10)          /* write to transmit reg */
-    eieio
-    blr
-/*
- * Input:  r3 adr to read
- * Output: r3 val or -1 for error
- */
-spdRead:
-    mfspr   r26, 8              /* save link register */
-
-    lis     r30, CONFIG_SYS_ISA_IO@h
-    ori     r30, r30, 0x220     /* GPIO Port 1 */
-    li      r7, 0x00
-    li      r8, 0x100
-    and.    r5, r3, r8
-    beq     spdbank0
-    li      r12, 0x08
-    li      r4, 0x10
-    li      r6, 0x18
-    b       spdRead1
-
-spdbank0:
-    li      r12, 0x20           /* set I2C data */
-    li      r4, 0x40            /* set I2C clock */
-    li      r6, 0x60            /* set I2C clock and data */
-
-spdRead1:
-    li      r8, 0x80
-
-    bl      spdStart            /* access I2C bus as master */
-    li      r10, 0xa0           /* write to SPD */
-    bl      spdWriteByte
-    bl      spdReadAck          /* ACK returns in r10 */
-    cmpw    cr0, r10, r7
-    bne     AckErr              /* r10 must be 0, if ACK received */
-    mr      r10, r3             /* adr to read */
-    bl      spdWriteByte
-    bl      spdReadAck
-    cmpw    cr0, r10, r7
-    bne     AckErr
-    bl      spdStart
-    li      r10, 0xa1           /* read from SPD */
-    bl      spdWriteByte
-    bl      spdReadAck
-    cmpw    cr0, r10, r7
-    bne     AckErr
-    bl      spdReadByte         /* return val in r10 */
-    bl      spdWriteAck
-    bl      spdStop             /* release I2C bus */
-    mr      r3, r10
-    mtspr   8, r26              /* restore link register */
-    blr
-/*
- * ACK error occurred
- */
-AckErr:
-    bl      spdStop
-    orc     r3, r0, r0          /* return -1 */
-    mtspr   8, r26              /* restore link register */
-    blr
-
-/*
- * Routines to read from RAM spd.
- * r30 - GPIO Port1 address in all cases.
- * r4 - clock mask for SPD
- * r6 - port mask for SPD
- * r12 - data mask for SPD
- */
-waitSpd:
-    li      r0, 0x1000
-    mtctr   r0
-wSpd:
-    bdnz    wSpd
-    bclr    20, 0               /* return to caller */
-
-/*
- * establish START condition on I2C bus
- */
-spdStart:
-    mfspr   r27, 8              /* save link register */
-    stb     r6, 0(r30)          /* set SDA and SCL */
-    eieio
-    stb     r6, 1(r30)          /* switch GPIO to output */
-    eieio
-    bl      waitSpd
-    stb     r4, 0(r30)          /* reset SDA */
-    eieio
-    bl      waitSpd
-    stb     r7, 0(r30)          /* reset SCL */
-    eieio
-    bl      waitSpd
-    mtspr   8, r27
-    bclr    20, 0               /* return to caller */
-
-/*
- * establish STOP condition on I2C bus
- */
-spdStop:
-    mfspr   r27, 8              /* save link register */
-    stb     r7, 0(r30)          /* reset SCL and SDA */
-    eieio
-    stb     r6, 1(r30)          /* switch GPIO to output */
-    eieio
-    bl      waitSpd
-    stb     r4, 0(r30)          /* set SCL */
-    eieio
-    bl      waitSpd
-    stb     r6, 0(r30)          /* set SDA and SCL */
-    eieio
-    bl      waitSpd
-    stb     r7, 1(r30)          /* switch GPIO to input */
-    eieio
-    mtspr   8, r27
-    bclr    20, 0               /* return to caller */
-
-spdReadByte:
-    mfspr   r27, 8
-    stb     r4, 1(r30)          /* set GPIO for SCL output */
-    eieio
-    li      r9, 0x08
-    li      r10, 0x00
-loopRB:
-    stb     r7, 0(r30)          /* reset SDA and SCL */
-    eieio
-    bl      waitSpd
-    stb     r4, 0(r30)          /* set SCL */
-    eieio
-    bl      waitSpd
-    lbz     r5, 0(r30)          /* read from GPIO Port1 */
-    rlwinm  r10, r10, 1, 0, 31
-    and.    r5, r5, r12
-    beq     clearBit
-    ori     r10, r10, 0x01      /* append _1_ */
-clearBit:
-    stb     r7, 0(r30)          /* reset SCL */
-    eieio
-    bl      waitSpd
-    addic.  r9, r9, -1
-    bne     loopRB
-    mtspr   8, r27
-    bclr    20, 0               /* return (r10) to caller */
-
-/*
- * spdWriteByte writes bits 24 - 31 of r10 to I2C.
- * r8 contains bit mask 0x80
- */
-spdWriteByte:
-    mfspr   r27, 8              /* save link register */
-    li      r9, 0x08            /* write octet */
-    and.    r5, r10, r8
-    bne     sWB1
-    stb     r7, 0(r30)          /* set SDA to _0_ */
-    eieio
-    b       sWB2
-sWB1:
-    stb     r12, 0(r30)         /* set SDA to _1_ */
-    eieio
-sWB2:
-    stb     r6, 1(r30)          /* set GPIO to output */
-    eieio
-loopWB:
-    and.    r5, r10, r8
-    bne     sWB3
-    stb     r7, 0(r30)          /* set SDA to _0_ */
-    eieio
-    b       sWB4
-sWB3:
-    stb     r12, 0(r30)         /* set SDA to _1_ */
-    eieio
-sWB4:
-    bl      waitSpd
-    and.    r5, r10, r8
-    bne     sWB5
-    stb     r4, 0(r30)          /* set SDA to _0_ and SCL */
-    eieio
-    b       sWB6
-sWB5:
-    stb     r6, 0(r30)          /* set SDA to _1_ and SCL */
-    eieio
-sWB6:
-    bl      waitSpd
-    and.    r5, r10, r8
-    bne     sWB7
-    stb     r7, 0(r30)          /* set SDA to _0_ and reset SCL */
-    eieio
-    b       sWB8
-sWB7:
-    stb     r12, 0(r30)         /* set SDA to _1_ and reset SCL */
-    eieio
-sWB8:
-    bl      waitSpd
-    rlwinm  r10, r10, 1, 0, 31  /* next bit */
-    addic.  r9, r9, -1
-    bne     loopWB
-    mtspr   8, r27
-    bclr    20, 0               /* return to caller */
-
-/*
- * Read ACK from SPD, return value in r10
- */
-spdReadAck:
-    mfspr   r27, 8              /* save link register */
-    stb     r4, 1(r30)          /* set GPIO to output */
-    eieio
-    stb     r7, 0(r30)          /* reset SDA and SCL */
-    eieio
-    bl      waitSpd
-    stb     r4, 0(r30)          /* set SCL */
-    eieio
-    bl      waitSpd
-    lbz     r10, 0(r30)         /* read GPIO Port 1 and mask SDA */
-    and     r10, r10, r12
-    bl      waitSpd
-    stb     r7, 0(r30)          /* reset SDA and SCL */
-    eieio
-    bl      waitSpd
-    mtspr   8, r27
-    bclr    20, 0               /* return (r10) to caller */
-
-spdWriteAck:
-    mfspr   r27, 8
-    stb     r12, 0(r30)         /* set SCL */
-    eieio
-    stb     r6, 1(r30)          /* set GPIO to output */
-    eieio
-    bl      waitSpd
-    stb     r6, 0(r30)          /* SDA and SCL */
-    eieio
-    bl      waitSpd
-    stb     r12, 0(r30)         /* reset SCL */
-    eieio
-    bl      waitSpd
-    mtspr   8, r27
-    bclr    20, 0               /* return to caller */
-
-get_lnk_reg:
-    mflr    r3                  /* return link reg */
-    blr
-
-/*
- * Messages for console output
- */
-.globl MessageBlock
-MessageBlock:
-Mok:
-    .ascii  "OK\015\012\000"
-Mfail:
-    .ascii  "FAILED\015\012\000"
-Mna:
-    .ascii  "NA\015\012\000"
-MinitLogo:
-    .ascii  "\015\012*** ELTEC Elektronik, Mainz ***\015\012"
-    .ascii  "\015\012Initialising RAM\015\012\000"
-Mspd01:
-    .ascii  "       Reading SPD of bank0/1 ..... \000"
-Mspd23:
-    .ascii  "       Reading SPD of bank2/3 ..... \000"
-MfpmRam:
-    .ascii  "       RAM-Type: FPM \015\012\000"
-MedoRam:
-    .ascii  "       RAM-Type: EDO \015\012\000"
-MsdRam:
-    .ascii  "       RAM-Type: SDRAM \015\012\000"
-Mactivate:
-    .ascii  "       Activating \000"
-Mmbyte:
-    .ascii  " MB .......... \000"
-    .align  4
diff --git a/board/eltec/bab7xx/bab7xx.c b/board/eltec/bab7xx/bab7xx.c
deleted file mode 100644
index ea4897b..0000000
--- a/board/eltec/bab7xx/bab7xx.c
+++ /dev/null
@@ -1,253 +0,0 @@
-/*
- * (C) Copyright 2001 Sysgo Real-Time Solutions, GmbH <www.elinos.com>
- * Andreas Heppel <aheppel@sysgo.de>
- * (C) Copyright 2001 ELTEC Elektronik AG
- * Frank Gottschling <fgottschling@eltec.de>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <command.h>
-#include <mpc106.h>
-#include <mk48t59.h>
-#include <74xx_7xx.h>
-#include <ns87308.h>
-#include <video_fb.h>
-#include <netdev.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-/*---------------------------------------------------------------------------*/
-/*
- * Get Bus clock frequency
- */
-ulong bab7xx_get_bus_freq (void)
-{
-	/*
-	 * The GPIO Port 1 on BAB7xx reflects the bus speed.
-	 */
-	volatile struct GPIO *gpio =
-		(struct GPIO *) (CONFIG_SYS_ISA_IO + CONFIG_SYS_NS87308_GPIO_BASE);
-
-	unsigned char data = gpio->dta1;
-
-	if (data & 0x02)
-		return 66666666;
-
-	return 83333333;
-}
-
-/*---------------------------------------------------------------------------*/
-
-/*
- * Measure CPU clock speed (core clock GCLK1) (Approx. GCLK frequency in Hz)
- */
-ulong bab7xx_get_gclk_freq (void)
-{
-	static const int pllratio_to_factor[] = {
-		00, 75, 70, 00, 20, 65, 100, 45, 30, 55, 40, 50, 80, 60, 35,
-			00,
-	};
-
-	return pllratio_to_factor[get_hid1 () >> 28] *
-		(bab7xx_get_bus_freq () / 10);
-}
-
-/*----------------------------------------------------------------------------*/
-
-int checkcpu (void)
-{
-	uint pvr = get_pvr ();
-
-	printf ("MPC7xx V%d.%d", (pvr >> 8) & 0xFF, pvr & 0xFF);
-	printf (" at %ld / %ld MHz\n", bab7xx_get_gclk_freq () / 1000000,
-		bab7xx_get_bus_freq () / 1000000);
-
-	return (0);
-}
-
-/* ------------------------------------------------------------------------- */
-
-int checkboard (void)
-{
-#ifdef CONFIG_SYS_ADDRESS_MAP_A
-	puts ("Board: ELTEC BAB7xx PReP\n");
-#else
-	puts ("Board: ELTEC BAB7xx CHRP\n");
-#endif
-	return (0);
-}
-
-/* ------------------------------------------------------------------------- */
-
-int checkflash (void)
-{
-	/* TODO: XXX XXX XXX */
-	printf ("2 MB ## Test not implemented yet ##\n");
-	return (0);
-}
-
-/* ------------------------------------------------------------------------- */
-
-
-static unsigned int mpc106_read_cfg_dword (unsigned int reg)
-{
-	unsigned int reg_addr = MPC106_REG | (reg & 0xFFFFFFFC);
-
-	out32r (MPC106_REG_ADDR, reg_addr);
-
-	return (in32r (MPC106_REG_DATA | (reg & 0x3)));
-}
-
-/* ------------------------------------------------------------------------- */
-
-long int dram_size (int board_type)
-{
-	/* No actual initialisation to do - done when setting up
-	 * PICRs MCCRs ME/SARs etc in ram_init.S.
-	 */
-
-	register unsigned long i, msar1, mear1, memSize;
-
-#if defined(CONFIG_SYS_MEMTEST)
-	register unsigned long reg;
-
-	printf ("Testing DRAM\n");
-
-	/* write each mem addr with it's address */
-	for (reg = CONFIG_SYS_MEMTEST_START; reg < CONFIG_SYS_MEMTEST_END; reg += 4)
-		*reg = reg;
-
-	for (reg = CONFIG_SYS_MEMTEST_START; reg < CONFIG_SYS_MEMTEST_END; reg += 4) {
-		if (*reg != reg)
-			return -1;
-	}
-#endif
-
-	/*
-	 * Since MPC106 memory controller chip has already been set to
-	 * control all memory, just read and interpret its memory boundery register.
-	 */
-	memSize = 0;
-	msar1 = mpc106_read_cfg_dword (MPC106_MSAR1);
-	mear1 = mpc106_read_cfg_dword (MPC106_MEAR1);
-	i = mpc106_read_cfg_dword (MPC106_MBER) & 0xf;
-
-	do {
-		if (i & 0x01)	/* is bank enabled ? */
-			memSize += (mear1 & 0xff) - (msar1 & 0xff) + 1;
-		msar1 >>= 8;
-		mear1 >>= 8;
-		i >>= 1;
-	} while (i);
-
-	return (memSize * 0x100000);
-}
-
-/* ------------------------------------------------------------------------- */
-
-phys_size_t initdram (int board_type)
-{
-	return dram_size (board_type);
-}
-
-/* ------------------------------------------------------------------------- */
-
-void after_reloc (ulong dest_addr)
-{
-	/*
-	 * Jump to the main U-Boot board init code
-	 */
-	board_init_r ((gd_t *) gd, dest_addr);
-}
-
-/* ------------------------------------------------------------------------- */
-
-/*
- * do_reset is done here because in this case it is board specific, since the
- * 7xx CPUs can only be reset by external HW (the RTC in this case).
- */
-int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
-{
-#if defined(CONFIG_RTC_MK48T59)
-	/* trigger watchdog immediately */
-	rtc_set_watchdog (1, RTC_WD_RB_16TH);
-#else
-#error "You must define the macro CONFIG_RTC_MK48T59."
-#endif
-	return 0;
-}
-
-/* ------------------------------------------------------------------------- */
-
-#if defined(CONFIG_WATCHDOG)
-/*
- * Since the 7xx CPUs don't have an internal watchdog, this function is
- * board specific.  We use the RTC here.
- */
-void watchdog_reset (void)
-{
-#if defined(CONFIG_RTC_MK48T59)
-	/* we use a 32 sec watchdog timer */
-	rtc_set_watchdog (8, RTC_WD_RB_4);
-#else
-#error "You must define the macro CONFIG_RTC_MK48T59."
-#endif
-}
-#endif /* CONFIG_WATCHDOG */
-
-/* ------------------------------------------------------------------------- */
-
-#ifdef CONFIG_CONSOLE_EXTRA_INFO
-extern GraphicDevice smi;
-
-void video_get_info_str (int line_number, char *info)
-{
-	/* init video info strings for graphic console */
-	switch (line_number) {
-	case 1:
-		sprintf (info, " MPC7xx V%d.%d at %ld / %ld MHz",
-			 (get_pvr () >> 8) & 0xFF,
-			 get_pvr () & 0xFF,
-			 bab7xx_get_gclk_freq () / 1000000,
-			 bab7xx_get_bus_freq () / 1000000);
-		return;
-	case 2:
-		sprintf (info,
-			 " ELTEC BAB7xx with %ld MB DRAM and %ld MB FLASH",
-			 dram_size (0) / 0x100000, flash_init () / 0x100000);
-		return;
-	case 3:
-		sprintf (info, " %s", smi.modeIdent);
-		return;
-	}
-
-	/* no more info lines */
-	*info = 0;
-	return;
-}
-#endif
-
-/*---------------------------------------------------------------------------*/
-
-int board_eth_init(bd_t *bis)
-{
-	return pci_eth_init(bis);
-}
diff --git a/board/eltec/bab7xx/dc_srom.c b/board/eltec/bab7xx/dc_srom.c
deleted file mode 100644
index a44af6e..0000000
--- a/board/eltec/bab7xx/dc_srom.c
+++ /dev/null
@@ -1,291 +0,0 @@
-/*
- * (C) Copyright 2002 ELTEC Elektronik AG
- * Frank Gottschling <fgottschling@eltec.de>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*
- * SRom I/O routines.
- */
-
-#include <common.h>
-#include <pci.h>
-#include "srom.h"
-
-#define SROM_RD         0x00004000    /* Read from Boot ROM */
-#define SROM_WR         0x00002000    /* Write to Boot ROM */
-#define SROM_SR         0x00000800    /* Select Serial ROM when set */
-
-#define DT_IN           0x00000004    /* Serial Data In */
-#define DT_CLK          0x00000002    /* Serial ROM Clock */
-#define DT_CS           0x00000001    /* Serial ROM Chip Select */
-
-static u_int         dc_srom_iobase;
-
-/*----------------------------------------------------------------------------*/
-
-static int inl(u_long addr)
-{
-    return le32_to_cpu(*(volatile u_long *)(addr));
-}
-
-/*----------------------------------------------------------------------------*/
-
-static void outl (int command, u_long addr)
-{
-    *(volatile u_long *)(addr) = cpu_to_le32(command);
-}
-
-/*----------------------------------------------------------------------------*/
-
-static void sendto_srom(u_int command, u_long addr)
-{
-    outl(command, addr);
-    udelay(1);
-
-    return;
-}
-
-/*----------------------------------------------------------------------------*/
-
-static int getfrom_srom(u_long addr)
-{
-    s32 tmp;
-
-    tmp = inl(addr);
-    udelay(1);
-
-    return tmp;
-}
-
-/*----------------------------------------------------------------------------*/
-
-static void srom_latch (u_int command, u_long addr)
-{
-    sendto_srom (command, addr);
-    sendto_srom (command | DT_CLK, addr);
-    sendto_srom (command, addr);
-
-    return;
-}
-
-/*----------------------------------------------------------------------------*/
-
-static void srom_command_rd (u_int command, u_long addr)
-{
-    srom_latch (command, addr);
-    srom_latch (command, addr);
-    srom_latch ((command & 0x0000ff00) | DT_CS, addr);
-
-    return;
-}
-
-/*----------------------------------------------------------------------------*/
-
-static void srom_command_wr (u_int command, u_long addr)
-{
-    srom_latch (command, addr);
-    srom_latch ((command & 0x0000ff00) | DT_CS, addr);
-    srom_latch (command, addr);
-
-    return;
-}
-
-/*----------------------------------------------------------------------------*/
-
-static void srom_address(u_int command, u_long addr, u_char offset)
-{
-    int i;
-    signed char a;
-
-    a = (char)(offset << 2);
-    for (i=0; i<6; i++, a <<= 1)
-    {
-	srom_latch(command | ((a < 0) ? DT_IN : 0), addr);
-    }
-    udelay(1);
-
-    i = (getfrom_srom(addr) >> 3) & 0x01;
-
-    return;
-}
-/*----------------------------------------------------------------------------*/
-
-static short srom_data_rd (u_int command, u_long addr)
-{
-    int i;
-    short word = 0;
-    s32 tmp;
-
-    for (i=0; i<16; i++)
-    {
-	sendto_srom(command  | DT_CLK, addr);
-	tmp = getfrom_srom(addr);
-	sendto_srom(command, addr);
-
-	word = (word << 1) | ((tmp >> 3) & 0x01);
-    }
-
-    sendto_srom(command & 0x0000ff00, addr);
-
-    return word;
-}
-
-/*----------------------------------------------------------------------------*/
-
-static int srom_data_wr (u_int command, u_long addr, short val)
-{
-    int i;
-    u_long longVal;
-    s32 tmp;
-
-    longVal = (u_long)(le16_to_cpu(val));
-
-    for (i=0; i<16; i++)
-    {
-	tmp = (longVal & 0x8000)>>13;
-
-	sendto_srom (tmp | command, addr);
-	sendto_srom (tmp | command  | DT_CLK, addr);
-	sendto_srom (tmp | command, addr);
-
-	longVal = longVal<<1;
-    }
-
-    sendto_srom(command & 0x0000ff00, addr);
-    sendto_srom(command, addr);
-
-    tmp = 100;
-    do
-    {
-	if ((getfrom_srom(dc_srom_iobase) & 0x8) == 0x8)
-	    break;
-	udelay(1000);
-    } while (--tmp);
-
-    if (tmp == 0)
-    {
-	printf("Write DEC21143 SRom timed out !\n");
-	return (-1);
-    }
-
-    return 0;
-}
-
-
-/*----------------------------------------------------------------------------*/
-static short srom_rd (u_long addr, u_char offset)
-{
-    sendto_srom (SROM_RD | SROM_SR, addr);
-    srom_latch (SROM_RD | SROM_SR | DT_CS, addr);
-
-    srom_command_rd (SROM_RD | SROM_SR | DT_IN | DT_CS, addr);
-
-    srom_address (SROM_RD | SROM_SR | DT_CS, addr, offset);
-
-    return srom_data_rd (SROM_RD | SROM_SR | DT_CS, addr);
-}
-
-/*----------------------------------------------------------------------------*/
-
-static void srom_wr_enable (u_long addr)
-{
-    int i;
-
-    sendto_srom (SROM_WR | SROM_SR, addr);
-    srom_latch (SROM_WR | SROM_SR | DT_CS, addr);
-
-    srom_latch (SROM_WR | SROM_SR | DT_IN | DT_CS, addr);
-    srom_latch (SROM_WR | SROM_SR | DT_CS, addr);
-    srom_latch (SROM_WR | SROM_SR | DT_CS, addr);
-
-    for (i=0; i<6; i++)
-    {
-	srom_latch (SROM_WR | SROM_SR | DT_IN | DT_CS, addr);
-    }
-}
-
-/*----------------------------------------------------------------------------*/
-
-static int srom_wr (u_long addr, u_char offset, short val)
-{
-    srom_wr_enable (addr);
-
-    sendto_srom (SROM_WR | SROM_SR, addr);
-    srom_latch (SROM_WR | SROM_SR | DT_CS, addr);
-
-    srom_command_wr (SROM_WR | SROM_SR | DT_IN | DT_CS, addr);
-
-    srom_address (SROM_WR | SROM_SR | DT_CS, addr, offset);
-
-    return srom_data_wr (SROM_WR | SROM_SR | DT_CS, addr, val);
-}
-
-/*----------------------------------------------------------------------------*/
-/*
- * load data from the srom
- */
-int dc_srom_load (u_short *dest)
-{
-    int offset;
-    short tmp;
-
-    /* get srom iobase from local network controller */
-    pci_read_config_dword(PCI_BDF(0,14,0), PCI_BASE_ADDRESS_1, &dc_srom_iobase);
-    dc_srom_iobase &= PCI_BASE_ADDRESS_MEM_MASK;
-    dc_srom_iobase  = pci_mem_to_phys(PCI_BDF(0,14,0), dc_srom_iobase);
-    dc_srom_iobase += 0x48;            /* io offset for srom access */
-
-    memset (dest, 0, 128);
-    for (offset=0; offset<64; offset++)
-    {
-	tmp = srom_rd (dc_srom_iobase, offset);
-	*dest++ = le16_to_cpu(tmp);
-    }
-
-    return (0);
-}
-
-/*----------------------------------------------------------------------------*/
-
-/*
- * store data into the srom
- */
-int dc_srom_store (u_short *src)
-{
-    int offset;
-
-    /* get srom iobase from local network controller */
-    pci_read_config_dword(PCI_BDF(0,14,0), PCI_BASE_ADDRESS_1, &dc_srom_iobase);
-    dc_srom_iobase &= PCI_BASE_ADDRESS_MEM_MASK;
-    dc_srom_iobase  = pci_mem_to_phys(PCI_BDF(0,14,0), dc_srom_iobase);
-    dc_srom_iobase += 0x48;            /* io offset for srom access */
-
-    for (offset=0; offset<64; offset++)
-    {
-	if (srom_wr (dc_srom_iobase, offset, *src) == -1)
-		return (-1);
-	src++;
-    }
-
-    return (0);
-}
-
-/*----------------------------------------------------------------------------*/
diff --git a/board/eltec/bab7xx/el_srom.c b/board/eltec/bab7xx/el_srom.c
deleted file mode 100644
index 73f8066..0000000
--- a/board/eltec/bab7xx/el_srom.c
+++ /dev/null
@@ -1,292 +0,0 @@
-/*
- * (C) Copyright 2002 ELTEC Elektronik AG
- * Frank Gottschling <fgottschling@eltec.de>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include "srom.h"
-
-/*----------------------------------------------------------------------------*/
-/*
- *  START sequence
- *        _ _________
- *  SCLK  _>         \____
- *        _ ____
- *  SDIO  _>    \_________
- *         :    :    :
- */
-static void eepStart (void)
-{
-    out8(I2C_BUS_DAT, 0x60);     /* SCLK = high  SDIO = high */
-    out8(I2C_BUS_DIR, 0x60);     /* set output direction for SCLK/SDIO */
-    udelay(10);
-    out8(I2C_BUS_DAT, 0x40);     /* SCLK = high  SDIO = low */
-    udelay(10);
-    out8(I2C_BUS_DAT, 0x00);     /* SCLK = low   SDIO = low */
-    udelay(10);
-}
-
-/*----------------------------------------------------------------------------*/
-/*
- *  STOP sequence
- *              _______
- *  SCLK  _____/
- *        _         ___
- *  SDIO  _>_______/
- *         :   :   :
- */
-static void eepStop (void)
-{
-    out8(I2C_BUS_DAT, 0x00);      /* SCLK = low   SDIO = low */
-    out8(I2C_BUS_DIR, 0x60);      /* set output direction for SCLK/SDIO */
-    udelay(10);
-    out8(I2C_BUS_DAT, 0x40);      /* SCLK = high  SDIO = low */
-    udelay(10);
-    out8(I2C_BUS_DAT, 0x60);      /* SCLK = high  SDIO = high */
-    udelay(10);
-    out8(I2C_BUS_DIR, 0x00);      /* reset to input direction */
-}
-
-/*----------------------------------------------------------------------------*/
-/*
- *  Read one byte from EEPROM
- *            ___     ___     ___     ___     ___     ___     ___     ___
- *  SCLK  ___/   \___/   \___/   \___/   \___/   \___/   \___/   \___/   \
- *        _________________________________________________________________
- *  SDIO  >     ^       ^       ^       ^       ^       ^       ^       ^
- *        :  :   :   :   :   :   :   :   :   :   :   :   :   :   :   :   :
- */
-static unsigned char eepReadByte (void)
-{
-    register unsigned char buf = 0x00;
-    register int i;
-
-    out8(I2C_BUS_DIR, 0x40);
-
-    for (i = 0; i < 8; i++)
-    {
-	out8(I2C_BUS_DAT, 0x00);    /* SCLK = low   SDIO = high */
-	udelay(10);
-	out8(I2C_BUS_DAT, 0x40);    /* SCLK = high  SDIO = high */
-	udelay(15);
-	buf <<= 1;
-	buf = (in8(I2C_BUS_DAT) & 0x20) ? (buf | 0x01) : (buf & 0xFE);
-	out8(I2C_BUS_DAT, 0x00);    /* SCLK = low   SDIO = high */
-	udelay(10);
-    }
-    return(buf);
-}
-
-/*----------------------------------------------------------------------------*/
-/*
- *  Write one byte to EEPROM
- *           ___     ___     ___     ___     ___     ___     ___     ___
- *  SCLK  __/   \___/   \___/   \___/   \___/   \___/   \___/   \___/   \__
- *         _______ _______ _______ _______ _______ _______ _______ ________
- *  SDIO  X_______X_______X_______X_______X_______X_______X_______X________
- *      :   7   :   6   :   5   :   4   :   3   :   2   :   1   :   0
- */
-static void eepWriteByte (register unsigned char buf)
-{
-    register int    i;
-
-    (buf & 0x80) ? out8(I2C_BUS_DAT, 0x20) : out8(I2C_BUS_DAT, 0x00);     /* SCLK = low   SDIO = data */
-    out8(I2C_BUS_DIR, 0x60);
-
-    for (i = 7; i >= 0; i--)
-    {
-	(buf & 0x80) ? out8(I2C_BUS_DAT, 0x20) : out8(I2C_BUS_DAT, 0x00); /* SCLK=low  SDIO=data */
-	udelay(10);
-	(buf & 0x80) ? out8(I2C_BUS_DAT, 0x60) : out8(I2C_BUS_DAT, 0x40); /* SCLK=high SDIO=data */
-	udelay(15);
-	(buf & 0x80) ? out8(I2C_BUS_DAT, 0x20) : out8(I2C_BUS_DAT, 0x00); /* SCLK=low  SDIO=data */
-	udelay(10);
-	buf <<= 1;
-    }
-}
-
-/*----------------------------------------------------------------------------*/
-/*
- *  Read data acknowledge of EEPROM
- *             _______
- *  SCLK  ____/       \___
- *         _______________
- *  SDIO  >
- *        :   :   ^   :
- */
-static int eepReadAck (void)
-{
-    int retval;
-
-    out8(I2C_BUS_DIR, 0x40);
-    out8(I2C_BUS_DAT, 0x00);            /* SCLK = low   SDIO = high */
-    udelay(10);
-    out8(I2C_BUS_DAT, 0x40);            /* SCLK = high  SDIO = high */
-    udelay(10);
-    retval = (in8(I2C_BUS_DAT) & 0x20) ? ERROR : 0;
-    udelay(10);
-    out8(I2C_BUS_DAT, 0x00);            /* SCLK = low   SDIO = high */
-    udelay(10);
-
-    return(retval);
-}
-
-/*----------------------------------------------------------------------------*/
-/*
- *  Write data acknowledge to EEPROM
- *             _______
- *  SCLK  ____/       \___
- *
- *  SDIO  >_______________
- *        :   :       :
- */
-static void eepWriteAck (unsigned char ack)
-{
-    ack ? out8(I2C_BUS_DAT, 0x20) : out8(I2C_BUS_DAT, 0x00); /* SCLK = low   SDIO = ack */
-    out8(I2C_BUS_DIR, 0x60);
-    udelay(10);
-    ack ? out8(I2C_BUS_DAT, 0x60) : out8(I2C_BUS_DAT, 0x40); /* SCLK = high  SDIO = ack */
-    udelay(15);
-    ack ? out8(I2C_BUS_DAT, 0x20) : out8(I2C_BUS_DAT, 0x00); /* SCLK = low   SDIO = ack */
-    udelay(10);
-}
-
-/*----------------------------------------------------------------------------*/
-/*
- * Read bytes from EEPROM
- */
-int el_srom_load (addr, buf, cnt, device, block)
-unsigned char addr;
-unsigned char *buf;
-int cnt;
-unsigned char device;
-unsigned char block;
-{
-    register int i;
-
-    for (i=0;i<cnt;i++)
-    {
-	eepStart();
-	eepWriteByte(0xA0 | device | block);
-	if (eepReadAck() == ERROR)
-	{
-	   eepStop();
-	    return(ERROR);
-	}
-	eepWriteByte(addr++);
-	if (eepReadAck() == ERROR)
-	{
-	    eepStop();
-	    return(ERROR);
-	}
-	eepStart();
-
-	eepWriteByte(0xA1 | device | block);
-	if (eepReadAck() == ERROR)
-	{
-	    eepStop();
-	    return(ERROR);
-	}
-
-	*buf++ = eepReadByte();
-	eepWriteAck(1);
-	eepStop();
-
-	if ((addr == 0) && (i != (cnt-1)))    /* is it the same block ? */
-	{
-	    if (block == FIRST_BLOCK)
-		block = SECOND_BLOCK;
-	    else
-		return(ERROR);
-	}
-    }
-    return(cnt);
-}
-
-/*----------------------------------------------------------------------------*/
-/*
- *
- * Write bytes to EEPROM
- *
- */
-int el_srom_store (addr, buf, cnt, device, block)
-unsigned char    addr, *buf, device, block;
-int        cnt;
-{
-    register int i, retVal;
-
-    for (i=0;i<cnt;i++)
-    {
-	retVal = ERROR;
-	do
-	{
-	    eepStart();
-	    eepWriteByte(0xA0 | device | block);
-	    if ((retVal = eepReadAck()) == ERROR)
-		eepStop();
-	} while (retVal == ERROR);
-
-	eepWriteByte(addr++);
-	if (eepReadAck() == ERROR)  return(ERROR);
-
-	if ((addr == 0) && (i != (cnt-1)))    /* is it the same block ? */
-	{
-	    if (block == FIRST_BLOCK)
-		block = SECOND_BLOCK;
-	    else
-	    return(ERROR);
-	}
-
-	eepWriteByte(*buf++);
-	if (eepReadAck() == ERROR)
-	    return(ERROR);
-
-	eepStop();
-    }
-    return(cnt);
-}
-
-/*----------------------------------------------------------------------------*/
-/*
- * calculate checksum for ELTEC revision srom
- */
-unsigned long el_srom_checksum (ptr, size)
-register unsigned char *ptr;
-unsigned long size;
-{
-    u_long f, accu = 0;
-    u_int  i;
-    u_char byte;
-
-    for (; size; size--)
-    {
-	byte = *ptr++;
-	for (i = 8; i; i--)
-	{
-	    f =  ((byte & 1) ^ (accu & 1)) ? 0x84083001 : 0;
-	    accu >>= 1; accu ^= f;
-	    byte >>= 1;
-	}
-    }
-    return(accu);
-}
-
-/*----------------------------------------------------------------------------*/
diff --git a/board/eltec/bab7xx/flash.c b/board/eltec/bab7xx/flash.c
deleted file mode 100644
index 21ae098..0000000
--- a/board/eltec/bab7xx/flash.c
+++ /dev/null
@@ -1,512 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*
- * 07-10-2002 Frank Gottschling: added 29F032 flash (ELPPC).
- *        fixed monitor protection part
- *
- * 09-18-2001 Andreas Heppel: Reduced the code in here to the usage
- *        of AMD's 29F040 and 29F016 flashes, since the BAB7xx does use
- *        any other.
- */
-
-#include <common.h>
-#include <asm/processor.h>
-#include <asm/pci_io.h>
-
-flash_info_t    flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips */
-
-ulong flash_get_size (vu_long *addr, flash_info_t *info);
-static int write_word (flash_info_t *info, ulong dest, ulong data);
-
-/*flash command address offsets*/
-
-#define ADDR0           (0x555)
-#define ADDR1           (0x2AA)
-#define ADDR3           (0x001)
-
-#define FLASH_WORD_SIZE unsigned char
-
-/*----------------------------------------------------------------------------*/
-
-unsigned long flash_init (void)
-{
-    unsigned long size1, size2;
-    int i;
-
-    /* Init: no FLASHes known */
-    for (i=0; i<CONFIG_SYS_MAX_FLASH_BANKS; ++i)
-    {
-	flash_info[i].flash_id = FLASH_UNKNOWN;
-    }
-
-    /* initialise 1st flash */
-    size1 = flash_get_size((vu_long *)FLASH_BASE0_PRELIM, &flash_info[0]);
-
-    if (flash_info[0].flash_id == FLASH_UNKNOWN)
-    {
-	printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
-	    size1, size1<<20);
-    }
-
-    /* initialise 2nd flash */
-    size2 = flash_get_size((vu_long *)FLASH_BASE1_PRELIM, &flash_info[1]);
-
-    if (flash_info[1].flash_id == FLASH_UNKNOWN)
-    {
-	printf ("## Unknown FLASH on Bank 1 - Size = 0x%08lx = %ld MB\n",
-	    size2, size2<<20);
-    }
-
-    /* monitor protection ON by default */
-    if (size1 == 512*1024)
-    {
-	(void)flash_protect(FLAG_PROTECT_SET,
-		FLASH_BASE0_PRELIM,
-		FLASH_BASE0_PRELIM+monitor_flash_len-1,
-		&flash_info[0]);
-    }
-    if (size2 == 512*1024)
-    {
-	(void)flash_protect(FLAG_PROTECT_SET,
-		FLASH_BASE1_PRELIM,
-		FLASH_BASE1_PRELIM+monitor_flash_len-1,
-		&flash_info[1]);
-    }
-    if (size2 == 4*1024*1024)
-    {
-	(void)flash_protect(FLAG_PROTECT_SET,
-		CONFIG_SYS_FLASH_BASE,
-		CONFIG_SYS_FLASH_BASE+monitor_flash_len-1,
-		&flash_info[1]);
-    }
-
-    return (size1 + size2);
-}
-
-/*----------------------------------------------------------------------------*/
-
-void flash_print_info  (flash_info_t *info)
-{
-    int i;
-    int k;
-    int size;
-    int erased;
-    volatile unsigned long *flash;
-
-    if (info->flash_id == FLASH_UNKNOWN) {
-	printf ("missing or unknown FLASH type\n");
-	flash_init();
-    }
-
-    if (info->flash_id == FLASH_UNKNOWN) {
-	printf ("missing or unknown FLASH type\n");
-	return;
-    }
-
-    switch (info->flash_id & FLASH_VENDMASK) {
-    case FLASH_MAN_AMD:
-	printf ("AMD ");
-	break;
-    default:
-	printf ("Unknown Vendor ");
-	break;
-    }
-
-    switch (info->flash_id & FLASH_TYPEMASK) {
-    case AMD_ID_F040B:
-	printf ("AM29F040B (4 Mbit)\n");
-	break;
-    case AMD_ID_F016D:
-	printf ("AM29F016D (16 Mbit)\n");
-	break;
-    case AMD_ID_F032B:
-	printf ("AM29F032B (32 Mbit)\n");
-	break;
-   default:
-	printf ("Unknown Chip Type\n");
-	break;
-    }
-
-    if (info->size >= (1 << 20)) {
-	printf ("  Size: %ld MB in %d Sectors\n", info->size >> 20, info->sector_count);
-    } else {
-	printf ("  Size: %ld kB in %d Sectors\n", info->size >> 10, info->sector_count);
-    }
-
-    printf ("  Sector Start Addresses:");
-    for (i=0; i<info->sector_count; ++i) {
-	/*
-	* Check if whole sector is erased
-	*/
-	if (i != (info->sector_count-1))
-	    size = info->start[i+1] - info->start[i];
-	else
-	    size = info->start[0] + info->size - info->start[i];
-
-	erased = 1;
-	flash = (volatile unsigned long *)info->start[i];
-	size = size >> 2;        /* divide by 4 for longword access */
-	for (k=0; k<size; k++) {
-	    if (*flash++ != 0xffffffff) {
-		erased = 0;
-		break;
-	    }
-	}
-
-	if ((i % 5) == 0)
-	    printf ("\n   ");
-
-	printf (" %08lX%s%s",
-	    info->start[i],
-	    erased ? " E" : "  ",
-	    info->protect[i] ? "RO " : "   ");
-    }
-    printf ("\n");
-}
-
-/*----------------------------------------------------------------------------*/
-/*
- * The following code cannot be run from FLASH!
- */
-ulong flash_get_size (vu_long *addr, flash_info_t *info)
-{
-    short i;
-    ulong vendor, devid;
-    ulong base = (ulong)addr;
-    volatile unsigned char *caddr = (unsigned char *)addr;
-
-#ifdef DEBUG
-    printf("flash_get_size for address 0x%lx: \n", (unsigned long)caddr);
-#endif
-
-    /* Write auto select command: read Manufacturer ID */
-    caddr[0] = 0xF0;   /* reset bank */
-    udelay(10);
-
-    eieio();
-    caddr[0x555] = 0xAA;
-    udelay(10);
-    caddr[0x2AA] = 0x55;
-    udelay(10);
-    caddr[0x555] = 0x90;
-
-    udelay(10);
-
-    vendor = caddr[0];
-    devid = caddr[1];
-
-#ifdef DEBUG
-    printf("Manufacturer: 0x%lx\n", vendor);
-#endif
-
-    vendor &= 0xff;
-    devid &= 0xff;
-
-    /* We accept only two AMD types */
-    switch (vendor) {
-    case (FLASH_WORD_SIZE)AMD_MANUFACT:
-	info->flash_id = FLASH_MAN_AMD;
-	break;
-    default:
-	info->flash_id = FLASH_UNKNOWN;
-	info->sector_count = 0;
-	info->size = 0;
-	return (0);         /* no or unknown flash  */
-    }
-
-    switch (devid) {
-    case (FLASH_WORD_SIZE)AMD_ID_F040B:
-	info->flash_id |= AMD_ID_F040B;
-	info->sector_count = 8;
-	info->size = 0x00080000;
-	break;              /* => 0.5 MB      */
-
-    case (FLASH_WORD_SIZE)AMD_ID_F016D:
-	info->flash_id |= AMD_ID_F016D;
-	info->sector_count = 32;
-	info->size         = 0x00200000;
-	break;              /* => 2 MB      */
-
-    case (FLASH_WORD_SIZE)AMD_ID_F032B:
-	info->flash_id |= AMD_ID_F032B;
-	info->sector_count = 64;
-	info->size         = 0x00400000;
-	break;              /* => 4 MB      */
-
-    default:
-	info->flash_id = FLASH_UNKNOWN;
-	return (0);         /* => no or unknown flash */
-
-    }
-
-#ifdef DEBUG
-    printf("flash id 0x%lx; sector count 0x%x, size 0x%lx\n", info->flash_id, info->sector_count, info->size);
-#endif
-
-    /* check for protected sectors */
-    for (i = 0; i < info->sector_count; i++) {
-	/* sector base address */
-	info->start[i] = base + i * (info->size / info->sector_count);
-	/* read sector protection at sector address, (A7 .. A0) = 0x02 */
-	/* D0 = 1 if protected */
-	caddr = (volatile unsigned char *)(info->start[i]);
-	info->protect[i] = caddr[2] & 1;
-    }
-
-    /*
-     * Prevent writes to uninitialized FLASH.
-     */
-    if (info->flash_id != FLASH_UNKNOWN) {
-	caddr = (volatile unsigned char *)info->start[0];
-	caddr[0] = 0xF0;   /* reset bank */
-    }
-
-    return (info->size);
-}
-
-/*----------------------------------------------------------------------------*/
-
-int flash_erase (flash_info_t *info, int s_first, int s_last)
-{
-    volatile FLASH_WORD_SIZE *addr = (FLASH_WORD_SIZE *)(info->start[0]);
-    int flag, prot, sect, l_sect;
-    ulong start, now, last;
-    int rc = 0;
-
-    if ((s_first < 0) || (s_first > s_last)) {
-	if (info->flash_id == FLASH_UNKNOWN) {
-	    printf ("- missing\n");
-	} else {
-	    printf ("- no sectors to erase\n");
-	}
-	return 1;
-    }
-
-    if ((info->flash_id == FLASH_UNKNOWN) ||
-	(info->flash_id > FLASH_AMD_COMP)) {
-	printf ("Can't erase unknown flash type - aborted\n");
-	return 1;
-    }
-
-    prot = 0;
-    for (sect=s_first; sect<=s_last; ++sect) {
-	if (info->protect[sect]) {
-	    prot++;
-	}
-    }
-
-    if (prot) {
-	printf ("- Warning: %d protected sectors will not be erased!\n",
-	    prot);
-    } else {
-	printf ("\n");
-    }
-
-    l_sect = -1;
-
-    /* Disable interrupts which might cause a timeout here */
-    flag = disable_interrupts();
-
-    addr[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA;
-    addr[ADDR1] = (FLASH_WORD_SIZE)0x00550055;
-    addr[ADDR0] = (FLASH_WORD_SIZE)0x00800080;
-    addr[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA;
-    addr[ADDR1] = (FLASH_WORD_SIZE)0x00550055;
-
-    /* Start erase on unprotected sectors */
-    for (sect = s_first; sect<=s_last; sect++) {
-	if (info->protect[sect] == 0) { /* not protected */
-	    addr = (FLASH_WORD_SIZE *)(info->start[sect]);
-	    if (info->flash_id & FLASH_MAN_SST) {
-		addr[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA;
-		addr[ADDR1] = (FLASH_WORD_SIZE)0x00550055;
-		addr[ADDR0] = (FLASH_WORD_SIZE)0x00800080;
-		addr[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA;
-		addr[ADDR1] = (FLASH_WORD_SIZE)0x00550055;
-		addr[0] = (FLASH_WORD_SIZE)0x00500050;  /* block erase */
-		udelay(30000);  /* wait 30 ms */
-	    }
-	    else
-		addr[0] = (FLASH_WORD_SIZE)0x00300030;  /* sector erase */
-	    l_sect = sect;
-	}
-    }
-
-    /* re-enable interrupts if necessary */
-    if (flag)
-	enable_interrupts();
-
-    /* wait at least 80us - let's wait 1 ms */
-    udelay (1000);
-
-    /*
-     * We wait for the last triggered sector
-     */
-    if (l_sect < 0)
-	goto DONE;
-
-    start = get_timer (0);
-    last  = start;
-    addr = (FLASH_WORD_SIZE *)(info->start[l_sect]);
-    while ((addr[0] & (FLASH_WORD_SIZE)0x00800080) != (FLASH_WORD_SIZE)0x00800080) {
-	if ((now = get_timer(start)) > CONFIG_SYS_FLASH_ERASE_TOUT) {
-	    printf ("Timeout\n");
-	    return 1;
-	}
-	/* show that we're waiting */
-	if ((now - last) > 1000) {  /* every second */
-	    serial_putc ('.');
-	    last = now;
-	}
-    }
-
-DONE:
-    /* reset to read mode */
-    addr = (FLASH_WORD_SIZE *)info->start[0];
-    addr[0] = (FLASH_WORD_SIZE)0x00F000F0;  /* reset bank */
-
-    printf (" done\n");
-    return rc;
-}
-
-/*----------------------------------------------------------------------------*/
-/*
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
-{
-    ulong cp, wp, data;
-    int i, l, rc;
-
-    wp = (addr & ~3);   /* get lower word aligned address */
-
-    /*
-     * handle unaligned start bytes
-     */
-    if ((l = addr - wp) != 0) {
-	data = 0;
-	for (i=0, cp=wp; i<l; ++i, ++cp) {
-	    data = (data << 8) | (*(uchar *)cp);
-	}
-	for (; i<4 && cnt>0; ++i) {
-	    data = (data << 8) | *src++;
-	    --cnt;
-	    ++cp;
-	}
-	for (; cnt==0 && i<4; ++i, ++cp) {
-	    data = (data << 8) | (*(uchar *)cp);
-	}
-
-	if ((rc = write_word(info, wp, data)) != 0) {
-	    return (rc);
-	}
-	wp += 4;
-    }
-
-    /*
-     * handle word aligned part
-     */
-    while (cnt >= 4) {
-	data = 0;
-	for (i=0; i<4; ++i) {
-	    data = (data << 8) | *src++;
-	}
-	if ((rc = write_word(info, wp, data)) != 0) {
-	    return (rc);
-	}
-	wp  += 4;
-	cnt -= 4;
-    }
-
-    if (cnt == 0) {
-	return (0);
-    }
-
-    /*
-     * handle unaligned tail bytes
-     */
-    data = 0;
-    for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) {
-	data = (data << 8) | *src++;
-	--cnt;
-    }
-    for (; i<4; ++i, ++cp) {
-	data = (data << 8) | (*(uchar *)cp);
-    }
-
-    return (write_word(info, wp, data));
-}
-
-/*----------------------------------------------------------------------------*/
-/* Write a word to Flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int write_word (flash_info_t *info, ulong dest, ulong data)
-{
-	volatile FLASH_WORD_SIZE *addr2 = (FLASH_WORD_SIZE *)(info->start[0]);
-	volatile FLASH_WORD_SIZE *dest2 = (FLASH_WORD_SIZE *)dest;
-	volatile FLASH_WORD_SIZE *data2 = (FLASH_WORD_SIZE *)&data;
-    ulong start;
-    int flag;
-	int i;
-
-    /* Check if Flash is (sufficiently) erased */
-    if ((*((volatile FLASH_WORD_SIZE *)dest) &
-	     (FLASH_WORD_SIZE)data) != (FLASH_WORD_SIZE)data) {
-	return (2);
-    }
-    /* Disable interrupts which might cause a timeout here */
-    flag = disable_interrupts();
-
-	for (i=0; i<4/sizeof(FLASH_WORD_SIZE); i++)
-	  {
-	    addr2[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA;
-	    addr2[ADDR1] = (FLASH_WORD_SIZE)0x00550055;
-	    addr2[ADDR0] = (FLASH_WORD_SIZE)0x00A000A0;
-
-	    dest2[i] = data2[i];
-
-	    /* re-enable interrupts if necessary */
-	    if (flag)
-	      enable_interrupts();
-
-	    /* data polling for D7 */
-	    start = get_timer (0);
-	    while ((dest2[i] & (FLASH_WORD_SIZE)0x00800080) !=
-		   (data2[i] & (FLASH_WORD_SIZE)0x00800080)) {
-	      if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) {
-		return (1);
-	      }
-	    }
-	  }
-
-    return (0);
-}
-
-/*----------------------------------------------------------------------------*/
diff --git a/board/eltec/bab7xx/l2cache.c b/board/eltec/bab7xx/l2cache.c
deleted file mode 100644
index 787704f..0000000
--- a/board/eltec/bab7xx/l2cache.c
+++ /dev/null
@@ -1,159 +0,0 @@
-/*
- * (C) Copyright 2002 ELTEC Elektronik AG
- * Frank Gottschling <fgottschling@eltec.de>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-
-#if defined(CONFIG_SYS_L2_BAB7xx)
-
-#include <pci.h>
-#include <mpc106.h>
-#include <asm/processor.h>
-
-/* defines L2CR register for MPC750 */
-
-#define L2CR_E           0x80000000
-#define L2CR_256K        0x10000000
-#define L2CR_512K        0x20000000
-#define L2CR_1024K       0x30000000
-#define L2CR_I           0x00200000
-#define L2CR_SL          0x00008000
-#define L2CR_IP          0x00000001
-
-/*----------------------------------------------------------------------------*/
-
-static int dummy (int dummy)
-{
-    return (dummy+1);
-}
-
-/*----------------------------------------------------------------------------*/
-
-int l2_cache_enable (int l2control)
-{
-    if (l2control)              /* BAB750 */
-    {
-	mtspr(SPRN_L2CR, l2control);
-	mtspr(SPRN_L2CR, (l2control | L2CR_I));
-	while (mfspr(SPRN_L2CR) & L2CR_IP)
-	    ;
-	mtspr(SPRN_L2CR, (l2control | L2CR_E));
-	return (0);
-    }
-    else /* BAB740 */
-    {
-	int picr1, picr2, mask;
-	int picr2CacheSize, cacheSize;
-	int *d;
-	int devbusfn;
-	u32 reg32;
-
-	devbusfn = pci_find_device(PCI_VENDOR_ID_MOTOROLA,
-				   PCI_DEVICE_ID_MOTOROLA_MPC106, 0);
-	if (devbusfn == -1)
-	    return (-1);
-
-	pci_read_config_dword  (devbusfn, PCI_PICR2, &reg32);
-	reg32 &= ~PICR2_L2_EN;
-	pci_write_config_dword (devbusfn, PCI_PICR2, reg32);
-
-	/* cache size */
-	if (*(volatile unsigned char *) (CONFIG_SYS_ISA_IO + 0x220) & 0x04)
-	{
-	    /* cache size is 512 KB */
-	    picr2CacheSize = PICR2_L2_SIZE_512K;
-	    cacheSize = 0x80000;
-	}
-	else
-	{
-	    /* cache size is 256 KB */
-	    picr2CacheSize = PICR2_L2_SIZE_256K;
-	    cacheSize = 0x40000;
-	}
-
-	/* setup PICR1 */
-	mask =
-	~(PICR1_CF_BREAD_WS(1) |
-	  PICR1_CF_BREAD_WS(2) |
-	  PICR1_CF_CBA(0xff) |
-	  PICR1_CF_CACHE_1G |
-	  PICR1_CF_DPARK |
-	  PICR1_CF_APARK |
-	  PICR1_CF_L2_CACHE_MASK);
-
-	picr1 =
-	(PICR1_CF_CBA(0x3f) |
-	 PICR1_CF_CACHE_1G |
-	 PICR1_CF_APARK |
-	 PICR1_CF_DPARK |
-	 PICR1_CF_L2_COPY_BACK); /* PICR1_CF_L2_WRITE_THROUGH */
-
-	pci_read_config_dword  (devbusfn, PCI_PICR1, &reg32);
-	reg32 &= mask;
-	reg32 |= picr1;
-	pci_write_config_dword (devbusfn, PCI_PICR1, reg32);
-
-	/*
-	 * invalidate all L2 cache
-	 */
-	picr2 =
-	(PICR2_CF_INV_MODE |
-	 PICR2_CF_HIT_HIGH |
-	 PICR2_CF_MOD_HIGH |
-	 PICR2_CF_L2_HIT_DELAY(1) |
-	 PICR2_CF_APHASE_WS(1) |
-	 picr2CacheSize);
-
-	pci_write_config_dword (devbusfn, PCI_PICR2, picr2);
-
-	/*
-	 * dummy transactions
-	 */
-	for (d=0; d<(int *)(2*cacheSize); d++)
-	    dummy(*d);
-
-	pci_write_config_dword (devbusfn, PCI_PICR2,
-				(picr2 | PICR2_CF_FLUSH_L2));
-
-	/* setup PICR2 */
-	picr2 =
-	(PICR2_CF_FAST_CASTOUT |
-	 PICR2_CF_WDATA |
-	 PICR2_CF_ADDR_ONLY_DISABLE |
-	 PICR2_CF_HIT_HIGH |
-	 PICR2_CF_MOD_HIGH |
-	 PICR2_L2_UPDATE_EN |
-	 PICR2_L2_EN |
-	 PICR2_CF_APHASE_WS(1) |
-	 PICR2_CF_DATA_RAM_PBURST |
-	 PICR2_CF_L2_HIT_DELAY(1) |
-	 PICR2_CF_SNOOP_WS(2) |
-	 picr2CacheSize);
-
-	pci_write_config_dword (devbusfn, PCI_PICR2, picr2);
-    }
-    return (0);
-}
-
-/*----------------------------------------------------------------------------*/
-
-#endif /* (CONFIG_SYS_L2_BAB7xx) */
diff --git a/board/eltec/bab7xx/misc.c b/board/eltec/bab7xx/misc.c
deleted file mode 100644
index d05e226..0000000
--- a/board/eltec/bab7xx/misc.c
+++ /dev/null
@@ -1,546 +0,0 @@
-/*
- * (C) Copyright 2002 ELTEC Elektronik AG
- * Frank Gottschling <fgottschling@eltec.de>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/* includes */
-#include <common.h>
-#include <linux/ctype.h>
-#include <pci.h>
-#include <net.h>
-#include <mpc106.h>
-#include <w83c553f.h>
-#include "srom.h"
-
-/* imports  */
-extern int l2_cache_enable (int l2control);
-extern void *nvram_read (void *dest, const short src, size_t count);
-extern void nvram_write (short dest, const void *src, size_t count);
-
-/* globals */
-unsigned int ata_reset_time = 60;
-unsigned int scsi_reset_time = 10;
-unsigned int eltec_board;
-
-/* BAB750 uses SYM53C875(default) and BAB740 uses SYM53C860
- * values fixed after board identification
- */
-unsigned short scsi_dev_id = PCI_DEVICE_ID_NCR_53C875;
-unsigned int   scsi_max_scsi_id = 15;
-unsigned char  scsi_sym53c8xx_ccf = 0x13;
-
-/*----------------------------------------------------------------------------*/
-/*
- * handle sroms on BAB740/750
- * fix ether address
- * L2 cache initialization
- * ide dma control
- */
-int misc_init_r (void)
-{
-    revinfo eerev;
-    char *ptr;
-    u_int  i, l, initSrom, copyNv;
-    char buf[256];
-    char hex[23] = { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 0, 0, 0,
-	     0, 0, 0, 0, 10, 11, 12, 13, 14, 15 };
-    pci_dev_t bdf;
-
-    char sromSYM[] = {
-#ifdef TULIP_BUG
-    /* 10BaseT, 100BaseTx no full duplex modes */
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x04, 0x01, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x1e, 0x00, 0x00, 0x00, 0x08,
-    0x02, 0x86, 0x02, 0x00, 0xaf, 0x08, 0xa5, 0x00,
-    0x88, 0x04, 0x03, 0x27, 0x08, 0x25, 0x00, 0x61,
-    0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc6, 0xe8
-#endif
-    /* 10BaseT, 10BaseT-FD, 100BaseTx, 100BaseTx-FD */
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x04, 0x01, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x1e, 0x00, 0x00, 0x00, 0x08,
-    0x04, 0x86, 0x02, 0x00, 0xaf, 0x08, 0xa5, 0x00,
-    0x86, 0x02, 0x04, 0xaf, 0x08, 0xa5, 0x00, 0x88,
-    0x04, 0x03, 0x27, 0x08, 0x25, 0x00, 0x61, 0x80,
-    0x88, 0x04, 0x05, 0x27, 0x08, 0x25, 0x00, 0x61,
-    0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x05, 0x77
-    };
-
-    char sromMII[] = {
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x04, 0x01, 0x00, 0x00, 0x5b, 0x00,
-    0x2e, 0x4d, 0x00, 0x1e, 0x00, 0x00, 0x00, 0x08,
-    0x01, 0x95, 0x03, 0x00, 0x00, 0x04, 0x01, 0x08,
-    0x00, 0x00, 0x02, 0x08, 0x02, 0x00, 0x00, 0x78,
-    0xe0, 0x01, 0x00, 0x50, 0x00, 0x18, 0x80, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xde, 0x41
-    };
-
-    /*
-     * Check/Remake revision info
-     */
-    initSrom = 0;
-    copyNv   = 0;
-
-    /* read out current revision srom contens */
-    el_srom_load (0x0000, (u_char*)&eerev, sizeof(revinfo),
-		SECOND_DEVICE, FIRST_BLOCK);
-
-    /* read out current nvram shadow image */
-    nvram_read (buf, CONFIG_SYS_NV_SROM_COPY_ADDR, CONFIG_SYS_SROM_SIZE);
-
-    if (strcmp (eerev.magic, "ELTEC") != 0)
-    {
-	/* srom is not initialized -> create a default revision info */
-	for (i = 0, ptr = (char *)&eerev; i < sizeof(revinfo); i++)
-	    *ptr++ = 0x00;
-	strcpy(eerev.magic, "ELTEC");
-	eerev.revrev[0] = 1;
-	eerev.revrev[1] = 0;
-	eerev.size = 0x00E0;
-	eerev.category[0] = 0x01;
-
-	/* node id from dead e128 as default */
-	eerev.etheraddr[0] = 0x00;
-	eerev.etheraddr[1] = 0x00;
-	eerev.etheraddr[2] = 0x5B;
-	eerev.etheraddr[3] = 0x00;
-	eerev.etheraddr[4] = 0x2E;
-	eerev.etheraddr[5] = 0x4D;
-
-	/* cache config word for bab750 */
-	*(int*)&eerev.res[0] = CLK2P0TO1_1MB_PB_0P5DH;
-
-	initSrom = 1;  /* force dialog */
-	copyNv   = 1;  /* copy to nvram */
-    }
-
-    if ((copyNv == 0) &&   (el_srom_checksum((u_char*)&eerev, CONFIG_SYS_SROM_SIZE) !=
-		el_srom_checksum((u_char*)buf, CONFIG_SYS_SROM_SIZE)))
-    {
-	printf ("Invalid revision info copy in nvram !\n");
-	printf ("Press key:\n  <c> to copy current revision info to nvram.\n");
-	printf ("  <r> to reenter revision info.\n");
-	printf ("=> ");
-	if (0 != readline (NULL))
-	{
-	    switch ((char)toupper(console_buffer[0]))
-	    {
-	    case 'C':
-		copyNv = 1;
-		break;
-	    case 'R':
-		copyNv = 1;
-		initSrom = 1;
-		break;
-	    }
-	}
-    }
-
-    if (initSrom)
-    {
-	memcpy (buf, &eerev.revision[0][0], 14);     /* save all revision info */
-	printf ("Enter revision number (0-9): %c  ", eerev.revision[0][0]);
-	if (0 != readline (NULL))
-	{
-	    eerev.revision[0][0] = (char)toupper(console_buffer[0]);
-	    memcpy (&eerev.revision[1][0], buf, 12); /* shift rest of rev info */
-	}
-
-	printf ("Enter revision character (A-Z): %c  ", eerev.revision[0][1]);
-	if (1 == readline (NULL))
-	{
-	    eerev.revision[0][1] = (char)toupper(console_buffer[0]);
-	}
-
-	printf ("Enter board name (V-XXXX-XXXX): %s  ", (char *)&eerev.board);
-	if (11 == readline (NULL))
-	{
-	    for (i=0; i<11; i++)
-		eerev.board[i] =  (char)toupper(console_buffer[i]);
-	    eerev.board[11] = '\0';
-	}
-
-	printf ("Enter serial number: %s ", (char *)&eerev.serial );
-	if (6 == readline (NULL))
-	{
-	    for (i=0; i<6; i++)
-		eerev.serial[i] = console_buffer[i];
-	    eerev.serial[6] = '\0';
-	}
-
-	printf ("Enter ether node ID with leading zero (HEX): %02x%02x%02x%02x%02x%02x  ",
-	    eerev.etheraddr[0], eerev.etheraddr[1],
-	    eerev.etheraddr[2], eerev.etheraddr[3],
-	    eerev.etheraddr[4], eerev.etheraddr[5]);
-	if (12 == readline (NULL))
-	{
-	    for (i=0; i<12; i+=2)
-	    eerev.etheraddr[i>>1] = (char)(16*hex[toupper(console_buffer[i])-'0'] +
-			       hex[toupper(console_buffer[i+1])-'0']);
-	}
-
-	l = strlen ((char *)&eerev.text);
-	printf("Add to text section (max 64 chr): %s ", (char *)&eerev.text );
-	if (0 != readline (NULL))
-	{
-	    for (i = l; i<63; i++)
-		eerev.text[i] = console_buffer[i-l];
-	    eerev.text[63] = '\0';
-	}
-
-	if (strstr ((char *)&eerev.board, "75") != NULL)
-	    eltec_board = 750;
-	else
-	    eltec_board = 740;
-
-	if (eltec_board == 750)
-	{
-	    if (CPU_TYPE == CPU_TYPE_750)
-		*(int*)&eerev.res[0] = CLK2P0TO1_1MB_PB_0P5DH;
-		else
-		*(int*)&eerev.res[0] = CLK2P5TO1_1MB_PB_0P5DH;
-
-	    printf("Enter L2Cache config word with leading zero (HEX): %08X  ",
-		    *(int*)&eerev.res[0] );
-	    if (0 != readline (NULL))
-	    {
-		for (i=0; i<7; i+=2)
-		{
-		    eerev.res[i>>1] =
-		    (char)(16*hex[toupper(console_buffer[i])-'0'] +
-		    hex[toupper(console_buffer[i+1])-'0']);
-		}
-	    }
-
-	    /* prepare network eeprom */
-	    sromMII[20] = eerev.etheraddr[0];
-	    sromMII[21] = eerev.etheraddr[1];
-	    sromMII[22] = eerev.etheraddr[2];
-	    sromMII[23] = eerev.etheraddr[3];
-	    sromMII[24] = eerev.etheraddr[4];
-	    sromMII[25] = eerev.etheraddr[5];
-	    printf("\nSRom:  Writing DEC21143 MII info .. ");
-
-	    if (dc_srom_store ((u_short *)sromMII) == -1)
-		printf("FAILED\n");
-	    else
-		printf("OK\n");
-	}
-
-	if (eltec_board == 740)
-	{
-	    *(int *)&eerev.res[0] = 0;
-	    sromSYM[20] = eerev.etheraddr[0];
-	    sromSYM[21] = eerev.etheraddr[1];
-	    sromSYM[22] = eerev.etheraddr[2];
-	    sromSYM[23] = eerev.etheraddr[3];
-	    sromSYM[24] = eerev.etheraddr[4];
-	    sromSYM[25] = eerev.etheraddr[5];
-	    printf("\nSRom:  Writing DEC21143 SYM info .. ");
-
-	    if (dc_srom_store ((u_short *)sromSYM) == -1)
-		printf("FAILED\n");
-	    else
-		printf("OK\n");
-	}
-
-	/* update CRC */
-	eerev.crc = el_srom_checksum((u_char *)eerev.board, eerev.size);
-
-	/* write new values */
-	printf("\nSRom:  Writing revision info ...... ");
-	if (el_srom_store((BLOCK_SIZE-sizeof(revinfo)), (u_char *)&eerev,
-			    sizeof(revinfo), SECOND_DEVICE, FIRST_BLOCK) == -1)
-	    printf("FAILED\n\n");
-	else
-	    printf("OK\n\n");
-
-	/* write new values as shadow image to nvram */
-	nvram_write (CONFIG_SYS_NV_SROM_COPY_ADDR, (void *)&eerev, CONFIG_SYS_SROM_SIZE);
-
-    } /*if (initSrom) */
-
-    /* copy current values as shadow image to nvram */
-    if (initSrom == 0 && copyNv == 1)
-	nvram_write (CONFIG_SYS_NV_SROM_COPY_ADDR, (void *)&eerev, CONFIG_SYS_SROM_SIZE);
-
-    /* update environment */
-    sprintf (buf, "%02x:%02x:%02x:%02x:%02x:%02x",
-	    eerev.etheraddr[0], eerev.etheraddr[1],
-	    eerev.etheraddr[2], eerev.etheraddr[3],
-	    eerev.etheraddr[4], eerev.etheraddr[5]);
-    setenv ("ethaddr", buf);
-
-    /* print actual board identification */
-    printf("Ident: %s  Ser %s  Rev %c%c\n",
-	    eerev.board, (char *)&eerev.serial,
-	    eerev.revision[0][0], eerev.revision[0][1]);
-
-    /* global board ident */
-    if (strstr ((char *)&eerev.board, "75") != NULL)
-	eltec_board = 750;
-    else
-	eltec_board = 740;
-
-   /*
-    * L2 cache configuration
-    */
-#if defined(CONFIG_SYS_L2_BAB7xx)
-    ptr = getenv("l2cache");
-    if (*ptr == '0')
-    {
-	printf ("Cache: L2 NOT activated on BAB%d\n", eltec_board);
-    }
-    else
-    {
-	printf ("Cache: L2 activated on BAB%d\n", eltec_board);
-	l2_cache_enable(*(int*)&eerev.res[0]);
-    }
-#endif
-
-   /*
-    * Reconfig ata reset timeout from environment
-    */
-    if ((ptr = getenv ("ata_reset_time")) != NULL)
-    {
-	ata_reset_time = (int)simple_strtoul (ptr, NULL, 10);
-    }
-    else
-    {
-	sprintf (buf, "%d", ata_reset_time);
-	setenv ("ata_reset_time", buf);
-    }
-
-   /*
-    * Reconfig scsi reset timeout from environment
-    */
-    if ((ptr = getenv ("scsi_reset_time")) != NULL)
-    {
-	scsi_reset_time = (int)simple_strtoul (ptr, NULL, 10);
-    }
-    else
-    {
-	sprintf (buf, "%d", scsi_reset_time);
-	setenv ("scsi_reset_time", buf);
-    }
-
-
-    if ((bdf = pci_find_device(PCI_VENDOR_ID_WINBOND, PCI_DEVICE_ID_WINBOND_83C553, 0)) > 0)
-    {
-	if (pci_find_device(PCI_VENDOR_ID_NCR, PCI_DEVICE_ID_NCR_53C860, 0) > 0)
-	{
-	    /* BAB740 with SCSI=IRQ 11; SCC=IRQ 9; no IDE; NCR860 at 80 MHz */
-	    scsi_dev_id = PCI_DEVICE_ID_NCR_53C860;
-	    scsi_max_scsi_id = 7;
-	    scsi_sym53c8xx_ccf = 0x15;
-	    pci_write_config_byte (bdf, WINBOND_IDEIRCR, 0xb0);
-	}
-
-	if ((ptr = getenv ("ide_dma_off")) != NULL)
-	{
-	    u_long dma_off = simple_strtoul (ptr, NULL, 10);
-	    /*
-	    * setup user defined registers
-	    * s.a. linux/drivers/ide/sl82c105.c
-	    */
-	    bdf |= PCI_BDF(0,0,1);            /* ide user reg at bdf function 1 */
-	    if (dma_off & 1)
-	    {
-		pci_write_config_byte (bdf, 0x46, 1);
-		printf("IDE:   DMA off flag set: Bus 0 : Dev 0\n");
-	    }
-	    if (dma_off & 2)
-	    {
-		pci_write_config_byte (bdf, 0x4a, 1);
-		printf("IDE:   DMA off flag set: Bus 0 : Dev 1\n");
-	    }
-	    if (dma_off & 4)
-	    {
-		pci_write_config_byte (bdf, 0x4e, 1);
-		printf("IDE:   DMA off flag set: Bus 1 : Dev 0\n");
-	    }
-	    if (dma_off & 8)
-	    {
-		pci_write_config_byte (bdf, 0x52, 1);
-		printf("IDE:   DMA off flag set: Bus 1 : Dev 1\n");
-	    }
-	}
-    }
-    return (0);
-}
-
-/*----------------------------------------------------------------------------*/
-/*
- * BAB740 uses KENDIN KS8761 modem chip with not common setup values
- */
-#ifdef CONFIG_TULIP_SELECT_MEDIA
-
-/* Register bits.
- */
-#define BMR_SWR         0x00000001      /* Software Reset */
-#define STS_TS          0x00700000      /* Transmit Process State */
-#define STS_RS          0x000e0000      /* Receive Process State */
-#define OMR_ST          0x00002000      /* Start/Stop Transmission Command */
-#define OMR_SR          0x00000002      /* Start/Stop Receive */
-#define OMR_PS          0x00040000      /* Port Select */
-#define OMR_SDP         0x02000000      /* SD Polarity - MUST BE ASSERTED */
-#define OMR_PM          0x00000080      /* Pass All Multicast */
-#define OMR_PR          0x00000040      /* Promiscuous Mode */
-#define OMR_PCS         0x00800000      /* PCS Function */
-#define OMR_TTM         0x00400000      /* Transmit Threshold Mode */
-
-/* Ethernet chip registers.
- */
-#define DE4X5_BMR       0x000           /* Bus Mode Register */
-#define DE4X5_TPD       0x008           /* Transmit Poll Demand Reg */
-#define DE4X5_RRBA      0x018           /* RX Ring Base Address Reg */
-#define DE4X5_TRBA      0x020           /* TX Ring Base Address Reg */
-#define DE4X5_STS       0x028           /* Status Register */
-#define DE4X5_OMR       0x030           /* Operation Mode Register */
-#define DE4X5_SISR      0x060           /* SIA Status Register */
-#define DE4X5_SICR      0x068           /* SIA Connectivity Register */
-#define DE4X5_TXRX      0x070           /* SIA Transmit and Receive Register */
-#define DE4X5_GPPR      0x078           /* General Purpose Port register */
-#define DE4X5_APROM      0x048          /* Ethernet Address PROM */
-
-/*----------------------------------------------------------------------------*/
-
-static int INL(struct eth_device* dev, u_long addr)
-{
-    return le32_to_cpu(*(volatile u_long *)(addr + dev->iobase));
-}
-
-/*----------------------------------------------------------------------------*/
-
-static void OUTL(struct eth_device* dev, int command, u_long addr)
-{
-    *(volatile u_long *)(addr + dev->iobase) = cpu_to_le32(command);
-}
-
-/*----------------------------------------------------------------------------*/
-
-static void media_reg_init (
-    struct eth_device* dev,
-    u32 csr14,
-    u32 csr15_dir,
-    u32 csr15_v0,
-    u32 csr15_v1,
-    u32 csr6 )
-{
-    OUTL(dev, 0, DE4X5_OMR);            /* CSR6  */
-    udelay(10 * 1000);
-    OUTL(dev, 0, DE4X5_SICR);           /* CSR13 */
-    OUTL(dev, 1, DE4X5_SICR);           /* CSR13 */
-    udelay(10 * 1000);
-    OUTL(dev, csr14, DE4X5_TXRX);       /* CSR14 */
-    OUTL(dev, csr15_dir, DE4X5_GPPR);   /* CSR15 */
-    OUTL(dev, csr15_v0,  DE4X5_GPPR);   /* CSR15 */
-    udelay(10 * 1000);
-    OUTL(dev, csr15_v1,  DE4X5_GPPR);   /* CSR15 */
-    OUTL(dev, 0x00000301, DE4X5_SISR);  /* CSR12 */
-    OUTL(dev, csr6, DE4X5_OMR);         /* CSR6 */
-}
-
-/*----------------------------------------------------------------------------*/
-
-void dc21x4x_select_media(struct eth_device* dev)
-{
-    int i, status, ext;
-    extern unsigned int eltec_board;
-
-    if (eltec_board == 740)
-    {
-	printf("SYM media select "); /* BAB740 */
-	/* start autoneg. with 10 mbit */
-	media_reg_init (dev, 0x3ffff, 0x08af0008, 0x00a10008, 0x00a50008, 0x02400080);
-	ext = status = 0;
-	for (i=0; i<2000+ext; i++)
-	{
-	    status = INL(dev, DE4X5_SISR);
-	    udelay(1000);
-	    if (status & 0x2000) ext = 2000;
-	    if ((status & 0x7000) == 0x5000) break;
-	}
-
-	/* autoneg. ok -> 100MB FD */
-	if ((status & 0x0100f000) == 0x0100d000)
-	{
-	    media_reg_init (dev, 0x37f7f, 0x08270008, 0x00210008, 0x00250008, 0x03c40280);
-	    printf("100baseTx-FD\n");
-	}
-	/* autoneg. ok -> 100MB HD */
-	else if ((status & 0x0080f000) == 0x0080d000)
-	{
-	    media_reg_init (dev, 0x17f7f, 0x08270008, 0x00210008, 0x00250008, 0x03c40080);
-	    printf("100baseTx\n");
-	}
-	/* autoneg. ok -> 10MB FD */
-	else if ((status & 0x0040f000) == 0x0040d000)
-	{
-	    media_reg_init (dev, 0x07f7f, 0x08af0008, 0x00a10008, 0x00a50008, 0x02400280);
-	    printf("10baseT-FD\n");
-	}
-	/* autoneg. fail -> 10MB HD */
-	else
-	{
-	    media_reg_init (dev, 0x7f7f, 0x08af0008, 0x00a10008, 0x00a50008,
-			(OMR_SDP | OMR_TTM | OMR_PM));
-	    printf("10baseT\n");
-	}
-    }
-    else
-    {
-	printf("MII media selected\n");                     /* BAB750 */
-	OUTL(dev, OMR_SDP | OMR_PS | OMR_PM, DE4X5_OMR);    /* CSR6 */
-    }
-}
-#endif /* CONFIG_TULIP_SELECT_MEDIA */
-
-/*---------------------------------------------------------------------------*/
diff --git a/board/eltec/bab7xx/pci.c b/board/eltec/bab7xx/pci.c
deleted file mode 100644
index 38dd498..0000000
--- a/board/eltec/bab7xx/pci.c
+++ /dev/null
@@ -1,120 +0,0 @@
-/*
- * (C) Copyright 2002 ELTEC Elektronik AG
- * Frank Gottschling <fgottschling@eltec.de>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*
- * PCI initialisation for the MPC10x.
- */
-
-#include <common.h>
-#include <pci.h>
-#include <mpc106.h>
-
-#ifdef CONFIG_PCI
-
-struct pci_controller local_hose;
-
-void pci_init_board(void)
-{
-    struct pci_controller* hose = (struct pci_controller *)&local_hose;
-    u32 reg32;
-    u16 reg16;
-
-    hose->first_busno = 0;
-    hose->last_busno = 0xff;
-
-    pci_set_region(hose->regions + 0,
-	CONFIG_SYS_PCI_MEMORY_BUS,
-	CONFIG_SYS_PCI_MEMORY_PHYS,
-    /*
-    * Attention: pci_hose_phys_to_bus() failes in address compare,
-    * so we need (CONFIG_SYS_PCI_MEMORY_SIZE-1)
-    */
-	CONFIG_SYS_PCI_MEMORY_SIZE-1,
-	PCI_REGION_MEM | PCI_REGION_SYS_MEMORY);
-
-    /* PCI memory space */
-    pci_set_region(hose->regions + 1,
-	CONFIG_SYS_PCI_MEM_BUS,
-	CONFIG_SYS_PCI_MEM_PHYS,
-	CONFIG_SYS_PCI_MEM_SIZE,
-	PCI_REGION_MEM);
-
-    /* ISA/PCI memory space */
-    pci_set_region(hose->regions + 2,
-	CONFIG_SYS_ISA_MEM_BUS,
-	CONFIG_SYS_ISA_MEM_PHYS,
-	CONFIG_SYS_ISA_MEM_SIZE,
-	PCI_REGION_MEM);
-
-    /* PCI I/O space */
-    pci_set_region(hose->regions + 3,
-	CONFIG_SYS_PCI_IO_BUS,
-	CONFIG_SYS_PCI_IO_PHYS,
-	CONFIG_SYS_PCI_IO_SIZE,
-	PCI_REGION_IO);
-
-    /* ISA/PCI I/O space */
-    pci_set_region(hose->regions + 4,
-	CONFIG_SYS_ISA_IO_BUS,
-	CONFIG_SYS_ISA_IO_PHYS,
-	CONFIG_SYS_ISA_IO_SIZE,
-	PCI_REGION_IO);
-
-    hose->region_count = 5;
-
-    pci_setup_indirect(hose,
-	MPC106_REG_ADDR,
-	MPC106_REG_DATA);
-
-    pci_register_hose(hose);
-
-    hose->last_busno = pci_hose_scan(hose);
-
-    /* Initialises the MPC10x PCI Configuration regs. */
-    pci_read_config_dword (PCI_BDF(0,0,0), PCI_PICR2, &reg32);
-    reg32 |= PICR2_CF_SNOOP_WS(3) |
-	     PICR2_CF_FLUSH_L2 |
-	     PICR2_CF_L2_HIT_DELAY(3) |
-	     PICR2_CF_APHASE_WS(3);
-    reg32 &= ~(PICR2_L2_EN | PICR2_L2_UPDATE_EN);
-    pci_write_config_dword (PCI_BDF(0,0,0), PCI_PICR2, reg32);
-
-    pci_read_config_word (PCI_BDF(0,0,0), PCI_COMMAND, &reg16);
-    reg16 |= PCI_COMMAND_SERR | PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY;
-    pci_write_config_word(PCI_BDF(0,0,0), PCI_COMMAND, reg16);
-
-    /* Clear non-reserved bits in status register */
-    pci_write_config_word(PCI_BDF(0,0,0), PCI_STATUS, 0xffff);
-
-    pci_read_config_dword (PCI_BDF(0,0,0), PCI_PICR1, &reg32);
-    reg32 |= PICR1_CF_CBA(63) |
-	     PICR1_CF_BREAD_WS(2) |
-	     PICR1_MCP_EN |
-	     PICR1_CF_DPARK |
-	     PICR1_PROC_TYPE_604 |
-	     PICR1_CF_LOOP_SNOOP |
-	     PICR1_CF_APARK;
-    pci_write_config_dword (PCI_BDF(0,0,0), PCI_PICR1, reg32);
-}
-
-#endif /* CONFIG_PCI */
diff --git a/board/eltec/bab7xx/srom.h b/board/eltec/bab7xx/srom.h
deleted file mode 100644
index 504b742..0000000
--- a/board/eltec/bab7xx/srom.h
+++ /dev/null
@@ -1,102 +0,0 @@
-/*
- * (C) Copyright 2002 ELTEC Elektronik AG
- * Frank Gottschling <fgottschling@eltec.de>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/* common srom defs */
-#define FIRST_DEVICE            0x00
-#define SECOND_DEVICE           0x04
-#define FIRST_BLOCK             0x00
-#define SECOND_BLOCK            0x02
-#define BLOCK_SIZE              0x100
-#define ERROR                   (-1)
-
-#define CLK2P0TO1_1MB_PB_0P5DH  0x79000100
-#define CLK2P5TO1_1MB_PB_0P5DH  0x7B000100
-
-#define CPU_TYPE_740            0x08
-#define CPU_TYPE_750            0x08
-#define CPU_TYPE                ((get_pvr()>>16)&0xffff)
-
-#define ABS(x)                  ((x<0)?-x:x)
-#define SROM_SHORT(pX)          (*(u8 *)(pX) | *((u8 *)(pX)+1) << 8)
-
-/* bab7xx ELTEC srom */
-#define I2C_BUS_DAT             (CONFIG_SYS_ISA_IO + 0x220)
-#define I2C_BUS_DIR             (CONFIG_SYS_ISA_IO + 0x221)
-
-/* srom at mpc107 */
-#define MPC107_I2CADDR          (mpc107_eumb_addr + 0x3000)     /* address      */
-#define MPC107_I2CFDR           (mpc107_eumb_addr + 0x3004)     /* freq divider */
-#define MPC107_I2CCR            (mpc107_eumb_addr + 0x3008)     /* control      */
-#define MPC107_I2CSR            (mpc107_eumb_addr + 0x300c)     /* status       */
-#define MPC107_I2CDR            (mpc107_eumb_addr + 0x3010)     /* data         */
-#define MPC107_I2C_TIMEOUT      10000000
-
-/* i82559 */
-#define EE_ADDR_BITS            6
-#define EE_SIZE                 0x40                            /* 0x40 words */
-#define EE_CHECKSUM             0xBABA
-
-/* dc21143 */
-#define DEC_SROM_SIZE           128
-
-
-/*
- * structure of revision srom
- */
-typedef struct  {
-    char    magic[8];           /* 000 - Magic number */
-    char    revrev[2];          /* 008 - Revision of structure */
-    unsigned short size;        /* 00A - Size of CRC area */
-    unsigned long  crc;         /* 00C - CRC */
-    char    board[16];          /* 010 - Board Revision information */
-    char    option[4][16];      /* 020 - Option Revision information */
-    char    serial[8];          /* 060 - Board serial number */
-    char    etheraddr[6];       /* 068 - Ethernet node addresse */
-    char    reserved[2];        /* 06E - Reserved */
-    char    revision[7][2];     /* 070 - Revision codes */
-    char    category[2];        /* 07E - Category codes */
-    char    text[64];           /* 080 - Text field */
-    char    res[64];            /* 0C0 - Reserved */
-} revinfo;
-
-unsigned long el_srom_checksum (unsigned char *ptr, unsigned long size);
-int el_srom_load  (unsigned char addr, unsigned char *buf, int cnt,
-		   unsigned char device, unsigned char block);
-int el_srom_store (unsigned char addr, unsigned char *buf, int cnt,
-		   unsigned char device, unsigned char block);
-
-int mpc107_i2c_init (unsigned long eumb_addr, unsigned long divider);
-int mpc107_i2c_read_byte (unsigned char device, unsigned char block, unsigned char offset);
-int mpc107_i2c_write_byte (unsigned char device, unsigned char block,
-			   unsigned char offset, unsigned char val);
-int mpc107_srom_load (unsigned char addr, unsigned char *pBuf, int cnt,
-		      unsigned char device, unsigned char block);
-int mpc107_srom_store (unsigned char addr, unsigned char *pBuf, int cnt,
-		       unsigned char device, unsigned char block);
-
-int dc_srom_load (unsigned short *dest);
-int dc_srom_store (unsigned short *src);
-
-unsigned short eepro100_srom_checksum (unsigned short *sromdata);
-void eepro100_srom_load (unsigned short *destination);
-int  eepro100_srom_store (unsigned short *source);
diff --git a/board/esd/cpci405/cpci405.c b/board/esd/cpci405/cpci405.c
index 98a8584..41b5ba0 100644
--- a/board/esd/cpci405/cpci405.c
+++ b/board/esd/cpci405/cpci405.c
@@ -656,7 +656,6 @@
 	int i;
 	unsigned char ow_id[6];
 	char str[32];
-	unsigned char ow_crc;
 
 	/*
 	 * Clear 1-wire bit (open drain with pull-up)
@@ -675,11 +674,10 @@
 	OWReadByte(); /* skip family code ( == 0x01) */
 	for (i = 0; i < 6; i++)
 		ow_id[i] = OWReadByte();
-	ow_crc = OWReadByte(); /* read crc */
+	OWReadByte(); /* read crc */
 
-	sprintf(str, "%08X%04X",
-		*(unsigned int *)&ow_id[0],
-		*(unsigned short *)&ow_id[4]);
+	sprintf(str, "%02X%02X%02X%02X%02X%02X",
+		ow_id[0], ow_id[1], ow_id[2], ow_id[3], ow_id[4], ow_id[5]);
 	printf("Setting environment variable 'ow_id' to %s\n", str);
 	setenv("ow_id", str);
 
diff --git a/board/keymile/km83xx/km83xx.c b/board/keymile/km83xx/km83xx.c
index 17560c8..16ae2e4 100644
--- a/board/keymile/km83xx/km83xx.c
+++ b/board/keymile/km83xx/km83xx.c
@@ -217,7 +217,7 @@
 	out_be32(&im->ddr.sdram_interval, CONFIG_SYS_DDR_INTERVAL);
 	out_be32(&im->ddr.sdram_clk_cntl, CONFIG_SYS_DDR_CLK_CNTL);
 	udelay(200);
-	out_be32(&im->ddr.sdram_cfg, SDRAM_CFG_MEM_EN);
+	setbits_be32(&im->ddr.sdram_cfg, SDRAM_CFG_MEM_EN);
 
 	msize = CONFIG_SYS_DDR_SIZE << 20;
 	disable_addr_trans();
diff --git a/board/oxc/Makefile b/board/oxc/Makefile
deleted file mode 100644
index 6dc495c..0000000
--- a/board/oxc/Makefile
+++ /dev/null
@@ -1,44 +0,0 @@
-#
-# (C) Copyright 2000-2006
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB	= $(obj)lib$(BOARD).o
-
-COBJS	= $(BOARD).o flash.o
-
-SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS	:= $(addprefix $(obj),$(COBJS))
-SOBJS	:= $(addprefix $(obj),$(SOBJS))
-
-$(LIB):	$(obj).depend $(OBJS)
-	$(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
diff --git a/board/oxc/flash.c b/board/oxc/flash.c
deleted file mode 100644
index 36e0fca..0000000
--- a/board/oxc/flash.c
+++ /dev/null
@@ -1,372 +0,0 @@
-/*
- * (C) Copyright 2000
- * Marius Groeger <mgroeger@sysgo.de>
- * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
- *
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * Flash Routines for STM29W320DB/STM29W800D flash chips
- *
- *--------------------------------------------------------------------
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <mpc8xx.h>
-
-flash_info_t	flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips	*/
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-
-static ulong flash_get_size (vu_char *addr, flash_info_t *info);
-static int write_byte (flash_info_t *info, ulong dest, uchar data);
-
-/*-----------------------------------------------------------------------
- */
-
-unsigned long flash_init (void)
-{
-    unsigned long size;
-    int i;
-
-    /* Init: no FLASHes known */
-    for (i=0; i<CONFIG_SYS_MAX_FLASH_BANKS; ++i) {
-	flash_info[i].flash_id = FLASH_UNKNOWN;
-    }
-
-    /*
-     * We use the following trick here: since flash is cyclically
-     * mapped in the 0xFF800000-0xFFFFFFFF area, we detect the type
-     * and the size of flash using 0xFF800000 as the base address,
-     * and then call flash_get_size() again to fill flash_info.
-     */
-    size = flash_get_size((vu_char *)CONFIG_SYS_FLASH_PRELIMBASE, &flash_info[0]);
-    if (size)
-    {
-	flash_get_size((vu_char *)(-size), &flash_info[0]);
-    }
-
-#if (CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_PRELIMBASE)
-    /* monitor protection ON by default */
-    flash_protect(FLAG_PROTECT_SET,
-		  CONFIG_SYS_MONITOR_BASE,
-		  CONFIG_SYS_MONITOR_BASE+monitor_flash_len-1,
-		  &flash_info[0]);
-#endif
-
-#if defined(CONFIG_ENV_IS_IN_FLASH) && defined(CONFIG_ENV_ADDR)
-# ifndef  CONFIG_ENV_SIZE
-#  define CONFIG_ENV_SIZE	CONFIG_ENV_SECT_SIZE
-# endif
-    flash_protect(FLAG_PROTECT_SET,
-		  CONFIG_ENV_ADDR,
-		  CONFIG_ENV_ADDR + CONFIG_ENV_SIZE - 1,
-		  &flash_info[0]);
-#endif
-
-    return (size);
-}
-
-/*-----------------------------------------------------------------------
- */
-void flash_print_info  (flash_info_t *info)
-{
-    int i;
-
-    if (info->flash_id == FLASH_UNKNOWN) {
-	printf ("missing or unknown FLASH type\n");
-	return;
-    }
-
-    switch (info->flash_id & FLASH_VENDMASK) {
-    case FLASH_MAN_STM:
-	printf ("ST ");
-	break;
-    default:
-	printf ("Unknown Vendor ");
-	break;
-    }
-
-    switch (info->flash_id & FLASH_TYPEMASK) {
-    case FLASH_STM320DB:
-	printf ("M29W320DB (32 Mbit)\n");
-	break;
-    case FLASH_STM800DB:
-	printf ("M29W800DB (8 Mbit, bottom boot block)\n");
-	break;
-    case FLASH_STM800DT:
-	printf ("M29W800DT (8 Mbit, top boot block)\n");
-	break;
-    default:
-	printf ("Unknown Chip Type\n");
-	break;
-    }
-
-    printf ("  Size: %ld KB in %d Sectors\n",
-	    info->size >> 10, info->sector_count);
-
-    printf ("  Sector Start Addresses:");
-    for (i=0; i<info->sector_count; ++i) {
-	if ((i % 5) == 0)
-	    printf ("\n   ");
-	printf (" %08lX%s",
-		info->start[i],
-		info->protect[i] ? " (RO)" : "     "
-		);
-    }
-    printf ("\n");
-    return;
-}
-
-/*
- * The following code cannot be run from FLASH!
- */
-
-static ulong flash_get_size (vu_char *addr, flash_info_t *info)
-{
-    short i;
-    uchar vendor, devid;
-    ulong base = (ulong)addr;
-
-    /* Write auto select command: read Manufacturer ID */
-    addr[0x0AAA] = 0xAA;
-    addr[0x0555] = 0x55;
-    addr[0x0AAA] = 0x90;
-
-    udelay(1000);
-
-    vendor = addr[0];
-    devid = addr[2];
-
-    /* only support STM */
-    if ((vendor << 16) != FLASH_MAN_STM) {
-	return 0;
-    }
-
-    if (devid == FLASH_STM320DB) {
-	/* MPC8240 can address maximum 2Mb of flash, that is why the MSB
-	 * lead is grounded and we can access only 2 first Mb */
-	info->flash_id     = vendor << 16 | devid;
-	info->sector_count = 32;
-	info->size         = info->sector_count * 0x10000;
-	for (i = 0; i < info->sector_count; i++) {
-	    info->start[i] = base + i * 0x10000;
-	}
-    }
-    else if (devid == FLASH_STM800DB) {
-	info->flash_id     = vendor << 16 | devid;
-	info->sector_count = 19;
-	info->size         = 0x100000;
-	info->start[0]     = 0x0000;
-	info->start[1]     = 0x4000;
-	info->start[2]     = 0x6000;
-	info->start[3]     = 0x8000;
-	for (i = 4; i < info->sector_count; i++) {
-	    info->start[i] = base + (i-3) * 0x10000;
-	}
-    }
-    else if (devid == FLASH_STM800DT) {
-	info->flash_id     = vendor << 16 | devid;
-	info->sector_count = 19;
-	info->size         = 0x100000;
-	for (i = 0; i < info->sector_count-4; i++) {
-	    info->start[i] = base + i * 0x10000;
-	}
-	info->start[i]     = base + i * 0x10000;
-	info->start[i+1]   = base + i * 0x10000 + 0x8000;
-	info->start[i+2]   = base + i * 0x10000 + 0xa000;
-	info->start[i+3]   = base + i * 0x10000 + 0xc000;
-    }
-    else {
-	return 0;
-    }
-
-    /* mark all sectors as unprotected */
-    for (i = 0; i < info->sector_count; i++) {
-	info->protect[i] = 0;
-    }
-
-    /* Issue the reset command */
-    if (info->flash_id != FLASH_UNKNOWN) {
-	addr[0] = 0xF0;	/* reset bank */
-    }
-
-    return (info->size);
-}
-
-
-/*-----------------------------------------------------------------------
- */
-
-int	flash_erase (flash_info_t *info, int s_first, int s_last)
-{
-    vu_char *addr = (vu_char *)(info->start[0]);
-    int flag, prot, sect, l_sect;
-    ulong start, now, last;
-
-    if ((s_first < 0) || (s_first > s_last)) {
-	if (info->flash_id == FLASH_UNKNOWN) {
-	    printf ("- missing\n");
-	} else {
-	    printf ("- no sectors to erase\n");
-	}
-	return 1;
-    }
-
-    prot = 0;
-    for (sect = s_first; sect <= s_last; sect++) {
-	if (info->protect[sect]) {
-	    prot++;
-	}
-    }
-
-    if (prot) {
-	printf ("- Warning: %d protected sectors will not be erased!\n",
-		prot);
-    } else {
-	printf ("\n");
-    }
-
-    l_sect = -1;
-
-    /* Disable interrupts which might cause a timeout here */
-    flag = disable_interrupts();
-
-    addr[0x0AAA] = 0xAA;
-    addr[0x0555] = 0x55;
-    addr[0x0AAA] = 0x80;
-    addr[0x0AAA] = 0xAA;
-    addr[0x0555] = 0x55;
-
-    /* wait at least 80us - let's wait 1 ms */
-    udelay (1000);
-
-    /* Start erase on unprotected sectors */
-    for (sect = s_first; sect<=s_last; sect++) {
-	if (info->protect[sect] == 0) {	/* not protected */
-	    addr = (vu_char *)(info->start[sect]);
-	    addr[0] = 0x30;
-	    l_sect = sect;
-	}
-    }
-
-    /* re-enable interrupts if necessary */
-    if (flag)
-      enable_interrupts();
-
-    /* wait at least 80us - let's wait 1 ms */
-    udelay (1000);
-
-    /*
-     * We wait for the last triggered sector
-     */
-    if (l_sect < 0)
-      goto DONE;
-
-    start = get_timer (0);
-    last  = start;
-    addr = (vu_char *)(info->start[l_sect]);
-    while ((addr[0] & 0x80) != 0x80) {
-	if ((now = get_timer(start)) > CONFIG_SYS_FLASH_ERASE_TOUT) {
-	    printf ("Timeout\n");
-	    return 1;
-	}
-	/* show that we're waiting */
-	if ((now - last) > 1000) {	/* every second */
-	    serial_putc ('.');
-	    last = now;
-	}
-    }
-
-    DONE:
-    /* reset to read mode */
-    addr = (volatile unsigned char *)info->start[0];
-    addr[0] = 0xF0;	/* reset bank */
-
-    printf (" done\n");
-    return 0;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-
-int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
-{
-    int rc;
-
-    while (cnt > 0) {
-	if ((rc = write_byte(info, addr, *src)) != 0) {
-	    return (rc);
-	}
-	addr++;
-	src++;
-	cnt--;
-    }
-
-    return (0);
-}
-
-/*-----------------------------------------------------------------------
- * Write a byte to Flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int write_byte (flash_info_t *info, ulong dest, uchar data)
-{
-    vu_char *addr = (vu_char *)(info->start[0]);
-    ulong start;
-    int flag;
-
-    /* Check if Flash is (sufficiently) erased */
-    if ((*((vu_char *)dest) & data) != data) {
-	return (2);
-    }
-    /* Disable interrupts which might cause a timeout here */
-    flag = disable_interrupts();
-
-    addr[0x0AAA] = 0xAA;
-    addr[0x0555] = 0x55;
-    addr[0x0AAA] = 0xA0;
-
-    *((vu_char *)dest) = data;
-
-    /* re-enable interrupts if necessary */
-    if (flag)
-      enable_interrupts();
-
-    /* data polling for D7 */
-    start = get_timer (0);
-    while ((*((vu_char *)dest) & 0x80) != (data & 0x80)) {
-	if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) {
-	    return (1);
-	}
-    }
-    return (0);
-}
-
-/*-----------------------------------------------------------------------
- */
diff --git a/board/oxc/oxc.c b/board/oxc/oxc.c
deleted file mode 100644
index 1a2bdf4..0000000
--- a/board/oxc/oxc.c
+++ /dev/null
@@ -1,223 +0,0 @@
-/*
- * (C) Copyright 2000
- * Rob Taylor, Flying Pig Systems. robt@flyingpig.com.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <mpc824x.h>
-#include <pci.h>
-#include <i2c.h>
-#include <netdev.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-int checkboard (void)
-{
-	puts (	"Board: OXC8240\n" );
-	return 0;
-}
-
-phys_size_t initdram (int board_type)
-{
-#ifndef CONFIG_SYS_RAMBOOT
-	long size;
-	long new_bank0_end;
-	long mear1;
-	long emear1;
-
-	size = get_ram_size(CONFIG_SYS_SDRAM_BASE, CONFIG_SYS_MAX_RAM_SIZE);
-
-	new_bank0_end = size - 1;
-	mear1 = mpc824x_mpc107_getreg(MEAR1);
-	emear1 = mpc824x_mpc107_getreg(EMEAR1);
-	mear1 = (mear1  & 0xFFFFFF00) |
-		((new_bank0_end & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT);
-	emear1 = (emear1 & 0xFFFFFF00) |
-		((new_bank0_end & MICR_ADDR_MASK) >> MICR_EADDR_SHIFT);
-	mpc824x_mpc107_setreg(MEAR1, mear1);
-	mpc824x_mpc107_setreg(EMEAR1, emear1);
-
-	return (size);
-#else
-	/* if U-Boot starts from RAM, then suppose we have 16Mb of RAM */
-	return (16 << 20);
-#endif
-}
-
-/*
- * Initialize PCI Devices, report devices found.
- */
-#ifndef CONFIG_PCI_PNP
-static struct pci_config_table pci_oxc_config_table[] = {
-	{ PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 0x14, PCI_ANY_ID,
-	  pci_cfgfunc_config_device, { PCI_ENET0_IOADDR,
-				       PCI_ENET0_MEMADDR,
-				       PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER }},
-	{ PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 0x15, PCI_ANY_ID,
-	  pci_cfgfunc_config_device, { PCI_ENET1_IOADDR,
-				       PCI_ENET1_MEMADDR,
-				       PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER }},
-	{ }
-};
-#endif
-
-static struct pci_controller hose = {
-#ifndef CONFIG_PCI_PNP
-	config_table: pci_oxc_config_table,
-#endif
-};
-
-void pci_init_board (void)
-{
-	pci_mpc824x_init(&hose);
-}
-
-int board_early_init_f (void)
-{
-	*(volatile unsigned char *)(CONFIG_SYS_CPLD_RESET) = 0x89;
-	return 0;
-}
-
-#ifdef CONFIG_WATCHDOG
-void oxc_wdt_reset(void)
-{
-	*(volatile unsigned char *)(CONFIG_SYS_CPLD_WATCHDOG) = 0xff;
-}
-
-void watchdog_reset(void)
-{
-	int re_enable = disable_interrupts();
-
-	oxc_wdt_reset();
-	if (re_enable)
-		enable_interrupts();
-}
-#endif
-
-static int oxc_get_expander(unsigned char addr, unsigned char * val)
-{
-	return i2c_read(addr, 0, 0, val, 1);
-}
-
-static int oxc_set_expander(unsigned char addr, unsigned char val)
-{
-	return i2c_write(addr, 0, 0, &val, 1);
-}
-
-static int expander0alive = 0;
-
-#ifdef CONFIG_SHOW_ACTIVITY
-static int ledtoggle = 0;
-static int ledstatus = 1;
-
-void oxc_toggle_activeled(void)
-{
-	ledtoggle++;
-}
-
-void board_show_activity (ulong timestamp)
-{
-	if ((timestamp % (CONFIG_SYS_HZ / 10)) == 0)
-		oxc_toggle_activeled ();
-}
-
-void show_activity(int arg)
-{
-	static unsigned char led = 0;
-	unsigned char val;
-
-	if (!expander0alive) return;
-
-	if ((ledtoggle > (2 * arg)) && ledstatus) {
-		led ^= 0x80;
-		oxc_get_expander(CONFIG_SYS_I2C_EXPANDER0_ADDR, &val);
-		udelay(200);
-		oxc_set_expander(CONFIG_SYS_I2C_EXPANDER0_ADDR, (val & 0x7F) | led);
-		ledtoggle = 0;
-	}
-}
-#endif
-
-#ifdef CONFIG_SHOW_BOOT_PROGRESS
-void show_boot_progress(int arg)
-{
-	unsigned char val;
-
-	if (!expander0alive) return;
-
-	if (arg > 0 && ledstatus) {
-		ledstatus = 0;
-		oxc_get_expander(CONFIG_SYS_I2C_EXPANDER0_ADDR, &val);
-		udelay(200);
-		oxc_set_expander(CONFIG_SYS_I2C_EXPANDER0_ADDR, val | 0x80);
-	} else if (arg < 0) {
-		oxc_get_expander(CONFIG_SYS_I2C_EXPANDER0_ADDR, &val);
-		udelay(200);
-		oxc_set_expander(CONFIG_SYS_I2C_EXPANDER0_ADDR, val & 0x7F);
-		ledstatus = 1;
-	}
-}
-#endif
-
-int misc_init_r (void)
-{
-	/* check whether the i2c expander #0 is accessible */
-	if (!oxc_set_expander(CONFIG_SYS_I2C_EXPANDER0_ADDR, 0x7F)) {
-		udelay(200);
-		expander0alive = 1;
-	}
-
-#ifdef CONFIG_SYS_OXC_GENERATE_IP
-	{
-		char str[32];
-		unsigned long ip = CONFIG_SYS_OXC_IPMASK;
-		bd_t *bd = gd->bd;
-
-		if (expander0alive) {
-			unsigned char val;
-
-			if (!oxc_get_expander(CONFIG_SYS_I2C_EXPANDER0_ADDR, &val)) {
-				ip = (ip & 0xffffff00) | ((val & 0x7c) >> 2);
-			}
-		}
-
-		if ((ip & 0xff) < 3) {
-			/* if fail, set x.x.x.254 */
-			ip = (ip & 0xffffff00) | 0xfe;
-		}
-
-		bd->bi_ip_addr = ip;
-		sprintf(str, "%ld.%ld.%ld.%ld",
-			(bd->bi_ip_addr & 0xff000000) >> 24,
-			(bd->bi_ip_addr & 0x00ff0000) >> 16,
-			(bd->bi_ip_addr & 0x0000ff00) >> 8,
-			(bd->bi_ip_addr & 0x000000ff));
-		setenv("ipaddr", str);
-		printf("ip:    %s\n", str);
-	}
-#endif
-	return (0);
-}
-
-int board_eth_init(bd_t *bis)
-{
-	return pci_eth_init(bis);
-}
diff --git a/board/rmu/Makefile b/board/rmu/Makefile
deleted file mode 100644
index 6dc495c..0000000
--- a/board/rmu/Makefile
+++ /dev/null
@@ -1,44 +0,0 @@
-#
-# (C) Copyright 2000-2006
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB	= $(obj)lib$(BOARD).o
-
-COBJS	= $(BOARD).o flash.o
-
-SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS	:= $(addprefix $(obj),$(COBJS))
-SOBJS	:= $(addprefix $(obj),$(SOBJS))
-
-$(LIB):	$(obj).depend $(OBJS)
-	$(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
diff --git a/board/rmu/flash.c b/board/rmu/flash.c
deleted file mode 100644
index 283b19d..0000000
--- a/board/rmu/flash.c
+++ /dev/null
@@ -1,540 +0,0 @@
-/*
- * (C) Copyright 2000-2004
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/* #define DEBUG */
-
-#include <common.h>
-#include <mpc8xx.h>
-
-flash_info_t	flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips	*/
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-static ulong flash_get_size (vu_long *addr, flash_info_t *info);
-static int write_word (flash_info_t *info, ulong dest, ulong data);
-static void flash_get_offsets (ulong base, flash_info_t *info);
-
-/*-----------------------------------------------------------------------
- */
-
-unsigned long flash_init (void)
-{
-	volatile immap_t     *immap  = (immap_t *)CONFIG_SYS_IMMR;
-	volatile memctl8xx_t *memctl = &immap->im_memctl;
-	unsigned long size_b0 ;
-	int i;
-
-	/* Init: no FLASHes known */
-	for (i=0; i<CONFIG_SYS_MAX_FLASH_BANKS; ++i) {
-		flash_info[i].flash_id = FLASH_UNKNOWN;
-	}
-
-	/* Static FLASH Bank configuration here - FIXME XXX */
-
-	debug ("\n## Get flash bank size @ 0x%08x\n", FLASH_BASE_PRELIM);
-
-	size_b0 = flash_get_size((vu_long *)FLASH_BASE_PRELIM, &flash_info[0]);
-	if (flash_info[0].flash_id == FLASH_UNKNOWN) {
-		printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
-			size_b0, size_b0<<20);
-	}
-
-	debug  ("## Before remap:  BR0: 0x%08x    OR0: 0x%08x\n",
-		memctl->memc_br0, memctl->memc_or0);
-
-	/* Remap FLASH according to real size */
-	memctl->memc_or0 = CONFIG_SYS_OR_TIMING_FLASH | (-size_b0 & 0xFFFF8000);
-	memctl->memc_br0 = (CONFIG_SYS_FLASH_BASE & BR_BA_MSK) | BR_MS_GPCM | BR_V;
-
-	debug ("## BR0: 0x%08x    OR0: 0x%08x\n",
-		memctl->memc_br0, memctl->memc_or0);
-
-	/* Re-do sizing to get full correct info */
-
-	size_b0 = flash_get_size((vu_long *)CONFIG_SYS_FLASH_BASE, &flash_info[0]);
-	flash_get_offsets (CONFIG_SYS_FLASH_BASE, &flash_info[0]);
-
-	/* monitor protection ON by default */
-	flash_protect(FLAG_PROTECT_SET,
-		      CONFIG_SYS_MONITOR_BASE,
-		      CONFIG_SYS_MONITOR_BASE+monitor_flash_len-1,
-		      &flash_info[0]);
-
-#ifdef	CONFIG_ENV_IS_IN_FLASH
-	/* ENV protection ON by default */
-	flash_protect(FLAG_PROTECT_SET,
-		      CONFIG_ENV_ADDR,
-		      CONFIG_ENV_ADDR+CONFIG_ENV_SECT_SIZE-1,
-		      &flash_info[0]);
-#endif
-
-#if defined(CONFIG_ENV_ADDR_REDUND) || defined(CONFIG_ENV_OFFSET_REDUND)
-	debug ("Protect redundand environment: %08lx ... %08lx\n",
-		(ulong)CONFIG_ENV_ADDR_REDUND,
-		(ulong)CONFIG_ENV_ADDR_REDUND + CONFIG_ENV_SECT_SIZE - 1);
-
-	flash_protect(FLAG_PROTECT_SET,
-		      CONFIG_ENV_ADDR_REDUND,
-		      CONFIG_ENV_ADDR_REDUND + CONFIG_ENV_SECT_SIZE - 1,
-		      &flash_info[0]);
-#endif
-
-	flash_info[0].size = size_b0;
-
-	debug ("## Final Flash bank size: %08lx\n", size_b0);
-
-	return (size_b0);
-}
-
-/*-----------------------------------------------------------------------
- */
-static void flash_get_offsets (ulong base, flash_info_t *info)
-{
-	int i;
-
-	/* set up sector start address table */
-	if (info->flash_id & FLASH_BTYPE) {
-		/* set sector offsets for bottom boot block type	*/
-		info->start[0] = base + 0x00000000;
-		info->start[1] = base + 0x00010000;
-		info->start[2] = base + 0x00018000;
-		info->start[3] = base + 0x00020000;
-		for (i = 4; i < info->sector_count; i++) {
-			info->start[i] = base + ((i-3) * 0x00040000) ;
-		}
-	} else {
-		/* set sector offsets for top boot block type		*/
-		i = info->sector_count - 1;
-		info->start[i--] = base + info->size - 0x00010000;
-		info->start[i--] = base + info->size - 0x00018000;
-		info->start[i--] = base + info->size - 0x00020000;
-		for (; i >= 0; i--) {
-			info->start[i] = base + i * 0x00040000;
-		}
-	}
-
-}
-
-/*-----------------------------------------------------------------------
- */
-void flash_print_info  (flash_info_t *info)
-{
-	int i;
-
-	if (info->flash_id == FLASH_UNKNOWN) {
-		printf ("missing or unknown FLASH type\n");
-		return;
-	}
-
-	switch (info->flash_id & FLASH_VENDMASK) {
-	case FLASH_MAN_AMD:	printf ("AMD ");		break;
-	case FLASH_MAN_FUJ:	printf ("FUJITSU ");		break;
-	default:		printf ("Unknown Vendor ");	break;
-	}
-
-	switch (info->flash_id & FLASH_TYPEMASK) {
-	case FLASH_AM400B:	printf ("AM29LV400B (4 Mbit, bottom boot sect)\n");
-				break;
-	case FLASH_AM400T:	printf ("AM29LV400T (4 Mbit, top boot sector)\n");
-				break;
-	case FLASH_AM800B:	printf ("AM29LV800B (8 Mbit, bottom boot sect)\n");
-				break;
-	case FLASH_AM800T:	printf ("AM29LV800T (8 Mbit, top boot sector)\n");
-				break;
-	case FLASH_AM160B:	printf ("AM29LV160B (16 Mbit, bottom boot sect)\n");
-				break;
-	case FLASH_AM160T:	printf ("AM29LV160T (16 Mbit, top boot sector)\n");
-				break;
-	case FLASH_AM320B:	printf ("AM29LV320B (32 Mbit, bottom boot sect)\n");
-				break;
-	case FLASH_AM320T:	printf ("AM29LV320T (32 Mbit, top boot sector)\n");
-				break;
-	default:		printf ("Unknown Chip Type\n");
-				break;
-	}
-
-	printf ("  Size: %ld MB in %d Sectors\n",
-		info->size >> 20, info->sector_count);
-
-	printf ("  Sector Start Addresses:");
-	for (i=0; i<info->sector_count; ++i) {
-		if ((i % 5) == 0)
-			printf ("\n   ");
-		printf (" %08lX%s",
-			info->start[i],
-			info->protect[i] ? " (RO)" : "     "
-		);
-	}
-	printf ("\n");
-	return;
-}
-
-/*-----------------------------------------------------------------------
- */
-
-
-/*-----------------------------------------------------------------------
- */
-
-/*
- * The following code cannot be run from FLASH!
- */
-
-static ulong flash_get_size (vu_long *addr, flash_info_t *info)
-{
-	short i;
-	ulong value;
-	ulong base = (ulong)addr;
-
-	/* Write auto select command: read Manufacturer ID */
-	addr[0xAAA] = 0xAAAAAAAA ;
-	addr[0x555] = 0x55555555 ;
-	addr[0xAAA] = 0x90909090 ;
-
-	value = addr[0] ;
-
-	debug ("Manuf. ID @ 0x%08lx: 0x%08lx\n", (ulong)addr, value);
-
-	switch (value & 0x00FF00FF) {
-	case AMD_MANUFACT:
-		info->flash_id = FLASH_MAN_AMD;
-		break;
-	case FUJ_MANUFACT:
-		info->flash_id = FLASH_MAN_FUJ;
-		break;
-	default:
-		info->flash_id = FLASH_UNKNOWN;
-		info->sector_count = 0;
-		info->size = 0;
-		return (0);			/* no or unknown flash	*/
-	}
-
-	value = addr[2] ;		/* device ID		*/
-
-	debug ("Device ID @ 0x%08lx: 0x%08lx\n", (ulong)(&addr[1]), value);
-
-	switch (value & 0x00FF00FF) {
-	case (AMD_ID_LV400T & 0x00FF00FF):
-		info->flash_id += FLASH_AM400T;
-		info->sector_count = 11;
-		info->size = 0x00100000;
-		break;				/* => 1 MB		*/
-
-	case (AMD_ID_LV400B & 0x00FF00FF):
-		info->flash_id += FLASH_AM400B;
-		info->sector_count = 11;
-		info->size = 0x00100000;
-		break;				/* => 1 MB		*/
-
-	case (AMD_ID_LV800T & 0x00FF00FF):
-		info->flash_id += FLASH_AM800T;
-		info->sector_count = 19;
-		info->size = 0x00200000;
-		break;				/* => 2 MB		*/
-
-	case (AMD_ID_LV800B & 0x00FF00FF):
-		info->flash_id += FLASH_AM800B;
-		info->sector_count = 19;
-		info->size = 0x00400000;	/*%%% Size doubled by yooth */
-		break;				/* => 4 MB		*/
-
-	case (AMD_ID_LV160T & 0x00FF00FF):
-		info->flash_id += FLASH_AM160T;
-		info->sector_count = 35;
-		info->size = 0x00400000;
-		break;				/* => 4 MB		*/
-
-	case (AMD_ID_LV160B & 0x00FF00FF):
-		info->flash_id += FLASH_AM160B;
-		info->sector_count = 35;
-		info->size = 0x00800000;
-		break;				/* => 8 MB		*/
-	case (AMD_ID_LV320T & 0x00FF00FF):
-		info->flash_id += FLASH_AM320T;
-		info->sector_count = 67;
-		info->size = 0x00800000;
-		break;				/* => 8 MB		*/
-
-	case (AMD_ID_LV320B & 0x00FF00FF):
-		info->flash_id += FLASH_AM320B;
-		info->sector_count = 67;
-		info->size = 0x01000000;
-		break;				/* => 16 MB		*/
-	default:
-		info->flash_id = FLASH_UNKNOWN;
-		return (0);			/* => no or unknown flash */
-
-	}
-	/* set up sector start address table */
-	if (info->flash_id & FLASH_BTYPE) {
-		/* set sector offsets for bottom boot block type	*/
-		info->start[0] = base + 0x00000000;
-		info->start[1] = base + 0x00010000;
-		info->start[2] = base + 0x00018000;
-		info->start[3] = base + 0x00020000;
-		for (i = 4; i < info->sector_count; i++) {
-			info->start[i] = base + ((i-3) * 0x00040000) ;
-		}
-	} else {
-		/* set sector offsets for top boot block type		*/
-		i = info->sector_count - 1;
-		info->start[i--] = base + info->size - 0x00010000;
-		info->start[i--] = base + info->size - 0x00018000;
-		info->start[i--] = base + info->size - 0x00020000;
-		for (; i >= 0; i--) {
-			info->start[i] = base + i * 0x00040000;
-		}
-	}
-
-	/* check for protected sectors */
-	for (i = 0; i < info->sector_count; i++) {
-		/* read sector protection at sector address, (A7 .. A0) = 0x02 */
-		/* D0 = 1 if protected */
-		addr = (volatile unsigned long *)(info->start[i]);
-		info->protect[i] = addr[4] & 1 ;
-	}
-
-	/*
-	 * Prevent writes to uninitialized FLASH.
-	 */
-	if (info->flash_id != FLASH_UNKNOWN) {
-		addr = (volatile unsigned long *)info->start[0];
-
-		*addr = 0xF0F0F0F0;	/* reset bank */
-	}
-
-	return (info->size);
-}
-
-
-/*-----------------------------------------------------------------------
- */
-
-int	flash_erase (flash_info_t *info, int s_first, int s_last)
-{
-	vu_long *addr = (vu_long*)(info->start[0]);
-	int flag, prot, sect, l_sect;
-	ulong start, now, last;
-
-	debug ("flash_erase: first: %d last: %d\n", s_first, s_last);
-
-	if ((s_first < 0) || (s_first > s_last)) {
-		if (info->flash_id == FLASH_UNKNOWN) {
-			printf ("- missing\n");
-		} else {
-			printf ("- no sectors to erase\n");
-		}
-		return 1;
-	}
-
-	if ((info->flash_id == FLASH_UNKNOWN) ||
-	    (info->flash_id > FLASH_AMD_COMP)) {
-		printf ("Can't erase unknown flash type %08lx - aborted\n",
-			info->flash_id);
-		return 1;
-	}
-
-	prot = 0;
-	for (sect=s_first; sect<=s_last; ++sect) {
-		if (info->protect[sect]) {
-			prot++;
-		}
-	}
-
-	if (prot) {
-		printf ("- Warning: %d protected sectors will not be erased!\n",
-			prot);
-	} else {
-		printf ("\n");
-	}
-
-	l_sect = -1;
-
-	/* Disable interrupts which might cause a timeout here */
-	flag = disable_interrupts();
-
-	addr[0xAAA] = 0xAAAAAAAA;
-	addr[0x555] = 0x55555555;
-	addr[0xAAA] = 0x80808080;
-	addr[0xAAA] = 0xAAAAAAAA;
-	addr[0x555] = 0x55555555;
-
-	/* Start erase on unprotected sectors */
-	for (sect = s_first; sect<=s_last; sect++) {
-		if (info->protect[sect] == 0) {	/* not protected */
-			addr = (vu_long *)(info->start[sect]) ;
-			addr[0] = 0x30303030 ;
-			l_sect = sect;
-		}
-	}
-
-	/* re-enable interrupts if necessary */
-	if (flag)
-		enable_interrupts();
-
-	/* wait at least 80us - let's wait 1 ms */
-	udelay (1000);
-
-	/*
-	 * We wait for the last triggered sector
-	 */
-	if (l_sect < 0)
-		goto DONE;
-
-	start = get_timer (0);
-	last  = start;
-	addr = (vu_long *)(info->start[l_sect]);
-	while ((addr[0] & 0x80808080) != 0x80808080) {
-		if ((now = get_timer(start)) > CONFIG_SYS_FLASH_ERASE_TOUT) {
-			printf ("Timeout\n");
-			return 1;
-		}
-		/* show that we're waiting */
-		if ((now - last) > 1000) {	/* every second */
-			putc ('.');
-			last = now;
-		}
-	}
-
-DONE:
-	/* reset to read mode */
-	addr = (vu_long *)info->start[0];
-	addr[0] = 0xF0F0F0F0;	/* reset bank */
-
-	printf (" done\n");
-	return 0;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-
-int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
-{
-	ulong cp, wp, data;
-	int i, l, rc;
-
-	wp = (addr & ~3);	/* get lower word aligned address */
-
-	/*
-	 * handle unaligned start bytes
-	 */
-	if ((l = addr - wp) != 0) {
-		data = 0;
-		for (i=0, cp=wp; i<l; ++i, ++cp) {
-			data = (data << 8) | (*(uchar *)cp);
-		}
-		for (; i<4 && cnt>0; ++i) {
-			data = (data << 8) | *src++;
-			--cnt;
-			++cp;
-		}
-		for (; cnt==0 && i<4; ++i, ++cp) {
-			data = (data << 8) | (*(uchar *)cp);
-		}
-
-		if ((rc = write_word(info, wp, data)) != 0) {
-			return (rc);
-		}
-		wp += 4;
-	}
-
-	/*
-	 * handle word aligned part
-	 */
-	while (cnt >= 4) {
-		data = 0;
-		for (i=0; i<4; ++i) {
-			data = (data << 8) | *src++;
-		}
-		if ((rc = write_word(info, wp, data)) != 0) {
-			return (rc);
-		}
-		wp  += 4;
-		cnt -= 4;
-	}
-
-	if (cnt == 0) {
-		return (0);
-	}
-
-	/*
-	 * handle unaligned tail bytes
-	 */
-	data = 0;
-	for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) {
-		data = (data << 8) | *src++;
-		--cnt;
-	}
-	for (; i<4; ++i, ++cp) {
-		data = (data << 8) | (*(uchar *)cp);
-	}
-
-	return (write_word(info, wp, data));
-}
-
-/*-----------------------------------------------------------------------
- * Write a word to Flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int write_word (flash_info_t *info, ulong dest, ulong data)
-{
-	vu_long *addr = (vu_long *)(info->start[0]);
-	ulong start;
-	int flag;
-
-	/* Check if Flash is (sufficiently) erased */
-	if ((*((vu_long *)dest) & data) != data) {
-		return (2);
-	}
-	/* Disable interrupts which might cause a timeout here */
-	flag = disable_interrupts();
-
-	addr[0xAAA] = 0xAAAAAAAA;
-	addr[0x555] = 0x55555555;
-	addr[0xAAA] = 0xA0A0A0A0;
-
-	*((vu_long *)dest) = data;
-
-	/* re-enable interrupts if necessary */
-	if (flag)
-		enable_interrupts();
-
-	/* data polling for D7 */
-	start = get_timer (0);
-	while ((*((vu_long *)dest) & 0x80808080) != (data & 0x80808080)) {
-		if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) {
-			return (1);
-		}
-	}
-	return (0);
-}
-
-/*-----------------------------------------------------------------------
- */
diff --git a/board/rmu/rmu.c b/board/rmu/rmu.c
deleted file mode 100644
index cd02b9c..0000000
--- a/board/rmu/rmu.c
+++ /dev/null
@@ -1,162 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-
-#include <common.h>
-#include <mpc8xx.h>
-
-/* ------------------------------------------------------------------------- */
-
-static long int dram_size (long int, long int *, long int);
-
-/* ------------------------------------------------------------------------- */
-
-#define	_NOT_USED_	0xFFFFCC25
-
-const uint sdram_table[] =
-{
-	/*
-	 * Single Read. (Offset 00h in UPMA RAM)
-	 */
-	0x0F03CC04, 0x00ACCC24, 0x1FF74C20, _NOT_USED_,
-	_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
-
-	/*
-	 * Burst Read. (Offset 08h in UPMA RAM)
-	 */
-	0x0F03CC04, 0x00ACCC24, 0x00FFCC20, 0x00FFCC20,
-	0x01FFCC20, 0x1FF74C20, _NOT_USED_, _NOT_USED_,
-	_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
-	_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
-
-	/*
-	 * Single Write. (Offset 18h in UPMA RAM)
-	 */
-	0x0F03CC02, 0x00AC0C24, 0x1FF74C25, _NOT_USED_,
-	_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
-
-	/*
-	 * Burst Write. (Offset 20h in UPMA RAM)
-	 */
-	0x0F03CC00, 0x00AC0C20, 0x00FFFC20, 0x00FFFC22,
-	0x01FFFC24, 0x1FF74C25, _NOT_USED_, _NOT_USED_,
-	_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
-	_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
-
-	/*
-	 * Refresh. (Offset 30h in UPMA RAM)
-	 * (Initialization code at 0x36)
-	 */
-	0x0FF0CC24, 0xFFFFCC24, _NOT_USED_, _NOT_USED_,
-	_NOT_USED_, _NOT_USED_, 0xEFFB8C34, 0x0FF74C34,
-	0x0FFACCB4, 0x0FF5CC34, 0x0FFFCC34, 0x0FFFCCB4,
-
-	/*
-	 * Exception. (Offset 3Ch in UPMA RAM)
-	 */
-	0x0FEA8C34, 0x1FB54C34, 0xFFFFCC34, _NOT_USED_
-};
-
-/* ------------------------------------------------------------------------- */
-
-
-/*
- * Check Board Identity:
- */
-
-int checkboard (void)
-{
-	puts ("Board: RMU\n") ;
-	return (0) ;
-}
-
-/* ------------------------------------------------------------------------- */
-
-phys_size_t initdram (int board_type)
-{
-	volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
-	volatile memctl8xx_t *memctl = &immap->im_memctl;
-	long int size9;
-
-	upmconfig (UPMA, (uint *) sdram_table,
-		   sizeof (sdram_table) / sizeof (uint));
-
-	/* Refresh clock prescalar */
-	memctl->memc_mptpr = CONFIG_SYS_MPTPR;
-
-	memctl->memc_mar = 0x00000088;
-
-	/* Map controller banks 1 to the SDRAM bank */
-	memctl->memc_or1 = CONFIG_SYS_OR1_PRELIM;
-	memctl->memc_br1 = CONFIG_SYS_BR1_PRELIM;
-
-	memctl->memc_mamr = CONFIG_SYS_MAMR_9COL & (~(MAMR_PTAE));	/* no refresh yet */
-
-	udelay (200);
-
-	/* perform SDRAM initializsation sequence */
-
-	memctl->memc_mcr = 0x80002136;	/* SDRAM bank 0 */
-	udelay (1);
-
-	memctl->memc_mamr |= MAMR_PTAE;	/* enable refresh */
-
-	udelay (1000);
-
-	/* Check Bank 0 Memory Size,
-	 * 9 column mode
-	 */
-
-	size9 = dram_size (CONFIG_SYS_MAMR_9COL, (long *) SDRAM_BASE_PRELIM,
-			   SDRAM_MAX_SIZE);
-
-	/*
-	 * Final mapping:
-	 */
-
-	memctl->memc_or1 = ((-size9) & 0xFFFF0000) | CONFIG_SYS_OR_TIMING_SDRAM;
-	udelay (1000);
-
-	return (size9);
-}
-
-/* ------------------------------------------------------------------------- */
-
-/*
- * Check memory range for valid RAM. A simple memory test determines
- * the actually available RAM size between addresses `base' and
- * `base + maxsize'. Some (not all) hardware errors are detected:
- * - short between address lines
- * - short between data lines
- */
-
-static long int dram_size (long int mamr_value, long int *base,
-			   long int maxsize)
-{
-	volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
-	volatile memctl8xx_t *memctl = &immap->im_memctl;
-
-	memctl->memc_mamr = mamr_value;
-
-	return (get_ram_size(base, maxsize));
-}
diff --git a/board/rmu/u-boot.lds b/board/rmu/u-boot.lds
deleted file mode 100644
index d0b60cf..0000000
--- a/board/rmu/u-boot.lds
+++ /dev/null
@@ -1,96 +0,0 @@
-/*
- * (C) Copyright 2000-2010
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-
-SECTIONS
-{
-  /* Read-only sections, merged into text segment: */
-  . = + SIZEOF_HEADERS;
-  .text      :
-  {
-    arch/powerpc/cpu/mpc8xx/start.o	(.text*)
-    arch/powerpc/cpu/mpc8xx/traps.o	(.text*)
-
-    *(.text*)
-  }
-  _etext = .;
-  PROVIDE (etext = .);
-  .rodata    :
-  {
-    *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
-  }
-
-  /* Read-write section, merged into data segment: */
-  . = (. + 0x00FF) & 0xFFFFFF00;
-  _erotext = .;
-  PROVIDE (erotext = .);
-  .reloc   :
-  {
-    _GOT2_TABLE_ = .;
-    KEEP(*(.got2))
-    KEEP(*(.got))
-    PROVIDE(_GLOBAL_OFFSET_TABLE_ = . + 4);
-    _FIXUP_TABLE_ = .;
-    KEEP(*(.fixup))
-  }
-  __got2_entries = ((_GLOBAL_OFFSET_TABLE_ - _GOT2_TABLE_) >> 2) - 1;
-  __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
-  .data    :
-  {
-    *(.data*)
-    *(.sdata*)
-  }
-  _edata  =  .;
-  PROVIDE (edata = .);
-
-  . = .;
-  __u_boot_cmd_start = .;
-  .u_boot_cmd : { *(.u_boot_cmd) }
-  __u_boot_cmd_end = .;
-
-
-  . = .;
-  __start___ex_table = .;
-  __ex_table : { *(__ex_table) }
-  __stop___ex_table = .;
-
-  . = ALIGN(256);
-  __init_begin = .;
-  .text.init : { *(.text.init) }
-  .data.init : { *(.data.init) }
-  . = ALIGN(256);
-  __init_end = .;
-
-  __bss_start = .;
-  .bss (NOLOAD)       :
-  {
-   *(.bss*)
-   *(.sbss*)
-   *(COMMON)
-   . = ALIGN(4);
-  }
-  __bss_end__ = . ;
-  PROVIDE (end = .);
-}
diff --git a/board/rmu/u-boot.lds.debug b/board/rmu/u-boot.lds.debug
deleted file mode 100644
index abc4640..0000000
--- a/board/rmu/u-boot.lds.debug
+++ /dev/null
@@ -1,130 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-/* Do we need any of these for elf?
-   __DYNAMIC = 0;    */
-SECTIONS
-{
-  /* Read-only sections, merged into text segment: */
-  . = + SIZEOF_HEADERS;
-  .interp : { *(.interp) }
-  .hash          : { *(.hash)		}
-  .dynsym        : { *(.dynsym)		}
-  .dynstr        : { *(.dynstr)		}
-  .rel.text      : { *(.rel.text)		}
-  .rela.text     : { *(.rela.text)	}
-  .rel.data      : { *(.rel.data)		}
-  .rela.data     : { *(.rela.data)	}
-  .rel.rodata    : { *(.rel.rodata)	}
-  .rela.rodata   : { *(.rela.rodata)	}
-  .rel.got       : { *(.rel.got)		}
-  .rela.got      : { *(.rela.got)		}
-  .rel.ctors     : { *(.rel.ctors)	}
-  .rela.ctors    : { *(.rela.ctors)	}
-  .rel.dtors     : { *(.rel.dtors)	}
-  .rela.dtors    : { *(.rela.dtors)	}
-  .rel.bss       : { *(.rel.bss)		}
-  .rela.bss      : { *(.rela.bss)		}
-  .rel.plt       : { *(.rel.plt)		}
-  .rela.plt      : { *(.rela.plt)		}
-  .init          : { *(.init)	}
-  .plt : { *(.plt) }
-  .text      :
-  {
-    /* WARNING - the following is hand-optimized to fit within	*/
-    /* the sector layout of our flash chips!	XXX FIXME XXX	*/
-
-    arch/powerpc/cpu/mpc8xx/start.o	(.text)
-    common/dlmalloc.o	(.text)
-    lib/vsprintf.o	(.text)
-    lib/crc32.o		(.text)
-
-    . = env_offset;
-    common/env_embedded.o(.text)
-
-    *(.text)
-    *(.got1)
-  }
-  _etext = .;
-  PROVIDE (etext = .);
-  .rodata    :
-  {
-    *(.rodata)
-    *(.rodata1)
-    *(.rodata.str1.4)
-    *(.eh_frame)
-  }
-  .fini      : { *(.fini)    } =0
-  .ctors     : { *(.ctors)   }
-  .dtors     : { *(.dtors)   }
-
-  /* Read-write section, merged into data segment: */
-  . = (. + 0x0FFF) & 0xFFFFF000;
-  _erotext = .;
-  PROVIDE (erotext = .);
-  .reloc   :
-  {
-    *(.got)
-    _GOT2_TABLE_ = .;
-    *(.got2)
-    _FIXUP_TABLE_ = .;
-    *(.fixup)
-  }
-  __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
-  __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
-  .data    :
-  {
-    *(.data)
-    *(.data1)
-    *(.sdata)
-    *(.sdata2)
-    *(.dynamic)
-    CONSTRUCTORS
-  }
-  _edata  =  .;
-  PROVIDE (edata = .);
-
-  __start___ex_table = .;
-  __ex_table : { *(__ex_table) }
-  __stop___ex_table = .;
-
-  . = ALIGN(4096);
-  __init_begin = .;
-  .text.init : { *(.text.init) }
-  .data.init : { *(.data.init) }
-  . = ALIGN(4096);
-  __init_end = .;
-
-  __bss_start = .;
-  .bss       :
-  {
-   *(.sbss) *(.scommon)
-   *(.dynbss)
-   *(.bss)
-   *(COMMON)
-  }
-  __bss_end__ = . ;
-  PROVIDE (end = .);
-}
diff --git a/board/w7o/flash.c b/board/w7o/flash.c
index 184661b..20bd920 100644
--- a/board/w7o/flash.c
+++ b/board/w7o/flash.c
@@ -29,639 +29,651 @@
 
 #include <watchdog.h>
 
-flash_info_t    flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips    */
+/* info for FLASH chips    */
+flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS];
 
-/*-----------------------------------------------------------------------
+/*
  * Functions
  */
-static ulong flash_get_size (vu_long *addr, flash_info_t *info);
+static ulong flash_get_size(vu_long *addr, flash_info_t *info);
 static int write_word8(flash_info_t *info, ulong dest, ulong data);
-static int write_word32 (flash_info_t *info, ulong dest, ulong data);
-static void flash_get_offsets (ulong base, flash_info_t *info);
+static int write_word32(flash_info_t *info, ulong dest, ulong data);
+static void flash_get_offsets(ulong base, flash_info_t *info);
 
-/*-----------------------------------------------------------------------
- */
-
-unsigned long flash_init (void)
+unsigned long flash_init(void)
 {
-    int i;
-    unsigned long size_b0, base_b0;
-    unsigned long size_b1, base_b1;
+	int i;
+	unsigned long size_b0, base_b0;
+	unsigned long size_b1;
 
-    /* Init: no FLASHes known */
-    for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; ++i) {
-	flash_info[i].flash_id = FLASH_UNKNOWN;
-    }
+	/* Init: no FLASHes known */
+	for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; ++i)
+		flash_info[i].flash_id = FLASH_UNKNOWN;
 
-    /* Get Size of Boot and Main Flashes */
-    size_b0 = flash_get_size((vu_long *)FLASH_BASE0_PRELIM, &flash_info[0]);
-    if (flash_info[0].flash_id == FLASH_UNKNOWN) {
-	printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
-	    size_b0, size_b0<<20);
-	return 0;
-    }
-    size_b1 = flash_get_size((vu_long *)FLASH_BASE1_PRELIM, &flash_info[1]);
-    if (flash_info[1].flash_id == FLASH_UNKNOWN) {
-	printf ("## Unknown FLASH on Bank 1 - Size = 0x%08lx = %ld MB\n",
-	    size_b1, size_b1<<20);
-	return 0;
-    }
-
-    /* Calculate base addresses */
-    base_b0 = -size_b0;
-    base_b1 = -size_b1;
-
-    /* Setup offsets for Boot Flash */
-    flash_get_offsets (base_b0, &flash_info[0]);
-
-    /* Protect board level data */
-    (void)flash_protect(FLAG_PROTECT_SET,
-			base_b0,
-			flash_info[0].start[1] - 1,
-			&flash_info[0]);
-
-
-    /* Monitor protection ON by default */
-    (void)flash_protect(FLAG_PROTECT_SET,
-			base_b0 + size_b0 - monitor_flash_len,
-			base_b0 + size_b0 - 1,
-			&flash_info[0]);
-
-    /* Protect the FPGA image */
-    (void)flash_protect(FLAG_PROTECT_SET,
-			FLASH_BASE1_PRELIM,
-			FLASH_BASE1_PRELIM + CONFIG_SYS_FPGA_IMAGE_LEN - 1,
-			&flash_info[1]);
-
-    /* Protect the default boot image */
-    (void)flash_protect(FLAG_PROTECT_SET,
-			FLASH_BASE1_PRELIM + CONFIG_SYS_FPGA_IMAGE_LEN,
-			FLASH_BASE1_PRELIM + CONFIG_SYS_FPGA_IMAGE_LEN + 0x600000 - 1,
-			&flash_info[1]);
-
-    /* Setup offsets for Main Flash */
-    flash_get_offsets (FLASH_BASE1_PRELIM, &flash_info[1]);
-
-    return (size_b0 + size_b1);
-} /* end flash_init() */
-
-/*-----------------------------------------------------------------------
- */
-static void flash_get_offsets (ulong base, flash_info_t *info)
-{
-    int i;
-
-    /* set up sector start address table - FOR BOOT ROM ONLY!!! */
-    if ((info->flash_id & FLASH_TYPEMASK)  == FLASH_AM040) {
-	for (i = 0; i < info->sector_count; i++)
-	    info->start[i] = base + (i * 0x00010000);
-    }
-} /* end flash_get_offsets() */
-
-/*-----------------------------------------------------------------------
- */
-void flash_print_info  (flash_info_t *info)
-{
-    int i;
-    int k;
-    int size;
-    int erased;
-    volatile unsigned long *flash;
-
-    if (info->flash_id == FLASH_UNKNOWN) {
-	printf ("missing or unknown FLASH type\n");
-	return;
-    }
-
-    switch (info->flash_id & FLASH_VENDMASK) {
-	case FLASH_MAN_AMD:     printf ("1 x AMD ");    break;
-	case FLASH_MAN_STM:	printf ("1 x STM ");	break;
-	case FLASH_MAN_INTEL:   printf ("2 x Intel ");  break;
-	default:                printf ("Unknown Vendor ");
-    }
-
-    switch (info->flash_id & FLASH_TYPEMASK) {
-	case FLASH_AM040:
-	    if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_AMD)
-		printf ("AM29LV040 (4096 Kbit, uniform sector size)\n");
-	    else if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_STM)
-		printf ("M29W040B (4096 Kbit, uniform block size)\n");
-	    else
-		printf ("UNKNOWN 29x040x (4096 Kbit, uniform sector size)\n");
-	    break;
-	case FLASH_28F320J3A:
-	    printf ("28F320J3A (32 Mbit = 128K x 32)\n");
-	    break;
-	case FLASH_28F640J3A:
-	    printf ("28F640J3A (64 Mbit = 128K x 64)\n");
-	    break;
-	case FLASH_28F128J3A:
-	    printf ("28F128J3A (128 Mbit = 128K x 128)\n");
-	    break;
-	default:
-	    printf ("Unknown Chip Type\n");
-    }
-
-    if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_STM) {
-	printf ("  Size: %ld KB in %d Blocks\n",
-		info->size >> 10, info->sector_count);
-    } else {
-	printf ("  Size: %ld KB in %d Sectors\n",
-		info->size >> 10, info->sector_count);
-    }
-
-    printf ("  Sector Start Addresses:");
-    for (i=0; i<info->sector_count; ++i) {
-	/*
-	 * Check if whole sector is erased
-	 */
-	if (i != (info->sector_count-1))
-	    size = info->start[i+1] - info->start[i];
-	else
-	    size = info->start[0] + info->size - info->start[i];
-	erased = 1;
-	flash = (volatile unsigned long *)info->start[i];
-	size = size >> 2;        /* divide by 4 for longword access */
-	for (k=0; k<size; k++)
-	{
-	    if (*flash++ != 0xffffffff)
-	    {
-		erased = 0;
-		break;
-	    }
+	/* Get Size of Boot and Main Flashes */
+	size_b0 = flash_get_size((vu_long *) FLASH_BASE0_PRELIM,
+			       &flash_info[0]);
+	if (flash_info[0].flash_id == FLASH_UNKNOWN) {
+		printf("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
+			size_b0, size_b0 << 20);
+		return 0;
+	}
+	size_b1 =
+		flash_get_size((vu_long *) FLASH_BASE1_PRELIM,
+			       &flash_info[1]);
+	if (flash_info[1].flash_id == FLASH_UNKNOWN) {
+		printf("## Unknown FLASH on Bank 1 - Size = 0x%08lx = %ld MB\n",
+			size_b1, size_b1 << 20);
+		return 0;
 	}
 
-	if ((i % 5) == 0)
-	    printf ("\n   ");
-	printf (" %08lX%s%s",
-	    info->start[i],
-	    erased ? " E" : "  ",
-	    info->protect[i] ? "RO " : "   "
-	);
-    }
-    printf ("\n");
-} /* end flash_print_info() */
+	/* Calculate base addresses */
+	base_b0 = -size_b0;
+
+	/* Setup offsets for Boot Flash */
+	flash_get_offsets(base_b0, &flash_info[0]);
+
+	/* Protect board level data */
+	(void) flash_protect(FLAG_PROTECT_SET,
+			     base_b0,
+			     flash_info[0].start[1] - 1, &flash_info[0]);
+
+	/* Monitor protection ON by default */
+	(void) flash_protect(FLAG_PROTECT_SET,
+			     base_b0 + size_b0 - monitor_flash_len,
+			     base_b0 + size_b0 - 1, &flash_info[0]);
+
+	/* Protect the FPGA image */
+	(void) flash_protect(FLAG_PROTECT_SET,
+			     FLASH_BASE1_PRELIM,
+			     FLASH_BASE1_PRELIM + CONFIG_SYS_FPGA_IMAGE_LEN -
+			     1, &flash_info[1]);
+
+	/* Protect the default boot image */
+	(void) flash_protect(FLAG_PROTECT_SET,
+			     FLASH_BASE1_PRELIM + CONFIG_SYS_FPGA_IMAGE_LEN,
+			     FLASH_BASE1_PRELIM + CONFIG_SYS_FPGA_IMAGE_LEN +
+			     0x600000 - 1, &flash_info[1]);
+
+	/* Setup offsets for Main Flash */
+	flash_get_offsets(FLASH_BASE1_PRELIM, &flash_info[1]);
+
+	return size_b0 + size_b1;
+}
+
+static void flash_get_offsets(ulong base, flash_info_t *info)
+{
+	int i;
+
+	/* set up sector start address table - FOR BOOT ROM ONLY!!! */
+	if ((info->flash_id & FLASH_TYPEMASK) == FLASH_AM040) {
+		for (i = 0; i < info->sector_count; i++)
+			info->start[i] = base + (i * 0x00010000);
+	}
+}				/* end flash_get_offsets() */
+
+void flash_print_info(flash_info_t *info)
+{
+	int i;
+	int k;
+	int size;
+	int erased;
+	volatile unsigned long *flash;
+
+	if (info->flash_id == FLASH_UNKNOWN) {
+		printf("missing or unknown FLASH type\n");
+		return;
+	}
+
+	switch (info->flash_id & FLASH_VENDMASK) {
+	case FLASH_MAN_AMD:
+		printf("1 x AMD ");
+		break;
+	case FLASH_MAN_STM:
+		printf("1 x STM ");
+		break;
+	case FLASH_MAN_INTEL:
+		printf("2 x Intel ");
+		break;
+	default:
+		printf("Unknown Vendor ");
+	}
+
+	switch (info->flash_id & FLASH_TYPEMASK) {
+	case FLASH_AM040:
+		if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_AMD)
+			printf("AM29LV040 (4096 Kbit, uniform sector size)\n");
+		else if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_STM)
+			printf("M29W040B (4096 Kbit, uniform block size)\n");
+		else
+			printf("UNKNOWN 29x040x (4096 Kbit, uniform sector size)\n");
+		break;
+	case FLASH_28F320J3A:
+		printf("28F320J3A (32 Mbit = 128K x 32)\n");
+		break;
+	case FLASH_28F640J3A:
+		printf("28F640J3A (64 Mbit = 128K x 64)\n");
+		break;
+	case FLASH_28F128J3A:
+		printf("28F128J3A (128 Mbit = 128K x 128)\n");
+		break;
+	default:
+		printf("Unknown Chip Type\n");
+	}
+
+	if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_STM) {
+		printf("  Size: %ld KB in %d Blocks\n",
+		       info->size >> 10, info->sector_count);
+	} else {
+		printf("  Size: %ld KB in %d Sectors\n",
+		       info->size >> 10, info->sector_count);
+	}
+
+	printf("  Sector Start Addresses:");
+	for (i = 0; i < info->sector_count; ++i) {
+		/*
+		 * Check if whole sector is erased
+		 */
+		if (i != (info->sector_count - 1))
+			size = info->start[i + 1] - info->start[i];
+		else
+			size = info->start[0] + info->size - info->start[i];
+		erased = 1;
+		flash = (volatile unsigned long *) info->start[i];
+		size = size >> 2;	/* divide by 4 for longword access */
+		for (k = 0; k < size; k++) {
+			if (*flash++ != 0xffffffff) {
+				erased = 0;
+				break;
+			}
+		}
+
+		if ((i % 5) == 0)
+			printf("\n   ");
+		printf(" %08lX%s%s",
+		       info->start[i],
+		       erased ? " E" : "  ",
+		       info->protect[i] ? "RO " : "   ");
+	}
+	printf("\n");
+}				/* end flash_print_info() */
 
 /*
  * The following code cannot be run from FLASH!
  */
-static ulong flash_get_size (vu_long *addr, flash_info_t *info)
+static ulong flash_get_size(vu_long *addr, flash_info_t *info)
 {
-    short i;
-    ulong base = (ulong)addr;
+	short i;
+	ulong base = (ulong) addr;
 
-    /* Setup default type */
-    info->flash_id = FLASH_UNKNOWN;
-    info->sector_count =0;
-    info->size = 0;
+	/* Setup default type */
+	info->flash_id = FLASH_UNKNOWN;
+	info->sector_count = 0;
+	info->size = 0;
 
-    /* Test for Boot Flash */
-    if (base == FLASH_BASE0_PRELIM) {
-	unsigned char value;
-	volatile unsigned char * addr2 = (unsigned char *)addr;
+	/* Test for Boot Flash */
+	if (base == FLASH_BASE0_PRELIM) {
+		unsigned char value;
+		volatile unsigned char *addr2 = (unsigned char *) addr;
 
-	/* Write auto select command: read Manufacturer ID */
-	*(addr2 + 0x555) = 0xaa;
-	*(addr2 + 0x2aa) = 0x55;
-	*(addr2 + 0x555) = 0x90;
+		/* Write auto select command: read Manufacturer ID */
+		*(addr2 + 0x555) = 0xaa;
+		*(addr2 + 0x2aa) = 0x55;
+		*(addr2 + 0x555) = 0x90;
 
-	/* Manufacture ID */
-	value = *addr2;
-	switch (value) {
-	    case (unsigned char)AMD_MANUFACT:
-		info->flash_id = FLASH_MAN_AMD;
-		break;
-	    case (unsigned char)STM_MANUFACT:
-		info->flash_id = FLASH_MAN_STM;
-		break;
-	    default:
-		*addr2 = 0xf0;              /* no or unknown flash  */
-		return 0;
+		/* Manufacture ID */
+		value = *addr2;
+		switch (value) {
+		case (unsigned char) AMD_MANUFACT:
+			info->flash_id = FLASH_MAN_AMD;
+			break;
+		case (unsigned char) STM_MANUFACT:
+			info->flash_id = FLASH_MAN_STM;
+			break;
+		default:
+			*addr2 = 0xf0;	/* no or unknown flash  */
+			return 0;
+		}
+
+		/* Device ID */
+		value = *(addr2 + 1);
+		switch (value) {
+		case (unsigned char) AMD_ID_LV040B:
+		case (unsigned char) STM_ID_29W040B:
+			info->flash_id += FLASH_AM040;
+			info->sector_count = 8;
+			info->size = 0x00080000;
+			break;	/* => 512Kb */
+		default:
+			*addr2 = 0xf0;	/* => no or unknown flash */
+			return 0;
+		}
+	} else {		/* MAIN Flash */
+		unsigned long value;
+		volatile unsigned long *addr2 = (unsigned long *) addr;
+
+		/* Write auto select command: read Manufacturer ID */
+		*addr2 = 0x90909090;
+
+		/* Manufacture ID */
+		value = *addr2;
+		switch (value) {
+		case (unsigned long) INTEL_MANUFACT:
+			info->flash_id = FLASH_MAN_INTEL;
+			break;
+		default:
+			*addr2 = 0xff;	/* no or unknown flash  */
+			return 0;
+		}
+
+		/* Device ID - This shit is interleaved... */
+		value = *(addr2 + 1);
+		switch (value) {
+		case (unsigned long) INTEL_ID_28F320J3A:
+			info->flash_id += FLASH_28F320J3A;
+			info->sector_count = 32;
+			info->size = 0x00400000 * 2;
+			break;	/* => 2 X 4 MB */
+		case (unsigned long) INTEL_ID_28F640J3A:
+			info->flash_id += FLASH_28F640J3A;
+			info->sector_count = 64;
+			info->size = 0x00800000 * 2;
+			break;	/* => 2 X 8 MB */
+		case (unsigned long) INTEL_ID_28F128J3A:
+			info->flash_id += FLASH_28F128J3A;
+			info->sector_count = 128;
+			info->size = 0x01000000 * 2;
+			break;	/* => 2 X 16 MB */
+		default:
+			*addr2 = 0xff;	/* => no or unknown flash */
+		}
 	}
 
-	/* Device ID */
-	value = *(addr2 + 1);
-	switch (value) {
-	    case (unsigned char)AMD_ID_LV040B:
-	    case (unsigned char)STM_ID_29W040B:
-		info->flash_id += FLASH_AM040;
-		info->sector_count = 8;
-		info->size = 0x00080000;
-		break;                       /* => 512Kb */
-	    default:
-		*addr2 = 0xf0;               /* => no or unknown flash */
-		return 0;
-	}
-    }
-    else { /* MAIN Flash */
-	unsigned long value;
-	volatile unsigned long * addr2 = (unsigned long *)addr;
-
-	/* Write auto select command: read Manufacturer ID */
-	*addr2 = 0x90909090;
-
-	/* Manufacture ID */
-	value = *addr2;
-	switch (value) {
-	    case (unsigned long)INTEL_MANUFACT:
-		info->flash_id = FLASH_MAN_INTEL;
-		break;
-	    default:
-		*addr2 = 0xff;              /* no or unknown flash  */
-		return 0;
+	/* Make sure we don't exceed CONFIG_SYS_MAX_FLASH_SECT */
+	if (info->sector_count > CONFIG_SYS_MAX_FLASH_SECT) {
+		printf("** ERROR: sector count %d > max (%d) **\n",
+		       info->sector_count, CONFIG_SYS_MAX_FLASH_SECT);
+		info->sector_count = CONFIG_SYS_MAX_FLASH_SECT;
 	}
 
-	/* Device ID - This shit is interleaved... */
-	value = *(addr2 + 1);
-	switch (value) {
-	    case (unsigned long)INTEL_ID_28F320J3A:
-		info->flash_id += FLASH_28F320J3A;
-		info->sector_count = 32;
-		info->size = 0x00400000 * 2;
-		break;                       /* => 2 X 4 MB */
-	    case (unsigned long)INTEL_ID_28F640J3A:
-		info->flash_id += FLASH_28F640J3A;
-		info->sector_count = 64;
-		info->size = 0x00800000 * 2;
-		break;                       /* => 2 X 8 MB */
-	    case (unsigned long)INTEL_ID_28F128J3A:
-		info->flash_id += FLASH_28F128J3A;
-		info->sector_count = 128;
-		info->size = 0x01000000 * 2;
-		break;                       /* => 2 X 16 MB */
-	    default:
-		*addr2 = 0xff;               /* => no or unknown flash */
-	}
-    }
-
-    /* Make sure we don't exceed CONFIG_SYS_MAX_FLASH_SECT */
-    if (info->sector_count > CONFIG_SYS_MAX_FLASH_SECT) {
-	printf ("** ERROR: sector count %d > max (%d) **\n",
-		info->sector_count, CONFIG_SYS_MAX_FLASH_SECT);
-	info->sector_count = CONFIG_SYS_MAX_FLASH_SECT;
-    }
-
-    /* set up sector start address table */
-    switch (info->flash_id & FLASH_TYPEMASK) {
+	/* set up sector start address table */
+	switch (info->flash_id & FLASH_TYPEMASK) {
 	case FLASH_AM040:
-	    for (i = 0; i < info->sector_count; i++)
-		info->start[i] = base + (i * 0x00010000);
-	    break;
+		for (i = 0; i < info->sector_count; i++)
+			info->start[i] = base + (i * 0x00010000);
+		break;
 	case FLASH_28F320J3A:
 	case FLASH_28F640J3A:
 	case FLASH_28F128J3A:
-	    for (i = 0; i < info->sector_count; i++)
-		info->start[i] = base + (i * 0x00020000 * 2); /* 2 Banks */
-	    break;
-    }
-
-    /* Test for Boot Flash */
-    if (base == FLASH_BASE0_PRELIM) {
-	volatile unsigned char *addr2;
-	/* check for protected sectors */
-	for (i = 0; i < info->sector_count; i++) {
-	    /* read sector protection at sector address, (AX .. A0) = 0x02 */
-	    /* D0 = 1 if protected */
-	    addr2 = (volatile unsigned char *)(info->start[i]);
-	    info->protect[i] = *(addr2 + 2) & 1;
+		for (i = 0; i < info->sector_count; i++)
+			info->start[i] = base +
+					(i * 0x00020000 * 2);	/* 2 Banks */
+		break;
 	}
 
-	/* Restore read mode */
-	*(unsigned char *)base = 0xF0;       /* Reset NORMAL Flash */
-    }
-    else { /* Main Flash */
-	volatile unsigned long *addr2;
-	/* check for protected sectors */
-	for (i = 0; i < info->sector_count; i++) {
-	    /* read sector protection at sector address, (AX .. A0) = 0x02 */
-	    /* D0 = 1 if protected */
-	    addr2 = (volatile unsigned long *)(info->start[i]);
-	    info->protect[i] = *(addr2 + 2) & 0x1;
+	/* Test for Boot Flash */
+	if (base == FLASH_BASE0_PRELIM) {
+		volatile unsigned char *addr2;
+
+		/* check for protected sectors */
+		for (i = 0; i < info->sector_count; i++) {
+			/*
+			 * read sector protection at sector address,
+			 * (AX .. A0) = 0x02
+			 * D0 = 1 if protected
+			 */
+			addr2 = (volatile unsigned char *) (info->start[i]);
+			info->protect[i] = *(addr2 + 2) & 1;
+		}
+
+		/* Restore read mode */
+		*(unsigned char *) base = 0xF0;	/* Reset NORMAL Flash */
+	} else {		/* Main Flash */
+		volatile unsigned long *addr2;
+
+		/* check for protected sectors */
+		for (i = 0; i < info->sector_count; i++) {
+			/*
+			 * read sector protection at sector address,
+			 * (AX .. A0) = 0x02
+			 * D0 = 1 if protected
+			 */
+			addr2 = (volatile unsigned long *) (info->start[i]);
+			info->protect[i] = *(addr2 + 2) & 0x1;
+		}
+
+		/* Restore read mode */
+		*(unsigned long *) base = 0xFFFFFFFF;	/* Reset  Flash */
 	}
 
-	/* Restore read mode */
-	*(unsigned long *)base = 0xFFFFFFFF; /* Reset  Flash */
-    }
-
-    return (info->size);
-} /* end flash_get_size() */
-
-/*-----------------------------------------------------------------------
- */
+	return info->size;
+}				/* end flash_get_size() */
 
 static int wait_for_DQ7(ulong addr, uchar cmp_val, ulong tout)
 {
-    int i;
+	int i;
 
-    volatile uchar *vaddr =  (uchar *)addr;
+	volatile uchar *vaddr = (uchar *) addr;
 
-    /* Loop X times */
-    for (i = 1; i <= (100 * tout); i++) {    /* Wait up to tout ms */
-	udelay(10);
-	/* Pause 10 us */
+	/* Loop X times */
+	for (i = 1; i <= (100 * tout); i++) {	/* Wait up to tout ms */
+		udelay(10);
+		/* Pause 10 us */
 
-	/* Check for completion */
-	if ((vaddr[0] & 0x80) == (cmp_val & 0x80)) {
-	    return 0;
+		/* Check for completion */
+		if ((vaddr[0] & 0x80) == (cmp_val & 0x80))
+			return 0;
+
+		/* KEEP THE LUSER HAPPY - Print a dot every 1.1 seconds */
+		if (!(i % 110000))
+			putc('.');
+
+		/* Kick the dog if needed */
+		WATCHDOG_RESET();
 	}
 
-	/* KEEP THE LUSER HAPPY - Print a dot every 1.1 seconds */
-	if (!(i % 110000))
-	    putc('.');
-
-	/* Kick the dog if needed */
-	WATCHDOG_RESET();
-    }
-
-    return 1;
-} /* wait_for_DQ7() */
-
-/*-----------------------------------------------------------------------
- */
+	return 1;
+}				/* wait_for_DQ7() */
 
 static int flash_erase8(flash_info_t *info, int s_first, int s_last)
 {
-    int tcode, rcode = 0;
-    volatile uchar *addr = (uchar *)(info->start[0]);
-    volatile uchar *sector_addr;
-    int flag, prot, sect;
+	int tcode, rcode = 0;
+	volatile uchar *addr = (uchar *) (info->start[0]);
+	volatile uchar *sector_addr;
+	int flag, prot, sect;
 
-    /* Validate arguments */
-    if ((s_first < 0) || (s_first > s_last)) {
-	if (info->flash_id == FLASH_UNKNOWN)
-	    printf ("- missing\n");
-	else
-	    printf ("- no sectors to erase\n");
-	return 1;
-    }
-
-    /* Check for KNOWN flash type */
-    if (info->flash_id == FLASH_UNKNOWN) {
-	printf ("Can't erase unknown flash type - aborted\n");
-	return 1;
-    }
-
-    /* Check for protected sectors */
-    prot = 0;
-    for (sect = s_first; sect <= s_last; ++sect) {
-	if (info->protect[sect])
-	    prot++;
-    }
-    if (prot)
-	printf ("- Warning: %d protected sectors will not be erased!\n", prot);
-    else
-	printf ("\n");
-
-    /* Start erase on unprotected sectors */
-    for (sect = s_first; sect <= s_last; sect++) {
-	if (info->protect[sect] == 0) {      /* not protected */
-	    sector_addr = (uchar *)(info->start[sect]);
-
-		if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_STM)
-		    printf("Erasing block %p\n", sector_addr);
+	/* Validate arguments */
+	if ((s_first < 0) || (s_first > s_last)) {
+		if (info->flash_id == FLASH_UNKNOWN)
+			printf("- missing\n");
 		else
-		    printf("Erasing sector %p\n", sector_addr);
-
-	    /* Disable interrupts which might cause Flash to timeout */
-	    flag = disable_interrupts();
-
-	    *(addr + 0x555) = (uchar)0xAA;
-	    *(addr + 0x2aa) = (uchar)0x55;
-	    *(addr + 0x555) = (uchar)0x80;
-	    *(addr + 0x555) = (uchar)0xAA;
-	    *(addr + 0x2aa) = (uchar)0x55;
-	    *sector_addr = (uchar)0x30;      /* sector erase */
-
-	    /*
-	     * Wait for each sector to complete, it's more
-	     * reliable.  According to AMD Spec, you must
-	     * issue all erase commands within a specified
-	     * timeout.  This has been seen to fail, especially
-	     * if printf()s are included (for debug)!!
-	     * Takes up to 6 seconds.
-	     */
-	    tcode  = wait_for_DQ7((ulong)sector_addr, 0x80, 6000);
-
-	    /* re-enable interrupts if necessary */
-	    if (flag)
-		enable_interrupts();
-
-	    /* Make sure we didn't timeout */
-	    if (tcode) {
-		printf ("Timeout\n");
-		rcode = 1;
-	    }
+			printf("- no sectors to erase\n");
+		return 1;
 	}
-    }
 
-    /* wait at least 80us - let's wait 1 ms */
-    udelay (1000);
+	/* Check for KNOWN flash type */
+	if (info->flash_id == FLASH_UNKNOWN) {
+		printf("Can't erase unknown flash type - aborted\n");
+		return 1;
+	}
 
-    /* reset to read mode */
-    addr = (uchar *)info->start[0];
-    *addr = (uchar)0xF0;                     /* reset bank */
+	/* Check for protected sectors */
+	prot = 0;
+	for (sect = s_first; sect <= s_last; ++sect) {
+		if (info->protect[sect])
+			prot++;
+	}
+	if (prot) {
+		printf("- Warning: %d protected sectors will not be erased!\n",
+			prot);
+	} else {
+		printf("\n");
+	}
 
-    printf (" done\n");
-    return rcode;
-} /* end flash_erase8() */
+	/* Start erase on unprotected sectors */
+	for (sect = s_first; sect <= s_last; sect++) {
+		if (info->protect[sect] == 0) {	/* not protected */
+			sector_addr = (uchar *) (info->start[sect]);
+
+			if ((info->flash_id & FLASH_VENDMASK) ==
+			    FLASH_MAN_STM)
+				printf("Erasing block %p\n", sector_addr);
+			else
+				printf("Erasing sector %p\n", sector_addr);
+
+			/* Disable interrupts which might cause timeout */
+			flag = disable_interrupts();
+
+			*(addr + 0x555) = (uchar) 0xAA;
+			*(addr + 0x2aa) = (uchar) 0x55;
+			*(addr + 0x555) = (uchar) 0x80;
+			*(addr + 0x555) = (uchar) 0xAA;
+			*(addr + 0x2aa) = (uchar) 0x55;
+			*sector_addr = (uchar) 0x30;	/* sector erase */
+
+			/*
+			 * Wait for each sector to complete, it's more
+			 * reliable.  According to AMD Spec, you must
+			 * issue all erase commands within a specified
+			 * timeout.  This has been seen to fail, especially
+			 * if printf()s are included (for debug)!!
+			 * Takes up to 6 seconds.
+			 */
+			tcode = wait_for_DQ7((ulong) sector_addr, 0x80, 6000);
+
+			/* re-enable interrupts if necessary */
+			if (flag)
+				enable_interrupts();
+
+			/* Make sure we didn't timeout */
+			if (tcode) {
+				printf("Timeout\n");
+				rcode = 1;
+			}
+		}
+	}
+
+	/* wait at least 80us - let's wait 1 ms */
+	udelay(1000);
+
+	/* reset to read mode */
+	addr = (uchar *) info->start[0];
+	*addr = (uchar) 0xF0;	/* reset bank */
+
+	printf(" done\n");
+	return rcode;
+}				/* end flash_erase8() */
 
 static int flash_erase32(flash_info_t *info, int s_first, int s_last)
 {
-    int flag, sect;
-    ulong start, now, last;
-    int prot = 0;
+	int flag, sect;
+	ulong start, now, last;
+	int prot = 0;
 
-    /* Validate arguments */
-    if ((s_first < 0) || (s_first > s_last)) {
-	if (info->flash_id == FLASH_UNKNOWN)
-	    printf ("- missing\n");
-	else
-	    printf ("- no sectors to erase\n");
-	return 1;
-    }
-
-    /* Check for KNOWN flash type */
-    if ((info->flash_id & FLASH_VENDMASK) != FLASH_MAN_INTEL) {
-	printf ("Can erase only Intel flash types - aborted\n");
-	return 1;
-    }
-
-    /* Check for protected sectors */
-    for (sect = s_first; sect <= s_last; ++sect) {
-	if (info->protect[sect])
-	    prot++;
-    }
-    if (prot)
-	printf ("- Warning: %d protected sectors will not be erased!\n", prot);
-    else
-	printf ("\n");
-
-    start = get_timer (0);
-    last  = start;
-    /* Start erase on unprotected sectors */
-    for (sect = s_first; sect <= s_last; sect++) {
-	WATCHDOG_RESET();
-	if (info->protect[sect] == 0) {      /* not protected */
-	    vu_long *addr = (vu_long *)(info->start[sect]);
-	    unsigned long status;
-
-	    /* Disable interrupts which might cause a timeout here */
-	    flag = disable_interrupts();
-
-	    *addr = 0x00500050;              /* clear status register */
-	    *addr = 0x00200020;              /* erase setup */
-	    *addr = 0x00D000D0;              /* erase confirm */
-
-	    /* re-enable interrupts if necessary */
-	    if (flag)
-		enable_interrupts();
-
-	    /* Wait at least 80us - let's wait 1 ms */
-	    udelay (1000);
-
-	    while (((status = *addr) & 0x00800080) != 0x00800080) {
-		if ((now = get_timer(start)) > CONFIG_SYS_FLASH_ERASE_TOUT) {
-		    printf ("Timeout\n");
-		    *addr = 0x00B000B0;      /* suspend erase      */
-		    *addr = 0x00FF00FF;      /* reset to read mode */
-		    return 1;
-		}
-
-		/* show that we're waiting */
-		if ((now - last) > 990) {   /* every second */
-		    putc ('.');
-		    last = now;
-		}
-	    }
-	    *addr = 0x00FF00FF;              /* reset to read mode */
+	/* Validate arguments */
+	if ((s_first < 0) || (s_first > s_last)) {
+		if (info->flash_id == FLASH_UNKNOWN)
+			printf("- missing\n");
+		else
+			printf("- no sectors to erase\n");
+		return 1;
 	}
-    }
-    printf (" done\n");
-    return 0;
-} /* end flash_erase32() */
+
+	/* Check for KNOWN flash type */
+	if ((info->flash_id & FLASH_VENDMASK) != FLASH_MAN_INTEL) {
+		printf("Can erase only Intel flash types - aborted\n");
+		return 1;
+	}
+
+	/* Check for protected sectors */
+	for (sect = s_first; sect <= s_last; ++sect) {
+		if (info->protect[sect])
+			prot++;
+	}
+	if (prot) {
+		printf("- Warning: %d protected sectors will not be erased!\n",
+			prot);
+	} else {
+		printf("\n");
+	}
+
+	start = get_timer(0);
+	last = start;
+	/* Start erase on unprotected sectors */
+	for (sect = s_first; sect <= s_last; sect++) {
+		WATCHDOG_RESET();
+		if (info->protect[sect] == 0) {	/* not protected */
+			vu_long *addr = (vu_long *) (info->start[sect]);
+			unsigned long status;
+
+			/* Disable interrupts which might cause a timeout */
+			flag = disable_interrupts();
+
+			*addr = 0x00500050;	/* clear status register */
+			*addr = 0x00200020;	/* erase setup */
+			*addr = 0x00D000D0;	/* erase confirm */
+
+			/* re-enable interrupts if necessary */
+			if (flag)
+				enable_interrupts();
+
+			/* Wait at least 80us - let's wait 1 ms */
+			udelay(1000);
+
+			while (((status = *addr) & 0x00800080) != 0x00800080) {
+				now = get_timer(start);
+				if (now > CONFIG_SYS_FLASH_ERASE_TOUT) {
+					printf("Timeout\n");
+					/* suspend erase      */
+					*addr = 0x00B000B0;
+					/* reset to read mode */
+					*addr = 0x00FF00FF;
+					return 1;
+				}
+
+				/*
+				 * show that we're waiting
+				 * every second (?)
+				 */
+				if ((now - last) > 990) {
+					putc('.');
+					last = now;
+				}
+			}
+			*addr = 0x00FF00FF;	/* reset to read mode */
+		}
+	}
+	printf(" done\n");
+	return 0;
+}
 
 int flash_erase(flash_info_t *info, int s_first, int s_last)
 {
-    if ((info->flash_id & FLASH_TYPEMASK) == FLASH_AM040)
-	return flash_erase8(info, s_first, s_last);
-    else
-	return flash_erase32(info, s_first, s_last);
-} /* end flash_erase() */
+	if ((info->flash_id & FLASH_TYPEMASK) == FLASH_AM040)
+		return flash_erase8(info, s_first, s_last);
+	else
+		return flash_erase32(info, s_first, s_last);
+}
 
-/*-----------------------------------------------------------------------
+/*
  * Copy memory to flash, returns:
  * 0 - OK
  * 1 - write timeout
  * 2 - Flash not erased
  */
-static int write_buff8(flash_info_t *info, uchar *src, ulong addr, ulong cnt)
+static int write_buff8(flash_info_t *info, uchar *src, ulong addr,
+		       ulong cnt)
 {
-    ulong cp, wp, data;
-    ulong start;
-    int i, l, rc;
+	ulong cp, wp, data;
+	ulong start;
+	int i, l, rc;
 
-    start = get_timer (0);
+	start = get_timer(0);
 
-    wp = (addr & ~3);                        /* get lower word
-						aligned address */
+	wp = (addr & ~3);	/* get lower word
+				   aligned address */
 
-    /*
-     * handle unaligned start bytes
-     */
-    if ((l = addr - wp) != 0) {
+	/*
+	 * handle unaligned start bytes
+	 */
+	l = addr - wp;
+	if (l != 0) {
+		data = 0;
+		for (i = 0, cp = wp; i < l; ++i, ++cp)
+			data = (data << 8) | (*(uchar *) cp);
+
+		for (; i < 4 && cnt > 0; ++i) {
+			data = (data << 8) | *src++;
+			--cnt;
+			++cp;
+		}
+
+		for (; cnt == 0 && i < 4; ++i, ++cp)
+			data = (data << 8) | (*(uchar *) cp);
+
+		rc = write_word8(info, wp, data);
+		if (rc != 0)
+			return rc;
+
+		wp += 4;
+	}
+
+	/*
+	 * handle word aligned part
+	 */
+	while (cnt >= 4) {
+		data = 0;
+		for (i = 0; i < 4; ++i)
+			data = (data << 8) | *src++;
+
+		rc = write_word8(info, wp, data);
+		if (rc != 0)
+			return rc;
+
+		wp += 4;
+		cnt -= 4;
+		if (get_timer(start) > 1000) {	/* every second */
+			WATCHDOG_RESET();
+			putc('.');
+			start = get_timer(0);
+		}
+	}
+
+	if (cnt == 0)
+		return 0;
+
+	/*
+	 * handle unaligned tail bytes
+	 */
 	data = 0;
-	for (i=0, cp=wp; i<l; ++i, ++cp) {
-	    data = (data << 8) | (*(uchar *)cp);
-	}
-	for (; i<4 && cnt>0; ++i) {
-	    data = (data << 8) | *src++;
-	    --cnt;
-	    ++cp;
-	}
-	for (; cnt==0 && i<4; ++i, ++cp) {
-	    data = (data << 8) | (*(uchar *)cp);
+	for (i = 0, cp = wp; i < 4 && cnt > 0; ++i, ++cp) {
+		data = (data << 8) | *src++;
+		--cnt;
 	}
 
-	if ((rc = write_word8(info, wp, data)) != 0) {
-	    return (rc);
-	}
-	wp += 4;
-    }
+	for (; i < 4; ++i, ++cp)
+		data = (data << 8) | (*(uchar *) cp);
 
-    /*
-     * handle word aligned part
-     */
-    while (cnt >= 4) {
-	data = 0;
-	for (i=0; i<4; ++i) {
-	    data = (data << 8) | *src++;
-	}
-	if ((rc = write_word8(info, wp, data)) != 0) {
-	    return (rc);
-	}
-	wp  += 4;
-	cnt -= 4;
-	if (get_timer(start) > 1000) {   /* every second */
-	   WATCHDOG_RESET();
-	   putc ('.');
-	   start = get_timer(0);
-	}
-    }
-
-    if (cnt == 0) {
-	return (0);
-    }
-
-    /*
-     * handle unaligned tail bytes
-     */
-    data = 0;
-    for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) {
-	data = (data << 8) | *src++;
-	--cnt;
-    }
-    for (; i<4; ++i, ++cp) {
-	data = (data << 8) | (*(uchar *)cp);
-    }
-
-    return (write_word8(info, wp, data));
-} /* end write_buff8() */
+	return write_word8(info, wp, data);
+}
 
 #define	FLASH_WIDTH	4	/* flash bus width in bytes */
-static int write_buff32 (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
+static int write_buff32(flash_info_t *info, uchar *src, ulong addr,
+			ulong cnt)
 {
 	ulong cp, wp, data;
 	int i, l, rc;
 	ulong start;
 
-	start = get_timer (0);
+	start = get_timer(0);
 
-	if (info->flash_id == FLASH_UNKNOWN) {
+	if (info->flash_id == FLASH_UNKNOWN)
 		return 4;
-	}
 
-	wp = (addr & ~(FLASH_WIDTH-1));	/* get lower FLASH_WIDTH aligned address */
+	/* get lower FLASH_WIDTH aligned address */
+	wp = (addr & ~(FLASH_WIDTH - 1));
 
 	/*
 	 * handle unaligned start bytes
 	 */
 	if ((l = addr - wp) != 0) {
 		data = 0;
-		for (i=0, cp=wp; i<l; ++i, ++cp) {
-			data = (data << 8) | (*(uchar *)cp);
-		}
-		for (; i<FLASH_WIDTH && cnt>0; ++i) {
+		for (i = 0, cp = wp; i < l; ++i, ++cp)
+			data = (data << 8) | (*(uchar *) cp);
+
+		for (; i < FLASH_WIDTH && cnt > 0; ++i) {
 			data = (data << 8) | *src++;
 			--cnt;
 			++cp;
 		}
-		for (; cnt==0 && i<FLASH_WIDTH; ++i, ++cp) {
-			data = (data << 8) | (*(uchar *)cp);
-		}
 
-		if ((rc = write_word32(info, wp, data)) != 0) {
-			return (rc);
-		}
+		for (; cnt == 0 && i < FLASH_WIDTH; ++i, ++cp)
+			data = (data << 8) | (*(uchar *) cp);
+
+		rc = write_word32(info, wp, data);
+		if (rc != 0)
+			return rc;
+
 		wp += FLASH_WIDTH;
 	}
 
@@ -670,52 +682,52 @@
 	 */
 	while (cnt >= FLASH_WIDTH) {
 		data = 0;
-		for (i=0; i<FLASH_WIDTH; ++i) {
+		for (i = 0; i < FLASH_WIDTH; ++i)
 			data = (data << 8) | *src++;
-		}
-		if ((rc = write_word32(info, wp, data)) != 0) {
-			return (rc);
-		}
-		wp  += FLASH_WIDTH;
+
+		rc = write_word32(info, wp, data);
+		if (rc != 0)
+			return rc;
+
+		wp += FLASH_WIDTH;
 		cnt -= FLASH_WIDTH;
-	  if (get_timer(start) > 990) {   /* every second */
-			putc ('.');
+		if (get_timer(start) > 990) {	/* every second */
+			putc('.');
 			start = get_timer(0);
 		}
 	}
 
-	if (cnt == 0) {
-		return (0);
-	}
+	if (cnt == 0)
+		return 0;
 
 	/*
 	 * handle unaligned tail bytes
 	 */
 	data = 0;
-	for (i=0, cp=wp; i<FLASH_WIDTH && cnt>0; ++i, ++cp) {
+	for (i = 0, cp = wp; i < FLASH_WIDTH && cnt > 0; ++i, ++cp) {
 		data = (data << 8) | *src++;
 		--cnt;
 	}
-	for (; i<FLASH_WIDTH; ++i, ++cp) {
-		data = (data << 8) | (*(uchar *)cp);
-	}
 
-	return (write_word32(info, wp, data));
-} /* write_buff32() */
+	for (; i < FLASH_WIDTH; ++i, ++cp)
+		data = (data << 8) | (*(uchar *) cp);
+
+	return write_word32(info, wp, data);
+}
 
 int write_buff(flash_info_t *info, uchar *src, ulong addr, ulong cnt)
 {
-    int retval;
+	int retval;
 
-    if ((info->flash_id & FLASH_TYPEMASK) == FLASH_AM040)
-	retval = write_buff8(info, src, addr, cnt);
-    else
-	retval = write_buff32(info, src, addr, cnt);
+	if ((info->flash_id & FLASH_TYPEMASK) == FLASH_AM040)
+		retval = write_buff8(info, src, addr, cnt);
+	else
+		retval = write_buff32(info, src, addr, cnt);
 
-    return retval;
-} /* end write_buff() */
+	return retval;
+}
 
-/*-----------------------------------------------------------------------
+/*
  * Write a word to Flash, returns:
  * 0 - OK
  * 1 - write timeout
@@ -724,217 +736,208 @@
 
 static int write_word8(flash_info_t *info, ulong dest, ulong data)
 {
-    volatile uchar *addr2 = (uchar *)(info->start[0]);
-    volatile uchar *dest2 = (uchar *)dest;
-    volatile uchar *data2 = (uchar *)&data;
-    int flag;
-    int i, tcode, rcode = 0;
+	volatile uchar *addr2 = (uchar *) (info->start[0]);
+	volatile uchar *dest2 = (uchar *) dest;
+	volatile uchar *data2 = (uchar *) &data;
+	int flag;
+	int i, tcode, rcode = 0;
 
-    /* Check if Flash is (sufficently) erased */
-    if ((*((volatile uchar *)dest) &
-	(uchar)data) != (uchar)data) {
-	return (2);
-    }
+	/* Check if Flash is (sufficently) erased */
+	if ((*((volatile uchar *)dest) & (uchar)data) != (uchar)data)
+		return 2;
 
-    for (i=0; i < (4 / sizeof(uchar)); i++) {
-	/* Disable interrupts which might cause a timeout here */
-	flag = disable_interrupts();
+	for (i = 0; i < (4 / sizeof(uchar)); i++) {
+		/* Disable interrupts which might cause a timeout here */
+		flag = disable_interrupts();
 
-	*(addr2 + 0x555) = (uchar)0xAA;
-	*(addr2 + 0x2aa) = (uchar)0x55;
-	*(addr2 + 0x555) = (uchar)0xA0;
+		*(addr2 + 0x555) = (uchar) 0xAA;
+		*(addr2 + 0x2aa) = (uchar) 0x55;
+		*(addr2 + 0x555) = (uchar) 0xA0;
 
-	dest2[i] = data2[i];
+		dest2[i] = data2[i];
 
-	/* Wait for write to complete, up to 1ms */
-	tcode = wait_for_DQ7((ulong)&dest2[i], data2[i], 1);
+		/* Wait for write to complete, up to 1ms */
+		tcode = wait_for_DQ7((ulong) &dest2[i], data2[i], 1);
 
-	/* re-enable interrupts if necessary */
-	if (flag)
-	    enable_interrupts();
+		/* re-enable interrupts if necessary */
+		if (flag)
+			enable_interrupts();
 
-	/* Make sure we didn't timeout */
-	if (tcode) {
-	    rcode = 1;
+		/* Make sure we didn't timeout */
+		if (tcode)
+			rcode = 1;
 	}
-    }
 
-    return rcode;
-} /* end write_word8() */
+	return rcode;
+}
 
 static int write_word32(flash_info_t *info, ulong dest, ulong data)
 {
-    vu_long *addr = (vu_long *)dest;
-    ulong status;
-    ulong start;
-    int flag;
+	vu_long *addr = (vu_long *) dest;
+	ulong status;
+	ulong start;
+	int flag;
 
-    /* Check if Flash is (sufficiently) erased */
-    if ((*addr & data) != data) {
-	return (2);
-    }
-    /* Disable interrupts which might cause a timeout here */
-    flag = disable_interrupts();
+	/* Check if Flash is (sufficiently) erased */
+	if ((*addr & data) != data)
+		return 2;
 
-    *addr = 0x00400040;                      /* write setup */
-    *addr = data;
+	/* Disable interrupts which might cause a timeout here */
+	flag = disable_interrupts();
 
-    /* re-enable interrupts if necessary */
-    if (flag)
-	enable_interrupts();
+	*addr = 0x00400040;	/* write setup */
+	*addr = data;
 
-    start = get_timer (0);
+	/* re-enable interrupts if necessary */
+	if (flag)
+		enable_interrupts();
 
-    while (((status = *addr) & 0x00800080) != 0x00800080) {
-	WATCHDOG_RESET();
-	if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) {
-	    *addr = 0x00FF00FF;              /* restore read mode */
-	    return (1);
+	start = get_timer(0);
+
+	while (((status = *addr) & 0x00800080) != 0x00800080) {
+		WATCHDOG_RESET();
+		if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) {
+			*addr = 0x00FF00FF;	/* restore read mode */
+			return 1;
+		}
 	}
-    }
 
-    *addr = 0x00FF00FF;                      /* restore read mode */
+	*addr = 0x00FF00FF;	/* restore read mode */
 
-    return (0);
-} /* end write_word32() */
-
+	return 0;
+}
 
 static int _flash_protect(flash_info_t *info, long sector)
 {
-    int i;
-    int flag;
-    ulong status;
-    int rcode = 0;
-    volatile long *addr = (long *)sector;
+	int i;
+	int flag;
+	ulong status;
+	int rcode = 0;
+	volatile long *addr = (long *)sector;
 
-    switch(info->flash_id & FLASH_TYPEMASK) {
+	switch (info->flash_id & FLASH_TYPEMASK) {
 	case FLASH_28F320J3A:
 	case FLASH_28F640J3A:
 	case FLASH_28F128J3A:
-	    /* Disable interrupts which might cause Flash to timeout */
-	    flag = disable_interrupts();
+		/* Disable interrupts which might cause Flash to timeout */
+		flag = disable_interrupts();
 
-	    /* Issue command */
-	    *addr = 0x00500050L;             /* Clear the status register */
-	    *addr = 0x00600060L;             /* Set lock bit setup */
-	    *addr = 0x00010001L;             /* Set lock bit confirm */
+		/* Issue command */
+		*addr = 0x00500050L;	/* Clear the status register */
+		*addr = 0x00600060L;	/* Set lock bit setup */
+		*addr = 0x00010001L;	/* Set lock bit confirm */
 
-	    /* Wait for command completion */
-	    for (i = 0; i < 10; i++) {       /* 75us timeout, wait 100us */
-		udelay(10);
-		if ((*addr & 0x00800080L) == 0x00800080L)
-		    break;
-	    }
+		/* Wait for command completion */
+		for (i = 0; i < 10; i++) {	/* 75us timeout, wait 100us */
+			udelay(10);
+			if ((*addr & 0x00800080L) == 0x00800080L)
+				break;
+		}
 
-	    /* Not successful? */
-	    status = *addr;
-	    if (status != 0x00800080L) {
-		printf("Protect %x sector failed: %x\n",
-		       (uint)sector, (uint)status);
-		rcode = 1;
-	    }
+		/* Not successful? */
+		status = *addr;
+		if (status != 0x00800080L) {
+			printf("Protect %x sector failed: %x\n",
+			       (uint) sector, (uint) status);
+			rcode = 1;
+		}
 
-	    /* Restore read mode */
-	    *addr = 0x00ff00ffL;
+		/* Restore read mode */
+		*addr = 0x00ff00ffL;
 
-	    /* re-enable interrupts if necessary */
-	    if (flag)
-		enable_interrupts();
+		/* re-enable interrupts if necessary */
+		if (flag)
+			enable_interrupts();
 
-	    break;
-	case FLASH_AM040:                    /* No soft sector protection */
-	    break;
-    }
-
-    /* Turn protection on for this sector */
-    for (i = 0; i < info->sector_count; i++) {
-	if (info->start[i] == sector) {
-	    info->protect[i] = 1;
-	    break;
+		break;
+	case FLASH_AM040:	/* No soft sector protection */
+		break;
 	}
-    }
 
-    return rcode;
-} /* end _flash_protect() */
+	/* Turn protection on for this sector */
+	for (i = 0; i < info->sector_count; i++) {
+		if (info->start[i] == sector) {
+			info->protect[i] = 1;
+			break;
+		}
+	}
+
+	return rcode;
+}
 
 static int _flash_unprotect(flash_info_t *info, long sector)
 {
-    int i;
-    int flag;
-    ulong status;
-    int rcode = 0;
-    volatile long *addr = (long *)sector;
+	int i;
+	int flag;
+	ulong status;
+	int rcode = 0;
+	volatile long *addr = (long *) sector;
 
-    switch(info->flash_id & FLASH_TYPEMASK) {
+	switch (info->flash_id & FLASH_TYPEMASK) {
 	case FLASH_28F320J3A:
 	case FLASH_28F640J3A:
 	case FLASH_28F128J3A:
-	    /* Disable interrupts which might cause Flash to timeout */
-	    flag = disable_interrupts();
+		/* Disable interrupts which might cause Flash to timeout */
+		flag = disable_interrupts();
 
-	    *addr = 0x00500050L;             /* Clear the status register */
-	    *addr = 0x00600060L;             /* Clear lock bit setup */
-	    *addr = 0x00D000D0L;             /* Clear lock bit confirm */
+		*addr = 0x00500050L;	/* Clear the status register */
+		*addr = 0x00600060L;	/* Clear lock bit setup */
+		*addr = 0x00D000D0L;	/* Clear lock bit confirm */
 
-	    /* Wait for command completion */
-	    for (i = 0; i < 80 ; i++) {      /* 700ms timeout, wait 800 */
-		udelay(10000);               /* Delay 10ms */
-		if ((*addr & 0x00800080L) == 0x00800080L)
-		    break;
-	    }
+		/* Wait for command completion */
+		for (i = 0; i < 80; i++) {	/* 700ms timeout, wait 800 */
+			udelay(10000);	/* Delay 10ms */
+			if ((*addr & 0x00800080L) == 0x00800080L)
+				break;
+		}
 
-	    /* Not successful? */
-	    status = *addr;
-	    if (status != 0x00800080L) {
-		printf("Un-protect %x sector failed: %x\n",
-		       (uint)sector, (uint)status);
+		/* Not successful? */
+		status = *addr;
+		if (status != 0x00800080L) {
+			printf("Un-protect %x sector failed: %x\n",
+			       (uint) sector, (uint) status);
+			*addr = 0x00ff00ffL;
+			rcode = 1;
+		}
+
+		/* restore read mode */
 		*addr = 0x00ff00ffL;
-		rcode = 1;
-	    }
 
-	    /* restore read mode */
-	    *addr = 0x00ff00ffL;
+		/* re-enable interrupts if necessary */
+		if (flag)
+			enable_interrupts();
 
-	    /* re-enable interrupts if necessary */
-	    if (flag)
-		enable_interrupts();
-
-	    break;
-	case FLASH_AM040:                    /* No soft sector protection */
-	    break;
-    }
-
-    /*
-     * Fix Intel's little red wagon.  Reprotect
-     * sectors that were protected before we undid
-     * protection on a specific sector.
-     */
-    for (i = 0; i < info->sector_count; i++) {
-	if (info->start[i] != sector) {
-	    if (info->protect[i]) {
-		if (_flash_protect(info, info->start[i]))
-		    rcode = 1;
-	    }
+		break;
+	case FLASH_AM040:	/* No soft sector protection */
+		break;
 	}
-	else /* Turn protection off for this sector */
-	    info->protect[i] = 0;
-    }
 
-    return rcode;
-} /* end _flash_unprotect() */
+	/*
+	 * Fix Intel's little red wagon.  Reprotect
+	 * sectors that were protected before we undid
+	 * protection on a specific sector.
+	 */
+	for (i = 0; i < info->sector_count; i++) {
+		if (info->start[i] != sector) {
+			if (info->protect[i]) {
+				if (_flash_protect(info, info->start[i]))
+					rcode = 1;
+			}
+		} else		/* Turn protection off for this sector */
+			info->protect[i] = 0;
+	}
 
+	return rcode;
+}
 
 int flash_real_protect(flash_info_t *info, long sector, int prot)
 {
-    int rcode;
+	int rcode;
 
-    if (prot)
-	rcode = _flash_protect(info, info->start[sector]);
-    else
-	rcode = _flash_unprotect(info, info->start[sector]);
+	if (prot)
+		rcode = _flash_protect(info, info->start[sector]);
+	else
+		rcode = _flash_unprotect(info, info->start[sector]);
 
-    return rcode;
-} /* end flash_real_protect() */
-
-/*-----------------------------------------------------------------------
- */
+	return rcode;
+}
diff --git a/board/w7o/fpga.c b/board/w7o/fpga.c
index 100bce4..774f2ec 100644
--- a/board/w7o/fpga.c
+++ b/board/w7o/fpga.c
@@ -26,354 +26,362 @@
 #include <common.h>
 #include "w7o.h"
 #include <asm/processor.h>
+#include <linux/compiler.h>
 #include "errors.h"
 
 static void
 fpga_img_write(unsigned long *src, unsigned long len, unsigned short *daddr)
 {
-    unsigned long i;
-    volatile unsigned long val;
-    volatile unsigned short *dest = daddr;	/* volatile-bypass optimizer */
+	unsigned long i;
+	volatile unsigned long val;
+	volatile unsigned short *dest = daddr;	/* volatile-bypass optimizer */
 
-    for (i = 0; i < len; i++, src++) {
-	val = *src;
-	*dest = (unsigned short)((val & 0xff000000L) >> 16);
-	*dest = (unsigned short)((val & 0x00ff0000L) >> 8);
-	*dest = (unsigned short)(val & 0x0000ff00L);
-	*dest = (unsigned short)((val & 0x000000ffL) << 8);
-    }
+	for (i = 0; i < len; i++, src++) {
+		val = *src;
+		*dest = (unsigned short) ((val & 0xff000000L) >> 16);
+		*dest = (unsigned short) ((val & 0x00ff0000L) >> 8);
+		*dest = (unsigned short) (val & 0x0000ff00L);
+		*dest = (unsigned short) ((val & 0x000000ffL) << 8);
+	}
 
-    /* Terminate programming with 4 C clocks */
-    dest = daddr;
-    val = *(unsigned short *)dest;
-    val = *(unsigned short *)dest;
-    val = *(unsigned short *)dest;
-    val = *(unsigned short *)dest;
+	/* Terminate programming with 4 C clocks */
+	dest = daddr;
+	val = *(unsigned short *) dest;
+	val = *(unsigned short *) dest;
+	val = *(unsigned short *) dest;
+	val = *(unsigned short *) dest;
 
 }
 
 
 int
-fpgaDownload(unsigned char *saddr,
-	     unsigned long size,
-	     unsigned short *daddr)
+fpgaDownload(unsigned char *saddr, unsigned long size, unsigned short *daddr)
 {
-    int i;					/* index, intr disable flag */
-    int start;					/* timer */
-    unsigned long greg, grego;			/* GPIO & output register */
-    unsigned long length;			/* image size in words */
-    unsigned long *source;			/* image source addr */
-    unsigned short *dest;			/* destination FPGA addr */
-    volatile unsigned short *ndest;		/* temp dest FPGA addr */
-    volatile unsigned short val;		/* temp val */
-    unsigned long cnfg = GPIO_XCV_CNFG;		/* FPGA CNFG */
-    unsigned long eirq = GPIO_XCV_IRQ;
-    int retval = -1;				/* Function return value */
+	int i;			/* index, intr disable flag */
+	int start;		/* timer */
+	unsigned long greg, grego;	/* GPIO & output register */
+	unsigned long length;	/* image size in words */
+	unsigned long *source;	/* image source addr */
+	unsigned short *dest;	/* destination FPGA addr */
+	volatile unsigned short *ndest;	/* temp dest FPGA addr */
+	unsigned long cnfg = GPIO_XCV_CNFG;	/* FPGA CNFG */
+	unsigned long eirq = GPIO_XCV_IRQ;
+	int retval = -1;	/* Function return value */
+	__maybe_unused volatile unsigned short val;	/* temp val */
 
-    /* Setup some basic values */
-    length = (size / 4) + 1;			/* size in words, rounding UP
-						    is OK */
-    source = (unsigned long *)saddr;
-    dest = (unsigned short *)daddr;
+	/* Setup some basic values */
+	length = (size / 4) + 1;	/* size in words, rounding UP
+					   is OK */
+	source = (unsigned long *) saddr;
+	dest = (unsigned short *) daddr;
 
-    /* Get DCR output register */
-    grego = in32(PPC405GP_GPIO0_OR);
+	/* Get DCR output register */
+	grego = in32(PPC405GP_GPIO0_OR);
 
-    /* Reset FPGA */
-    grego &= ~GPIO_XCV_PROG;			/* PROG line low */
-    out32(PPC405GP_GPIO0_OR, grego);
-
-    /* Setup timeout timer */
-    start = get_timer(0);
-
-    /* Wait for FPGA init line */
-    while(in32(PPC405GP_GPIO0_IR) & GPIO_XCV_INIT) { /* Wait INIT line low */
-	/* Check for timeout - 100us max, so use 3ms */
-	if (get_timer(start) > 3) {
-	    printf("     failed to start init.\n");
-	    log_warn(ERR_XINIT0);		/* Don't halt */
-
-	    /* Reset line stays low */
-	    goto done;				/* I like gotos... */
-	}
-    }
-
-    /* Unreset FPGA */
-    grego |= GPIO_XCV_PROG;			/* PROG line high */
-    out32(PPC405GP_GPIO0_OR, grego);
-
-    /* Wait for FPGA end of init period .  */
-    while(!(in32(PPC405GP_GPIO0_IR) & GPIO_XCV_INIT)) { /* Wait for INIT hi */
-
-	/* Check for timeout */
-	if (get_timer(start) > 3) {
-	    printf("     failed to exit init.\n");
-	    log_warn(ERR_XINIT1);
-
-	    /* Reset FPGA */
-	    grego &= ~GPIO_XCV_PROG;		/* PROG line low */
-	    out32(PPC405GP_GPIO0_OR, grego);
-
-	    goto done;
-	}
-    }
-
-    /* Now program FPGA ... */
-    ndest = dest;
-    for (i = 0; i < CONFIG_NUM_FPGAS; i++) {
-	/* Toggle IRQ/GPIO */
-	greg = mfdcr(CPC0_CR0);			/* get chip ctrl register */
-	greg |= eirq;				/* toggle irq/gpio */
-	mtdcr(CPC0_CR0, greg);			/*  ... just do it */
-
-	/* turn on open drain for CNFG */
-	greg = in32(PPC405GP_GPIO0_ODR);	/* get open drain register */
-	greg |= cnfg;				/* CNFG open drain */
-	out32(PPC405GP_GPIO0_ODR, greg);	/*  .. just do it */
-
-	/* Turn output enable on for CNFG */
-	greg = in32(PPC405GP_GPIO0_TCR);	/* get tristate register */
-	greg |= cnfg;				/* CNFG tristate inactive */
-	out32(PPC405GP_GPIO0_TCR, greg);	/*  ... just do it */
-
-	/* Setup FPGA for programming */
-	grego &= ~cnfg;				/* CONFIG line low */
+	/* Reset FPGA */
+	grego &= ~GPIO_XCV_PROG;	/* PROG line low */
 	out32(PPC405GP_GPIO0_OR, grego);
 
-	/*
-	 * Program the FPGA
-	 */
-	printf("\n       destination: 0x%lx ", (unsigned long)ndest);
+	/* Setup timeout timer */
+	start = get_timer(0);
 
-	fpga_img_write(source,  length,  (unsigned short *)ndest);
+	/* Wait for FPGA init line to go low */
+	while (in32(PPC405GP_GPIO0_IR) & GPIO_XCV_INIT) {
+		/* Check for timeout - 100us max, so use 3ms */
+		if (get_timer(start) > 3) {
+			printf("     failed to start init.\n");
+			log_warn(ERR_XINIT0);	/* Don't halt */
 
-	/* Done programming */
-	grego |= cnfg;				/* CONFIG line high */
+			/* Reset line stays low */
+			goto done;	/* I like gotos... */
+		}
+	}
+
+	/* Unreset FPGA */
+	grego |= GPIO_XCV_PROG;	/* PROG line high */
 	out32(PPC405GP_GPIO0_OR, grego);
 
-	/* Turn output enable OFF for CNFG */
-	greg = in32(PPC405GP_GPIO0_TCR);	/* get tristate register */
-	greg &= ~cnfg;				/* CNFG tristate inactive */
-	out32(PPC405GP_GPIO0_TCR, greg);	/*  ... just do it */
+	/* Wait for FPGA end of init period = init line go hi  */
+	while (!(in32(PPC405GP_GPIO0_IR) & GPIO_XCV_INIT)) {
 
-	/* Toggle IRQ/GPIO */
-	greg = mfdcr(CPC0_CR0);			/* get chip ctrl register */
-	greg &= ~eirq;				/* toggle irq/gpio */
-	mtdcr(CPC0_CR0, greg);			/*  ... just do it */
+		/* Check for timeout */
+		if (get_timer(start) > 3) {
+			printf("     failed to exit init.\n");
+			log_warn(ERR_XINIT1);
 
-	ndest = (unsigned short *)((char *)ndest + 0x00100000L); /* XXX - Next FPGA addr */
-	cnfg >>= 1;				/* XXX - Next  */
-	eirq >>= 1;
-    }
+			/* Reset FPGA */
+			grego &= ~GPIO_XCV_PROG;	/* PROG line low */
+			out32(PPC405GP_GPIO0_OR, grego);
 
-    /* Terminate programming with 4 C clocks */
-    ndest = dest;
-    for (i = 0; i < CONFIG_NUM_FPGAS; i++) {
-	val = *ndest;
-	val = *ndest;
-	val = *ndest;
-	val = *ndest;
-	ndest = (unsigned short *)((char *)ndest + 0x00100000L);
-    }
-
-    /* Setup timer */
-    start = get_timer(0);
-
-    /* Wait for FPGA end of programming period .  */
-    while(!(in32(PPC405GP_GPIO0_IR) & GPIO_XCV_DONE)) { /* Test DONE low */
-
-	/* Check for timeout */
-	if (get_timer(start) > 3) {
-	    printf("     done failed to come high.\n");
-	    log_warn(ERR_XDONE1);
-
-	    /* Reset FPGA */
-	    grego &= ~GPIO_XCV_PROG;		/* PROG line low */
-	    out32(PPC405GP_GPIO0_OR, grego);
-
-	    goto done;
+			goto done;
+		}
 	}
-    }
 
-    printf("\n       FPGA load succeeded\n");
-    retval = 0;					/* Program OK */
+	/* Now program FPGA ... */
+	ndest = dest;
+	for (i = 0; i < CONFIG_NUM_FPGAS; i++) {
+		/* Toggle IRQ/GPIO */
+		greg = mfdcr(CPC0_CR0);	/* get chip ctrl register */
+		greg |= eirq;	/* toggle irq/gpio */
+		mtdcr(CPC0_CR0, greg);	/*  ... just do it */
+
+		/* turn on open drain for CNFG */
+		greg = in32(PPC405GP_GPIO0_ODR); /* get open drain register */
+		greg |= cnfg;	/* CNFG open drain */
+		out32(PPC405GP_GPIO0_ODR, greg); /*  .. just do it */
+
+		/* Turn output enable on for CNFG */
+		greg = in32(PPC405GP_GPIO0_TCR); /* get tristate register */
+		greg |= cnfg;	/* CNFG tristate inactive */
+		out32(PPC405GP_GPIO0_TCR, greg); /*  ... just do it */
+
+		/* Setup FPGA for programming */
+		grego &= ~cnfg;	/* CONFIG line low */
+		out32(PPC405GP_GPIO0_OR, grego);
+
+		/*
+		 * Program the FPGA
+		 */
+		printf("\n       destination: 0x%lx ", (unsigned long) ndest);
+
+		fpga_img_write(source, length, (unsigned short *) ndest);
+
+		/* Done programming */
+		grego |= cnfg;	/* CONFIG line high */
+		out32(PPC405GP_GPIO0_OR, grego);
+
+		/* Turn output enable OFF for CNFG */
+		greg = in32(PPC405GP_GPIO0_TCR); /* get tristate register */
+		greg &= ~cnfg;	/* CNFG tristate inactive */
+		out32(PPC405GP_GPIO0_TCR, greg); /*  ... just do it */
+
+		/* Toggle IRQ/GPIO */
+		greg = mfdcr(CPC0_CR0);	/* get chip ctrl register */
+		greg &= ~eirq;	/* toggle irq/gpio */
+		mtdcr(CPC0_CR0, greg);	/*  ... just do it */
+
+		/* XXX - Next FPGA addr */
+		ndest = (unsigned short *) ((char *) ndest + 0x00100000L);
+		cnfg >>= 1;	/* XXX - Next  */
+		eirq >>= 1;
+	}
+
+	/* Terminate programming with 4 C clocks */
+	ndest = dest;
+	for (i = 0; i < CONFIG_NUM_FPGAS; i++) {
+		val = *ndest;
+		val = *ndest;
+		val = *ndest;
+		val = *ndest;
+		ndest = (unsigned short *) ((char *) ndest + 0x00100000L);
+	}
+
+	/* Setup timer */
+	start = get_timer(0);
+
+	/* Wait for FPGA end of programming period = Test DONE low  */
+	while (!(in32(PPC405GP_GPIO0_IR) & GPIO_XCV_DONE)) {
+
+		/* Check for timeout */
+		if (get_timer(start) > 3) {
+			printf("     done failed to come high.\n");
+			log_warn(ERR_XDONE1);
+
+			/* Reset FPGA */
+			grego &= ~GPIO_XCV_PROG;	/* PROG line low */
+			out32(PPC405GP_GPIO0_OR, grego);
+
+			goto done;
+		}
+	}
+
+	printf("\n       FPGA load succeeded\n");
+	retval = 0;		/* Program OK */
 
 done:
-    return retval;
+	return retval;
 }
 
 /* FPGA image is stored in flash */
-extern flash_info_t    flash_info[];
+extern flash_info_t flash_info[];
 
 int init_fpga(void)
 {
-    unsigned int i,j,ptr;			/* General purpose */
-    unsigned char bufchar;			/* General purpose character */
-    unsigned char *buf;				/* Start of image pointer */
-    unsigned long len;				/* Length of image */
-    unsigned char *fn_buf;			/* Start of filename string */
-    unsigned int fn_len;			/* Length of filename string */
-    unsigned char *xcv_buf;			/* Pointer to start of image */
-    unsigned long xcv_len;			/* Length of image */
-    unsigned long crc;				/* 30bit crc in image */
-    unsigned long calc_crc;			/* Calc'd 30bit crc */
-    int retval = -1;
+	unsigned int i, j, ptr;	/* General purpose */
+	unsigned char bufchar;	/* General purpose character */
+	unsigned char *buf;	/* Start of image pointer */
+	unsigned long len;	/* Length of image */
+	unsigned char *fn_buf;	/* Start of filename string */
+	unsigned int fn_len;	/* Length of filename string */
+	unsigned char *xcv_buf;	/* Pointer to start of image */
+	unsigned long xcv_len;	/* Length of image */
+	unsigned long crc;	/* 30bit crc in image */
+	unsigned long calc_crc;	/* Calc'd 30bit crc */
+	int retval = -1;
 
-    /* Tell the world what we are doing */
-    printf("FPGA:  ");
+	/* Tell the world what we are doing */
+	printf("FPGA:  ");
 
-    /*
-     * Get address of first sector where the FPGA
-     * image is stored.
-     */
-    buf = (unsigned char *)flash_info[1].start[0];
+	/*
+	 * Get address of first sector where the FPGA
+	 * image is stored.
+	 */
+	buf = (unsigned char *) flash_info[1].start[0];
 
-    /*
-     * Get the stored image's CRC & length.
-     */
-    crc = *(unsigned long *)(buf+4);		/* CRC is first long word */
-    len = *(unsigned long *)(buf+8);		/* Image len is next long */
+	/*
+	 * Get the stored image's CRC & length.
+	 */
+	crc = *(unsigned long *) (buf + 4);	/* CRC is first long word */
+	len = *(unsigned long *) (buf + 8);	/* Image len is next long */
 
-    /* Pedantic */
-    if ((len < 0x133A4) || (len > 0x80000))
-	goto bad_image;
+	/* Pedantic */
+	if ((len < 0x133A4) || (len > 0x80000))
+		goto bad_image;
 
-    /*
-     * Get the file name pointer and length.
-     */
-    fn_len = (*(unsigned short *)(buf+12) & 0xff); /* filename length
-						      is next short */
-    fn_buf = buf + 14;
+	/*
+	 * Get the file name pointer and length.
+	 * filename length is next short
+	 */
+	fn_len = (*(unsigned short *) (buf + 12) & 0xff);
+	fn_buf = buf + 14;
 
-    /*
-     * Get the FPGA image pointer and length length.
-     */
-    xcv_buf = fn_buf + fn_len;			/* pointer to fpga image */
-    xcv_len = len - 14 - fn_len;		/* fpga image length */
+	/*
+	 * Get the FPGA image pointer and length length.
+	 */
+	xcv_buf = fn_buf + fn_len;	/* pointer to fpga image */
+	xcv_len = len - 14 - fn_len;	/* fpga image length */
 
-    /* Check for uninitialized FLASH */
-    if ((strncmp((char *)buf, "w7o", 3)!=0) || (len > 0x0007ffffL) || (len == 0))
-	goto bad_image;
+	/* Check for uninitialized FLASH */
+	if ((strncmp((char *) buf, "w7o", 3) != 0) || (len > 0x0007ffffL)
+	    || (len == 0))
+		goto bad_image;
 
-    /*
-     * Calculate and Check the image's CRC.
-     */
-    calc_crc = crc32(0, xcv_buf, xcv_len);
-    if (crc != calc_crc) {
-	printf("\nfailed - bad CRC\n");
-	goto done;
-    }
+	/*
+	 * Calculate and Check the image's CRC.
+	 */
+	calc_crc = crc32(0, xcv_buf, xcv_len);
+	if (crc != calc_crc) {
+		printf("\nfailed - bad CRC\n");
+		goto done;
+	}
 
-    /* Output the file name */
-    printf("file name  : ");
-    for (i=0;i<fn_len;i++) {
-	bufchar = fn_buf[+i];
-	if (bufchar<' ' || bufchar>'~') bufchar = '.';
-	putc(bufchar);
-    }
+	/* Output the file name */
+	printf("file name  : ");
+	for (i = 0; i < fn_len; i++) {
+		bufchar = fn_buf[+i];
+		if (bufchar < ' ' || bufchar > '~')
+			bufchar = '.';
+		putc(bufchar);
+	}
 
-    /*
-     * find rest of display data
-     */
-    ptr = 15;					/* Offset to ncd filename
-						   length in fpga image */
-    j = xcv_buf[ptr];				/* Get len of ncd filename */
-    if (j > 32) goto bad_image;
-    ptr = ptr + j + 3;				/* skip ncd filename string +
-						   3 bytes more bytes */
+	/*
+	 * find rest of display data
+	 */
+	ptr = 15;		/* Offset to ncd filename
+				   length in fpga image */
+	j = xcv_buf[ptr];	/* Get len of ncd filename */
+	if (j > 32)
+		goto bad_image;
+	ptr = ptr + j + 3;	/* skip ncd filename string +
+				   3 bytes more bytes */
 
-    /*
-     * output target device string
-     */
-    j = xcv_buf[ptr++] - 1;			/* len of targ str less term */
-    if (j > 32) goto bad_image;
-    printf("\n       target     : ");
-    for (i = 0; i < j; i++) {
-	bufchar = (xcv_buf[ptr++]);
-	if (bufchar<' ' || bufchar>'~') bufchar = '.';
-	putc(bufchar);
-    }
+	/*
+	 * output target device string
+	 */
+	j = xcv_buf[ptr++] - 1;	/* len of targ str less term */
+	if (j > 32)
+		goto bad_image;
+	printf("\n       target     : ");
+	for (i = 0; i < j; i++) {
+		bufchar = (xcv_buf[ptr++]);
+		if (bufchar < ' ' || bufchar > '~')
+			bufchar = '.';
+		putc(bufchar);
+	}
 
-    /*
-     * output compilation date string and time string
-     */
-    ptr += 3;					/* skip 2 bytes */
-    printf("\n       synth time : ");
-    j = (xcv_buf[ptr++] - 1);			/* len of date str less term */
-    if (j > 32) goto bad_image;
-    for (i = 0; i < j; i++) {
-	bufchar = (xcv_buf[ptr++]);
-	if (bufchar<' ' || bufchar>'~') bufchar = '.';
-	putc(bufchar);
-    }
+	/*
+	 * output compilation date string and time string
+	 */
+	ptr += 3;		/* skip 2 bytes */
+	printf("\n       synth time : ");
+	j = (xcv_buf[ptr++] - 1);	/* len of date str less term */
+	if (j > 32)
+		goto bad_image;
+	for (i = 0; i < j; i++) {
+		bufchar = (xcv_buf[ptr++]);
+		if (bufchar < ' ' || bufchar > '~')
+			bufchar = '.';
+		putc(bufchar);
+	}
 
-    ptr += 3;					/* Skip 2 bytes */
-    printf(" - ");
-    j = (xcv_buf[ptr++] - 1);			/* slen = targ dev str len */
-    if (j > 32) goto bad_image;
-    for (i = 0; i < j; i++) {
-	bufchar = (xcv_buf[ptr++]);
-	if (bufchar<' ' || bufchar>'~') bufchar = '.';
-	putc(bufchar);
-    }
+	ptr += 3;		/* Skip 2 bytes */
+	printf(" - ");
+	j = (xcv_buf[ptr++] - 1);	/* slen = targ dev str len */
+	if (j > 32)
+		goto bad_image;
+	for (i = 0; i < j; i++) {
+		bufchar = (xcv_buf[ptr++]);
+		if (bufchar < ' ' || bufchar > '~')
+			bufchar = '.';
+		putc(bufchar);
+	}
 
-    /*
-     * output crc and length strings
-     */
-    printf("\n       len & crc  : 0x%lx  0x%lx", len, crc);
+	/*
+	 * output crc and length strings
+	 */
+	printf("\n       len & crc  : 0x%lx  0x%lx", len, crc);
 
-    /*
-     * Program the FPGA.
-     */
-    retval = fpgaDownload((unsigned char*)xcv_buf, xcv_len,
-			  (unsigned short *)0xfd000000L);
-    return retval;
+	/*
+	 * Program the FPGA.
+	 */
+	retval = fpgaDownload((unsigned char *) xcv_buf, xcv_len,
+			      (unsigned short *) 0xfd000000L);
+	return retval;
 
 bad_image:
-    printf("\n       BAD FPGA image format @ %lx\n", flash_info[1].start[0]);
-    log_warn(ERR_XIMAGE);
+	printf("\n       BAD FPGA image format @ %lx\n",
+	       flash_info[1].start[0]);
+	log_warn(ERR_XIMAGE);
 done:
-    return retval;
+	return retval;
 }
 
 void test_fpga(unsigned short *daddr)
 {
-    int i;
-    volatile unsigned short *ndest = daddr;
+	int i;
+	volatile unsigned short *ndest = daddr;
 
-    for (i = 0; i < CONFIG_NUM_FPGAS; i++) {
+	for (i = 0; i < CONFIG_NUM_FPGAS; i++) {
 #if defined(CONFIG_W7OLMG)
-	ndest[0x7e] = 0x55aa;
-	if (ndest[0x7e] != 0x55aa)
-	    log_warn(ERR_XRW1 + i);
-	ndest[0x7e] = 0xaa55;
-	if (ndest[0x7e] != 0xaa55)
-	    log_warn(ERR_XRW1 + i);
-	ndest[0x7e] = 0xc318;
-	if (ndest[0x7e] != 0xc318)
-	    log_warn(ERR_XRW1 + i);
+		ndest[0x7e] = 0x55aa;
+		if (ndest[0x7e] != 0x55aa)
+			log_warn(ERR_XRW1 + i);
+		ndest[0x7e] = 0xaa55;
+		if (ndest[0x7e] != 0xaa55)
+			log_warn(ERR_XRW1 + i);
+		ndest[0x7e] = 0xc318;
+		if (ndest[0x7e] != 0xc318)
+			log_warn(ERR_XRW1 + i);
 
 #elif defined(CONFIG_W7OLMC)
-	ndest[0x800] = 0x55aa;
-	ndest[0x801] = 0xaa55;
-	ndest[0x802] = 0xc318;
-	ndest[0x4800] = 0x55aa;
-	ndest[0x4801] = 0xaa55;
-	ndest[0x4802] = 0xc318;
-	if ((ndest[0x800] != 0x55aa) ||
-	    (ndest[0x801] != 0xaa55) ||
-	    (ndest[0x802] != 0xc318))
-	    log_warn(ERR_XRW1 + (2 * i));       /* Auto gen error code */
-	if ((ndest[0x4800] != 0x55aa) ||
-	    (ndest[0x4801] != 0xaa55) ||
-	    (ndest[0x4802] != 0xc318))
-	    log_warn(ERR_XRW2 + (2 * i));       /* Auto gen error code */
+		ndest[0x800] = 0x55aa;
+		ndest[0x801] = 0xaa55;
+		ndest[0x802] = 0xc318;
+		ndest[0x4800] = 0x55aa;
+		ndest[0x4801] = 0xaa55;
+		ndest[0x4802] = 0xc318;
+		if ((ndest[0x800] != 0x55aa) ||
+		    (ndest[0x801] != 0xaa55) || (ndest[0x802] != 0xc318))
+			log_warn(ERR_XRW1 + (2 * i)); /* Auto gen error code */
+		if ((ndest[0x4800] != 0x55aa) ||
+		    (ndest[0x4801] != 0xaa55) || (ndest[0x4802] != 0xc318))
+			log_warn(ERR_XRW2 + (2 * i)); /* Auto gen error code */
 
 #else
-# error "Unknown W7O board configuration"
+#error "Unknown W7O board configuration"
 #endif
-    }
+	}
 
-    printf("       FPGA ready\n");
-    return;
+	printf("       FPGA ready\n");
+	return;
 }
diff --git a/board/w7o/vpd.c b/board/w7o/vpd.c
index 57558e8..ba46d71 100644
--- a/board/w7o/vpd.c
+++ b/board/w7o/vpd.c
@@ -22,11 +22,11 @@
  */
 
 #if defined(VXWORKS)
-# include <stdio.h>
-# include <string.h>
-# define CONFIG_SYS_DEF_EEPROM_ADDR 0xa0
-extern char iicReadByte( char, char );
-extern ulong_t crc32( unsigned char *, unsigned long );
+#include <stdio.h>
+#include <string.h>
+#define CONFIG_SYS_DEF_EEPROM_ADDR 0xa0
+extern char iicReadByte(char, char);
+extern ulong_t crc32(unsigned char *, unsigned long);
 #else
 #include <common.h>
 #endif
@@ -37,78 +37,79 @@
  * vpd_reader() - reads VPD data from I2C EEPROMS.
  *                returns pointer to buffer or NULL.
  */
-static unsigned char *
-vpd_reader(unsigned char *buf, unsigned dev_addr, unsigned off, unsigned count)
+static unsigned char *vpd_reader(unsigned char *buf, unsigned dev_addr,
+				 unsigned off, unsigned count)
 {
-    unsigned offset = off;			/* Calculated offset */
+	unsigned offset = off;	/* Calculated offset */
 
-    /*
-     * The main board EEPROM contains
-     * SDRAM SPD in the first 128 bytes,
-     * so skew the offset.
-     */
-    if (dev_addr == CONFIG_SYS_DEF_EEPROM_ADDR)
-	offset += SDRAM_SPD_DATA_SIZE;
+	/*
+	 * The main board EEPROM contains
+	 * SDRAM SPD in the first 128 bytes,
+	 * so skew the offset.
+	 */
+	if (dev_addr == CONFIG_SYS_DEF_EEPROM_ADDR)
+		offset += SDRAM_SPD_DATA_SIZE;
 
-    /* Try to read the I2C EEPROM */
+	/* Try to read the I2C EEPROM */
 #if defined(VXWORKS)
-    {
-	int i;
-	for( i = 0; i < count; ++i ) {
-	    buf[ i ] = iicReadByte( dev_addr, offset+i );
+	{
+		int i;
+
+		for (i = 0; i < count; ++i)
+			buf[i] = iicReadByte(dev_addr, offset + i);
 	}
-    }
 #else
-    if (eeprom_read(dev_addr, offset, buf, count)) {
-	printf("Failed to read %d bytes from VPD EEPROM 0x%x @ 0x%x\n",
-	       count, dev_addr, offset);
-	return NULL;
-    }
+	if (eeprom_read(dev_addr, offset, buf, count)) {
+		printf("Failed to read %d bytes from VPD EEPROM 0x%x @ 0x%x\n",
+			count, dev_addr, offset);
+		return NULL;
+	}
 #endif
 
-    return buf;
-} /* vpd_reader() */
+	return buf;
+}
 
 
 /*
  * vpd_get_packet() - returns next VPD packet or NULL.
  */
-static vpd_packet_t *vpd_get_packet(vpd_packet_t *vpd_packet)
+static vpd_packet_t *vpd_get_packet(vpd_packet_t * vpd_packet)
 {
-    vpd_packet_t *packet = vpd_packet;
+	vpd_packet_t *packet = vpd_packet;
 
-    if (packet != NULL) {
-	if (packet->identifier == VPD_PID_TERM)
-	    return NULL;
-	else
-	    packet = (vpd_packet_t *)((char *)packet + packet->size + 2);
-    }
+	if (packet != NULL) {
+		if (packet->identifier == VPD_PID_TERM)
+			return NULL;
+		else
+			packet = (vpd_packet_t *) ((char *) packet +
+						   packet->size + 2);
+	}
 
-    return packet;
-} /* vpd_get_packet() */
+	return packet;
+}
 
 
 /*
  * vpd_find_packet() - Locates and returns the specified
  *		       VPD packet or NULL on error.
  */
-static vpd_packet_t *vpd_find_packet(vpd_t *vpd, unsigned char ident)
+static vpd_packet_t *vpd_find_packet(vpd_t * vpd, unsigned char ident)
 {
-    vpd_packet_t *packet = (vpd_packet_t *)&vpd->packets;
+	vpd_packet_t *packet = (vpd_packet_t *) &vpd->packets;
 
-    /* Guaranteed illegal */
-    if (ident == VPD_PID_GI)
-	return NULL;
+	/* Guaranteed illegal */
+	if (ident == VPD_PID_GI)
+		return NULL;
 
-    /* Scan tuples looking for a match */
-    while ((packet->identifier != ident) &&
-	   (packet->identifier != VPD_PID_TERM))
-	packet = vpd_get_packet(packet);
+	/* Scan tuples looking for a match */
+	while ((packet->identifier != ident) &&
+	       (packet->identifier != VPD_PID_TERM))
+		packet = vpd_get_packet(packet);
 
-    /* Did we find it? */
-    if ((packet->identifier) && (packet->identifier != ident))
-	return NULL;
-    return packet;
+	/* Did we find it? */
+	if ((packet->identifier) && (packet->identifier != ident))
+		return NULL;
+	return packet;
 }
 
 
@@ -119,62 +120,70 @@
  */
 static int vpd_is_valid(unsigned dev_addr, unsigned char *buf)
 {
-    unsigned	    num_bytes;
-    vpd_packet_t    *packet;
-    vpd_t	    *vpd = (vpd_t *)buf;
-    unsigned short  stored_crc16, calc_crc16 = 0xffff;
+	unsigned num_bytes;
+	vpd_packet_t *packet;
+	vpd_t *vpd = (vpd_t *) buf;
+	unsigned short stored_crc16, calc_crc16 = 0xffff;
 
-    /* Check Eyecatcher */
-    if (strncmp((char *)(vpd->header.eyecatcher), VPD_EYECATCHER, VPD_EYE_SIZE) != 0) {
-	unsigned offset = 0;
-	if (dev_addr == CONFIG_SYS_DEF_EEPROM_ADDR)
-	    offset += SDRAM_SPD_DATA_SIZE;
-	printf("Error: VPD EEPROM 0x%x corrupt @ 0x%x\n", dev_addr, offset);
+	/* Check Eyecatcher */
+	if (strncmp
+	    ((char *) (vpd->header.eyecatcher), VPD_EYECATCHER,
+	     VPD_EYE_SIZE) != 0) {
+		unsigned offset = 0;
 
-	return 0;
-    }
+		if (dev_addr == CONFIG_SYS_DEF_EEPROM_ADDR)
+			offset += SDRAM_SPD_DATA_SIZE;
+		printf("Error: VPD EEPROM 0x%x corrupt @ 0x%x\n", dev_addr,
+		       offset);
 
-    /* Check Length */
-    if (vpd->header.size> VPD_MAX_EEPROM_SIZE) {
-	printf("Error: VPD EEPROM 0x%x contains bad size 0x%x\n",
-	       dev_addr, vpd->header.size);
-	return 0;
-    }
+		return 0;
+	}
 
-    /* Now find the termination packet */
-    if ((packet = vpd_find_packet(vpd, VPD_PID_TERM)) == NULL) {
-	printf("Error: VPD EEPROM 0x%x missing termination packet\n",
-	       dev_addr);
-	return 0;
-    }
+	/* Check Length */
+	if (vpd->header.size > VPD_MAX_EEPROM_SIZE) {
+		printf("Error: VPD EEPROM 0x%x contains bad size 0x%x\n",
+		       dev_addr, vpd->header.size);
+		return 0;
+	}
 
-    /* Calculate data size */
-    num_bytes = (unsigned long)((unsigned char *)packet -
-				(unsigned char *)vpd + sizeof(vpd_packet_t));
+	/* Now find the termination packet */
+	packet = vpd_find_packet(vpd, VPD_PID_TERM);
+	if (packet == NULL) {
+		printf("Error: VPD EEPROM 0x%x missing termination packet\n",
+		       dev_addr);
+		return 0;
+	}
 
-    /* Find stored CRC and clear it */
-    if ((packet = vpd_find_packet(vpd, VPD_PID_CRC)) == NULL) {
-	printf("Error: VPD EEPROM 0x%x missing CRC\n", dev_addr);
-	return 0;
-    }
-    stored_crc16 = *((ushort *)packet->data);
-    *(ushort *)packet->data = 0;
+	/* Calculate data size */
+	num_bytes = (unsigned long) ((unsigned char *) packet -
+				     (unsigned char *) vpd +
+				     sizeof(vpd_packet_t));
 
-    /* OK, lets calculate the CRC and check it */
+	/* Find stored CRC and clear it */
+	packet = vpd_find_packet(vpd, VPD_PID_CRC);
+	if (packet == NULL) {
+		printf("Error: VPD EEPROM 0x%x missing CRC\n", dev_addr);
+		return 0;
+	}
+	memcpy(&stored_crc16, packet->data, sizeof(ushort));
+	memset(packet->data, 0, sizeof(ushort));
+
+	/* OK, lets calculate the CRC and check it */
 #if defined(VXWORKS)
-    calc_crc16 = (0xffff & crc32(buf, num_bytes));
+	calc_crc16 = (0xffff & crc32(buf, num_bytes));
 #else
-    calc_crc16 = (0xffff & crc32(0, buf, num_bytes));
+	calc_crc16 = (0xffff & crc32(0, buf, num_bytes));
 #endif
-    *(ushort *)packet->data = stored_crc16;     /* Now restore the CRC */
-    if (stored_crc16 != calc_crc16) {
-	printf("Error: VPD EEPROM 0x%x has bad CRC 0x%x\n",
-	       dev_addr, stored_crc16);
-	return 0;
-    }
+	/* Now restore the CRC */
+	memcpy(packet->data, &stored_crc16, sizeof(ushort));
+	if (stored_crc16 != calc_crc16) {
+		printf("Error: VPD EEPROM 0x%x has bad CRC 0x%x\n",
+		       dev_addr, stored_crc16);
+		return 0;
+	}
 
-    return 1;
-} /* vpd_is_valid() */
+	return 1;
+}
 
 
 /*
@@ -184,12 +193,12 @@
  */
 static int size_ok(vpd_packet_t *packet, unsigned long size)
 {
-    if (packet->size != size) {
-	printf("VPD Packet 0x%x corrupt.\n", packet->identifier);
-	return 0;
-    }
-    return 1;
-} /* size_ok() */
+	if (packet->size != size) {
+		printf("VPD Packet 0x%x corrupt.\n", packet->identifier);
+		return 0;
+	}
+	return 1;
+}
 
 
 /*
@@ -199,12 +208,12 @@
  */
 static int strlen_ok(vpd_packet_t *packet, unsigned long length)
 {
-    if (packet->size >= length) {
-	printf("VPD Packet 0x%x corrupt.\n", packet->identifier);
-	return 0;
-    }
-    return 1;
-} /* strlen_ok() */
+	if (packet->size >= length) {
+		printf("VPD Packet 0x%x corrupt.\n", packet->identifier);
+		return 0;
+	}
+	return 1;
+}
 
 
 /*
@@ -215,110 +224,116 @@
  */
 int vpd_get_data(unsigned char dev_addr, VPD *vpdInfo)
 {
-    unsigned char buf[VPD_EEPROM_SIZE];
-    vpd_t *vpd = (vpd_t *)buf;
-    vpd_packet_t *packet;
+	unsigned char buf[VPD_EEPROM_SIZE];
+	vpd_t *vpd = (vpd_t *) buf;
+	vpd_packet_t *packet;
 
-    if (vpdInfo == NULL)
-	return 1;
+	if (vpdInfo == NULL)
+		return 1;
 
-     /*
-      * Fill vpdInfo with 0s to blank out
-      * unused fields, fill vpdInfo->ethAddrs
-      * with all 0xffs so that other's code can
-      * determine how many real Ethernet addresses
-      * there are.  OUIs starting with 0xff are
-      * broadcast addresses, and would never be
-      * permantely stored.
-      */
-    memset((void *)vpdInfo, 0, sizeof(VPD));
-    memset((void *)&vpdInfo->ethAddrs, 0xff, sizeof(vpdInfo->ethAddrs));
-    vpdInfo->_devAddr = dev_addr;
+	/*
+	 * Fill vpdInfo with 0s to blank out
+	 * unused fields, fill vpdInfo->ethAddrs
+	 * with all 0xffs so that other's code can
+	 * determine how many real Ethernet addresses
+	 * there are.  OUIs starting with 0xff are
+	 * broadcast addresses, and would never be
+	 * permantely stored.
+	 */
+	memset((void *) vpdInfo, 0, sizeof(VPD));
+	memset((void *) &vpdInfo->ethAddrs, 0xff, sizeof(vpdInfo->ethAddrs));
+	vpdInfo->_devAddr = dev_addr;
 
-    /* Read the minimum size first */
-    if (vpd_reader(buf, dev_addr, 0, VPD_EEPROM_SIZE) == NULL) {
-	return 1;
-    }
+	/* Read the minimum size first */
+	if (vpd_reader(buf, dev_addr, 0, VPD_EEPROM_SIZE) == NULL)
+		return 1;
 
-    /* Check validity of VPD data */
-    if (!vpd_is_valid(dev_addr, buf)) {
-	printf("VPD Data is INVALID!\n");
-	return 1;
-    }
-
-    /*
-      * Walk all the packets and populate
-      * the VPD info structure.
-      */
-    packet = (vpd_packet_t *)&vpd->packets;
-    do {
-	switch (packet->identifier) {
-	    case VPD_PID_GI:
-		printf("Error: Illegal VPD value\n");
-		break;
-	    case VPD_PID_PID:
-		if (strlen_ok(packet, MAX_PROD_ID)) {
-		    strncpy(vpdInfo->productId,
-			    (char *)(packet->data), packet->size);
-		}
-		break;
-	    case VPD_PID_REV:
-		if (size_ok(packet, sizeof(char)))
-		    vpdInfo->revisionId = *packet->data;
-		break;
-	    case VPD_PID_SN:
-		if (size_ok(packet, sizeof(unsigned long))) {
-		    vpdInfo->serialNum =
-			*(unsigned long *)packet->data;
-		}
-		break;
-	    case VPD_PID_MANID:
-		if (size_ok(packet, sizeof(unsigned char)))
-		    vpdInfo->manuID = *packet->data;
-		break;
-	    case VPD_PID_PCO:
-		if (size_ok(packet, sizeof(unsigned long))) {
-		    vpdInfo->configOpt =
-			*(unsigned long *)packet->data;
-		}
-		break;
-	    case VPD_PID_SYSCLK:
-		if (size_ok(packet, sizeof(unsigned long)))
-		    vpdInfo->sysClk = *(unsigned long *)packet->data;
-		break;
-	    case VPD_PID_SERCLK:
-		if (size_ok(packet, sizeof(unsigned long)))
-		    vpdInfo->serClk = *(unsigned long *)packet->data;
-		break;
-	    case VPD_PID_FLASH:
-		if (size_ok(packet, 9)) {	/* XXX - hardcoded,
-						   padding in struct */
-		    memcpy(&vpdInfo->flashCfg, packet->data, 9);
-		}
-		break;
-	    case VPD_PID_ETHADDR:
-		memcpy(vpdInfo->ethAddrs, packet->data, packet->size);
-		break;
-	    case VPD_PID_POTS:
-		if (size_ok(packet, sizeof(char)))
-		    vpdInfo->numPOTS = (unsigned)*packet->data;
-		break;
-	    case VPD_PID_DS1:
-		if (size_ok(packet, sizeof(char)))
-		    vpdInfo->numDS1 = (unsigned)*packet->data;
-	    case VPD_PID_GAL:
-	    case VPD_PID_CRC:
-	    case VPD_PID_TERM:
-		break;
-	    default:
-		printf("Warning: Found unknown VPD packet ID 0x%x\n",
-		       packet->identifier);
-		break;
+	/* Check validity of VPD data */
+	if (!vpd_is_valid(dev_addr, buf)) {
+		printf("VPD Data is INVALID!\n");
+		return 1;
 	}
-    } while ((packet = vpd_get_packet(packet)));
 
-    return 0;
-} /* end get_vpd_data() */
+	/*
+	 * Walk all the packets and populate
+	 * the VPD info structure.
+	 */
+	packet = (vpd_packet_t *) &vpd->packets;
+	do {
+		switch (packet->identifier) {
+		case VPD_PID_GI:
+			printf("Error: Illegal VPD value\n");
+			break;
+		case VPD_PID_PID:
+			if (strlen_ok(packet, MAX_PROD_ID)) {
+				strncpy(vpdInfo->productId,
+					(char *) (packet->data),
+					packet->size);
+			}
+			break;
+		case VPD_PID_REV:
+			if (size_ok(packet, sizeof(char)))
+				vpdInfo->revisionId = *packet->data;
+			break;
+		case VPD_PID_SN:
+			if (size_ok(packet, sizeof(unsigned long))) {
+				memcpy(&vpdInfo->serialNum,
+					packet->data,
+					sizeof(unsigned long));
+			}
+			break;
+		case VPD_PID_MANID:
+			if (size_ok(packet, sizeof(unsigned char)))
+				vpdInfo->manuID = *packet->data;
+			break;
+		case VPD_PID_PCO:
+			if (size_ok(packet, sizeof(unsigned long))) {
+				memcpy(&vpdInfo->configOpt,
+					packet->data,
+					sizeof(unsigned long));
+			}
+			break;
+		case VPD_PID_SYSCLK:
+			if (size_ok(packet, sizeof(unsigned long)))
+				memcpy(&vpdInfo->sysClk,
+					packet->data,
+					sizeof(unsigned long));
+			break;
+		case VPD_PID_SERCLK:
+			if (size_ok(packet, sizeof(unsigned long)))
+				memcpy(&vpdInfo->serClk,
+					packet->data,
+					sizeof(unsigned long));
+			break;
+		case VPD_PID_FLASH:
+			if (size_ok(packet, 9)) {	/* XXX - hardcoded,
+							   padding in struct */
+				memcpy(&vpdInfo->flashCfg, packet->data, 9);
+			}
+			break;
+		case VPD_PID_ETHADDR:
+			memcpy(vpdInfo->ethAddrs, packet->data, packet->size);
+			break;
+		case VPD_PID_POTS:
+			if (size_ok(packet, sizeof(char)))
+				vpdInfo->numPOTS = (unsigned) *packet->data;
+			break;
+		case VPD_PID_DS1:
+			if (size_ok(packet, sizeof(char)))
+				vpdInfo->numDS1 = (unsigned) *packet->data;
+		case VPD_PID_GAL:
+		case VPD_PID_CRC:
+		case VPD_PID_TERM:
+			break;
+		default:
+			printf("Warning: Found unknown VPD packet ID 0x%x\n",
+			       packet->identifier);
+			break;
+		}
+	} while ((packet = vpd_get_packet(packet)));
+
+	return 0;
+}
 
 
 /*
@@ -326,8 +341,8 @@
  */
 int vpd_init(unsigned char dev_addr)
 {
-    return (0);
-} /* vpd_init() */
+	return 0;
+}
 
 
 /*
@@ -335,73 +350,79 @@
  */
 void vpd_print(VPD *vpdInfo)
 {
-    const char *const sp    = "";
-    const char *const sfmt  = "%4s%-20s: \"%s\"\n";
-    const char *const cfmt  = "%4s%-20s: '%c'\n";
-    const char *const dfmt  = "%4s%-20s: %ld\n";
-    const char *const hfmt  = "%4s%-20s: %08lX\n";
-    const char *const dsfmt = "%4s%-20s: %d\n";
-    const char *const hsfmt = "%4s%-20s: %04X\n";
-    const char *const dhfmt = "%4s%-20s: %ld (%lX)\n";
+	const char *const sp = "";
+	const char *const sfmt = "%4s%-20s: \"%s\"\n";
+	const char *const cfmt = "%4s%-20s: '%c'\n";
+	const char *const dfmt = "%4s%-20s: %ld\n";
+	const char *const hfmt = "%4s%-20s: %08lX\n";
+	const char *const dsfmt = "%4s%-20s: %d\n";
+	const char *const hsfmt = "%4s%-20s: %04X\n";
+	const char *const dhfmt = "%4s%-20s: %ld (%lX)\n";
 
-    printf("VPD read from I2C device: %02X\n", vpdInfo->_devAddr);
+	printf("VPD read from I2C device: %02X\n", vpdInfo->_devAddr);
 
-    if (vpdInfo->productId[0])
-	printf(sfmt, sp, "Product ID", vpdInfo->productId);
-    else
-	printf(sfmt, sp, "Product ID", "UNKNOWN");
+	if (vpdInfo->productId[0])
+		printf(sfmt, sp, "Product ID", vpdInfo->productId);
+	else
+		printf(sfmt, sp, "Product ID", "UNKNOWN");
 
-    if (vpdInfo->revisionId)
-	printf(cfmt, sp, "Revision ID", vpdInfo->revisionId);
+	if (vpdInfo->revisionId)
+		printf(cfmt, sp, "Revision ID", vpdInfo->revisionId);
 
-    if (vpdInfo->serialNum)
-	printf(dfmt, sp, "Serial Number", vpdInfo->serialNum);
+	if (vpdInfo->serialNum)
+		printf(dfmt, sp, "Serial Number", vpdInfo->serialNum);
 
-    if (vpdInfo->manuID)
-	printf(dfmt, sp, "Manufacture ID", (long)vpdInfo->manuID);
+	if (vpdInfo->manuID)
+		printf(dfmt, sp, "Manufacture ID", (long) vpdInfo->manuID);
 
-    if (vpdInfo->configOpt)
-	printf(hfmt, sp, "Configuration", vpdInfo->configOpt);
+	if (vpdInfo->configOpt)
+		printf(hfmt, sp, "Configuration", vpdInfo->configOpt);
 
-    if (vpdInfo->sysClk)
-	printf(dhfmt, sp, "System Clock", vpdInfo->sysClk, vpdInfo->sysClk);
+	if (vpdInfo->sysClk)
+		printf(dhfmt, sp, "System Clock", vpdInfo->sysClk,
+		       vpdInfo->sysClk);
 
-    if (vpdInfo->serClk)
-	printf(dhfmt, sp, "Serial Clock", vpdInfo->serClk, vpdInfo->serClk);
+	if (vpdInfo->serClk)
+		printf(dhfmt, sp, "Serial Clock", vpdInfo->serClk,
+		       vpdInfo->serClk);
 
-    if (vpdInfo->numPOTS)
-	printf(dfmt, sp, "Number of POTS lines", vpdInfo->numPOTS);
+	if (vpdInfo->numPOTS)
+		printf(dfmt, sp, "Number of POTS lines", vpdInfo->numPOTS);
 
-    if (vpdInfo->numDS1)
-	printf(dfmt, sp, "Number of DS1s", vpdInfo->numDS1);
+	if (vpdInfo->numDS1)
+		printf(dfmt, sp, "Number of DS1s", vpdInfo->numDS1);
 
-    /* Print Ethernet Addresses */
-    if (vpdInfo->ethAddrs[0][0] != 0xff) {
-	int i, j;
-	printf("%4sEtherNet Address(es): ", sp);
-	for (i = 0; i < MAX_ETH_ADDRS; i++) {
-	    if (vpdInfo->ethAddrs[i][0] != 0xff) {
-		for (j = 0; j < 6; j++) {
-		    printf("%02X", vpdInfo->ethAddrs[i][j]);
-		    if (((j + 1) % 6) != 0)
-			printf(":");
-		    else
-			printf(" ");
+	/* Print Ethernet Addresses */
+	if (vpdInfo->ethAddrs[0][0] != 0xff) {
+		int i, j;
+
+		printf("%4sEtherNet Address(es): ", sp);
+		for (i = 0; i < MAX_ETH_ADDRS; i++) {
+			if (vpdInfo->ethAddrs[i][0] != 0xff) {
+				for (j = 0; j < 6; j++) {
+					printf("%02X",
+					       vpdInfo->ethAddrs[i][j]);
+					if (((j + 1) % 6) != 0)
+						printf(":");
+					else
+						printf(" ");
+				}
+				if (((i + 1) % 3) == 0)
+					printf("\n%24s: ", sp);
+			}
 		}
-		if (((i + 1) % 3) == 0) printf("\n%24s: ", sp);
-	    }
+		printf("\n");
 	}
-	printf("\n");
-    }
 
-    if (vpdInfo->flashCfg.mfg && vpdInfo->flashCfg.dev) {
-	printf("Main Flash Configuration:\n");
-	printf(hsfmt, sp, "Manufacture ID", vpdInfo->flashCfg.mfg);
-	printf(hsfmt, sp, "Device ID",      vpdInfo->flashCfg.dev);
-	printf(dsfmt, sp, "Device Width",   vpdInfo->flashCfg.devWidth);
-	printf(dsfmt, sp, "Num. Devices",   vpdInfo->flashCfg.numDevs);
-	printf(dsfmt, sp, "Num. Columns",   vpdInfo->flashCfg.numCols);
-	printf(dsfmt, sp, "Column Width",   vpdInfo->flashCfg.colWidth);
-	printf(dsfmt, sp, "WE Data Width",  vpdInfo->flashCfg.weDataWidth);
-    }
-} /* vpd_print() */
+	if (vpdInfo->flashCfg.mfg && vpdInfo->flashCfg.dev) {
+		printf("Main Flash Configuration:\n");
+		printf(hsfmt, sp, "Manufacture ID", vpdInfo->flashCfg.mfg);
+		printf(hsfmt, sp, "Device ID", vpdInfo->flashCfg.dev);
+		printf(dsfmt, sp, "Device Width", vpdInfo->flashCfg.devWidth);
+		printf(dsfmt, sp, "Num. Devices", vpdInfo->flashCfg.numDevs);
+		printf(dsfmt, sp, "Num. Columns", vpdInfo->flashCfg.numCols);
+		printf(dsfmt, sp, "Column Width", vpdInfo->flashCfg.colWidth);
+		printf(dsfmt, sp, "WE Data Width",
+		       vpdInfo->flashCfg.weDataWidth);
+	}
+}
diff --git a/boards.cfg b/boards.cfg
index b678547..12f5f6f 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -357,7 +357,6 @@
 PCIPPC6                      powerpc     74xx_7xx    pcippc2
 ppmc7xx                      powerpc     74xx_7xx
 ZUMA                         powerpc     74xx_7xx    evb64260
-BAB7xx                       powerpc     74xx_7xx    bab7xx              eltec
 ELPPC                        powerpc     74xx_7xx    elppc               eltec
 CPCI750                      powerpc     74xx_7xx    cpci750             esd
 mpc7448hpc2                  powerpc     74xx_7xx    mpc7448hpc2         freescale
@@ -462,7 +461,6 @@
 MOUSSE                       powerpc     mpc824x     mousse
 MUSENKI                      powerpc     mpc824x     musenki
 MVBLUE                       powerpc     mpc824x     mvblue
-OXC                          powerpc     mpc824x     oxc
 PN62                         powerpc     mpc824x     pn62
 Sandpoint8240                powerpc     mpc824x     sandpoint
 Sandpoint8245                powerpc     mpc824x     sandpoint
@@ -808,7 +806,6 @@
 quantum                      powerpc     mpc8xx
 R360MPI                      powerpc     mpc8xx      r360mpi
 RBC823                       powerpc     mpc8xx      rbc823
-rmu                          powerpc     mpc8xx
 RPXClassic                   powerpc     mpc8xx
 RPXlite                      powerpc     mpc8xx
 RPXlite_DW                   powerpc     mpc8xx      RPXlite_dw          -              -           RPXlite_DW
diff --git a/doc/README.scrapyard b/doc/README.scrapyard
index 07f0024..08e5a9e 100644
--- a/doc/README.scrapyard
+++ b/doc/README.scrapyard
@@ -11,11 +11,14 @@
 
 Board	Arch	CPU	removed	    Commit	last known maintainer/contact
 =============================================================================
+rmu	powerpc	MPC850	-	  2011-12-07	Wolfgang Denk <wd@denx.de>
+OXC	powerpc	MPC8240	-	  2011-12-07
+BAB7xx	powerpc	MPC740/MPC750  -  2011-12-07	Frank Gottschling <fgottschling@eltec.de>
 xm250   arm     pxa     c746cdd   2011-25-11
 pleb2   arm     pxa     b185a1c   2011-25-11
 cradle  arm     pxa     4e24f8a   2011-25-11    Kyle Harris <kharris@nexus-tech.net>
 cerf250 arm     pxa     a3f1241   2011-25-11    Prakash Kumar <prakash@embedx.com>
-mpq101	powerpc	mpc85xx	-	  2011-10-23	Alex Dubov <oakad@yahoo.com>
+mpq101	powerpc	mpc85xx	e877fab	  2011-10-23	Alex Dubov <oakad@yahoo.com>
 ixdpg425 arm	ixp	0ca8eb7	  2011-09-22	Stefan Roese <sr@denx.de>
 ixdp425 arm	ixp	0ca8eb7	  2011-09-22	Kyle Harris <kharris@nexus-tech.net>
 zylonite arm	pxa	b66521a	  2011-09-05
diff --git a/drivers/video/cfb_console.c b/drivers/video/cfb_console.c
index 9be6166..904caf7 100644
--- a/drivers/video/cfb_console.c
+++ b/drivers/video/cfb_console.c
@@ -368,9 +368,9 @@
 
 static int video_logo_height = VIDEO_LOGO_HEIGHT;
 
-static int cursor_state;
-static int old_col;
-static int old_row;
+static int __maybe_unused cursor_state;
+static int __maybe_unused old_col;
+static int __maybe_unused old_row;
 
 static int console_col;		/* cursor col */
 static int console_row;		/* cursor row */
@@ -430,23 +430,6 @@
 	{0x00ffffff, 0x00ffffff, 0x00ffffff, 0x00ffffff}
 };
 
-
-static void video_invertchar(int xx, int yy)
-{
-	int firstx = xx * VIDEO_PIXEL_SIZE;
-	int lastx = (xx + VIDEO_FONT_WIDTH) * VIDEO_PIXEL_SIZE;
-	int firsty = yy * VIDEO_LINE_LEN;
-	int lasty = (yy + VIDEO_FONT_HEIGHT) * VIDEO_LINE_LEN;
-	int x, y;
-	for (y = firsty; y < lasty; y += VIDEO_LINE_LEN) {
-		for (x = firstx; x < lastx; x++) {
-			u8 *dest = (u8 *)(video_fb_address) + x + y;
-			*dest = ~*dest;
-		}
-	}
-}
-
-
 static void video_drawchars(int xx, int yy, unsigned char *s, int count)
 {
 	u8 *cdat, *dest, *dest0;
@@ -627,7 +610,20 @@
 	console_cursor(1);
 }
 
-
+static void video_invertchar(int xx, int yy)
+{
+	int firstx = xx * VIDEO_PIXEL_SIZE;
+	int lastx = (xx + VIDEO_FONT_WIDTH) * VIDEO_PIXEL_SIZE;
+	int firsty = yy * VIDEO_LINE_LEN;
+	int lasty = (yy + VIDEO_FONT_HEIGHT) * VIDEO_LINE_LEN;
+	int x, y;
+	for (y = firsty; y < lasty; y += VIDEO_LINE_LEN) {
+		for (x = firstx; x < lastx; x++) {
+			u8 *dest = (u8 *)(video_fb_address) + x + y;
+			*dest = ~*dest;
+		}
+	}
+}
 
 void console_cursor(int state)
 {
diff --git a/include/configs/BAB7xx.h b/include/configs/BAB7xx.h
deleted file mode 100644
index a3e8820..0000000
--- a/include/configs/BAB7xx.h
+++ /dev/null
@@ -1,473 +0,0 @@
-/*
- * (C) Copyright 2002 ELTEC Elektronik AG
- * Frank Gottschling <fgottschling@eltec.de>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*
- * board/config.h - configuration options, board specific
- */
-
-#ifndef __CONFIG_H
-#define __CONFIG_H
-
-#define GTREGREAD(x) 0xffffffff         /* needed for debug */
-
-/*
- * High Level Configuration Options
- * (easy to change)
- */
-
-#define	CONFIG_SYS_TEXT_BASE	0xFFF00000
-
-/* these hardware addresses are pretty bogus, please change them to
-   suit your needs */
-
-/* first ethernet */
-#define CONFIG_ETHADDR          00:00:5b:ee:de:ad
-
-#define CONFIG_IPADDR           192.168.0.105
-#define CONFIG_SERVERIP         192.168.0.100
-
-#define CONFIG_BAB7xx           1       /* this is an BAB740/BAB750 board */
-
-#define CONFIG_BAUDRATE         9600    /* console baudrate */
-
-#undef  CONFIG_WATCHDOG
-
-#define CONFIG_BOOTDELAY        5       /* autoboot after 5 seconds */
-
-#define CONFIG_ZERO_BOOTDELAY_CHECK
-
-#undef  CONFIG_BOOTARGS
-#define CONFIG_BOOTCOMMAND                                  \
-    "bootp 1000000; "                                       \
-    "setenv bootargs root=ramfs console=ttyS00,9600 "       \
-    "ip=${ipaddr}:${serverip}:${rootpath}:${gatewayip}:"    \
-    "${netmask}:${hostname}:eth0:none; "                    \
-    "bootm"
-
-#define CONFIG_LOADS_ECHO       0       /* echo off for serial download */
-#define CONFIG_SYS_LOADS_BAUD_CHANGE           /* allow baudrate changes */
-
-/*
- * BOOTP options
- */
-#define CONFIG_BOOTP_SUBNETMASK
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
-#define CONFIG_BOOTP_BOOTPATH
-
-#define CONFIG_BOOTP_BOOTFILESIZE
-
-
-/*
- * Command line configuration.
- */
-#include <config_cmd_default.h>
-
-#define CONFIG_CMD_PCI
-#define CONFIG_CMD_JFFS2
-#define CONFIG_CMD_SCSI
-#define CONFIG_CMD_IDE
-#define CONFIG_CMD_DATE
-#define CONFIG_CMD_FDC
-#define CONFIG_CMD_ELF
-
-
-/*
- * Miscellaneous configurable options
- */
-#define CONFIG_SYS_LONGHELP                    /* undef to save memory */
-#define CONFIG_SYS_PROMPT              "=> "   /* Monitor Command Prompt */
-
-/*
- * choose between COM1 and COM2 as serial console
- */
-#define CONFIG_CONS_INDEX       1
-
-#if defined(CONFIG_CMD_KGDB)
-#define CONFIG_SYS_CBSIZE              1024        /* Console I/O Buffer Size */
-#else
-#define CONFIG_SYS_CBSIZE              256         /* Console I/O Buffer Size */
-#endif
-#define CONFIG_SYS_PBSIZE              (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
-#define CONFIG_SYS_MAXARGS             16          /* max number of command args    */
-#define CONFIG_SYS_BARGSIZE            CONFIG_SYS_CBSIZE  /* Boot Argument Buffer Size    */
-
-#define CONFIG_SYS_MEMTEST_START       0x00000000  /* memtest works on    */
-#define CONFIG_SYS_MEMTEST_END         0x04000000  /* 0 ... 64 MB in DRAM    */
-
-#define CONFIG_SYS_LOAD_ADDR           0x1000000   /* default load address    */
-
-#define CONFIG_SYS_HZ                  1000        /* dec. freq: 1 ms ticks */
-
-#define CONFIG_SYS_BAUDRATE_TABLE      { 9600, 19200, 38400, 57600, 115200, 230400 }
-
-/*
- * Low Level Configuration Settings
- * (address mappings, register initial values, etc.)
- * You should know what you are doing if you make changes here.
- */
-#define CONFIG_SYS_BOARD_ASM_INIT
-#define CONFIG_MISC_INIT_R
-
-/*
- * Choose the address mapping scheme for the MPC106 mem controller.
- * Default is mapping B (CHRP), set this define to choose mapping A (PReP).
- */
-#define CONFIG_SYS_ADDRESS_MAP_A
-#ifdef  CONFIG_SYS_ADDRESS_MAP_A
-
-#define CONFIG_SYS_PCI_MEMORY_BUS      0x80000000
-#define CONFIG_SYS_PCI_MEMORY_PHYS     0x00000000
-#define CONFIG_SYS_PCI_MEMORY_SIZE     0x80000000
-
-#define CONFIG_SYS_PCI_MEM_BUS         0x00000000
-#define CONFIG_SYS_PCI_MEM_PHYS        0xc0000000
-#define CONFIG_SYS_PCI_MEM_SIZE        0x3f000000
-
-#define CONFIG_SYS_ISA_MEM_BUS         0
-#define CONFIG_SYS_ISA_MEM_PHYS        0
-#define CONFIG_SYS_ISA_MEM_SIZE        0
-
-#define CONFIG_SYS_PCI_IO_BUS          0x1000
-#define CONFIG_SYS_PCI_IO_PHYS         0x81000000
-#define CONFIG_SYS_PCI_IO_SIZE         0x01000000-CONFIG_SYS_PCI_IO_BUS
-
-#define CONFIG_SYS_ISA_IO_BUS          0x00000000
-#define CONFIG_SYS_ISA_IO_PHYS         0x80000000
-#define CONFIG_SYS_ISA_IO_SIZE         0x00800000
-
-#else
-
-#define CONFIG_SYS_PCI_MEMORY_BUS      0x00000000
-#define CONFIG_SYS_PCI_MEMORY_PHYS     0x00000000
-#define CONFIG_SYS_PCI_MEMORY_SIZE     0x40000000
-
-#define CONFIG_SYS_PCI_MEM_BUS         0x80000000
-#define CONFIG_SYS_PCI_MEM_PHYS        0x80000000
-#define CONFIG_SYS_PCI_MEM_SIZE        0x7d000000
-
-#define CONFIG_SYS_ISA_MEM_BUS         0x00000000
-#define CONFIG_SYS_ISA_MEM_PHYS        0xfd000000
-#define CONFIG_SYS_ISA_MEM_SIZE        0x01000000
-
-#define CONFIG_SYS_PCI_IO_BUS          0x00800000
-#define CONFIG_SYS_PCI_IO_PHYS         0xfe800000
-#define CONFIG_SYS_PCI_IO_SIZE         0x00400000
-
-#define CONFIG_SYS_ISA_IO_BUS          0x00000000
-#define CONFIG_SYS_ISA_IO_PHYS         0xfe000000
-#define CONFIG_SYS_ISA_IO_SIZE         0x00800000
-
-#endif /*CONFIG_SYS_ADDRESS_MAP_A */
-
-#define CONFIG_SYS_60X_PCI_MEM_OFFSET  0x00000000
-
-/* driver defines FDC,IDE,... */
-#define CONFIG_SYS_ISA_IO_BASE_ADDRESS CONFIG_SYS_ISA_IO_PHYS
-#define CONFIG_SYS_ISA_IO              CONFIG_SYS_ISA_IO_PHYS
-#define CONFIG_SYS_60X_PCI_IO_OFFSET   CONFIG_SYS_ISA_IO_PHYS
-
-/*
- * Start addresses for the final memory configuration
- * (Set up by the startup code)
- * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
- */
-#define CONFIG_SYS_SDRAM_BASE          0x00000000
-#define CONFIG_SYS_FLASH_BASE          0xfff00000
-
-/*
- * Definitions for initial stack pointer and data area
- */
-#define CONFIG_SYS_INIT_RAM_ADDR       0x00fd0000  /* above the memtest region */
-#define CONFIG_SYS_INIT_RAM_SIZE        0x4000
-#define CONFIG_SYS_GBL_DATA_OFFSET     (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_OFFSET      CONFIG_SYS_GBL_DATA_OFFSET
-
-/*
- * Flash mapping/organization on the MPC10x.
- */
-#define FLASH_BASE0_PRELIM      0xff800000
-#define FLASH_BASE1_PRELIM      0xffc00000
-
-#define CONFIG_SYS_MAX_FLASH_BANKS     2           /* max number of memory banks    */
-#define CONFIG_SYS_MAX_FLASH_SECT      67          /* max number of sectors on one chip */
-
-#define CONFIG_SYS_FLASH_ERASE_TOUT    120000      /* Timeout for Flash Erase (in ms) */
-#define CONFIG_SYS_FLASH_WRITE_TOUT    500         /* Timeout for Flash Write (in ms) */
-
-/*
- * JFFS2 partitions
- *
- */
-/* No command line, one static partition */
-#undef CONFIG_CMD_MTDPARTS
-#define CONFIG_JFFS2_DEV		"nor"
-#define CONFIG_JFFS2_PART_SIZE		0xFFFFFFFF
-#define CONFIG_JFFS2_PART_OFFSET	0x00000000
-
-/* mtdparts command line support
- *
- * Note: fake mtd_id used, no linux mtd map file
- */
-/*
-#define CONFIG_CMD_MTDPARTS
-#define MTDIDS_DEFAULT		"nor0=bab7xx-0"
-#define MTDPARTS_DEFAULT	"mtdparts=bab7xx-0:-(jffs2)"
-*/
-
-#define CONFIG_SYS_MONITOR_BASE        CONFIG_SYS_FLASH_BASE
-#define CONFIG_SYS_MONITOR_LEN         0x40000     /* Reserve 256 kB for Monitor */
-#define CONFIG_SYS_MALLOC_LEN          0x20000     /* Reserve 128 kB for malloc() */
-#undef  CONFIG_SYS_MEMTEST
-
-/*
- * Environment settings
- */
-#define CONFIG_ENV_OVERWRITE
-#define CONFIG_ENV_IS_IN_NVRAM     1           /* use NVRAM for environment vars */
-#define CONFIG_SYS_NVRAM_SIZE          0x1ff0      /* NVRAM size (8kB), we must protect the clock data (16 bytes) */
-#define CONFIG_ENV_SIZE            0x400       /* Size of Environment vars (1kB) */
-/*
- * We store the environment and an image of revision eeprom in the upper part of the NVRAM. Thus,
- * user applications can use the remaining space for other purposes.
- */
-#define CONFIG_ENV_ADDR            (CONFIG_SYS_NVRAM_SIZE +0x10 -0x800)
-#define CONFIG_SYS_NV_SROM_COPY_ADDR   (CONFIG_SYS_NVRAM_SIZE +0x10 -0x400)
-#define CONFIG_SYS_NVRAM_ACCESS_ROUTINE            /* This board needs a special routine to access the NVRAM */
-#define CONFIG_SYS_SROM_SIZE           0x100       /* shadow of revision info is in nvram */
-
-/*
- * Serial devices
- */
-#define CONFIG_SYS_NS16550
-#define CONFIG_SYS_NS16550_SERIAL
-#define CONFIG_SYS_NS16550_REG_SIZE    1
-#define CONFIG_SYS_NS16550_CLK         1843200
-#define CONFIG_SYS_NS16550_COM1        (CONFIG_SYS_ISA_IO + CONFIG_SYS_NS87308_UART1_BASE)
-#define CONFIG_SYS_NS16550_COM2        (CONFIG_SYS_ISA_IO + CONFIG_SYS_NS87308_UART2_BASE)
-
-/*
- * PCI stuff
- */
-#define CONFIG_PCI                                /* include pci support */
-#define CONFIG_SYS_EARLY_PCI_INIT
-#define CONFIG_PCI_PNP                            /* pci plug-and-play */
-#define CONFIG_PCI_HOST         PCI_HOST_AUTO
-#undef  CONFIG_PCI_SCAN_SHOW
-
-/*
- * Video console (graphic: SMI LynxEM, keyboard: i8042)
- */
-#define CONFIG_VIDEO
-#define CONFIG_CFB_CONSOLE
-#define CONFIG_VIDEO_SMI_LYNXEM
-#define CONFIG_I8042_KBD
-#define CONFIG_VIDEO_LOGO
-#define CONFIG_CONSOLE_TIME
-#define CONFIG_CONSOLE_EXTRA_INFO
-#define CONFIG_CONSOLE_CURSOR
-#define CONFIG_SYS_CONSOLE_BLINK_COUNT         30000    /* approx. 2 HZ */
-
-/*
- * IDE/SCSI globals
- */
-#ifndef __ASSEMBLY__
-extern unsigned int    eltec_board;
-extern unsigned int    ata_reset_time;
-extern unsigned int    scsi_reset_time;
-extern unsigned short  scsi_dev_id;
-extern unsigned int    scsi_max_scsi_id;
-extern unsigned char   scsi_sym53c8xx_ccf;
-#endif
-
-/*
- * ATAPI Support (experimental)
- */
-#define CONFIG_ATAPI
-#define CONFIG_SYS_IDE_MAXBUS          1                       /* max. 2 IDE busses    */
-#define CONFIG_SYS_IDE_MAXDEVICE       (CONFIG_SYS_IDE_MAXBUS*2)      /* max. 2 drives per IDE bus */
-
-#define CONFIG_SYS_ATA_BASE_ADDR       CONFIG_SYS_60X_PCI_IO_OFFSET   /* base address */
-#define CONFIG_SYS_ATA_IDE0_OFFSET     0x1F0                   /* default ide0 offste */
-#define CONFIG_SYS_ATA_IDE1_OFFSET     0x170                   /* default ide1 offset */
-#define CONFIG_SYS_ATA_DATA_OFFSET     0                       /* data reg offset    */
-#define CONFIG_SYS_ATA_REG_OFFSET      0                       /* reg offset */
-#define CONFIG_SYS_ATA_ALT_OFFSET      0x200                   /* alternate register offset */
-
-#define ATA_RESET_TIME          (ata_reset_time)
-
-#undef  CONFIG_IDE_PCMCIA                               /* no pcmcia interface required */
-#undef  CONFIG_IDE_LED                                  /* no led for ide supported */
-
-/*
- * SCSI support (experimental) only SYM53C8xx supported
- */
-#define CONFIG_SCSI_SYM53C8XX
-#define CONFIG_SCSI_DEV_ID      (scsi_dev_id)           /* 875 or 860 */
-#define CONFIG_SYS_SCSI_SYM53C8XX_CCF  (scsi_sym53c8xx_ccf)    /* value for none 40 mhz clocks */
-#define CONFIG_SYS_SCSI_MAX_LUN        8                       /* number of supported LUNs */
-#define CONFIG_SYS_SCSI_MAX_SCSI_ID    (scsi_max_scsi_id)      /* max SCSI ID (0-6) */
-#define CONFIG_SYS_SCSI_MAX_DEVICE     (15 * CONFIG_SYS_SCSI_MAX_LUN) /* max. Target devices */
-#define CONFIG_SYS_SCSI_SPIN_UP_TIME   (scsi_reset_time)
-
-/*
- * Partion suppport
- */
-#define CONFIG_DOS_PARTITION
-#define CONFIG_MAC_PARTITION
-#define CONFIG_ISO_PARTITION
-
-/*
- * Winbond Configuration
- */
-#define CONFIG_WINBOND_83C553      1                       /* has a winbond bridge */
-#define CONFIG_SYS_USE_WINBOND_IDE     0                       /* use winbond 83c553 internal ide */
-#define CONFIG_SYS_WINBOND_ISA_CFG_ADDR    0x80005800          /* pci-isa bridge config addr */
-#define CONFIG_SYS_WINBOND_IDE_CFG_ADDR    0x80005900          /* ide config addr */
-
-/*
- * NS87308 Configuration
- */
-#define CONFIG_NS87308                    /* Nat Semi super-io cntr on ISA bus */
-#define CONFIG_SYS_NS87308_BADDR_10    1
-#define CONFIG_SYS_NS87308_DEVS        (CONFIG_SYS_NS87308_UART1   | \
-				 CONFIG_SYS_NS87308_UART2   | \
-				 CONFIG_SYS_NS87308_KBC1    | \
-				 CONFIG_SYS_NS87308_MOUSE   | \
-				 CONFIG_SYS_NS87308_FDC     | \
-				 CONFIG_SYS_NS87308_RARP    | \
-				 CONFIG_SYS_NS87308_GPIO    | \
-				 CONFIG_SYS_NS87308_POWRMAN | \
-				 CONFIG_SYS_NS87308_RTC_APC )
-
-#define CONFIG_SYS_NS87308_PS2MOD
-#define CONFIG_SYS_NS87308_GPIO_BASE   0x0220
-#define CONFIG_SYS_NS87308_PWMAN_BASE  0x0460
-#define CONFIG_SYS_NS87308_PMC2        0x00        /* SuperI/O clock source is 24MHz via X1 */
-
-/*
- * set up the NVRAM access registers
- * NVRAM's controlled by the configurable CS line from the 87308
- */
-#define CONFIG_SYS_NS87308_CS0_BASE    0x0076
-#define CONFIG_SYS_NS87308_CS0_CONF    0x40
-#define CONFIG_SYS_NS87308_CS1_BASE    0x0070
-#define CONFIG_SYS_NS87308_CS1_CONF    0x1C
-#define CONFIG_SYS_NS87308_CS2_BASE    0x0071
-#define CONFIG_SYS_NS87308_CS2_CONF    0x1C
-
-#define CONFIG_RTC_MK48T59
-
-/*
- * Initial BATs
- */
-#if 1
-
-#define CONFIG_SYS_IBAT0L 0
-#define CONFIG_SYS_IBAT0U 0
-#define CONFIG_SYS_DBAT0L CONFIG_SYS_IBAT1L
-#define CONFIG_SYS_DBAT0U CONFIG_SYS_IBAT1U
-
-#define CONFIG_SYS_IBAT1L 0
-#define CONFIG_SYS_IBAT1U 0
-#define CONFIG_SYS_DBAT1L CONFIG_SYS_IBAT1L
-#define CONFIG_SYS_DBAT1U CONFIG_SYS_IBAT1U
-
-#define CONFIG_SYS_IBAT2L 0
-#define CONFIG_SYS_IBAT2U 0
-#define CONFIG_SYS_DBAT2L CONFIG_SYS_IBAT2L
-#define CONFIG_SYS_DBAT2U CONFIG_SYS_IBAT2U
-
-#define CONFIG_SYS_IBAT3L 0
-#define CONFIG_SYS_IBAT3U 0
-#define CONFIG_SYS_DBAT3L CONFIG_SYS_IBAT3L
-#define CONFIG_SYS_DBAT3U CONFIG_SYS_IBAT3U
-
-#else
-
-/* SDRAM */
-#define CONFIG_SYS_IBAT0L (CONFIG_SYS_SDRAM_BASE | BATL_RW)
-#define CONFIG_SYS_IBAT0U (CONFIG_SYS_SDRAM_BASE | BATU_BL_256M | BATU_VS | BATU_VP)
-#define CONFIG_SYS_DBAT0L CONFIG_SYS_IBAT1L
-#define CONFIG_SYS_DBAT0U CONFIG_SYS_IBAT1U
-
-/* address range for flashes */
-#define CONFIG_SYS_IBAT1L (CONFIG_SYS_FLASH_BASE | BATL_RW | BATL_CACHEINHIBIT)
-#define CONFIG_SYS_IBAT1U (CONFIG_SYS_FLASH_BASE | BATU_BL_16M | BATU_VS | BATU_VP)
-#define CONFIG_SYS_DBAT1L CONFIG_SYS_IBAT1L
-#define CONFIG_SYS_DBAT1U CONFIG_SYS_IBAT1U
-
-/* ISA IO space */
-#define CONFIG_SYS_IBAT2L (CONFIG_SYS_ISA_IO | BATL_RW | BATL_CACHEINHIBIT)
-#define CONFIG_SYS_IBAT2U (CONFIG_SYS_ISA_IO | BATU_BL_16M | BATU_VS | BATU_VP)
-#define CONFIG_SYS_DBAT2L CONFIG_SYS_IBAT2L
-#define CONFIG_SYS_DBAT2U CONFIG_SYS_IBAT2U
-
-/* ISA memory space */
-#define CONFIG_SYS_IBAT3L (CONFIG_SYS_ISA_MEM | BATL_RW | BATL_CACHEINHIBIT)
-#define CONFIG_SYS_IBAT3U (CONFIG_SYS_ISA_MEM | BATU_BL_16M | BATU_VS | BATU_VP)
-#define CONFIG_SYS_DBAT3L CONFIG_SYS_IBAT3L
-#define CONFIG_SYS_DBAT3U CONFIG_SYS_IBAT3U
-
-#endif
-
-/*
- * Speed settings are board specific
- */
-#ifndef __ASSEMBLY__
-extern  unsigned long           bab7xx_get_bus_freq (void);
-extern  unsigned long           bab7xx_get_gclk_freq (void);
-#endif
-#define CONFIG_SYS_BUS_CLK	bab7xx_get_bus_freq()
-#define CONFIG_SYS_CPU_CLK	bab7xx_get_gclk_freq()
-
-/*
- * For booting Linux, the board info and command line data
- * have to be in the first 8 MB of memory, since this is
- * the maximum mapped by the Linux kernel during initialization.
- */
-#define CONFIG_SYS_BOOTMAPSZ           (8 << 20)           /* Initial Memory map for Linux */
-
-/*
- * Cache Configuration
- */
-#define CONFIG_SYS_CACHELINE_SIZE        32    /* For all MPC74xx CPUs */
-#if defined(CONFIG_CMD_KGDB)
-#define CONFIG_SYS_CACHELINE_SHIFT        5    /* log base 2 of the above value */
-#endif
-
-/*
- * L2 Cache Configuration is board specific for BAB740/BAB750
- * Init values read from revision srom.
- */
-#undef  CONFIG_SYS_L2
-#define L2_INIT     (L2CR_L2SIZ_HM | L2CR_L2CLK_3 | L2CR_L2RAM_BURST | \
-		     L2CR_L2OH_5   | L2CR_L2CTL   | L2CR_L2WT)
-#define L2_ENABLE   (L2_INIT | L2CR_L2E)
-
-#define CONFIG_SYS_L2_BAB7xx
-
-#define CONFIG_TULIP
-#define CONFIG_TULIP_SELECT_MEDIA
-
-#endif    /* __CONFIG_H */
diff --git a/include/configs/OXC.h b/include/configs/OXC.h
deleted file mode 100644
index 1343419..0000000
--- a/include/configs/OXC.h
+++ /dev/null
@@ -1,317 +0,0 @@
-/*
- * (C) Copyright 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/* ------------------------------------------------------------------------- */
-
-/*
- * board/config.h - configuration options, board specific
- */
-
-#ifndef __CONFIG_H
-#define __CONFIG_H
-
-/*
- * High Level Configuration Options
- * (easy to change)
- */
-
-#define CONFIG_MPC824X		1
-#define CONFIG_MPC8240		1
-#define CONFIG_OXC		1
-
-#define	CONFIG_SYS_TEXT_BASE	0xFFF00000
-
-#define CONFIG_BOARD_EARLY_INIT_F 1	/* Call board_early_init_f	*/
-
-#define CONFIG_IDENT_STRING     " [oxc] "
-
-#define CONFIG_WATCHDOG		1
-#define CONFIG_SHOW_ACTIVITY	1
-#define CONFIG_SHOW_BOOT_PROGRESS 1
-
-#define CONFIG_CONS_INDEX	1
-#define CONFIG_BAUDRATE		9600
-#define CONFIG_SYS_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, 115200 }
-
-
-/*
- * BOOTP options
- */
-#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_BOOTP_BOOTPATH
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
-
-
-/*
- * Command line configuration.
- */
-#include <config_cmd_default.h>
-
-#define CONFIG_CMD_ELF
-
-
-/*
- * Miscellaneous configurable options
- */
-#define CONFIG_SYS_LONGHELP		1		/* undef to save memory		*/
-#define CONFIG_SYS_PROMPT		"=> "		/* Monitor Command Prompt	*/
-#define CONFIG_SYS_CBSIZE		256		/* Console I/O Buffer Size	*/
-#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)	/* Print Buffer Size	*/
-#define CONFIG_SYS_MAXARGS		16		/* max number of command args	*/
-#define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE	/* Boot Argument Buffer Size	*/
-#define CONFIG_SYS_LOAD_ADDR		0x00100000	/* default load address		*/
-#define CONFIG_SYS_HZ			1000		/* decrementer freq: 1 ms ticks */
-
-#define CONFIG_MISC_INIT_R	1		/* call misc_init_r() on init	*/
-
-/*-----------------------------------------------------------------------
- * Boot options
- */
-
-#define CONFIG_SERVERIP		10.0.0.1
-#define CONFIG_GATEWAYIP	10.0.0.1
-#define CONFIG_NETMASK		255.255.255.0
-#define CONFIG_LOADADDR		0x10000
-#define CONFIG_BOOTFILE		"/mnt/ide0/p2/usr/tftp/oxc.elf"
-#define CONFIG_BOOTCOMMAND	"tftp 0x10000 ; bootelf 0x10000"
-#define CONFIG_BOOTDELAY	10
-
-#define CONFIG_SYS_OXC_GENERATE_IP	1		/* Generate IP automatically	*/
-#define CONFIG_SYS_OXC_IPMASK		0x0A000000	/* 10.0.0.x			*/
-
-/*-----------------------------------------------------------------------
- * PCI stuff
- */
-
-#define CONFIG_PCI				/* include pci support		*/
-
-
-#define CONFIG_EEPRO100				/* Ethernet Express PRO 100	*/
-#define CONFIG_SYS_RX_ETH_BUFFER	8               /* use 8 rx buffer on eepro100  */
-
-#define PCI_ENET0_IOADDR	0x80000000
-#define PCI_ENET0_MEMADDR	0x80000000
-#define	PCI_ENET1_IOADDR	0x81000000
-#define	PCI_ENET1_MEMADDR	0x81000000
-
-/*-----------------------------------------------------------------------
- * FLASH
- */
-
-#define CONFIG_SYS_FLASH_PRELIMBASE	0xFF800000
-#define CONFIG_SYS_FLASH_BASE		(0-flash_info[0].size)
-
-#define CONFIG_SYS_MAX_FLASH_BANKS	1	/* max number of memory banks		*/
-#define CONFIG_SYS_MAX_FLASH_SECT	32	/* max number of sectors on one chip	*/
-
-#define CONFIG_SYS_FLASH_ERASE_TOUT	120000	/* Timeout for Flash Erase (in ms)	*/
-#define CONFIG_SYS_FLASH_WRITE_TOUT	500	/* Timeout for Flash Write (in ms)	*/
-
-/*-----------------------------------------------------------------------
- * RAM
- */
-
-#define CONFIG_SYS_SDRAM_BASE		0x00000000
-#define CONFIG_SYS_MAX_RAM_SIZE	0x10000000
-
-#define CONFIG_SYS_RESET_ADDRESS	0xFFF00100
-
-#define CONFIG_SYS_MONITOR_BASE	CONFIG_SYS_TEXT_BASE
-#define CONFIG_SYS_MONITOR_LEN		0x00030000
-
-#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_PRELIMBASE)
-# define CONFIG_SYS_RAMBOOT		1
-#else
-# undef CONFIG_SYS_RAMBOOT
-#endif
-
-#define CONFIG_SYS_INIT_RAM_ADDR	0x40000000
-#define CONFIG_SYS_INIT_RAM_SIZE	0x1000
-
-#define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_OFFSET	CONFIG_SYS_GBL_DATA_OFFSET
-
-#define CONFIG_SYS_MALLOC_LEN		(512 << 10)	/* Reserve 512 kB for malloc()	*/
-
-#define CONFIG_SYS_MEMTEST_START	0x00000000	/* memtest works on		*/
-#define CONFIG_SYS_MEMTEST_END		0x04000000	/* 0 ... 32 MB in DRAM		*/
-
-/*-----------------------------------------------------------------------
- * Memory mapping
- */
-
-#define CONFIG_SYS_CPLD_BASE		0xff000000	/* CPLD registers */
-#define CONFIG_SYS_CPLD_WATCHDOG	(CONFIG_SYS_CPLD_BASE)			/* Watchdog */
-#define CONFIG_SYS_CPLD_RESET		(CONFIG_SYS_CPLD_BASE + 0x040000)	/* Minor resets */
-#define CONFIG_SYS_UART_BASE		(CONFIG_SYS_CPLD_BASE + 0x700000)	/* debug UART */
-
-/*-----------------------------------------------------------------------
- * NS16550 Configuration
- */
-
-#define CONFIG_SYS_NS16550
-#define CONFIG_SYS_NS16550_SERIAL
-#define CONFIG_SYS_NS16550_REG_SIZE	-4
-#define CONFIG_SYS_NS16550_CLK		1843200
-#define CONFIG_SYS_NS16550_COM1	CONFIG_SYS_UART_BASE
-
-/*-----------------------------------------------------------------------
- * I2C Bus
- */
-
-#define CONFIG_I2C		1		/* I2C support on ... */
-#define CONFIG_HARD_I2C		1		/* ... hardware one */
-#define CONFIG_SYS_I2C_SPEED		400000		/* I2C speed and slave address	*/
-#define CONFIG_SYS_I2C_SLAVE		0x7F		/* I2C slave address */
-
-#define CONFIG_SYS_I2C_EXPANDER0_ADDR	0x20		/* PCF8574 expander 0 addrerr */
-#define CONFIG_SYS_I2C_EXPANDER1_ADDR	0x21		/* PCF8574 expander 1 addrerr */
-#define CONFIG_SYS_I2C_EXPANDER2_ADDR	0x26		/* PCF8574 expander 2 addrerr */
-
-/*-----------------------------------------------------------------------
- * Environment
- */
-
-#define CONFIG_ENV_IS_IN_FLASH	1
-#define CONFIG_ENV_ADDR		0xFFF30000	/* Offset of Environment Sector	*/
-#define CONFIG_ENV_SIZE		0x00010000	/* Total Size of Environment Sector */
-#define CONFIG_ENV_OVERWRITE    1		/* Allow modifying the environment */
-
-/*
- * Low Level Configuration Settings
- * (address mappings, register initial values, etc.)
- * You should know what you are doing if you make changes here.
- */
-
-#define CONFIG_SYS_CLK_FREQ  33000000	/* external frequency to pll */
-#define CONFIG_PLL_PCI_TO_MEM_MULTIPLIER  2
-
-#define CONFIG_SYS_EUMB_ADDR		0xFC000000
-
-/* MCCR1 */
-#define CONFIG_SYS_ROMNAL		0	/* rom/flash next access time		*/
-#define CONFIG_SYS_ROMFAL		19	/* rom/flash access time		*/
-
-/* MCCR2 */
-#define CONFIG_SYS_ASRISE		15	/* ASRISE=15 clocks			*/
-#define CONFIG_SYS_ASFALL		3	/* ASFALL=3 clocks			*/
-#define CONFIG_SYS_REFINT		1000	/* REFINT=1000 clocks			*/
-
-/* MCCR3 */
-#define CONFIG_SYS_BSTOPRE		0x35c	/* Burst To Precharge			*/
-#define CONFIG_SYS_REFREC		7	/* Refresh to activate interval		*/
-#define CONFIG_SYS_RDLAT		4	/* data latency from read command	*/
-
-/* MCCR4 */
-#define CONFIG_SYS_PRETOACT		2	/* Precharge to activate interval	*/
-#define CONFIG_SYS_ACTTOPRE		5	/* Activate to Precharge interval	*/
-#define CONFIG_SYS_ACTORW		2	/* Activate to R/W			*/
-#define CONFIG_SYS_SDMODE_CAS_LAT	3	/* SDMODE CAS latency			*/
-#define CONFIG_SYS_SDMODE_WRAP		0	/* SDMODE wrap type			*/
-#define CONFIG_SYS_SDMODE_BURSTLEN	3	/* SDMODE Burst length 2=4, 3=8		*/
-#define CONFIG_SYS_REGISTERD_TYPE_BUFFER   1
-
-/* memory bank settings*/
-/*
- * only bits 20-29 are actually used from these vales to set the
- * start/end address the upper two bits will be 0, and the lower 20
- * bits will be set to 0x00000 for a start address, or 0xfffff for an
- * end address
- */
-#define CONFIG_SYS_BANK0_START		0x00000000
-#define CONFIG_SYS_BANK0_END		(CONFIG_SYS_MAX_RAM_SIZE - 1)
-#define CONFIG_SYS_BANK0_ENABLE	1
-#define CONFIG_SYS_BANK1_START		0x00000000
-#define CONFIG_SYS_BANK1_END		0x00000000
-#define CONFIG_SYS_BANK1_ENABLE	0
-#define CONFIG_SYS_BANK2_START		0x00000000
-#define CONFIG_SYS_BANK2_END		0x00000000
-#define CONFIG_SYS_BANK2_ENABLE	0
-#define CONFIG_SYS_BANK3_START		0x00000000
-#define CONFIG_SYS_BANK3_END		0x00000000
-#define CONFIG_SYS_BANK3_ENABLE	0
-#define CONFIG_SYS_BANK4_START		0x00000000
-#define CONFIG_SYS_BANK4_END		0x00000000
-#define CONFIG_SYS_BANK4_ENABLE	0
-#define CONFIG_SYS_BANK5_START		0x00000000
-#define CONFIG_SYS_BANK5_END		0x00000000
-#define CONFIG_SYS_BANK5_ENABLE	0
-#define CONFIG_SYS_BANK6_START		0x00000000
-#define CONFIG_SYS_BANK6_END		0x00000000
-#define CONFIG_SYS_BANK6_ENABLE	0
-#define CONFIG_SYS_BANK7_START		0x00000000
-#define CONFIG_SYS_BANK7_END		0x00000000
-#define CONFIG_SYS_BANK7_ENABLE	0
-/*
- * Memory bank enable bitmask, specifying which of the banks defined above
- are actually present. MSB is for bank #7, LSB is for bank #0.
- */
-#define CONFIG_SYS_BANK_ENABLE		0x01
-
-#define CONFIG_SYS_ODCR		0xff	/* configures line driver impedances,	*/
-					/* see 8240 book for bit definitions	*/
-#define CONFIG_SYS_PGMAX		0x32	/* how long the 8240 retains the	*/
-					/* currently accessed page in memory	*/
-					/* see 8240 book for details		*/
-
-/* SDRAM 0 - 256MB */
-#define CONFIG_SYS_IBAT0L	(CONFIG_SYS_SDRAM_BASE | BATL_PP_10 | BATL_MEMCOHERENCE)
-#define CONFIG_SYS_IBAT0U	(CONFIG_SYS_SDRAM_BASE | BATU_BL_256M | BATU_VS | BATU_VP)
-
-/* stack in DCACHE @ 1GB (no backing mem) */
-#define CONFIG_SYS_IBAT1L	(CONFIG_SYS_INIT_RAM_ADDR | BATL_PP_10 | BATL_MEMCOHERENCE)
-#define CONFIG_SYS_IBAT1U	(CONFIG_SYS_INIT_RAM_ADDR | BATU_BL_128K | BATU_VS | BATU_VP)
-
-/* PCI memory */
-#define CONFIG_SYS_IBAT2L	(0x80000000 | BATL_PP_10 | BATL_CACHEINHIBIT)
-#define CONFIG_SYS_IBAT2U	(0x80000000 | BATU_BL_256M | BATU_VS | BATU_VP)
-
-/* Flash, config addrs, etc */
-#define CONFIG_SYS_IBAT3L	(0xF0000000 | BATL_PP_10 | BATL_CACHEINHIBIT)
-#define CONFIG_SYS_IBAT3U	(0xF0000000 | BATU_BL_256M | BATU_VS | BATU_VP)
-
-#define CONFIG_SYS_DBAT0L	CONFIG_SYS_IBAT0L
-#define CONFIG_SYS_DBAT0U	CONFIG_SYS_IBAT0U
-#define CONFIG_SYS_DBAT1L	CONFIG_SYS_IBAT1L
-#define CONFIG_SYS_DBAT1U	CONFIG_SYS_IBAT1U
-#define CONFIG_SYS_DBAT2L	CONFIG_SYS_IBAT2L
-#define CONFIG_SYS_DBAT2U	CONFIG_SYS_IBAT2U
-#define CONFIG_SYS_DBAT3L	CONFIG_SYS_IBAT3L
-#define CONFIG_SYS_DBAT3U	CONFIG_SYS_IBAT3U
-
-/*
- * For booting Linux, the board info and command line data
- * have to be in the first 8 MB of memory, since this is
- * the maximum mapped by the Linux kernel during initialization.
- */
-#define CONFIG_SYS_BOOTMAPSZ		(8 << 20)	/* Initial Memory map for Linux */
-
-/*-----------------------------------------------------------------------
- * Cache Configuration
- */
-#define CONFIG_SYS_CACHELINE_SIZE	32	/* For MPC8240 CPU			*/
-#if defined(CONFIG_CMD_KGDB)
-#  define CONFIG_SYS_CACHELINE_SHIFT	5	/* log base 2 of the above value */
-#endif
-#endif	/* __CONFIG_H */
diff --git a/include/configs/rmu.h b/include/configs/rmu.h
deleted file mode 100644
index 064716f..0000000
--- a/include/configs/rmu.h
+++ /dev/null
@@ -1,426 +0,0 @@
-/*
- * (C) Copyright 2003-2005
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*
- * board/config.h - configuration options, board specific
- */
-
-#ifndef __CONFIG_H
-#define __CONFIG_H
-
-
-/*
- * High Level Configuration Options
- * (easy to change)
- */
-
-#undef CONFIG_MPC860
-#define CONFIG_MPC850		1	/* This is a MPC850 CPU		*/
-#define CONFIG_RPXLITE		1	/* RMU is the RPXlite clone */
-#define CONFIG_RMU			1
-
-#define	CONFIG_SYS_TEXT_BASE	0xfff00000
-
-#define	CONFIG_8xx_CONS_SMC1	1	/* Console is on SMC1		*/
-#undef	CONFIG_8xx_CONS_SMC2
-#undef	CONFIG_8xx_CONS_NONE
-#define CONFIG_BAUDRATE		9600	/* console baudrate = 9600bps	*/
-#if 0
-#define CONFIG_BOOTDELAY	-1	/* autoboot disabled		*/
-#else
-#define CONFIG_BOOTDELAY	5	/* autoboot after 5 seconds	*/
-#endif
-
-#undef	CONFIG_BOOTARGS
-#define CONFIG_BOOTCOMMAND							\
-	"bootp; "								\
-	"setenv bootargs root=/dev/nfs rw nfsroot=${serverip}:${rootpath} "	\
-	"ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}::off; "	\
-	"bootm"
-
-#define CONFIG_LOADS_ECHO	1	/* echo on for serial download	*/
-#undef	CONFIG_SYS_LOADS_BAUD_CHANGE		/* don't allow baudrate change	*/
-
-/* enable I2C and select the hardware/software driver */
-#undef	CONFIG_HARD_I2C			/* I2C with hardware support	*/
-#define CONFIG_SOFT_I2C		1	/* I2C bit-banged		*/
-
-#define CONFIG_SYS_I2C_SPEED		40000	/* 40 kHz is supposed to work	*/
-#define CONFIG_SYS_I2C_SLAVE		0xFE
-
-/* Software (bit-bang) I2C driver configuration */
-#define PB_SCL		0x00000020	/* PB 26 */
-#define PB_SDA		0x00000010	/* PB 27 */
-
-#define I2C_INIT	(immr->im_cpm.cp_pbdir |=  PB_SCL)
-#define I2C_ACTIVE	(immr->im_cpm.cp_pbdir |=  PB_SDA)
-#define I2C_TRISTATE	(immr->im_cpm.cp_pbdir &= ~PB_SDA)
-#define I2C_READ	((immr->im_cpm.cp_pbdat & PB_SDA) != 0)
-#define I2C_SDA(bit)	if(bit) immr->im_cpm.cp_pbdat |=  PB_SDA; \
-			else    immr->im_cpm.cp_pbdat &= ~PB_SDA
-#define I2C_SCL(bit)	if(bit) immr->im_cpm.cp_pbdat |=  PB_SCL; \
-			else    immr->im_cpm.cp_pbdat &= ~PB_SCL
-#define I2C_DELAY	udelay(5)	/* 1/4 I2C clock duration */
-
-/* M41T11 Serial Access Timekeeper(R) SRAM */
-#define CONFIG_RTC_M41T11 1
-#define CONFIG_SYS_I2C_RTC_ADDR 0x68
-#define CONFIG_SYS_M41T11_BASE_YEAR 1900	/* play along with the linux driver */
-
-#undef	CONFIG_WATCHDOG			/* watchdog disabled		*/
-
-
-/*
- * Command line configuration.
- */
-#include <config_cmd_default.h>
-
-#define CONFIG_CMD_DATE
-#define CONFIG_CMD_DHCP
-#define CONFIG_CMD_I2C
-#define CONFIG_CMD_NFS
-#define CONFIG_CMD_SNTP
-
-
-/*
- * BOOTP options
- */
-#define CONFIG_BOOTP_SUBNETMASK
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
-#define CONFIG_BOOTP_BOOTPATH
-#define CONFIG_BOOTP_BOOTFILESIZE
-
-
-#define	CONFIG_AUTOBOOT_KEYED		/* Enable password protection */
-#define	CONFIG_AUTOBOOT_PROMPT		\
-	"\nEnter password - autoboot in %d sec...\n", bootdelay
-#define	CONFIG_AUTOBOOT_DELAY_STR	"system"
-
-/*
- * Miscellaneous configurable options
- */
-#define	CONFIG_SYS_LONGHELP			/* undef to save memory		*/
-#define	CONFIG_SYS_PROMPT	"=> "		/* Monitor Command Prompt	*/
-#if defined(CONFIG_CMD_KGDB)
-#define	CONFIG_SYS_CBSIZE	1024		/* Console I/O Buffer Size	*/
-#else
-#define	CONFIG_SYS_CBSIZE	256		/* Console I/O Buffer Size	*/
-#endif
-#define	CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
-#define	CONFIG_SYS_MAXARGS	16		/* max number of command args	*/
-#define CONFIG_SYS_BARGSIZE	CONFIG_SYS_CBSIZE	/* Boot Argument Buffer Size	*/
-
-#define CONFIG_SYS_MEMTEST_START	0x0040000	/* memtest works on	*/
-#define CONFIG_SYS_MEMTEST_END		0x00C0000	/* 4 ... 12 MB in DRAM	*/
-
-#define	CONFIG_SYS_LOAD_ADDR		0x100000	/* default load address	*/
-
-#define	CONFIG_SYS_HZ		1000		/* decrementer freq: 1 ms ticks	*/
-
-#define CONFIG_SYS_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, 115200 }
-
-/*
- * Low Level Configuration Settings
- * (address mappings, register initial values, etc.)
- * You should know what you are doing if you make changes here.
- */
-/*-----------------------------------------------------------------------
- * Internal Memory Mapped Register
- */
-#define CONFIG_SYS_IMMR		0xFA200000
-
-/*-----------------------------------------------------------------------
- * Definitions for initial stack pointer and data area (in DPRAM)
- */
-#define CONFIG_SYS_INIT_RAM_ADDR	CONFIG_SYS_IMMR
-#define	CONFIG_SYS_INIT_RAM_SIZE	0x2F00	/* Size of used area in DPRAM	*/
-#define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define	CONFIG_SYS_INIT_SP_OFFSET	CONFIG_SYS_GBL_DATA_OFFSET
-
-/*-----------------------------------------------------------------------
- * Start addresses for the final memory configuration
- * (Set up by the startup code)
- * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
- */
-#define	CONFIG_SYS_SDRAM_BASE		0x00000000
-#define CONFIG_SYS_FLASH_BASE		(0-flash_info[0].size)	/* Put flash at end	*/
-#if defined(DEBUG) || defined(CONFIG_CMD_IDE)
-#define	CONFIG_SYS_MONITOR_LEN		(256 << 10)	/* Reserve 256 kB for Monitor	*/
-#else
-#define	CONFIG_SYS_MONITOR_LEN		(128 << 10)	/* Reserve 128 kB for Monitor	*/
-#endif
-#define CONFIG_SYS_MONITOR_BASE	CONFIG_SYS_TEXT_BASE
-#define	CONFIG_SYS_MALLOC_LEN		(128 << 10)	/* Reserve 128 kB for malloc()	*/
-
-/*
- * For booting Linux, the board info and command line data
- * have to be in the first 8 MB of memory, since this is
- * the maximum mapped by the Linux kernel during initialization.
- */
-#define	CONFIG_SYS_BOOTMAPSZ		(8 << 20)	/* Initial Memory map for Linux	*/
-
-/*-----------------------------------------------------------------------
- * FLASH organization
- */
-#define CONFIG_SYS_MAX_FLASH_BANKS	1	/* max number of memory banks		*/
-#define CONFIG_SYS_MAX_FLASH_SECT	67	/* max number of sectors on one chip	*/
-
-#define CONFIG_SYS_FLASH_ERASE_TOUT	120000	/* Timeout for Flash Erase (in ms)	*/
-#define CONFIG_SYS_FLASH_WRITE_TOUT	500	/* Timeout for Flash Write (in ms)	*/
-
-#define	CONFIG_ENV_IS_IN_FLASH	1
-#define CONFIG_ENV_ADDR		((CONFIG_SYS_TEXT_BASE) + 0x40000)
-#define	CONFIG_ENV_SECT_SIZE	0x40000		/* Total Size of Environment Sector	*/
-#define	CONFIG_ENV_SIZE		CONFIG_ENV_SECT_SIZE	/* Used size for environment	*/
-
-/* Address and size of Redundant Environment Sector	*/
-#define CONFIG_ENV_ADDR_REDUND	(CONFIG_ENV_ADDR+CONFIG_ENV_SIZE)
-#define CONFIG_ENV_SIZE_REDUND	(CONFIG_ENV_SIZE)
-
-/*-----------------------------------------------------------------------
- * Reset address
- */
-#define	CONFIG_SYS_RESET_ADDRESS	((ulong)((((immap_t *)CONFIG_SYS_IMMR)->im_clkrst.res)))
-
-/*-----------------------------------------------------------------------
- * Cache Configuration
- */
-#define CONFIG_SYS_CACHELINE_SIZE	16	/* For all MPC8xx CPUs			*/
-#if defined(CONFIG_CMD_KGDB)
-#define CONFIG_SYS_CACHELINE_SHIFT	4	/* log base 2 of the above value	*/
-#endif
-
-/*-----------------------------------------------------------------------
- * SYPCR - System Protection Control				11-9
- * SYPCR can only be written once after reset!
- *-----------------------------------------------------------------------
- * Software & Bus Monitor Timer max, Bus Monitor enable, SW Watchdog freeze
- */
-#if defined(CONFIG_WATCHDOG)
-#define CONFIG_SYS_SYPCR	(SYPCR_SWTC | SYPCR_BMT | SYPCR_BME | SYPCR_SWF | \
-			 SYPCR_SWE  | SYPCR_SWRI| SYPCR_SWP)
-#else
-#define CONFIG_SYS_SYPCR	(SYPCR_SWTC | 0x00000600 | SYPCR_BME | SYPCR_SWF | SYPCR_SWP)
-#endif
-
-/*-----------------------------------------------------------------------
- * SIUMCR - SIU Module Configuration				11-6
- *-----------------------------------------------------------------------
- * PCMCIA config., multi-function pin tri-state
- */
-#define CONFIG_SYS_SIUMCR	(SIUMCR_MLRC10)
-
-/*-----------------------------------------------------------------------
- * TBSCR - Time Base Status and Control				11-26
- *-----------------------------------------------------------------------
- * Clear Reference Interrupt Status, Timebase freezing enabled
- */
-#define CONFIG_SYS_TBSCR	(TBSCR_REFA | TBSCR_REFB | TBSCR_TBF | TBSCR_TBE)
-
-/*-----------------------------------------------------------------------
- * RTCSC - Real-Time Clock Status and Control Register		11-27
- *-----------------------------------------------------------------------
- */
-/*%%%#define CONFIG_SYS_RTCSC	(RTCSC_SEC | RTCSC_ALR | RTCSC_RTF| RTCSC_RTE) */
-#define CONFIG_SYS_RTCSC	(RTCSC_SEC | RTCSC_RTE)
-
-/*-----------------------------------------------------------------------
- * PISCR - Periodic Interrupt Status and Control		11-31
- *-----------------------------------------------------------------------
- * Clear Periodic Interrupt Status, Interrupt Timer freezing enabled
- */
-#define CONFIG_SYS_PISCR (PISCR_PS | PISCR_PITF)
-
-/*-----------------------------------------------------------------------
- * PLPRCR - PLL, Low-Power, and Reset Control Register		15-30
- *-----------------------------------------------------------------------
- * Reset PLL lock status sticky bit, timer expired status bit and timer
- * interrupt status bit
- *
- * If this is a 80 MHz CPU, set PLL multiplication factor to 5 (5*16=80)!
- */
-/* up to 50 MHz we use a 1:1 clock */
-#define CONFIG_SYS_PLPRCR	( (5 << PLPRCR_MF_SHIFT) | PLPRCR_TEXPS )
-
-/*-----------------------------------------------------------------------
- * SCCR - System Clock and reset Control Register		15-27
- *-----------------------------------------------------------------------
- * Set clock output, timebase and RTC source and divider,
- * power management and some other internal clocks
- */
-#define SCCR_MASK	SCCR_EBDF00
-/* up to 50 MHz we use a 1:1 clock */
-#define CONFIG_SYS_SCCR	(SCCR_COM00 | SCCR_TBS)
-
-/*-----------------------------------------------------------------------
- * PCMCIA stuff
- *-----------------------------------------------------------------------
- *
- */
-#define CONFIG_SYS_PCMCIA_MEM_ADDR	(0xE0000000)
-#define CONFIG_SYS_PCMCIA_MEM_SIZE	( 64 << 20 )
-#define CONFIG_SYS_PCMCIA_DMA_ADDR	(0xE4000000)
-#define CONFIG_SYS_PCMCIA_DMA_SIZE	( 64 << 20 )
-#define CONFIG_SYS_PCMCIA_ATTRB_ADDR	(0xE8000000)
-#define CONFIG_SYS_PCMCIA_ATTRB_SIZE	( 64 << 20 )
-#define CONFIG_SYS_PCMCIA_IO_ADDR	(0xEC000000)
-#define CONFIG_SYS_PCMCIA_IO_SIZE	( 64 << 20 )
-
-/*-----------------------------------------------------------------------
- * IDE/ATA stuff (Supports IDE harddisk on PCMCIA Adapter)
- *-----------------------------------------------------------------------
- */
-
-#define	CONFIG_IDE_8xx_PCCARD	1	/* Use IDE with PC Card	Adapter	*/
-
-#undef	CONFIG_IDE_8xx_DIRECT		/* Direct IDE    not supported	*/
-#undef	CONFIG_IDE_LED			/* LED   for ide not supported	*/
-#undef	CONFIG_IDE_RESET		/* reset for ide not supported	*/
-
-#define CONFIG_SYS_IDE_MAXBUS		1	/* max. 1 IDE bus		*/
-#define CONFIG_SYS_IDE_MAXDEVICE	1	/* max. 1 drive per IDE bus	*/
-
-#define CONFIG_SYS_ATA_IDE0_OFFSET	0x0000
-
-#define CONFIG_SYS_ATA_BASE_ADDR	CONFIG_SYS_PCMCIA_MEM_ADDR
-
-/* Offset for data I/O			*/
-#define CONFIG_SYS_ATA_DATA_OFFSET	(CONFIG_SYS_PCMCIA_MEM_SIZE + 0x320)
-
-/* Offset for normal register accesses	*/
-#define CONFIG_SYS_ATA_REG_OFFSET	(2 * CONFIG_SYS_PCMCIA_MEM_SIZE + 0x320)
-
-/* Offset for alternate registers	*/
-#define CONFIG_SYS_ATA_ALT_OFFSET	0x0100
-
-/*-----------------------------------------------------------------------
- *
- *-----------------------------------------------------------------------
- *
- */
-/*#define	CONFIG_SYS_DER	0x2002000F*/
-#define CONFIG_SYS_DER	0
-
-/*
- * Init Memory Controller:
- *
- * BR0 and OR0 (FLASH)
- */
-
-#define FLASH_BASE_PRELIM	0xFC000000	/* FLASH base - up to 64 MB of flash */
-#define CONFIG_SYS_PRELIM_OR_AM	0xFC000000	/* OR addr mask - map 64 MB */
-
-/* FLASH timing: ACS = 0, TRLX = 0, CSNT = 0, SCY = 4, ETHR = 0, BIH = 1 */
-#define CONFIG_SYS_OR_TIMING_FLASH (OR_SCY_4_CLK | OR_BI)
-
-#define CONFIG_SYS_OR0_PRELIM	(CONFIG_SYS_PRELIM_OR_AM | CONFIG_SYS_OR_TIMING_FLASH)
-#define CONFIG_SYS_BR0_PRELIM	((FLASH_BASE_PRELIM & BR_BA_MSK) | BR_V)
-
-/*
- * BR1 and OR1 (SDRAM)
- *
- */
-#define SDRAM_BASE_PRELIM	0x00000000	/* SDRAM base	*/
-#define	SDRAM_MAX_SIZE		0x08000000	/* max 128 MB */
-
-/* SDRAM timing: Multiplexed addresses, GPL5 output to GPL5_A (don't care)	*/
-#define CONFIG_SYS_OR_TIMING_SDRAM	0x00000E00
-
-#define CONFIG_SYS_OR1_PRELIM	(0xF0000000 | CONFIG_SYS_OR_TIMING_SDRAM ) /* map 256 MB */
-#define CONFIG_SYS_BR1_PRELIM	((SDRAM_BASE_PRELIM & BR_BA_MSK) | BR_MS_UPMA | BR_V )
-
-/* RPXLITE mem setting */
-#define CONFIG_SYS_NVRAM_BASE	0xFA000000		/* NVRAM & SRAM base */
-/*      IMMR:		0xFA200000		   IMMR base address - see above */
-#define	CONFIG_SYS_BCSR_BASE	0xFA400000		/* BCSR base address */
-
-#define	CONFIG_SYS_BR3_PRELIM	(CONFIG_SYS_BCSR_BASE | BR_V)			/* BCSR */
-#define CONFIG_SYS_OR3_PRELIM	0xFFFF8910
-#define CONFIG_SYS_BR4_PRELIM  (CONFIG_SYS_NVRAM_BASE | BR_PS_8 | BR_V)	/* NVRAM & SRAM */
-#define CONFIG_SYS_OR4_PRELIM	0xFFFE0970
-
-/*
- * Memory Periodic Timer Prescaler
- */
-
-/* periodic timer for refresh */
-#define CONFIG_SYS_MAMR_PTA	20
-
-/*
- * Refresh clock Prescalar
- */
-#define CONFIG_SYS_MPTPR	MPTPR_PTP_DIV2
-
-/*
- * MAMR settings for SDRAM
- */
-
-/* 9 column SDRAM */
-#define CONFIG_SYS_MAMR_9COL	((CONFIG_SYS_MAMR_PTA << MAMR_PTA_SHIFT)  | MAMR_PTAE	    |	\
-			 MAMR_AMA_TYPE_1 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A10 |	\
-			 MAMR_RLFA_16X | MAMR_WLFA_16X | MAMR_TLFA_16X)
-
-/*
- * BCSRx
- *
- * Board Status and Control Registers
- *
- */
-
-#define BCSR0	(CONFIG_SYS_BCSR_BASE + 0)
-#define BCSR1	(CONFIG_SYS_BCSR_BASE + 1)
-#define BCSR2	(CONFIG_SYS_BCSR_BASE + 2)
-#define BCSR3	(CONFIG_SYS_BCSR_BASE + 3)
-
-#define BCSR0_ENMONXCVR	0x01	/* Monitor XVCR Control */
-#define BCSR0_ENNVRAM	0x02	/* CS4# Control */
-#define BCSR0_LED5	0x04	/* LED5 control 0='on' 1='off' */
-#define BCSR0_LED4	0x08	/* LED4 control 0='on' 1='off' */
-#define BCSR0_FULLDPLX	0x10	/* Ethernet XCVR Control */
-#define BCSR0_COLTEST	0x20
-#define BCSR0_ETHLPBK	0x40
-#define BCSR0_ETHEN	0x80
-
-#define BCSR1_PCVCTL7	0x01	/* PC Slot B Control */
-#define BCSR1_PCVCTL6	0x02
-#define BCSR1_PCVCTL5	0x04
-#define BCSR1_PCVCTL4	0x08
-#define BCSR1_IPB5SEL	0x10
-
-#define BCSR2_ENPA5HDR	0x08	/* USB Control */
-#define BCSR2_ENUSBCLK	0x10
-#define BCSR2_USBPWREN	0x20
-#define BCSR2_USBSPD	0x40
-#define BCSR2_USBSUSP	0x80
-
-#define BCSR3_BWRTC	0x01	/* Real Time Clock Battery */
-#define BCSR3_BWNVR	0x02	/* NVRAM Battery */
-#define BCSR3_RDY_BSY	0x04	/* Flash Operation */
-#define BCSR3_RPXL	0x08	/* Reserved (reads back '1') */
-#define BCSR3_D27	0x10	/* Dip Switch settings */
-#define BCSR3_D26	0x20
-#define BCSR3_D25	0x40
-#define BCSR3_D24	0x80
-
-#endif	/* __CONFIG_H */