Merge branch 'master' of git://www.denx.de/git/u-boot-imx
diff --git a/Kconfig b/Kconfig
index 85faff7..15e15af 100644
--- a/Kconfig
+++ b/Kconfig
@@ -178,7 +178,7 @@
new boards should not use this option.
config SYS_TEXT_BASE
- depends on SPARC || ARC || X86
+ depends on SPARC || ARC || X86 || ARCH_UNIPHIER
hex "Text Base"
help
TODO: Move CONFIG_SYS_TEXT_BASE for all the architecture
diff --git a/Makefile b/Makefile
index bc47d98..14f782e 100644
--- a/Makefile
+++ b/Makefile
@@ -876,7 +876,7 @@
# Create a file containing the configuration options the image was built with
quiet_cmd_cpp_cfg = CFG $@
cmd_cpp_cfg = $(CPP) -Wp,-MD,$(depfile) $(cpp_flags) $(LDPPFLAGS) -ansi \
- -D__ASSEMBLY__ -x assembler-with-cpp -P -dM -E -o $@ $<
+ -DDO_DEPS_ONLY -D__ASSEMBLY__ -x assembler-with-cpp -P -dM -E -o $@ $<
MKIMAGEFLAGS_u-boot.img = -A $(ARCH) -T firmware -C none -O u-boot \
-a $(CONFIG_SYS_TEXT_BASE) -e $(CONFIG_SYS_UBOOT_START) \
@@ -1232,7 +1232,8 @@
define filechk_timestamp.h
(LC_ALL=C date +'#define U_BOOT_DATE "%b %d %C%y"'; \
- LC_ALL=C date +'#define U_BOOT_TIME "%T"')
+ LC_ALL=C date +'#define U_BOOT_TIME "%T"'; \
+ LC_ALL=C date +'#define U_BOOT_TZ "%z"')
endef
$(version_h): include/config/uboot.release FORCE
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index b62842f..2985e6e 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -786,7 +786,7 @@
select CPU_SA1100
config ARCH_UNIPHIER
- bool "Panasonic UniPhier platform"
+ bool "Socionext UniPhier SoCs"
select CPU_V7
select SUPPORT_SPL
select SPL
@@ -794,6 +794,9 @@
select DM
select DM_SERIAL
select DM_I2C
+ help
+ Support for UniPhier SoC family developed by Socionext Inc.
+ (formerly, System LSI Business Division of Panasonic Corporation)
config TARGET_STM32F429_DISCOVERY
bool "Support STM32F429 Discovery"
diff --git a/arch/arm/cpu/armv7/rmobile/Kconfig b/arch/arm/cpu/armv7/rmobile/Kconfig
index ae23078..ef56286 100644
--- a/arch/arm/cpu/armv7/rmobile/Kconfig
+++ b/arch/arm/cpu/armv7/rmobile/Kconfig
@@ -50,6 +50,28 @@
depends on TARGET_ALT || TARGET_KOELSCH || TARGET_LAGER || TARGET_PORTER || TARGET_SILK
default n
+choice
+ prompt "Qos setting primary"
+ depends on TARGET_ALT || TARGET_GOSE || TARGET_KOELSCH || TARGET_LAGER
+ default QOS_PRI_NORMAL
+
+config QOS_PRI_NORMAL
+ bool "Non primary"
+ help
+ Select normal mode for QoS setting.
+
+config QOS_PRI_MEDIA
+ bool "Media primary"
+ help
+ Select multimedia primary mode for QoS setting.
+
+config QOS_PRI_GFX
+ bool "GFX primary"
+ help
+ Select GFX(graphics) primary mode for QoS setting.
+
+endchoice
+
source "board/atmark-techno/armadillo-800eva/Kconfig"
source "board/renesas/gose/Kconfig"
source "board/renesas/koelsch/Kconfig"
diff --git a/arch/arm/cpu/armv7/sunxi/Makefile b/arch/arm/cpu/armv7/sunxi/Makefile
index 6a0299f..76c7e55 100644
--- a/arch/arm/cpu/armv7/sunxi/Makefile
+++ b/arch/arm/cpu/armv7/sunxi/Makefile
@@ -13,7 +13,9 @@
obj-y += cpu_info.o
obj-y += dram_helpers.o
obj-y += pinmux.o
+ifndef CONFIG_MACH_SUN9I
obj-y += usb_phy.o
+endif
obj-$(CONFIG_MACH_SUN6I) += prcm.o
obj-$(CONFIG_MACH_SUN8I) += prcm.o
obj-$(CONFIG_MACH_SUN9I) += prcm.o
@@ -33,7 +35,9 @@
ifndef CONFIG_SPL_BUILD
ifdef CONFIG_ARMV7_PSCI
-obj-y += psci.o
+obj-$(CONFIG_MACH_SUN6I) += psci_sun6i.o
+obj-$(CONFIG_MACH_SUN7I) += psci_sun7i.o
+obj-$(CONFIG_MACH_SUN8I) += psci_sun6i.o
endif
endif
diff --git a/arch/arm/cpu/armv7/sunxi/board.c b/arch/arm/cpu/armv7/sunxi/board.c
index e6730c0..a82c8b9 100644
--- a/arch/arm/cpu/armv7/sunxi/board.c
+++ b/arch/arm/cpu/armv7/sunxi/board.c
@@ -64,6 +64,10 @@
sunxi_gpio_set_cfgpin(SUNXI_GPH(20), SUN6I_GPH_UART0);
sunxi_gpio_set_cfgpin(SUNXI_GPH(21), SUN6I_GPH_UART0);
sunxi_gpio_set_pull(SUNXI_GPH(21), SUNXI_GPIO_PULL_UP);
+#elif CONFIG_CONS_INDEX == 1 && defined(CONFIG_MACH_SUN9I)
+ sunxi_gpio_set_cfgpin(SUNXI_GPH(12), SUN9I_GPH_UART0);
+ sunxi_gpio_set_cfgpin(SUNXI_GPH(13), SUN9I_GPH_UART0);
+ sunxi_gpio_set_pull(SUNXI_GPH(13), SUNXI_GPIO_PULL_UP);
#elif CONFIG_CONS_INDEX == 2 && defined(CONFIG_MACH_SUN5I)
sunxi_gpio_set_cfgpin(SUNXI_GPG(3), SUN5I_GPG_UART1);
sunxi_gpio_set_cfgpin(SUNXI_GPG(4), SUN5I_GPG_UART1);
@@ -115,17 +119,19 @@
#ifdef CONFIG_SPL_BUILD
/* The sunxi internal brom will try to loader external bootloader
* from mmc0, nand flash, mmc2.
- * Unfortunately we can't check how SPL was loaded so assume
- * it's always the first SD/MMC controller
+ *
+ * Unfortunately we can't check how SPL was loaded so assume it's
+ * always the first SD/MMC controller, unless it was explicitly
+ * stated that SPL is on nand flash.
*/
u32 spl_boot_device(void)
{
-#ifdef CONFIG_SPL_FEL
+#if defined(CONFIG_SPL_NAND_SUPPORT)
/*
- * This is the legacy compile time configuration for a special FEL
- * enabled build. It has many restrictions and can only boot over USB.
+ * This is compile time configuration informing SPL, that it
+ * was loaded from nand flash.
*/
- return BOOT_DEVICE_BOARD;
+ return BOOT_DEVICE_NAND;
#else
/*
* When booting from the SD card, the "eGON.BT0" signature is expected
diff --git a/arch/arm/cpu/armv7/sunxi/cpu_info.c b/arch/arm/cpu/armv7/sunxi/cpu_info.c
index 30ec4ac..a276fad 100644
--- a/arch/arm/cpu/armv7/sunxi/cpu_info.c
+++ b/arch/arm/cpu/armv7/sunxi/cpu_info.c
@@ -11,6 +11,7 @@
#include <asm/arch/cpu.h>
#include <asm/arch/clock.h>
#include <axp221.h>
+#include <errno.h>
#ifdef CONFIG_MACH_SUN6I
int sunxi_get_ss_bonding_id(void)
@@ -68,6 +69,8 @@
puts("CPU: Allwinner A23 (SUN8I)\n");
#elif defined CONFIG_MACH_SUN8I_A33
puts("CPU: Allwinner A33 (SUN8I)\n");
+#elif defined CONFIG_MACH_SUN9I
+ puts("CPU: Allwinner A80 (SUN9I)\n");
#else
#warning Please update cpu_info.c with correct CPU information
puts("CPU: SUNXI Family\n");
@@ -78,18 +81,16 @@
int sunxi_get_sid(unsigned int *sid)
{
-#if defined CONFIG_MACH_SUN6I || defined CONFIG_MACH_SUN8I_A23
#ifdef CONFIG_AXP221_POWER
return axp221_get_sid(sid);
-#else
- return -ENODEV;
-#endif
-#else
+#elif defined SUNXI_SID_BASE
int i;
for (i = 0; i< 4; i++)
sid[i] = readl(SUNXI_SID_BASE + 4 * i);
return 0;
+#else
+ return -ENODEV;
#endif
}
diff --git a/arch/arm/cpu/armv7/sunxi/psci.S b/arch/arm/cpu/armv7/sunxi/psci_sun6i.S
similarity index 74%
copy from arch/arm/cpu/armv7/sunxi/psci.S
copy to arch/arm/cpu/armv7/sunxi/psci_sun6i.S
index 7ec0500..d4cb51e 100644
--- a/arch/arm/cpu/armv7/sunxi/psci.S
+++ b/arch/arm/cpu/armv7/sunxi/psci_sun6i.S
@@ -1,8 +1,8 @@
/*
- * Copyright (C) 2013 - ARM Ltd
- * Author: Marc Zyngier <marc.zyngier@arm.com>
+ * Copyright (C) 2015 - Chen-Yu Tsai
+ * Author: Chen-Yu Tsai <wens@csie.org>
*
- * Based on code by Carl van Schaik <carl@ok-labs.com>.
+ * Based on psci_sun7i.S by Marc Zyngier <marc.zyngier@arm.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
@@ -91,8 +91,8 @@
lsr r9, r9, #10
and r9, r9, #0xf
- movw r8, #(SUN7I_CPUCFG_BASE & 0xffff)
- movt r8, #(SUN7I_CPUCFG_BASE >> 16)
+ movw r8, #(SUN6I_CPUCFG_BASE & 0xffff)
+ movt r8, #(SUN6I_CPUCFG_BASE >> 16)
@ Wait for the core to enter WFI
lsl r11, r9, #6 @ x64
@@ -110,24 +110,35 @@
@ Lock CPU
mov r10, #1
- lsl r9, r10, r9 @ r9 is now CPU mask
+ lsl r11, r10, r9 @ r11 is now CPU mask
ldr r10, [r8, #0x1e4]
- bic r10, r10, r9
+ bic r10, r10, r11
str r10, [r8, #0x1e4]
+ movw r8, #(SUNXI_PRCM_BASE & 0xffff)
+ movt r8, #(SUNXI_PRCM_BASE >> 16)
+
@ Set power gating
- ldr r10, [r8, #0x1b4]
- orr r10, r10, #1
- str r10, [r8, #0x1b4]
+ ldr r10, [r8, #0x100]
+ orr r10, r10, r11
+ str r10, [r8, #0x100]
timer_wait r10, ONE_MS
+#ifdef CONFIG_MACH_SUN6I
@ Activate power clamp
- mov r10, #1
-1: str r10, [r8, #0x1b0]
- lsl r10, r10, #1
- orr r10, r10, #1
- tst r10, #0x100
- beq 1b
+ lsl r12, r9, #2 @ x4
+ add r12, r12, r8
+ mov r10, #0xff
+ str r10, [r12, #0x140]
+#endif
+
+ movw r8, #(SUN6I_CPUCFG_BASE & 0xffff)
+ movt r8, #(SUN6I_CPUCFG_BASE >> 16)
+
+ @ Unlock CPU
+ ldr r10, [r8, #0x1e4]
+ orr r10, r10, r11
+ str r10, [r8, #0x1e4]
@ Restore security level
out: mcr p15, 0, r7, c1, c1, 0
@@ -146,8 +157,8 @@
str r2, [r0] @ store target PC at stack top
dsb
- movw r0, #(SUN7I_CPUCFG_BASE & 0xffff)
- movt r0, #(SUN7I_CPUCFG_BASE >> 16)
+ movw r0, #(SUN6I_CPUCFG_BASE & 0xffff)
+ movt r0, #(SUN6I_CPUCFG_BASE >> 16)
@ CPU mask
and r1, r1, #3 @ only care about first cluster
@@ -165,35 +176,49 @@
str r6, [r5] @ Reset CPU
@ l1 invalidate
- ldr r6, [r0, #0x184]
+ ldr r6, [r0, #0x184] @ CPUCFG_GEN_CTRL_REG
bic r6, r6, r4
str r6, [r0, #0x184]
- @ Lock CPU
- ldr r6, [r0, #0x1e4]
+ @ Lock CPU (Disable external debug access)
+ ldr r6, [r0, #0x1e4] @ CPUCFG_DBG_CTL1_REG
bic r6, r6, r4
str r6, [r0, #0x1e4]
+ movw r0, #(SUNXI_PRCM_BASE & 0xffff)
+ movt r0, #(SUNXI_PRCM_BASE >> 16)
+
+#ifdef CONFIG_MACH_SUN6I
@ Release power clamp
+ lsl r5, r1, #2 @ 1 register per CPU
+ add r5, r5, r0 @ PRCM
movw r6, #0x1ff
movt r6, #0
1: lsrs r6, r6, #1
- str r6, [r0, #0x1b0]
+ str r6, [r5, #0x140] @ CPUx_PWR_CLAMP
bne 1b
+#endif
- timer_wait r1, TEN_MS
+ timer_wait r6, TEN_MS
@ Clear power gating
- ldr r6, [r0, #0x1b4]
- bic r6, r6, #1
- str r6, [r0, #0x1b4]
+ ldr r6, [r0, #0x100] @ CPU_PWROFF_GATING
+ bic r6, r6, r4
+ str r6, [r0, #0x100]
+
+ @ re-calculate CPU control register address
+ movw r0, #(SUN6I_CPUCFG_BASE & 0xffff)
+ movt r0, #(SUN6I_CPUCFG_BASE >> 16)
@ Deassert reset on target CPU
mov r6, #3
+ lsl r5, r1, #6 @ 64 bytes per CPU
+ add r5, r5, #0x40 @ Offset from base
+ add r5, r5, r0 @ CPU control block
str r6, [r5]
- @ Unlock CPU
- ldr r6, [r0, #0x1e4]
+ @ Unlock CPU (Enable external debug access)
+ ldr r6, [r0, #0x1e4] @ CPUCFG_DBG_CTL1_REG
orr r6, r6, r4
str r6, [r0, #0x1e4]
diff --git a/arch/arm/cpu/armv7/sunxi/psci.S b/arch/arm/cpu/armv7/sunxi/psci_sun7i.S
similarity index 94%
rename from arch/arm/cpu/armv7/sunxi/psci.S
rename to arch/arm/cpu/armv7/sunxi/psci_sun7i.S
index 7ec0500..bbfeec8 100644
--- a/arch/arm/cpu/armv7/sunxi/psci.S
+++ b/arch/arm/cpu/armv7/sunxi/psci_sun7i.S
@@ -165,12 +165,12 @@
str r6, [r5] @ Reset CPU
@ l1 invalidate
- ldr r6, [r0, #0x184]
+ ldr r6, [r0, #0x184] @ CPUCFG_GEN_CTRL_REG
bic r6, r6, r4
str r6, [r0, #0x184]
- @ Lock CPU
- ldr r6, [r0, #0x1e4]
+ @ Lock CPU (Disable external debug access)
+ ldr r6, [r0, #0x1e4] @ CPUCFG_DBG_CTL1_REG
bic r6, r6, r4
str r6, [r0, #0x1e4]
@@ -178,13 +178,13 @@
movw r6, #0x1ff
movt r6, #0
1: lsrs r6, r6, #1
- str r6, [r0, #0x1b0]
+ str r6, [r0, #0x1b0] @ CPU1_PWR_CLAMP
bne 1b
timer_wait r1, TEN_MS
@ Clear power gating
- ldr r6, [r0, #0x1b4]
+ ldr r6, [r0, #0x1b4] @ CPU1_PWROFF_REG
bic r6, r6, #1
str r6, [r0, #0x1b4]
@@ -192,8 +192,8 @@
mov r6, #3
str r6, [r5]
- @ Unlock CPU
- ldr r6, [r0, #0x1e4]
+ @ Unlock CPU (Enable external debug access)
+ ldr r6, [r0, #0x1e4] @ CPUCFG_DBG_CTL1_REG
orr r6, r6, r4
str r6, [r0, #0x1e4]
diff --git a/arch/arm/cpu/armv7/sunxi/usb_phy.c b/arch/arm/cpu/armv7/sunxi/usb_phy.c
index 410669e..b07d67f 100644
--- a/arch/arm/cpu/armv7/sunxi/usb_phy.c
+++ b/arch/arm/cpu/armv7/sunxi/usb_phy.c
@@ -128,10 +128,10 @@
usb_phy_write(phy, 0x20, 0x14, 5);
/* threshold adjustment disconnect */
-#if defined CONFIG_MACH_SUN4I || defined CONFIG_MACH_SUN6I
- usb_phy_write(phy, 0x2a, 3, 2);
-#else
+#if defined CONFIG_MACH_SUN5I || defined CONFIG_MACH_SUN7I
usb_phy_write(phy, 0x2a, 2, 2);
+#else
+ usb_phy_write(phy, 0x2a, 3, 2);
#endif
return;
diff --git a/arch/arm/cpu/armv7m/Makefile b/arch/arm/cpu/armv7m/Makefile
index b662e03..93a1956 100644
--- a/arch/arm/cpu/armv7m/Makefile
+++ b/arch/arm/cpu/armv7m/Makefile
@@ -8,4 +8,5 @@
extra-y := start.o
obj-y += cpu.o
+obj-$(CONFIG_STM32F1) += stm32f1/
obj-$(CONFIG_STM32F4) += stm32f4/
diff --git a/arch/arm/cpu/armv7m/stm32f1/Makefile b/arch/arm/cpu/armv7m/stm32f1/Makefile
new file mode 100644
index 0000000..4faf435
--- /dev/null
+++ b/arch/arm/cpu/armv7m/stm32f1/Makefile
@@ -0,0 +1,14 @@
+#
+# (C) Copyright 2000-2006
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# (C) Copyright 2015
+# Kamil Lulko, <rev13@wp.pl>
+#
+# Copyright 2015 ATS Advanced Telematics Systems GmbH
+# Copyright 2015 Konsulko Group, Matt Porter <mporter@konsulko.com>
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y += soc.o clock.o timer.o flash.o
diff --git a/arch/arm/cpu/armv7m/stm32f1/clock.c b/arch/arm/cpu/armv7m/stm32f1/clock.c
new file mode 100644
index 0000000..acad116
--- /dev/null
+++ b/arch/arm/cpu/armv7m/stm32f1/clock.c
@@ -0,0 +1,196 @@
+/*
+ * (C) Copyright 2015
+ * Kamil Lulko, <rev13@wp.pl>
+ *
+ * Copyright 2015 ATS Advanced Telematics Systems GmbH
+ * Copyright 2015 Konsulko Group, Matt Porter <mporter@konsulko.com>
+ *
+ * (C) Copyright 2014
+ * STMicroelectronics
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <asm/arch/stm32.h>
+
+#define RCC_CR_HSION (1 << 0)
+#define RCC_CR_HSEON (1 << 16)
+#define RCC_CR_HSERDY (1 << 17)
+#define RCC_CR_HSEBYP (1 << 18)
+#define RCC_CR_CSSON (1 << 19)
+#define RCC_CR_PLLON (1 << 24)
+#define RCC_CR_PLLRDY (1 << 25)
+
+#define RCC_CFGR_PLLMUL_MASK 0x3C0000
+#define RCC_CFGR_PLLMUL_SHIFT 18
+#define RCC_CFGR_PLLSRC_HSE (1 << 16)
+
+#define RCC_CFGR_AHB_PSC_MASK 0xF0
+#define RCC_CFGR_APB1_PSC_MASK 0x700
+#define RCC_CFGR_APB2_PSC_MASK 0x3800
+#define RCC_CFGR_SW0 (1 << 0)
+#define RCC_CFGR_SW1 (1 << 1)
+#define RCC_CFGR_SW_MASK 0x3
+#define RCC_CFGR_SW_HSI 0
+#define RCC_CFGR_SW_HSE RCC_CFGR_SW0
+#define RCC_CFGR_SW_PLL RCC_CFGR_SW1
+#define RCC_CFGR_SWS0 (1 << 2)
+#define RCC_CFGR_SWS1 (1 << 3)
+#define RCC_CFGR_SWS_MASK 0xC
+#define RCC_CFGR_SWS_HSI 0
+#define RCC_CFGR_SWS_HSE RCC_CFGR_SWS0
+#define RCC_CFGR_SWS_PLL RCC_CFGR_SWS1
+#define RCC_CFGR_HPRE_SHIFT 4
+#define RCC_CFGR_PPRE1_SHIFT 8
+#define RCC_CFGR_PPRE2_SHIFT 11
+
+#define RCC_APB1ENR_PWREN (1 << 28)
+
+#define PWR_CR_VOS0 (1 << 14)
+#define PWR_CR_VOS1 (1 << 15)
+#define PWR_CR_VOS_MASK 0xC000
+#define PWR_CR_VOS_SCALE_MODE_1 (PWR_CR_VOS0 | PWR_CR_VOS1)
+#define PWR_CR_VOS_SCALE_MODE_2 (PWR_CR_VOS1)
+#define PWR_CR_VOS_SCALE_MODE_3 (PWR_CR_VOS0)
+
+#define FLASH_ACR_WS(n) n
+#define FLASH_ACR_PRFTEN (1 << 8)
+#define FLASH_ACR_ICEN (1 << 9)
+#define FLASH_ACR_DCEN (1 << 10)
+
+struct psc {
+ u8 ahb_psc;
+ u8 apb1_psc;
+ u8 apb2_psc;
+};
+
+#define AHB_PSC_1 0
+#define AHB_PSC_2 0x8
+#define AHB_PSC_4 0x9
+#define AHB_PSC_8 0xA
+#define AHB_PSC_16 0xB
+#define AHB_PSC_64 0xC
+#define AHB_PSC_128 0xD
+#define AHB_PSC_256 0xE
+#define AHB_PSC_512 0xF
+
+#define APB_PSC_1 0
+#define APB_PSC_2 0x4
+#define APB_PSC_4 0x5
+#define APB_PSC_8 0x6
+#define APB_PSC_16 0x7
+
+#if !defined(CONFIG_STM32_HSE_HZ)
+#error "CONFIG_STM32_HSE_HZ not defined!"
+#else
+#if (CONFIG_STM32_HSE_HZ == 8000000)
+#define RCC_CFGR_PLLMUL_CFG 0x7
+struct psc psc_hse = {
+ .ahb_psc = AHB_PSC_1,
+ .apb1_psc = APB_PSC_2,
+ .apb2_psc = APB_PSC_1
+};
+#else
+#error "No PLL/Prescaler configuration for given CONFIG_STM32_HSE_HZ exists"
+#endif
+#endif
+
+int configure_clocks(void)
+{
+ /* Reset RCC configuration */
+ setbits_le32(&STM32_RCC->cr, RCC_CR_HSION);
+ writel(0, &STM32_RCC->cfgr); /* Reset CFGR */
+ clrbits_le32(&STM32_RCC->cr, (RCC_CR_HSEON | RCC_CR_CSSON
+ | RCC_CR_PLLON));
+ clrbits_le32(&STM32_RCC->cr, RCC_CR_HSEBYP);
+ writel(0, &STM32_RCC->cir); /* Disable all interrupts */
+
+ /* Configure for HSE+PLL operation */
+ setbits_le32(&STM32_RCC->cr, RCC_CR_HSEON);
+ while (!(readl(&STM32_RCC->cr) & RCC_CR_HSERDY))
+ ;
+
+ /* Enable high performance mode, System frequency up to 168 MHz */
+ setbits_le32(&STM32_RCC->apb1enr, RCC_APB1ENR_PWREN);
+ writel(PWR_CR_VOS_SCALE_MODE_1, &STM32_PWR->cr);
+
+ setbits_le32(&STM32_RCC->cfgr,
+ RCC_CFGR_PLLMUL_CFG << RCC_CFGR_PLLMUL_SHIFT);
+ setbits_le32(&STM32_RCC->cfgr, RCC_CFGR_PLLSRC_HSE);
+ setbits_le32(&STM32_RCC->cfgr, ((
+ psc_hse.ahb_psc << RCC_CFGR_HPRE_SHIFT)
+ | (psc_hse.apb1_psc << RCC_CFGR_PPRE1_SHIFT)
+ | (psc_hse.apb2_psc << RCC_CFGR_PPRE2_SHIFT)));
+
+ setbits_le32(&STM32_RCC->cr, RCC_CR_PLLON);
+
+ while (!(readl(&STM32_RCC->cr) & RCC_CR_PLLRDY))
+ ;
+
+ /* 5 wait states, Prefetch enabled, D-Cache enabled, I-Cache enabled */
+ writel(FLASH_ACR_WS(5) | FLASH_ACR_PRFTEN | FLASH_ACR_ICEN
+ | FLASH_ACR_DCEN, &STM32_FLASH->acr);
+
+ clrbits_le32(&STM32_RCC->cfgr, (RCC_CFGR_SW0 | RCC_CFGR_SW1));
+ setbits_le32(&STM32_RCC->cfgr, RCC_CFGR_SW_PLL);
+
+ while ((readl(&STM32_RCC->cfgr) & RCC_CFGR_SWS_MASK) !=
+ RCC_CFGR_SWS_PLL)
+ ;
+
+ return 0;
+}
+
+unsigned long clock_get(enum clock clck)
+{
+ u32 sysclk = 0;
+ u32 shift = 0;
+ /* PLL table lookups for clock computation */
+ u8 pll_mul_table[16] = {
+ 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 16
+ };
+ /* Prescaler table lookups for clock computation */
+ u8 ahb_psc_table[16] = {
+ 0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9
+ };
+ u8 apb_psc_table[8] = {
+ 0, 0, 0, 0, 1, 2, 3, 4
+ };
+
+ if ((readl(&STM32_RCC->cfgr) & RCC_CFGR_SWS_MASK) ==
+ RCC_CFGR_SWS_PLL) {
+ u16 pll;
+ pll = ((readl(&STM32_RCC->cfgr) & RCC_CFGR_PLLMUL_MASK)
+ >> RCC_CFGR_PLLMUL_SHIFT);
+ sysclk = CONFIG_STM32_HSE_HZ * pll_mul_table[pll];
+ }
+
+ switch (clck) {
+ case CLOCK_CORE:
+ return sysclk;
+ break;
+ case CLOCK_AHB:
+ shift = ahb_psc_table[(
+ (readl(&STM32_RCC->cfgr) & RCC_CFGR_AHB_PSC_MASK)
+ >> RCC_CFGR_HPRE_SHIFT)];
+ return sysclk >>= shift;
+ break;
+ case CLOCK_APB1:
+ shift = apb_psc_table[(
+ (readl(&STM32_RCC->cfgr) & RCC_CFGR_APB1_PSC_MASK)
+ >> RCC_CFGR_PPRE1_SHIFT)];
+ return sysclk >>= shift;
+ break;
+ case CLOCK_APB2:
+ shift = apb_psc_table[(
+ (readl(&STM32_RCC->cfgr) & RCC_CFGR_APB2_PSC_MASK)
+ >> RCC_CFGR_PPRE2_SHIFT)];
+ return sysclk >>= shift;
+ break;
+ default:
+ return 0;
+ break;
+ }
+}
diff --git a/arch/arm/cpu/armv7m/stm32f1/flash.c b/arch/arm/cpu/armv7m/stm32f1/flash.c
new file mode 100644
index 0000000..bb88f23
--- /dev/null
+++ b/arch/arm/cpu/armv7m/stm32f1/flash.c
@@ -0,0 +1,180 @@
+/*
+ * (C) Copyright 2015
+ * Kamil Lulko, <rev13@wp.pl>
+ *
+ * Copyright 2015 ATS Advanced Telematics Systems GmbH
+ * Copyright 2015 Konsulko Group, Matt Porter <mporter@konsulko.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <asm/arch/stm32.h>
+
+#define STM32_FLASH_KEY1 0x45670123
+#define STM32_FLASH_KEY2 0xcdef89ab
+
+#define STM32_NUM_BANKS 2
+#define STM32_MAX_BANK 0x200
+
+flash_info_t flash_info[STM32_NUM_BANKS];
+static struct stm32_flash_bank_regs *flash_bank[STM32_NUM_BANKS];
+
+static void stm32f1_flash_lock(u8 bank, u8 lock)
+{
+ if (lock) {
+ setbits_le32(&flash_bank[bank]->cr, STM32_FLASH_CR_LOCK);
+ } else {
+ writel(STM32_FLASH_KEY1, &flash_bank[bank]->keyr);
+ writel(STM32_FLASH_KEY2, &flash_bank[bank]->keyr);
+ }
+}
+
+/* Only XL devices are supported (2 KiB sector size) */
+unsigned long flash_init(void)
+{
+ u8 i, banks;
+ u16 j, size;
+
+ /* Set up accessors for XL devices with wonky register layout */
+ flash_bank[0] = (struct stm32_flash_bank_regs *)&STM32_FLASH->keyr;
+ flash_bank[1] = (struct stm32_flash_bank_regs *)&STM32_FLASH->keyr2;
+
+ /*
+ * Get total flash size (in KiB) and configure number of banks
+ * present and sector count per bank.
+ */
+ size = readw(&STM32_DES->flash_size);
+ if (size <= STM32_MAX_BANK) {
+ banks = 1;
+ flash_info[0].sector_count = size >> 1;
+ } else if (size > STM32_MAX_BANK) {
+ banks = 2;
+ flash_info[0].sector_count = STM32_MAX_BANK >> 1;
+ flash_info[1].sector_count = (size - STM32_MAX_BANK) >> 1;
+ }
+
+ /* Configure start/size for all sectors */
+ for (i = 0; i < banks; i++) {
+ flash_info[i].flash_id = FLASH_STM32F1;
+ flash_info[i].start[0] = CONFIG_SYS_FLASH_BASE + (i << 19);
+ flash_info[i].size = 2048;
+ for (j = 1; (j < flash_info[i].sector_count); j++) {
+ flash_info[i].start[j] = flash_info[i].start[j - 1]
+ + 2048;
+ flash_info[i].size += 2048;
+ }
+ }
+
+ return size << 10;
+}
+
+void flash_print_info(flash_info_t *info)
+{
+ int i;
+
+ if (info->flash_id == FLASH_UNKNOWN) {
+ printf("Missing or unknown FLASH type\n");
+ return;
+ } else if (info->flash_id == FLASH_STM32F1) {
+ printf("STM32F1 Embedded Flash\n");
+ }
+
+ printf(" Size: %ld MB in %d Sectors\n",
+ info->size >> 10, info->sector_count);
+
+ printf(" Sector Start Addresses:");
+ for (i = 0; i < info->sector_count; ++i) {
+ if ((i % 5) == 0)
+ printf("\n ");
+ printf(" %08lX%s",
+ info->start[i],
+ info->protect[i] ? " (RO)" : " ");
+ }
+ printf("\n");
+ return;
+}
+
+int flash_erase(flash_info_t *info, int first, int last)
+{
+ u8 bank = 0xff;
+ int i;
+
+ for (i = 0; i < STM32_NUM_BANKS; i++) {
+ if (info == &flash_info[i]) {
+ bank = i;
+ break;
+ }
+ }
+ if (bank == 0xff)
+ return -1;
+
+ stm32f1_flash_lock(bank, 0);
+
+ for (i = first; i <= last; i++) {
+ while (readl(&flash_bank[bank]->sr) & STM32_FLASH_SR_BSY)
+ ;
+
+ setbits_le32(&flash_bank[bank]->cr, STM32_FLASH_CR_PER);
+
+ writel(info->start[i], &flash_bank[bank]->ar);
+
+ setbits_le32(&flash_bank[bank]->cr, STM32_FLASH_CR_STRT);
+
+ while (readl(&flash_bank[bank]->sr) & STM32_FLASH_SR_BSY)
+ ;
+ }
+
+ clrbits_le32(&flash_bank[bank]->cr, STM32_FLASH_CR_PER);
+
+ stm32f1_flash_lock(bank, 1);
+
+ return 0;
+}
+
+int write_buff(flash_info_t *info, uchar *src, ulong addr, ulong cnt)
+{
+ ulong i;
+ u8 bank = 0xff;
+
+ if (addr & 1) {
+ printf("Flash address must be half word aligned\n");
+ return -1;
+ }
+
+ if (cnt & 1) {
+ printf("Flash length must be half word aligned\n");
+ return -1;
+ }
+
+ for (i = 0; i < 2; i++) {
+ if (info == &flash_info[i]) {
+ bank = i;
+ break;
+ }
+ }
+
+ if (bank == 0xff)
+ return -1;
+
+ while (readl(&flash_bank[bank]->sr) & STM32_FLASH_SR_BSY)
+ ;
+
+ stm32f1_flash_lock(bank, 0);
+
+ setbits_le32(&flash_bank[bank]->cr, STM32_FLASH_CR_PG);
+
+ /* STM32F1 requires half word writes */
+ for (i = 0; i < cnt >> 1; i++) {
+ *(u16 *)(addr + i * 2) = ((u16 *)src)[i];
+ while (readl(&flash_bank[bank]->sr) & STM32_FLASH_SR_BSY)
+ ;
+ }
+
+ clrbits_le32(&flash_bank[bank]->cr, STM32_FLASH_CR_PG);
+
+ stm32f1_flash_lock(bank, 1);
+
+ return 0;
+}
diff --git a/arch/arm/cpu/armv7m/stm32f1/soc.c b/arch/arm/cpu/armv7m/stm32f1/soc.c
new file mode 100644
index 0000000..8275ad7
--- /dev/null
+++ b/arch/arm/cpu/armv7m/stm32f1/soc.c
@@ -0,0 +1,36 @@
+/*
+ * (C) Copyright 2015
+ * Kamil Lulko, <rev13@wp.pl>
+ *
+ * Copyright 2015 ATS Advanced Telematics Systems GmbH
+ * Copyright 2015 Konsulko Group, Matt Porter <mporter@konsulko.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <asm/armv7m.h>
+#include <asm/arch/stm32.h>
+
+u32 get_cpu_rev(void)
+{
+ return 0;
+}
+
+int arch_cpu_init(void)
+{
+ configure_clocks();
+
+ /*
+ * Configure the memory protection unit (MPU) to allow full access to
+ * the whole 4GB address space.
+ */
+ writel(0, &V7M_MPU->rnr);
+ writel(0, &V7M_MPU->rbar);
+ writel((V7M_MPU_RASR_AP_RW_RW | V7M_MPU_RASR_SIZE_4GB
+ | V7M_MPU_RASR_EN), &V7M_MPU->rasr);
+ writel(V7M_MPU_CTRL_ENABLE | V7M_MPU_CTRL_HFNMIENA, &V7M_MPU->ctrl);
+
+ return 0;
+}
diff --git a/arch/arm/cpu/armv7m/stm32f1/timer.c b/arch/arm/cpu/armv7m/stm32f1/timer.c
new file mode 100644
index 0000000..c6292b5
--- /dev/null
+++ b/arch/arm/cpu/armv7m/stm32f1/timer.c
@@ -0,0 +1,121 @@
+/*
+ * (C) Copyright 2015
+ * Kamil Lulko, <rev13@wp.pl>
+ *
+ * Copyright 2015 ATS Advanced Telematics Systems GmbH
+ * Copyright 2015 Konsulko Group, Matt Porter <mporter@konsulko.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <asm/armv7m.h>
+#include <asm/arch/stm32.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define STM32_TIM2_BASE (STM32_APB1PERIPH_BASE + 0x0000)
+
+#define RCC_APB1ENR_TIM2EN (1 << 0)
+
+struct stm32_tim2_5 {
+ u32 cr1;
+ u32 cr2;
+ u32 smcr;
+ u32 dier;
+ u32 sr;
+ u32 egr;
+ u32 ccmr1;
+ u32 ccmr2;
+ u32 ccer;
+ u32 cnt;
+ u32 psc;
+ u32 arr;
+ u32 reserved1;
+ u32 ccr1;
+ u32 ccr2;
+ u32 ccr3;
+ u32 ccr4;
+ u32 reserved2;
+ u32 dcr;
+ u32 dmar;
+ u32 or;
+};
+
+#define TIM_CR1_CEN (1 << 0)
+
+#define TIM_EGR_UG (1 << 0)
+
+int timer_init(void)
+{
+ struct stm32_tim2_5 *tim = (struct stm32_tim2_5 *)STM32_TIM2_BASE;
+
+ setbits_le32(&STM32_RCC->apb1enr, RCC_APB1ENR_TIM2EN);
+
+ if (clock_get(CLOCK_AHB) == clock_get(CLOCK_APB1))
+ writel((clock_get(CLOCK_APB1) / CONFIG_SYS_HZ_CLOCK) - 1,
+ &tim->psc);
+ else
+ writel(((clock_get(CLOCK_APB1) * 2) / CONFIG_SYS_HZ_CLOCK) - 1,
+ &tim->psc);
+
+ writel(0xFFFFFFFF, &tim->arr);
+ writel(TIM_CR1_CEN, &tim->cr1);
+ setbits_le32(&tim->egr, TIM_EGR_UG);
+
+ gd->arch.tbl = 0;
+ gd->arch.tbu = 0;
+ gd->arch.lastinc = 0;
+
+ return 0;
+}
+
+ulong get_timer(ulong base)
+{
+ return (get_ticks() / (CONFIG_SYS_HZ_CLOCK / CONFIG_SYS_HZ)) - base;
+}
+
+unsigned long long get_ticks(void)
+{
+ struct stm32_tim2_5 *tim = (struct stm32_tim2_5 *)STM32_TIM2_BASE;
+ u32 now;
+
+ now = readl(&tim->cnt);
+
+ if (now >= gd->arch.lastinc)
+ gd->arch.tbl += (now - gd->arch.lastinc);
+ else
+ gd->arch.tbl += (0xFFFFFFFF - gd->arch.lastinc) + now;
+
+ gd->arch.lastinc = now;
+
+ return gd->arch.tbl;
+}
+
+void reset_timer(void)
+{
+ struct stm32_tim2_5 *tim = (struct stm32_tim2_5 *)STM32_TIM2_BASE;
+
+ gd->arch.lastinc = readl(&tim->cnt);
+ gd->arch.tbl = 0;
+}
+
+/* delay x useconds */
+void __udelay(ulong usec)
+{
+ unsigned long long start;
+
+ start = get_ticks(); /* get current timestamp */
+ while ((get_ticks() - start) < usec)
+ ; /* loop till time has passed */
+}
+
+/*
+ * This function is derived from PowerPC code (timebase clock frequency).
+ * On ARM it returns the number of timer ticks per second.
+ */
+ulong get_tbclk(void)
+{
+ return CONFIG_SYS_HZ_CLOCK;
+}
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 55039df..bc1421e 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -95,6 +95,7 @@
sun6i-a31-hummingbird.dtb \
sun6i-a31-i7.dtb \
sun6i-a31-m9.dtb \
+ sun6i-a31-mele-a1000g-quad.dtb \
sun6i-a31-mixtile-loftq.dtb \
sun6i-a31s-cs908.dtb \
sun6i-a31s-primo81.dtb
@@ -121,10 +122,12 @@
sun7i-a20-wits-pro-a20-dkt.dtb \
sun7i-a20-yones-toptech-bd1078.dtb
dtb-$(CONFIG_MACH_SUN8I_A23) += \
+ sun8i-a23-evb.dtb \
sun8i-a23-ippo-q8h-v5.dtb \
sun8i-a23-ippo-q8h-v1.2.dtb
dtb-$(CONFIG_MACH_SUN8I_A33) += \
- sun8i-a33-astar-mid756.dtb \
+ sun8i-a33-et-q8-v1.6.dtb \
+ sun8i-a33-ga10h-v1.1.dtb \
sun8i-a33-ippo-q8h-v1.2-lcd1024x600.dtb
dtb-$(CONFIG_MACH_SUN9I) += \
sun9i-a80-optimus.dtb \
diff --git a/arch/arm/dts/sun4i-a10-a1000.dts b/arch/arm/dts/sun4i-a10-a1000.dts
index f032814..2630d78 100644
--- a/arch/arm/dts/sun4i-a10-a1000.dts
+++ b/arch/arm/dts/sun4i-a10-a1000.dts
@@ -18,11 +18,6 @@
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
- * You should have received a copy of the GNU General Public
- * License along with this file; if not, write to the Free
- * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
- * MA 02110-1301 USA
- *
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
@@ -113,6 +108,10 @@
status = "okay";
};
+&emac_sram {
+ status = "okay";
+};
+
&i2c0 {
pinctrl-names = "default";
pinctrl-0 = <&i2c0_pins_a>;
@@ -130,7 +129,7 @@
&ir0 {
pinctrl-names = "default";
- pinctrl-0 = <&ir0_pins_a>;
+ pinctrl-0 = <&ir0_rx_pins_a>;
status = "okay";
};
diff --git a/arch/arm/dts/sun4i-a10-ba10-tvbox.dts b/arch/arm/dts/sun4i-a10-ba10-tvbox.dts
index 1a3c7dd..93d4356 100644
--- a/arch/arm/dts/sun4i-a10-ba10-tvbox.dts
+++ b/arch/arm/dts/sun4i-a10-ba10-tvbox.dts
@@ -16,11 +16,6 @@
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
- * You should have received a copy of the GNU General Public
- * License along with this file; if not, write to the Free
- * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
- * MA 02110-1301 USA
- *
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
@@ -79,6 +74,10 @@
status = "okay";
};
+&emac_sram {
+ status = "okay";
+};
+
&i2c0 {
pinctrl-names = "default";
pinctrl-0 = <&i2c0_pins_a>;
@@ -96,7 +95,7 @@
&ir0 {
pinctrl-names = "default";
- pinctrl-0 = <&ir0_pins_a>;
+ pinctrl-0 = <&ir0_rx_pins_a>;
status = "okay";
};
diff --git a/arch/arm/dts/sun4i-a10-chuwi-v7-cw0825.dts b/arch/arm/dts/sun4i-a10-chuwi-v7-cw0825.dts
index 35fb163..5878a0b 100644
--- a/arch/arm/dts/sun4i-a10-chuwi-v7-cw0825.dts
+++ b/arch/arm/dts/sun4i-a10-chuwi-v7-cw0825.dts
@@ -16,11 +16,6 @@
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
- * You should have received a copy of the GNU General Public
- * License along with this file; if not, write to the Free
- * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
- * MA 02110-1301 USA
- *
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
diff --git a/arch/arm/dts/sun4i-a10-cubieboard.dts b/arch/arm/dts/sun4i-a10-cubieboard.dts
index 0ba67d7..9afb4e0 100644
--- a/arch/arm/dts/sun4i-a10-cubieboard.dts
+++ b/arch/arm/dts/sun4i-a10-cubieboard.dts
@@ -17,11 +17,6 @@
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
- * You should have received a copy of the GNU General Public
- * License along with this file; if not, write to the Free
- * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
- * MA 02110-1301 USA
- *
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
@@ -107,6 +102,10 @@
status = "okay";
};
+&emac_sram {
+ status = "okay";
+};
+
&i2c0 {
pinctrl-names = "default";
pinctrl-0 = <&i2c0_pins_a>;
@@ -126,7 +125,7 @@
&ir0 {
pinctrl-names = "default";
- pinctrl-0 = <&ir0_pins_a>;
+ pinctrl-0 = <&ir0_rx_pins_a>;
status = "okay";
};
@@ -206,7 +205,8 @@
&spi0 {
pinctrl-names = "default";
- pinctrl-0 = <&spi0_pins_a>;
+ pinctrl-0 = <&spi0_pins_a>,
+ <&spi0_cs0_pins_a>;
status = "okay";
};
diff --git a/arch/arm/dts/sun4i-a10-gemei-g9.dts b/arch/arm/dts/sun4i-a10-gemei-g9.dts
index fbd638a..570754d 100644
--- a/arch/arm/dts/sun4i-a10-gemei-g9.dts
+++ b/arch/arm/dts/sun4i-a10-gemei-g9.dts
@@ -18,11 +18,6 @@
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
- * You should have received a copy of the GNU General Public
- * License along with this file; if not, write to the Free
- * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
- * MA 02110-1301 USA
- *
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
diff --git a/arch/arm/dts/sun4i-a10-hackberry.dts b/arch/arm/dts/sun4i-a10-hackberry.dts
index f443788..2b17c51 100644
--- a/arch/arm/dts/sun4i-a10-hackberry.dts
+++ b/arch/arm/dts/sun4i-a10-hackberry.dts
@@ -18,11 +18,6 @@
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
- * You should have received a copy of the GNU General Public
- * License along with this file; if not, write to the Free
- * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
- * MA 02110-1301 USA
- *
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
@@ -91,9 +86,13 @@
status = "okay";
};
+&emac_sram {
+ status = "okay";
+};
+
&ir0 {
pinctrl-names = "default";
- pinctrl-0 = <&ir0_pins_a>;
+ pinctrl-0 = <&ir0_rx_pins_a>;
status = "okay";
};
diff --git a/arch/arm/dts/sun4i-a10-hyundai-a7hd.dts b/arch/arm/dts/sun4i-a10-hyundai-a7hd.dts
index 9f06b18..43f58fb 100644
--- a/arch/arm/dts/sun4i-a10-hyundai-a7hd.dts
+++ b/arch/arm/dts/sun4i-a10-hyundai-a7hd.dts
@@ -16,11 +16,6 @@
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
- * You should have received a copy of the GNU General Public
- * License along with this file; if not, write to the Free
- * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
- * MA 02110-1301 USA
- *
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
diff --git a/arch/arm/dts/sun4i-a10-inet97fv2.dts b/arch/arm/dts/sun4i-a10-inet97fv2.dts
index e19ef52..6c927a8 100644
--- a/arch/arm/dts/sun4i-a10-inet97fv2.dts
+++ b/arch/arm/dts/sun4i-a10-inet97fv2.dts
@@ -18,11 +18,6 @@
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
- * You should have received a copy of the GNU General Public
- * License along with this file; if not, write to the Free
- * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
- * MA 02110-1301 USA
- *
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
diff --git a/arch/arm/dts/sun4i-a10-jesurun-q5.dts b/arch/arm/dts/sun4i-a10-jesurun-q5.dts
index 1b0452f..dc2f2ae 100644
--- a/arch/arm/dts/sun4i-a10-jesurun-q5.dts
+++ b/arch/arm/dts/sun4i-a10-jesurun-q5.dts
@@ -18,11 +18,6 @@
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
- * You should have received a copy of the GNU General Public
- * License along with this file; if not, write to the Free
- * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
- * MA 02110-1301 USA
- *
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
@@ -109,6 +104,10 @@
status = "okay";
};
+&emac_sram {
+ status = "okay";
+};
+
&i2c0 {
pinctrl-names = "default";
pinctrl-0 = <&i2c0_pins_a>;
@@ -126,7 +125,7 @@
&ir0 {
pinctrl-names = "default";
- pinctrl-0 = <&ir0_pins_a>;
+ pinctrl-0 = <&ir0_rx_pins_a>;
status = "okay";
};
diff --git a/arch/arm/dts/sun4i-a10-marsboard.dts b/arch/arm/dts/sun4i-a10-marsboard.dts
index 00c54d2..02158bc 100644
--- a/arch/arm/dts/sun4i-a10-marsboard.dts
+++ b/arch/arm/dts/sun4i-a10-marsboard.dts
@@ -17,11 +17,6 @@
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
- * You should have received a copy of the GNU General Public
- * License along with this file; if not, write to the Free
- * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
- * MA 02110-1301 USA
- *
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
@@ -104,6 +99,10 @@
status = "okay";
};
+&emac_sram {
+ status = "okay";
+};
+
&emac {
pinctrl-names = "default";
pinctrl-0 = <&emac_pins_a>;
@@ -174,7 +173,8 @@
&spi0 {
pinctrl-names = "default";
- pinctrl-0 = <&spi0_pins_a>;
+ pinctrl-0 = <&spi0_pins_a>,
+ <&spi0_cs0_pins_a>;
status = "okay";
};
diff --git a/arch/arm/dts/sun4i-a10-mini-xplus.dts b/arch/arm/dts/sun4i-a10-mini-xplus.dts
index 0f24914..ebe2a04 100644
--- a/arch/arm/dts/sun4i-a10-mini-xplus.dts
+++ b/arch/arm/dts/sun4i-a10-mini-xplus.dts
@@ -18,11 +18,6 @@
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
- * You should have received a copy of the GNU General Public
- * License along with this file; if not, write to the Free
- * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
- * MA 02110-1301 USA
- *
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
@@ -92,11 +87,11 @@
&ir0 {
pinctrl-names = "default";
- pinctrl-0 = <&ir0_pins_a>;
+ pinctrl-0 = <&ir0_rx_pins_a>;
status = "okay";
};
-&ir0_pins_a {
+&ir0_rx_pins_a {
/* The ir receiver is not always populated */
allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
};
diff --git a/arch/arm/dts/sun4i-a10-mk802.dts b/arch/arm/dts/sun4i-a10-mk802.dts
index 0f1c991..3c7eebe 100644
--- a/arch/arm/dts/sun4i-a10-mk802.dts
+++ b/arch/arm/dts/sun4i-a10-mk802.dts
@@ -16,11 +16,6 @@
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
- * You should have received a copy of the GNU General Public
- * License along with this file; if not, write to the Free
- * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
- * MA 02110-1301 USA
- *
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
diff --git a/arch/arm/dts/sun4i-a10-mk802ii.dts b/arch/arm/dts/sun4i-a10-mk802ii.dts
index f97aa6f..c861fa7 100644
--- a/arch/arm/dts/sun4i-a10-mk802ii.dts
+++ b/arch/arm/dts/sun4i-a10-mk802ii.dts
@@ -16,11 +16,6 @@
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
- * You should have received a copy of the GNU General Public
- * License along with this file; if not, write to the Free
- * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
- * MA 02110-1301 USA
- *
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
diff --git a/arch/arm/dts/sun4i-a10-olinuxino-lime.dts b/arch/arm/dts/sun4i-a10-olinuxino-lime.dts
index 5840d5e..b64aa4e 100644
--- a/arch/arm/dts/sun4i-a10-olinuxino-lime.dts
+++ b/arch/arm/dts/sun4i-a10-olinuxino-lime.dts
@@ -16,11 +16,6 @@
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
- * You should have received a copy of the GNU General Public
- * License along with this file; if not, write to the Free
- * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
- * MA 02110-1301 USA
- *
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
@@ -110,6 +105,10 @@
status = "okay";
};
+&emac_sram {
+ status = "okay";
+};
+
&i2c0 {
pinctrl-names = "default";
pinctrl-0 = <&i2c0_pins_a>;
diff --git a/arch/arm/dts/sun4i-a10-pcduino.dts b/arch/arm/dts/sun4i-a10-pcduino.dts
index be6948e..4e3e1b9 100644
--- a/arch/arm/dts/sun4i-a10-pcduino.dts
+++ b/arch/arm/dts/sun4i-a10-pcduino.dts
@@ -17,11 +17,6 @@
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
- * You should have received a copy of the GNU General Public
- * License along with this file; if not, write to the Free
- * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
- * MA 02110-1301 USA
- *
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
@@ -124,6 +119,10 @@
status = "okay";
};
+&emac_sram {
+ status = "okay";
+};
+
&i2c0 {
pinctrl-names = "default";
pinctrl-0 = <&i2c0_pins_a>;
diff --git a/arch/arm/dts/sun4i-a10.dtsi b/arch/arm/dts/sun4i-a10.dtsi
index 1d7fd68..61c03d1 100644
--- a/arch/arm/dts/sun4i-a10.dtsi
+++ b/arch/arm/dts/sun4i-a10.dtsi
@@ -17,11 +17,6 @@
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
- * You should have received a copy of the GNU General Public
- * License along with this library; if not, write to the Free
- * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
- * MA 02110-1301 USA
- *
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
@@ -66,7 +61,8 @@
ranges;
framebuffer@0 {
- compatible = "allwinner,simple-framebuffer", "simple-framebuffer";
+ compatible = "allwinner,simple-framebuffer",
+ "simple-framebuffer";
allwinner,pipeline = "de_be0-lcd0-hdmi";
clocks = <&pll5 1>, <&ahb_gates 36>, <&ahb_gates 43>,
<&ahb_gates 44>;
@@ -74,7 +70,8 @@
};
framebuffer@1 {
- compatible = "allwinner,simple-framebuffer", "simple-framebuffer";
+ compatible = "allwinner,simple-framebuffer",
+ "simple-framebuffer";
allwinner,pipeline = "de_fe0-de_be0-lcd0-hdmi";
clocks = <&pll5 1>, <&ahb_gates 36>, <&ahb_gates 43>,
<&ahb_gates 44>, <&ahb_gates 46>;
@@ -110,11 +107,11 @@
clocks = <&cpu>;
clock-latency = <244144>; /* 8 32k periods */
operating-points = <
- /* kHz uV */
+ /* kHz uV */
1008000 1400000
- 912000 1350000
- 864000 1300000
- 624000 1250000
+ 912000 1350000
+ 864000 1300000
+ 624000 1250000
>;
#cooling-cells = <2>;
cooling-min-level = <0>;
@@ -434,11 +431,12 @@
usb_clk: clk@01c200cc {
#clock-cells = <1>;
- #reset-cells = <1>;
+ #reset-cells = <1>;
compatible = "allwinner,sun4i-a10-usb-clk";
reg = <0x01c200cc 0x4>;
clocks = <&pll6 1>;
- clock-output-names = "usb_ohci0", "usb_ohci1", "usb_phy";
+ clock-output-names = "usb_ohci0", "usb_ohci1",
+ "usb_phy";
};
spi3_clk: clk@01c200d4 {
@@ -450,44 +448,46 @@
};
};
- /*
- * Note we use the address where the mmio registers start, not where
- * the SRAM blocks start, this cannot be changed because that would be
- * a devicetree ABI change.
- */
soc@01c00000 {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges;
- sram@00000000 {
- compatible = "allwinner,sun4i-a10-sram";
- reg = <0x00000000 0x4000>;
- allwinner,sram-name = "A1";
- };
-
- sram@00004000 {
- compatible = "allwinner,sun4i-a10-sram";
- reg = <0x00004000 0x4000>;
- allwinner,sram-name = "A2";
- };
-
- sram@00008000 {
- compatible = "allwinner,sun4i-a10-sram";
- reg = <0x00008000 0x4000>;
- allwinner,sram-name = "A3-A4";
- };
-
- sram@00010000 {
- compatible = "allwinner,sun4i-a10-sram";
- reg = <0x00010000 0x1000>;
- allwinner,sram-name = "D";
- };
-
sram-controller@01c00000 {
compatible = "allwinner,sun4i-a10-sram-controller";
reg = <0x01c00000 0x30>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ sram_a: sram@00000000 {
+ compatible = "mmio-sram";
+ reg = <0x00000000 0xc000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0x00000000 0xc000>;
+
+ emac_sram: sram-section@8000 {
+ compatible = "allwinner,sun4i-a10-sram-a3-a4";
+ reg = <0x8000 0x4000>;
+ status = "disabled";
+ };
+ };
+
+ sram_d: sram@00010000 {
+ compatible = "mmio-sram";
+ reg = <0x00010000 0x1000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0x00010000 0x1000>;
+
+ otg_sram: sram-section@0000 {
+ compatible = "allwinner,sun4i-a10-sram-d";
+ reg = <0x0000 0x1000>;
+ status = "disabled";
+ };
+ };
};
dma: dma-controller@01c02000 {
@@ -531,6 +531,7 @@
reg = <0x01c0b000 0x1000>;
interrupts = <55>;
clocks = <&ahb_gates 17>;
+ allwinner,sram = <&emac_sram 1>;
status = "disabled";
};
@@ -784,7 +785,8 @@
};
mmc0_pins_a: mmc0@0 {
- allwinner,pins = "PF0","PF1","PF2","PF3","PF4","PF5";
+ allwinner,pins = "PF0", "PF1", "PF2",
+ "PF3", "PF4", "PF5";
allwinner,function = "mmc0";
allwinner,drive = <SUN4I_PINCTRL_30_MA>;
allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
@@ -797,43 +799,85 @@
allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
};
- ir0_pins_a: ir0@0 {
- allwinner,pins = "PB3","PB4";
+ ir0_rx_pins_a: ir0@0 {
+ allwinner,pins = "PB4";
allwinner,function = "ir0";
allwinner,drive = <SUN4I_PINCTRL_10_MA>;
allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
- ir1_pins_a: ir1@0 {
- allwinner,pins = "PB22","PB23";
+ ir0_tx_pins_a: ir0@1 {
+ allwinner,pins = "PB3";
+ allwinner,function = "ir0";
+ allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+ allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ };
+
+ ir1_rx_pins_a: ir1@0 {
+ allwinner,pins = "PB23";
+ allwinner,function = "ir1";
+ allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+ allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ };
+
+ ir1_tx_pins_a: ir1@1 {
+ allwinner,pins = "PB22";
allwinner,function = "ir1";
allwinner,drive = <SUN4I_PINCTRL_10_MA>;
allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
spi0_pins_a: spi0@0 {
- allwinner,pins = "PI10", "PI11", "PI12", "PI13";
+ allwinner,pins = "PI11", "PI12", "PI13";
+ allwinner,function = "spi0";
+ allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+ allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ };
+
+ spi0_cs0_pins_a: spi0_cs0@0 {
+ allwinner,pins = "PI10";
allwinner,function = "spi0";
allwinner,drive = <SUN4I_PINCTRL_10_MA>;
allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
spi1_pins_a: spi1@0 {
- allwinner,pins = "PI16", "PI17", "PI18", "PI19";
+ allwinner,pins = "PI17", "PI18", "PI19";
+ allwinner,function = "spi1";
+ allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+ allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ };
+
+ spi1_cs0_pins_a: spi1_cs0@0 {
+ allwinner,pins = "PI16";
allwinner,function = "spi1";
allwinner,drive = <SUN4I_PINCTRL_10_MA>;
allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
spi2_pins_a: spi2@0 {
- allwinner,pins = "PB14", "PB15", "PB16", "PB17";
+ allwinner,pins = "PC20", "PC21", "PC22";
allwinner,function = "spi2";
allwinner,drive = <SUN4I_PINCTRL_10_MA>;
allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
spi2_pins_b: spi2@1 {
- allwinner,pins = "PC19", "PC20", "PC21", "PC22";
+ allwinner,pins = "PB15", "PB16", "PB17";
+ allwinner,function = "spi2";
+ allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+ allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ };
+
+ spi2_cs0_pins_a: spi2_cs0@0 {
+ allwinner,pins = "PC19";
+ allwinner,function = "spi2";
+ allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+ allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ };
+
+ spi2_cs0_pins_b: spi2_cs0@1 {
+ allwinner,pins = "PB14";
allwinner,function = "spi2";
allwinner,drive = <SUN4I_PINCTRL_10_MA>;
allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
diff --git a/arch/arm/dts/sun5i-a10s-auxtek-t004.dts b/arch/arm/dts/sun5i-a10s-auxtek-t004.dts
index ceb0582..2b3511e 100644
--- a/arch/arm/dts/sun5i-a10s-auxtek-t004.dts
+++ b/arch/arm/dts/sun5i-a10s-auxtek-t004.dts
@@ -16,11 +16,6 @@
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
- * You should have received a copy of the GNU General Public
- * License along with this file; if not, write to the Free
- * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
- * MA 02110-1301 USA
- *
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
diff --git a/arch/arm/dts/sun5i-a10s-mk802.dts b/arch/arm/dts/sun5i-a10s-mk802.dts
index e1a11e1..46ff940 100644
--- a/arch/arm/dts/sun5i-a10s-mk802.dts
+++ b/arch/arm/dts/sun5i-a10s-mk802.dts
@@ -16,11 +16,6 @@
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
- * You should have received a copy of the GNU General Public
- * License along with this file; if not, write to the Free
- * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
- * MA 02110-1301 USA
- *
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
diff --git a/arch/arm/dts/sun5i-a10s-olinuxino-micro.dts b/arch/arm/dts/sun5i-a10s-olinuxino-micro.dts
index 85a8745..a7e19e4 100644
--- a/arch/arm/dts/sun5i-a10s-olinuxino-micro.dts
+++ b/arch/arm/dts/sun5i-a10s-olinuxino-micro.dts
@@ -18,11 +18,6 @@
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
- * You should have received a copy of the GNU General Public
- * License along with this file; if not, write to the Free
- * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
- * MA 02110-1301 USA
- *
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
@@ -93,6 +88,10 @@
status = "okay";
};
+&emac_sram {
+ status = "okay";
+};
+
&i2c0 {
pinctrl-names = "default";
pinctrl-0 = <&i2c0_pins_a>;
diff --git a/arch/arm/dts/sun5i-a10s-r7-tv-dongle.dts b/arch/arm/dts/sun5i-a10s-r7-tv-dongle.dts
index 9980969..3b05798 100644
--- a/arch/arm/dts/sun5i-a10s-r7-tv-dongle.dts
+++ b/arch/arm/dts/sun5i-a10s-r7-tv-dongle.dts
@@ -16,11 +16,6 @@
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
- * You should have received a copy of the GNU General Public
- * License along with this file; if not, write to the Free
- * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
- * MA 02110-1301 USA
- *
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
diff --git a/arch/arm/dts/sun5i-a10s.dtsi b/arch/arm/dts/sun5i-a10s.dtsi
index a78c95d..f11efb7 100644
--- a/arch/arm/dts/sun5i-a10s.dtsi
+++ b/arch/arm/dts/sun5i-a10s.dtsi
@@ -18,11 +18,6 @@
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
- * You should have received a copy of the GNU General Public
- * License along with this library; if not, write to the Free
- * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
- * MA 02110-1301 USA
- *
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
@@ -67,7 +62,8 @@
ranges;
framebuffer@0 {
- compatible = "allwinner,simple-framebuffer", "simple-framebuffer";
+ compatible = "allwinner,simple-framebuffer",
+ "simple-framebuffer";
allwinner,pipeline = "de_be0-lcd0-hdmi";
clocks = <&pll5 1>, <&ahb_gates 36>, <&ahb_gates 43>,
<&ahb_gates 44>;
@@ -89,13 +85,17 @@
compatible = "allwinner,sun5i-a10s-ahb-gates-clk";
reg = <0x01c20060 0x8>;
clocks = <&ahb>;
- clock-output-names = "ahb_usbotg", "ahb_ehci", "ahb_ohci",
- "ahb_ss", "ahb_dma", "ahb_bist", "ahb_mmc0",
- "ahb_mmc1", "ahb_mmc2", "ahb_nand", "ahb_sdram",
- "ahb_emac", "ahb_ts", "ahb_spi0", "ahb_spi1",
- "ahb_spi2", "ahb_gps", "ahb_stimer", "ahb_ve",
- "ahb_tve", "ahb_lcd", "ahb_csi", "ahb_hdmi",
- "ahb_de_be", "ahb_de_fe", "ahb_iep", "ahb_mali400";
+ clock-output-names = "ahb_usbotg", "ahb_ehci",
+ "ahb_ohci", "ahb_ss", "ahb_dma",
+ "ahb_bist", "ahb_mmc0", "ahb_mmc1",
+ "ahb_mmc2", "ahb_nand",
+ "ahb_sdram", "ahb_emac", "ahb_ts",
+ "ahb_spi0", "ahb_spi1", "ahb_spi2",
+ "ahb_gps", "ahb_stimer", "ahb_ve",
+ "ahb_tve", "ahb_lcd", "ahb_csi",
+ "ahb_hdmi", "ahb_de_be",
+ "ahb_de_fe", "ahb_iep",
+ "ahb_mali400";
};
apb0_gates: clk@01c20068 {
@@ -103,8 +103,9 @@
compatible = "allwinner,sun5i-a10s-apb0-gates-clk";
reg = <0x01c20068 0x4>;
clocks = <&apb0>;
- clock-output-names = "apb0_codec", "apb0_iis", "apb0_pio",
- "apb0_ir", "apb0_keypad";
+ clock-output-names = "apb0_codec", "apb0_iis",
+ "apb0_pio", "apb0_ir",
+ "apb0_keypad";
};
apb1_gates: clk@01c2006c {
@@ -124,6 +125,7 @@
reg = <0x01c0b000 0x1000>;
interrupts = <55>;
clocks = <&ahb_gates 17>;
+ allwinner,sram = <&emac_sram 1>;
status = "disabled";
};
@@ -193,9 +195,18 @@
};
mmc1_pins_a: mmc1@0 {
- allwinner,pins = "PG3","PG4","PG5","PG6","PG7","PG8";
+ allwinner,pins = "PG3", "PG4", "PG5",
+ "PG6", "PG7", "PG8";
allwinner,function = "mmc1";
allwinner,drive = <SUN4I_PINCTRL_30_MA>;
allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
+
+&sram_a {
+ emac_sram: sram-section@8000 {
+ compatible = "allwinner,sun4i-a10-sram-a3-a4";
+ reg = <0x8000 0x4000>;
+ status = "disabled";
+ };
+};
diff --git a/arch/arm/dts/sun5i-a13-hsg-h702.dts b/arch/arm/dts/sun5i-a13-hsg-h702.dts
index adf78a2..990f9d6 100644
--- a/arch/arm/dts/sun5i-a13-hsg-h702.dts
+++ b/arch/arm/dts/sun5i-a13-hsg-h702.dts
@@ -16,11 +16,6 @@
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
- * You should have received a copy of the GNU General Public
- * License along with this file; if not, write to the Free
- * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
- * MA 02110-1301 USA
- *
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
diff --git a/arch/arm/dts/sun5i-a13-olinuxino-micro.dts b/arch/arm/dts/sun5i-a13-olinuxino-micro.dts
index 4a00bce..ad84fe4 100644
--- a/arch/arm/dts/sun5i-a13-olinuxino-micro.dts
+++ b/arch/arm/dts/sun5i-a13-olinuxino-micro.dts
@@ -17,11 +17,6 @@
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
- * You should have received a copy of the GNU General Public
- * License along with this file; if not, write to the Free
- * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
- * MA 02110-1301 USA
- *
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
diff --git a/arch/arm/dts/sun5i-a13-olinuxino.dts b/arch/arm/dts/sun5i-a13-olinuxino.dts
index 4440156..4232400 100644
--- a/arch/arm/dts/sun5i-a13-olinuxino.dts
+++ b/arch/arm/dts/sun5i-a13-olinuxino.dts
@@ -18,11 +18,6 @@
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
- * You should have received a copy of the GNU General Public
- * License along with this file; if not, write to the Free
- * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
- * MA 02110-1301 USA
- *
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
diff --git a/arch/arm/dts/sun5i-a13-utoo-p66.dts b/arch/arm/dts/sun5i-a13-utoo-p66.dts
index 6e19f78..8c1bca7 100644
--- a/arch/arm/dts/sun5i-a13-utoo-p66.dts
+++ b/arch/arm/dts/sun5i-a13-utoo-p66.dts
@@ -16,11 +16,6 @@
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
- * You should have received a copy of the GNU General Public
- * License along with this file; if not, write to the Free
- * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
- * MA 02110-1301 USA
- *
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
@@ -50,6 +45,7 @@
#include "sunxi-common-regulators.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
+#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/pinctrl/sun4i-a10.h>
/ {
@@ -101,6 +97,20 @@
pinctrl-0 = <&i2c1_pins_a>;
status = "okay";
+ icn8318: touchscreen@40 {
+ compatible = "chipone,icn8318";
+ reg = <0x40>;
+ interrupt-parent = <&pio>;
+ interrupts = <9 IRQ_TYPE_EDGE_FALLING>; /* EINT9 (PG9) */
+ pinctrl-names = "default";
+ pinctrl-0 = <&ts_wake_pin_p66>;
+ wake-gpios = <&pio 1 3 GPIO_ACTIVE_HIGH>; /* PB3 */
+ touchscreen-size-x = <800>;
+ touchscreen-size-y = <480>;
+ touchscreen-inverted-x;
+ touchscreen-swapped-x-y;
+ };
+
pcf8563: rtc@51 {
compatible = "nxp,pcf8563";
reg = <0x51>;
@@ -166,6 +176,13 @@
allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
};
+ ts_wake_pin_p66: ts_wake_pin@0 {
+ allwinner,pins = "PB3";
+ allwinner,function = "gpio_out";
+ allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+ allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ };
+
usb0_vbus_pin_a: usb0_vbus_pin@0 {
allwinner,pins = "PB4";
allwinner,function = "gpio_out";
diff --git a/arch/arm/dts/sun5i-a13.dtsi b/arch/arm/dts/sun5i-a13.dtsi
index 0188dee..976d4fa 100644
--- a/arch/arm/dts/sun5i-a13.dtsi
+++ b/arch/arm/dts/sun5i-a13.dtsi
@@ -18,11 +18,6 @@
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
- * You should have received a copy of the GNU General Public
- * License along with this library; if not, write to the Free
- * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
- * MA 02110-1301 USA
- *
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
@@ -109,12 +104,16 @@
compatible = "allwinner,sun5i-a13-ahb-gates-clk";
reg = <0x01c20060 0x8>;
clocks = <&ahb>;
- clock-output-names = "ahb_usbotg", "ahb_ehci", "ahb_ohci",
- "ahb_ss", "ahb_dma", "ahb_bist", "ahb_mmc0",
- "ahb_mmc1", "ahb_mmc2", "ahb_nand", "ahb_sdram",
- "ahb_spi0", "ahb_spi1", "ahb_spi2", "ahb_stimer",
- "ahb_ve", "ahb_lcd", "ahb_csi", "ahb_de_be",
- "ahb_de_fe", "ahb_iep", "ahb_mali400";
+ clock-output-names = "ahb_usbotg", "ahb_ehci",
+ "ahb_ohci", "ahb_ss", "ahb_dma",
+ "ahb_bist", "ahb_mmc0", "ahb_mmc1",
+ "ahb_mmc2", "ahb_nand",
+ "ahb_sdram", "ahb_spi0",
+ "ahb_spi1", "ahb_spi2",
+ "ahb_stimer", "ahb_ve", "ahb_lcd",
+ "ahb_csi", "ahb_de_be",
+ "ahb_de_fe", "ahb_iep",
+ "ahb_mali400";
};
apb0_gates: clk@01c20068 {
@@ -122,7 +121,8 @@
compatible = "allwinner,sun5i-a13-apb0-gates-clk";
reg = <0x01c20068 0x4>;
clocks = <&apb0>;
- clock-output-names = "apb0_codec", "apb0_pio", "apb0_ir";
+ clock-output-names = "apb0_codec", "apb0_pio",
+ "apb0_ir";
};
apb1_gates: clk@01c2006c {
@@ -139,13 +139,13 @@
&cpu0 {
clock-latency = <244144>; /* 8 32k periods */
operating-points = <
- /* kHz uV */
+ /* kHz uV */
1008000 1400000
- 912000 1350000
- 864000 1300000
- 624000 1200000
- 576000 1200000
- 432000 1200000
+ 912000 1350000
+ 864000 1300000
+ 624000 1200000
+ 576000 1200000
+ 432000 1200000
>;
#cooling-cells = <2>;
cooling-min-level = <0>;
diff --git a/arch/arm/dts/sun5i.dtsi b/arch/arm/dts/sun5i.dtsi
index 96b20d6..54b0978 100644
--- a/arch/arm/dts/sun5i.dtsi
+++ b/arch/arm/dts/sun5i.dtsi
@@ -18,11 +18,6 @@
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
- * You should have received a copy of the GNU General Public
- * License along with this library; if not, write to the Free
- * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
- * MA 02110-1301 USA
- *
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
@@ -150,10 +145,16 @@
ahb: ahb@01c20054 {
#clock-cells = <0>;
- compatible = "allwinner,sun4i-a10-ahb-clk";
+ compatible = "allwinner,sun5i-a13-ahb-clk";
reg = <0x01c20054 0x4>;
- clocks = <&axi>;
+ clocks = <&axi>, <&cpu>, <&pll6 1>;
clock-output-names = "ahb";
+ /*
+ * Use PLL6 as parent, instead of CPU/AXI
+ * which has rate changes due to cpufreq
+ */
+ assigned-clocks = <&ahb>;
+ assigned-clock-parents = <&pll6 1>;
};
apb0: apb0@01c20054 {
@@ -276,7 +277,7 @@
usb_clk: clk@01c200cc {
#clock-cells = <1>;
- #reset-cells = <1>;
+ #reset-cells = <1>;
compatible = "allwinner,sun5i-a13-usb-clk";
reg = <0x01c200cc 0x4>;
clocks = <&pll6 1>;
@@ -292,44 +293,40 @@
};
};
- /*
- * Note we use the address where the mmio registers start, not where
- * the SRAM blocks start, this cannot be changed because that would be
- * a devicetree ABI change.
- */
soc@01c00000 {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges;
- sram@00000000 {
- compatible = "allwinner,sun4i-a10-sram";
- reg = <0x00000000 0x4000>;
- allwinner,sram-name = "A1";
- };
-
- sram@00004000 {
- compatible = "allwinner,sun4i-a10-sram";
- reg = <0x00004000 0x4000>;
- allwinner,sram-name = "A2";
- };
-
- sram@00008000 {
- compatible = "allwinner,sun4i-a10-sram";
- reg = <0x00008000 0x4000>;
- allwinner,sram-name = "A3-A4";
- };
-
- sram@00010000 {
- compatible = "allwinner,sun4i-a10-sram";
- reg = <0x00010000 0x1000>;
- allwinner,sram-name = "D";
- };
-
sram-controller@01c00000 {
compatible = "allwinner,sun4i-a10-sram-controller";
reg = <0x01c00000 0x30>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ sram_a: sram@00000000 {
+ compatible = "mmio-sram";
+ reg = <0x00000000 0xc000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0x00000000 0xc000>;
+ };
+
+ sram_d: sram@00010000 {
+ compatible = "mmio-sram";
+ reg = <0x00010000 0x1000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0x00010000 0x1000>;
+
+ otg_sram: sram-section@0000 {
+ compatible = "allwinner,sun4i-a10-sram-d";
+ reg = <0x0000 0x1000>;
+ status = "disabled";
+ };
+ };
};
dma: dma-controller@01c02000 {
@@ -504,7 +501,8 @@
};
mmc0_pins_a: mmc0@0 {
- allwinner,pins = "PF0","PF1","PF2","PF3","PF4","PF5";
+ allwinner,pins = "PF0", "PF1", "PF2", "PF3",
+ "PF4", "PF5";
allwinner,function = "mmc0";
allwinner,drive = <SUN4I_PINCTRL_30_MA>;
allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
diff --git a/arch/arm/dts/sun6i-a31-app4-evb1.dts b/arch/arm/dts/sun6i-a31-app4-evb1.dts
index b7b1df4..2f8cfab 100644
--- a/arch/arm/dts/sun6i-a31-app4-evb1.dts
+++ b/arch/arm/dts/sun6i-a31-app4-evb1.dts
@@ -18,11 +18,6 @@
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
- * You should have received a copy of the GNU General Public
- * License along with this file; if not, write to the Free
- * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
- * MA 02110-1301 USA
- *
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
diff --git a/arch/arm/dts/sun6i-a31-colombus.dts b/arch/arm/dts/sun6i-a31-colombus.dts
index 95d7ec2..0cf9926 100644
--- a/arch/arm/dts/sun6i-a31-colombus.dts
+++ b/arch/arm/dts/sun6i-a31-colombus.dts
@@ -18,11 +18,6 @@
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
- * You should have received a copy of the GNU General Public
- * License along with this file; if not, write to the Free
- * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
- * MA 02110-1301 USA
- *
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
diff --git a/arch/arm/dts/sun6i-a31-hummingbird.dts b/arch/arm/dts/sun6i-a31-hummingbird.dts
index 1e820bc..d0cfada 100644
--- a/arch/arm/dts/sun6i-a31-hummingbird.dts
+++ b/arch/arm/dts/sun6i-a31-hummingbird.dts
@@ -18,11 +18,6 @@
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
- * You should have received a copy of the GNU General Public
- * License along with this file; if not, write to the Free
- * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
- * MA 02110-1301 USA
- *
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
diff --git a/arch/arm/dts/sun6i-a31-i7.dts b/arch/arm/dts/sun6i-a31-i7.dts
index ce37d69..e9185da 100644
--- a/arch/arm/dts/sun6i-a31-i7.dts
+++ b/arch/arm/dts/sun6i-a31-i7.dts
@@ -16,11 +16,6 @@
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
- * You should have received a copy of the GNU General Public
- * License along with this file; if not, write to the Free
- * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
- * MA 02110-1301 USA
- *
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
diff --git a/arch/arm/dts/sun6i-a31-m9.dts b/arch/arm/dts/sun6i-a31-m9.dts
index 29f5fc7..a5660d6 100644
--- a/arch/arm/dts/sun6i-a31-m9.dts
+++ b/arch/arm/dts/sun6i-a31-m9.dts
@@ -16,11 +16,6 @@
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
- * You should have received a copy of the GNU General Public
- * License along with this file; if not, write to the Free
- * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
- * MA 02110-1301 USA
- *
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
diff --git a/arch/arm/dts/sun6i-a31-mele-a1000g-quad.dts b/arch/arm/dts/sun6i-a31-mele-a1000g-quad.dts
new file mode 100644
index 0000000..4404f37
--- /dev/null
+++ b/arch/arm/dts/sun6i-a31-mele-a1000g-quad.dts
@@ -0,0 +1,149 @@
+/*
+ * Copyright 2014 Hans de Goede <hdegoede@redhat.com>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This file is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+#include "sun6i-a31.dtsi"
+#include "sunxi-common-regulators.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/pinctrl/sun4i-a10.h>
+
+/ {
+ model = "Mele A1000G Quad top set box";
+ compatible = "mele,a1000g-quad", "allwinner,sun6i-a31";
+
+ aliases {
+ serial0 = &uart0;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ leds {
+ compatible = "gpio-leds";
+ pinctrl-names = "default";
+ pinctrl-0 = <&led_pins_m9>;
+
+ blue {
+ label = "m9:blue:usr";
+ gpios = <&pio 7 13 GPIO_ACTIVE_HIGH>;
+ };
+ };
+};
+
+&ehci0 {
+ status = "okay";
+};
+
+&ehci1 {
+ status = "okay";
+};
+
+&gmac {
+ pinctrl-names = "default";
+ pinctrl-0 = <&gmac_pins_mii_a>;
+ phy = <&phy1>;
+ phy-mode = "mii";
+ status = "okay";
+
+ phy1: ethernet-phy@1 {
+ reg = <1>;
+ };
+};
+
+&ir {
+ pinctrl-names = "default";
+ pinctrl-0 = <&ir_pins_a>;
+ status = "okay";
+};
+
+&mmc0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_m9>;
+ vmmc-supply = <®_vcc3v3>;
+ bus-width = <4>;
+ cd-gpios = <&pio 7 22 GPIO_ACTIVE_HIGH>; /* PH22 */
+ cd-inverted;
+ status = "okay";
+};
+
+&pio {
+ led_pins_m9: led_pins@0 {
+ allwinner,pins = "PH13";
+ allwinner,function = "gpio_out";
+ allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+ allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ };
+
+ mmc0_cd_pin_m9: mmc0_cd_pin@0 {
+ allwinner,pins = "PH22";
+ allwinner,function = "gpio_in";
+ allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+ allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+ };
+
+ usb1_vbus_pin_m9: usb1_vbus_pin@0 {
+ allwinner,pins = "PC27";
+ allwinner,function = "gpio_out";
+ allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+ allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ };
+};
+
+®_usb1_vbus {
+ pinctrl-names = "default";
+ pinctrl-0 = <&usb1_vbus_pin_m9>;
+ gpio = <&pio 2 27 GPIO_ACTIVE_HIGH>;
+ status = "okay";
+};
+
+&uart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_pins_a>;
+ status = "okay";
+};
+
+&usbphy {
+ usb1_vbus-supply = <®_usb1_vbus>;
+ status = "okay";
+};
diff --git a/arch/arm/dts/sun6i-a31.dtsi b/arch/arm/dts/sun6i-a31.dtsi
index 25a97f0..008047a 100644
--- a/arch/arm/dts/sun6i-a31.dtsi
+++ b/arch/arm/dts/sun6i-a31.dtsi
@@ -18,11 +18,6 @@
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
- * You should have received a copy of the GNU General Public
- * License along with this file; if not, write to the Free
- * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
- * MA 02110-1301 USA
- *
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
@@ -67,7 +62,8 @@
ranges;
framebuffer@0 {
- compatible = "allwinner,simple-framebuffer", "simple-framebuffer";
+ compatible = "allwinner,simple-framebuffer",
+ "simple-framebuffer";
allwinner,pipeline = "de_be0-lcd0-hdmi";
clocks = <&pll6 0>;
status = "disabled";
@@ -104,11 +100,11 @@
clocks = <&cpu>;
clock-latency = <244144>; /* 8 32k periods */
operating-points = <
- /* kHz uV */
+ /* kHz uV */
1008000 1200000
- 864000 1200000
- 720000 1100000
- 480000 1000000
+ 864000 1200000
+ 720000 1100000
+ 480000 1000000
>;
#cooling-cells = <2>;
cooling-min-level = <0>;
@@ -241,6 +237,14 @@
reg = <0x01c20054 0x4>;
clocks = <&osc32k>, <&osc24M>, <&axi>, <&pll6 0>;
clock-output-names = "ahb1";
+
+ /*
+ * Clock AHB1 from PLL6, instead of CPU/AXI which
+ * has rate changes due to cpufreq. Also the DMA
+ * controller requires AHB1 clocked from PLL6.
+ */
+ assigned-clocks = <&ahb1>;
+ assigned-clock-parents = <&pll6 0>;
};
ahb1_gates: clk@01c20060 {
@@ -296,9 +300,10 @@
reg = <0x01c2006c 0x4>;
clocks = <&apb2>;
clock-output-names = "apb2_i2c0", "apb2_i2c1",
- "apb2_i2c2", "apb2_i2c3", "apb2_uart0",
- "apb2_uart1", "apb2_uart2", "apb2_uart3",
- "apb2_uart4", "apb2_uart5";
+ "apb2_i2c2", "apb2_i2c3",
+ "apb2_uart0", "apb2_uart1",
+ "apb2_uart2", "apb2_uart3",
+ "apb2_uart4", "apb2_uart5";
};
mmc0_clk: clk@01c20088 {
@@ -375,7 +380,7 @@
usb_clk: clk@01c200cc {
#clock-cells = <1>;
- #reset-cells = <1>;
+ #reset-cells = <1>;
compatible = "allwinner,sun6i-a31-usb-clk";
reg = <0x01c200cc 0x4>;
clocks = <&osc24M>;
@@ -385,10 +390,13 @@
};
/*
- * The following two are dummy clocks, placeholders used in the gmac_tx
- * clock. The gmac driver will choose one parent depending on the PHY
- * interface mode, using clk_set_rate auto-reparenting.
- * The actual TX clock rate is not controlled by the gmac_tx clock.
+ * The following two are dummy clocks, placeholders
+ * used in the gmac_tx clock. The gmac driver will
+ * choose one parent depending on the PHY interface
+ * mode, using clk_set_rate auto-reparenting.
+ *
+ * The actual TX clock rate is not controlled by the
+ * gmac_tx clock.
*/
mii_phy_tx_clk: clk@1 {
#clock-cells = <0>;
@@ -426,10 +434,6 @@
clocks = <&ahb1_gates 6>;
resets = <&ahb1_rst 6>;
#dma-cells = <1>;
-
- /* DMA controller requires AHB1 clocked from PLL6 */
- assigned-clocks = <&ahb1>;
- assigned-clock-parents = <&pll6 0>;
};
mmc0: mmc@01c0f000 {
@@ -628,7 +632,8 @@
};
mmc0_pins_a: mmc0@0 {
- allwinner,pins = "PF0","PF1","PF2","PF3","PF4","PF5";
+ allwinner,pins = "PF0", "PF1", "PF2",
+ "PF3", "PF4", "PF5";
allwinner,function = "mmc0";
allwinner,drive = <SUN4I_PINCTRL_30_MA>;
allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
@@ -866,7 +871,8 @@
};
timer@01c60000 {
- compatible = "allwinner,sun6i-a31-hstimer", "allwinner,sun7i-a20-hstimer";
+ compatible = "allwinner,sun6i-a31-hstimer",
+ "allwinner,sun7i-a20-hstimer";
reg = <0x01c60000 0x1000>;
interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
@@ -957,7 +963,8 @@
ar100: ar100_clk {
compatible = "allwinner,sun6i-a31-ar100-clk";
#clock-cells = <0>;
- clocks = <&osc32k>, <&osc24M>, <&pll6 0>, <&pll6 0>;
+ clocks = <&osc32k>, <&osc24M>, <&pll6 0>,
+ <&pll6 0>;
clock-output-names = "ar100";
};
diff --git a/arch/arm/dts/sun6i-a31s-cs908.dts b/arch/arm/dts/sun6i-a31s-cs908.dts
index 68cb2bf..1e2411a 100644
--- a/arch/arm/dts/sun6i-a31s-cs908.dts
+++ b/arch/arm/dts/sun6i-a31s-cs908.dts
@@ -16,11 +16,6 @@
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
- * You should have received a copy of the GNU General Public
- * License along with this library; if not, write to the Free
- * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
- * MA 02110-1301 USA
- *
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
diff --git a/arch/arm/dts/sun6i-a31s.dtsi b/arch/arm/dts/sun6i-a31s.dtsi
index eaf5ec8..c17a327 100644
--- a/arch/arm/dts/sun6i-a31s.dtsi
+++ b/arch/arm/dts/sun6i-a31s.dtsi
@@ -16,11 +16,6 @@
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
- * You should have received a copy of the GNU General Public
- * License along with this library; if not, write to the Free
- * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
- * MA 02110-1301 USA
- *
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
diff --git a/arch/arm/dts/sun7i-a20-bananapi.dts b/arch/arm/dts/sun7i-a20-bananapi.dts
index b952ac4..9f7b472 100644
--- a/arch/arm/dts/sun7i-a20-bananapi.dts
+++ b/arch/arm/dts/sun7i-a20-bananapi.dts
@@ -18,11 +18,6 @@
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
- * You should have received a copy of the GNU General Public
- * License along with this file; if not, write to the Free
- * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
- * MA 02110-1301 USA
- *
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
@@ -142,7 +137,7 @@
&ir0 {
pinctrl-names = "default";
- pinctrl-0 = <&ir0_pins_a>;
+ pinctrl-0 = <&ir0_rx_pins_a>;
status = "okay";
};
@@ -197,7 +192,9 @@
&spi0 {
pinctrl-names = "default";
- pinctrl-0 = <&spi0_pins_a>;
+ pinctrl-0 = <&spi0_pins_a>,
+ <&spi0_cs0_pins_a>,
+ <&spi0_cs1_pins_a>;
status = "okay";
};
diff --git a/arch/arm/dts/sun7i-a20-bananapro.dts b/arch/arm/dts/sun7i-a20-bananapro.dts
index 9d9027f..18fcc87 100644
--- a/arch/arm/dts/sun7i-a20-bananapro.dts
+++ b/arch/arm/dts/sun7i-a20-bananapro.dts
@@ -16,11 +16,6 @@
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
- * You should have received a copy of the GNU General Public
- * License along with this file; if not, write to the Free
- * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
- * MA 02110-1301 USA
- *
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
@@ -57,7 +52,7 @@
aliases {
serial0 = &uart0;
- serial1 = &uart2;
+ serial1 = &uart4;
serial2 = &uart7;
};
@@ -154,7 +149,7 @@
&ir0 {
pinctrl-names = "default";
- pinctrl-0 = <&ir0_pins_a>;
+ pinctrl-0 = <&ir0_rx_pins_a>;
status = "okay";
};
@@ -243,7 +238,9 @@
&spi0 {
pinctrl-names = "default";
- pinctrl-0 = <&spi0_pins_a>;
+ pinctrl-0 = <&spi0_pins_a>,
+ <&spi0_cs0_pins_a>,
+ <&spi0_cs1_pins_a>;
status = "okay";
};
@@ -253,9 +250,9 @@
status = "okay";
};
-&uart2 {
+&uart4 {
pinctrl-names = "default";
- pinctrl-0 = <&uart2_pins_a>;
+ pinctrl-0 = <&uart4_pins_b>;
status = "okay";
};
diff --git a/arch/arm/dts/sun7i-a20-cubieboard2.dts b/arch/arm/dts/sun7i-a20-cubieboard2.dts
index 3c817ac..39a51d5 100644
--- a/arch/arm/dts/sun7i-a20-cubieboard2.dts
+++ b/arch/arm/dts/sun7i-a20-cubieboard2.dts
@@ -18,11 +18,6 @@
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
- * You should have received a copy of the GNU General Public
- * License along with this file; if not, write to the Free
- * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
- * MA 02110-1301 USA
- *
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
@@ -133,7 +128,7 @@
&ir0 {
pinctrl-names = "default";
- pinctrl-0 = <&ir0_pins_a>;
+ pinctrl-0 = <&ir0_rx_pins_a>;
status = "okay";
};
diff --git a/arch/arm/dts/sun7i-a20-cubietruck.dts b/arch/arm/dts/sun7i-a20-cubietruck.dts
index 613a19e..4611e2f 100644
--- a/arch/arm/dts/sun7i-a20-cubietruck.dts
+++ b/arch/arm/dts/sun7i-a20-cubietruck.dts
@@ -18,11 +18,6 @@
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
- * You should have received a copy of the GNU General Public
- * License along with this file; if not, write to the Free
- * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
- * MA 02110-1301 USA
- *
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
@@ -160,7 +155,7 @@
&ir0 {
pinctrl-names = "default";
- pinctrl-0 = <&ir0_pins_a>;
+ pinctrl-0 = <&ir0_rx_pins_a>;
status = "okay";
};
diff --git a/arch/arm/dts/sun7i-a20-hummingbird.dts b/arch/arm/dts/sun7i-a20-hummingbird.dts
index d3f15c2..37f4a54 100644
--- a/arch/arm/dts/sun7i-a20-hummingbird.dts
+++ b/arch/arm/dts/sun7i-a20-hummingbird.dts
@@ -18,11 +18,6 @@
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
- * You should have received a copy of the GNU General Public
- * License along with this file; if not, write to the Free
- * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
- * MA 02110-1301 USA
- *
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
@@ -160,7 +155,7 @@
&ir0 {
pinctrl-names = "default";
- pinctrl-0 = <&ir0_pins_a>;
+ pinctrl-0 = <&ir0_rx_pins_a>;
status = "okay";
};
@@ -245,7 +240,8 @@
&spi2 {
pinctrl-names = "default";
- pinctrl-0 = <&spi2_pins_b>;
+ pinctrl-0 = <&spi2_pins_b>,
+ <&spi2_cs0_pins_b>;
status = "okay";
};
diff --git a/arch/arm/dts/sun7i-a20-i12-tvbox.dts b/arch/arm/dts/sun7i-a20-i12-tvbox.dts
index 3f99b3f..f32f6f2 100644
--- a/arch/arm/dts/sun7i-a20-i12-tvbox.dts
+++ b/arch/arm/dts/sun7i-a20-i12-tvbox.dts
@@ -16,11 +16,6 @@
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
- * You should have received a copy of the GNU General Public
- * License along with this file; if not, write to the Free
- * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
- * MA 02110-1301 USA
- *
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
@@ -157,7 +152,7 @@
&ir0 {
pinctrl-names = "default";
- pinctrl-0 = <&ir0_pins_a>;
+ pinctrl-0 = <&ir0_rx_pins_a>;
status = "okay";
};
diff --git a/arch/arm/dts/sun7i-a20-m3.dts b/arch/arm/dts/sun7i-a20-m3.dts
index f2fb26e..8d9ea48 100644
--- a/arch/arm/dts/sun7i-a20-m3.dts
+++ b/arch/arm/dts/sun7i-a20-m3.dts
@@ -18,11 +18,6 @@
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
- * You should have received a copy of the GNU General Public
- * License along with this file; if not, write to the Free
- * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
- * MA 02110-1301 USA
- *
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
@@ -117,7 +112,7 @@
&ir0 {
pinctrl-names = "default";
- pinctrl-0 = <&ir0_pins_a>;
+ pinctrl-0 = <&ir0_rx_pins_a>;
status = "okay";
};
diff --git a/arch/arm/dts/sun7i-a20-mk808c.dts b/arch/arm/dts/sun7i-a20-mk808c.dts
index f3f9eeb..4f432f8 100644
--- a/arch/arm/dts/sun7i-a20-mk808c.dts
+++ b/arch/arm/dts/sun7i-a20-mk808c.dts
@@ -1,20 +1,66 @@
/*
- * Copyright 2015 Hans de Goede <hdegoede@redhat.com>
+ * Copyright 2015 Marcus Cooper
*
- * Minimal dts file for the MK808C for u-boot only
+ * Marcus Cooper <codekipper@gmail.com>
*
- * SPDX-License-Identifier: GPL-2.0+ or X11
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This file is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public
+ * License along with this file; if not, write to the Free
+ * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
+ * MA 02110-1301 USA
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
*/
/dts-v1/;
#include "sun7i-a20.dtsi"
+#include "sunxi-common-regulators.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/interrupt-controller/irq.h>
/ {
- model = "MK808C";
+ model = "mk808c";
compatible = "allwinner,mk808c", "allwinner,sun7i-a20";
aliases {
serial0 = &uart0;
+ serial1 = &uart2;
};
chosen {
@@ -30,6 +76,43 @@
status = "okay";
};
+&i2c0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c0_pins_a>;
+ status = "okay";
+
+ axp209: pmic@34 {
+ compatible = "x-powers,axp209";
+ reg = <0x34>;
+ interrupt-parent = <&nmi_intc>;
+ interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ };
+};
+
+&i2c1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c1_pins_a>;
+ status = "okay";
+};
+
+&i2c2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c2_pins_a>;
+ status = "okay";
+};
+
+&mmc0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>;
+ vmmc-supply = <®_vcc3v0>;
+ bus-width = <4>;
+ cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */
+ cd-inverted;
+ status = "okay";
+};
+
&ohci0 {
status = "okay";
};
@@ -38,8 +121,28 @@
status = "okay";
};
+®_usb1_vbus {
+ status = "okay";
+};
+
+®_usb2_vbus {
+ status = "okay";
+};
+
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins_a>;
status = "okay";
};
+
+&uart2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart2_pins_a>;
+ status = "okay";
+};
+
+&usbphy {
+ usb1_vbus-supply = <®_usb1_vbus>;
+ usb2_vbus-supply = <®_usb2_vbus>;
+ status = "okay";
+};
diff --git a/arch/arm/dts/sun7i-a20-olinuxino-lime.dts b/arch/arm/dts/sun7i-a20-olinuxino-lime.dts
index 6592cb2..769726d 100644
--- a/arch/arm/dts/sun7i-a20-olinuxino-lime.dts
+++ b/arch/arm/dts/sun7i-a20-olinuxino-lime.dts
@@ -19,11 +19,6 @@
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
- * You should have received a copy of the GNU General Public
- * License along with this file; if not, write to the Free
- * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
- * MA 02110-1301 USA
- *
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
diff --git a/arch/arm/dts/sun7i-a20-olinuxino-lime2.dts b/arch/arm/dts/sun7i-a20-olinuxino-lime2.dts
index 3a7a2c2..8acff78 100644
--- a/arch/arm/dts/sun7i-a20-olinuxino-lime2.dts
+++ b/arch/arm/dts/sun7i-a20-olinuxino-lime2.dts
@@ -16,11 +16,6 @@
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
- * You should have received a copy of the GNU General Public
- * License along with this file; if not, write to the Free
- * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
- * MA 02110-1301 USA
- *
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
diff --git a/arch/arm/dts/sun7i-a20-olinuxino-micro.dts b/arch/arm/dts/sun7i-a20-olinuxino-micro.dts
index 82802b6..00f8f25 100644
--- a/arch/arm/dts/sun7i-a20-olinuxino-micro.dts
+++ b/arch/arm/dts/sun7i-a20-olinuxino-micro.dts
@@ -18,11 +18,6 @@
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
- * You should have received a copy of the GNU General Public
- * License along with this file; if not, write to the Free
- * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
- * MA 02110-1301 USA
- *
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
@@ -250,13 +245,15 @@
&spi1 {
pinctrl-names = "default";
- pinctrl-0 = <&spi1_pins_a>;
+ pinctrl-0 = <&spi1_pins_a>,
+ <&spi1_cs0_pins_a>;
status = "okay";
};
&spi2 {
pinctrl-names = "default";
- pinctrl-0 = <&spi2_pins_a>;
+ pinctrl-0 = <&spi2_pins_a>,
+ <&spi2_cs0_pins_a>;
status = "okay";
};
diff --git a/arch/arm/dts/sun7i-a20-orangepi-mini.dts b/arch/arm/dts/sun7i-a20-orangepi-mini.dts
index 0556938..73cd81e 100644
--- a/arch/arm/dts/sun7i-a20-orangepi-mini.dts
+++ b/arch/arm/dts/sun7i-a20-orangepi-mini.dts
@@ -18,11 +18,6 @@
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
- * You should have received a copy of the GNU General Public
- * License along with this file; if not, write to the Free
- * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
- * MA 02110-1301 USA
- *
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
@@ -137,7 +132,7 @@
&ir0 {
pinctrl-names = "default";
- pinctrl-0 = <&ir0_pins_a>;
+ pinctrl-0 = <&ir0_rx_pins_a>;
status = "okay";
};
diff --git a/arch/arm/dts/sun7i-a20-orangepi.dts b/arch/arm/dts/sun7i-a20-orangepi.dts
index 7e6405c..55a06ce 100644
--- a/arch/arm/dts/sun7i-a20-orangepi.dts
+++ b/arch/arm/dts/sun7i-a20-orangepi.dts
@@ -18,11 +18,6 @@
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
- * You should have received a copy of the GNU General Public
- * License along with this file; if not, write to the Free
- * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
- * MA 02110-1301 USA
- *
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
@@ -132,7 +127,7 @@
&ir0 {
pinctrl-names = "default";
- pinctrl-0 = <&ir0_pins_a>;
+ pinctrl-0 = <&ir0_rx_pins_a>;
status = "okay";
};
diff --git a/arch/arm/dts/sun7i-a20-pcduino3-nano.dts b/arch/arm/dts/sun7i-a20-pcduino3-nano.dts
index 810c5f7..5361fce 100644
--- a/arch/arm/dts/sun7i-a20-pcduino3-nano.dts
+++ b/arch/arm/dts/sun7i-a20-pcduino3-nano.dts
@@ -16,11 +16,6 @@
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
- * You should have received a copy of the GNU General Public
- * License along with this file; if not, write to the Free
- * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
- * MA 02110-1301 USA
- *
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
@@ -125,7 +120,7 @@
&ir0 {
pinctrl-names = "default";
- pinctrl-0 = <&ir0_pins_a>;
+ pinctrl-0 = <&ir0_rx_pins_a>;
status = "okay";
};
diff --git a/arch/arm/dts/sun7i-a20-pcduino3.dts b/arch/arm/dts/sun7i-a20-pcduino3.dts
index cd05267..afc9ece 100644
--- a/arch/arm/dts/sun7i-a20-pcduino3.dts
+++ b/arch/arm/dts/sun7i-a20-pcduino3.dts
@@ -17,11 +17,6 @@
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
- * You should have received a copy of the GNU General Public
- * License along with this file; if not, write to the Free
- * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
- * MA 02110-1301 USA
- *
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
@@ -154,7 +149,7 @@
&ir0 {
pinctrl-names = "default";
- pinctrl-0 = <&ir0_pins_a>;
+ pinctrl-0 = <&ir0_rx_pins_a>;
status = "okay";
};
diff --git a/arch/arm/dts/sun7i-a20-wexler-tab7200.dts b/arch/arm/dts/sun7i-a20-wexler-tab7200.dts
index 2ad3b09..83c6d3f 100644
--- a/arch/arm/dts/sun7i-a20-wexler-tab7200.dts
+++ b/arch/arm/dts/sun7i-a20-wexler-tab7200.dts
@@ -17,11 +17,6 @@
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
- * You should have received a copy of the GNU General Public
- * License along with this file; if not, write to the Free
- * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
- * MA 02110-1301 USA
- *
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
diff --git a/arch/arm/dts/sun7i-a20.dtsi b/arch/arm/dts/sun7i-a20.dtsi
index d4ba772..6a63f30 100644
--- a/arch/arm/dts/sun7i-a20.dtsi
+++ b/arch/arm/dts/sun7i-a20.dtsi
@@ -18,11 +18,6 @@
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
- * You should have received a copy of the GNU General Public
- * License along with this file; if not, write to the Free
- * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
- * MA 02110-1301 USA
- *
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
@@ -68,7 +63,8 @@
ranges;
framebuffer@0 {
- compatible = "allwinner,simple-framebuffer", "simple-framebuffer";
+ compatible = "allwinner,simple-framebuffer",
+ "simple-framebuffer";
allwinner,pipeline = "de_be0-lcd0-hdmi";
clocks = <&pll5 1>, <&ahb_gates 36>, <&ahb_gates 43>,
<&ahb_gates 44>;
@@ -104,14 +100,14 @@
clocks = <&cpu>;
clock-latency = <244144>; /* 8 32k periods */
operating-points = <
- /* kHz uV */
- 960000 1400000
- 912000 1400000
- 864000 1300000
- 720000 1200000
- 528000 1100000
- 312000 1000000
- 144000 900000
+ /* kHz uV */
+ 960000 1400000
+ 912000 1400000
+ 864000 1300000
+ 720000 1200000
+ 528000 1100000
+ 312000 1000000
+ 144000 900000
>;
#cooling-cells = <2>;
cooling-min-level = <0>;
@@ -224,7 +220,8 @@
compatible = "allwinner,sun4i-a10-pll6-clk";
reg = <0x01c20028 0x4>;
clocks = <&osc24M>;
- clock-output-names = "pll6_sata", "pll6_other", "pll6";
+ clock-output-names = "pll6_sata", "pll6_other", "pll6",
+ "pll6_div_4";
};
pll8: clk@01c20040 {
@@ -253,10 +250,16 @@
ahb: ahb@01c20054 {
#clock-cells = <0>;
- compatible = "allwinner,sun4i-a10-ahb-clk";
+ compatible = "allwinner,sun5i-a13-ahb-clk";
reg = <0x01c20054 0x4>;
- clocks = <&axi>;
+ clocks = <&axi>, <&pll6 3>, <&pll6 1>;
clock-output-names = "ahb";
+ /*
+ * Use PLL6 as parent, instead of CPU/AXI
+ * which has rate changes due to cpufreq
+ */
+ assigned-clocks = <&ahb>;
+ assigned-clock-parents = <&pll6 3>;
};
ahb_gates: clk@01c20060 {
@@ -441,11 +444,12 @@
usb_clk: clk@01c200cc {
#clock-cells = <1>;
- #reset-cells = <1>;
+ #reset-cells = <1>;
compatible = "allwinner,sun4i-a10-usb-clk";
reg = <0x01c200cc 0x4>;
clocks = <&pll6 1>;
- clock-output-names = "usb_ohci0", "usb_ohci1", "usb_phy";
+ clock-output-names = "usb_ohci0", "usb_ohci1",
+ "usb_phy";
};
spi3_clk: clk@01c200d4 {
@@ -465,10 +469,13 @@
};
/*
- * The following two are dummy clocks, placeholders used in the gmac_tx
- * clock. The gmac driver will choose one parent depending on the PHY
- * interface mode, using clk_set_rate auto-reparenting.
- * The actual TX clock rate is not controlled by the gmac_tx clock.
+ * The following two are dummy clocks, placeholders
+ * used in the gmac_tx clock. The gmac driver will
+ * choose one parent depending on the PHY interface
+ * mode, using clk_set_rate auto-reparenting.
+ *
+ * The actual TX clock rate is not controlled by the
+ * gmac_tx clock.
*/
mii_phy_tx_clk: clk@2 {
#clock-cells = <0>;
@@ -521,44 +528,46 @@
};
};
- /*
- * Note we use the address where the mmio registers start, not where
- * the SRAM blocks start, this cannot be changed because that would be
- * a devicetree ABI change.
- */
soc@01c00000 {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges;
- sram@00000000 {
- compatible = "allwinner,sun4i-a10-sram";
- reg = <0x00000000 0x4000>;
- allwinner,sram-name = "A1";
- };
-
- sram@00004000 {
- compatible = "allwinner,sun4i-a10-sram";
- reg = <0x00004000 0x4000>;
- allwinner,sram-name = "A2";
- };
-
- sram@00008000 {
- compatible = "allwinner,sun4i-a10-sram";
- reg = <0x00008000 0x4000>;
- allwinner,sram-name = "A3-A4";
- };
-
- sram@00010000 {
- compatible = "allwinner,sun4i-a10-sram";
- reg = <0x00010000 0x1000>;
- allwinner,sram-name = "D";
- };
-
sram-controller@01c00000 {
compatible = "allwinner,sun4i-a10-sram-controller";
reg = <0x01c00000 0x30>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ sram_a: sram@00000000 {
+ compatible = "mmio-sram";
+ reg = <0x00000000 0xc000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0x00000000 0xc000>;
+
+ emac_sram: sram-section@8000 {
+ compatible = "allwinner,sun4i-a10-sram-a3-a4";
+ reg = <0x8000 0x4000>;
+ status = "disabled";
+ };
+ };
+
+ sram_d: sram@00010000 {
+ compatible = "mmio-sram";
+ reg = <0x00010000 0x1000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0x00010000 0x1000>;
+
+ otg_sram: sram-section@0000 {
+ compatible = "allwinner,sun4i-a10-sram-d";
+ reg = <0x0000 0x1000>;
+ status = "disabled";
+ };
+ };
};
nmi_intc: interrupt-controller@01c00030 {
@@ -610,6 +619,7 @@
reg = <0x01c0b000 0x1000>;
interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ahb_gates 17>;
+ allwinner,sram = <&emac_sram 1>;
status = "disabled";
};
@@ -837,6 +847,13 @@
allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
+ uart4_pins_b: uart4@1 {
+ allwinner,pins = "PH4", "PH5";
+ allwinner,function = "uart4";
+ allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+ allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ };
+
uart5_pins_a: uart5@0 {
allwinner,pins = "PI10", "PI11";
allwinner,function = "uart5";
@@ -938,35 +955,71 @@
};
spi0_pins_a: spi0@0 {
- allwinner,pins = "PI10", "PI11", "PI12", "PI13", "PI14";
+ allwinner,pins = "PI11", "PI12", "PI13";
+ allwinner,function = "spi0";
+ allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+ allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ };
+
+ spi0_cs0_pins_a: spi0_cs0@0 {
+ allwinner,pins = "PI10";
+ allwinner,function = "spi0";
+ allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+ allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ };
+
+ spi0_cs1_pins_a: spi0_cs1@0 {
+ allwinner,pins = "PI14";
allwinner,function = "spi0";
allwinner,drive = <SUN4I_PINCTRL_10_MA>;
allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
spi1_pins_a: spi1@0 {
- allwinner,pins = "PI16", "PI17", "PI18", "PI19";
+ allwinner,pins = "PI17", "PI18", "PI19";
+ allwinner,function = "spi1";
+ allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+ allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ };
+
+ spi1_cs0_pins_a: spi1_cs0@0 {
+ allwinner,pins = "PI16";
allwinner,function = "spi1";
allwinner,drive = <SUN4I_PINCTRL_10_MA>;
allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
spi2_pins_a: spi2@0 {
- allwinner,pins = "PC19", "PC20", "PC21", "PC22";
+ allwinner,pins = "PC20", "PC21", "PC22";
allwinner,function = "spi2";
allwinner,drive = <SUN4I_PINCTRL_10_MA>;
allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
spi2_pins_b: spi2@1 {
- allwinner,pins = "PB14", "PB15", "PB16", "PB17";
+ allwinner,pins = "PB15", "PB16", "PB17";
+ allwinner,function = "spi2";
+ allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+ allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ };
+
+ spi2_cs0_pins_a: spi2_cs0@0 {
+ allwinner,pins = "PC19";
+ allwinner,function = "spi2";
+ allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+ allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ };
+
+ spi2_cs0_pins_b: spi2_cs0@1 {
+ allwinner,pins = "PB14";
allwinner,function = "spi2";
allwinner,drive = <SUN4I_PINCTRL_10_MA>;
allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
mmc0_pins_a: mmc0@0 {
- allwinner,pins = "PF0","PF1","PF2","PF3","PF4","PF5";
+ allwinner,pins = "PF0", "PF1", "PF2",
+ "PF3", "PF4", "PF5";
allwinner,function = "mmc0";
allwinner,drive = <SUN4I_PINCTRL_30_MA>;
allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
@@ -980,28 +1033,44 @@
};
mmc2_pins_a: mmc2@0 {
- allwinner,pins = "PC6","PC7","PC8","PC9","PC10","PC11";
+ allwinner,pins = "PC6", "PC7", "PC8",
+ "PC9", "PC10", "PC11";
allwinner,function = "mmc2";
allwinner,drive = <SUN4I_PINCTRL_30_MA>;
allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
};
mmc3_pins_a: mmc3@0 {
- allwinner,pins = "PI4","PI5","PI6","PI7","PI8","PI9";
+ allwinner,pins = "PI4", "PI5", "PI6",
+ "PI7", "PI8", "PI9";
allwinner,function = "mmc3";
allwinner,drive = <SUN4I_PINCTRL_30_MA>;
allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
- ir0_pins_a: ir0@0 {
- allwinner,pins = "PB3","PB4";
+ ir0_rx_pins_a: ir0@0 {
+ allwinner,pins = "PB4";
allwinner,function = "ir0";
allwinner,drive = <SUN4I_PINCTRL_10_MA>;
allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
- ir1_pins_a: ir1@0 {
- allwinner,pins = "PB22","PB23";
+ ir0_tx_pins_a: ir0@1 {
+ allwinner,pins = "PB3";
+ allwinner,function = "ir0";
+ allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+ allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ };
+
+ ir1_rx_pins_a: ir1@0 {
+ allwinner,pins = "PB23";
+ allwinner,function = "ir1";
+ allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+ allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ };
+
+ ir1_tx_pins_a: ir1@1 {
+ allwinner,pins = "PB22";
allwinner,function = "ir1";
allwinner,drive = <SUN4I_PINCTRL_10_MA>;
allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
@@ -1171,7 +1240,8 @@
};
i2c0: i2c@01c2ac00 {
- compatible = "allwinner,sun7i-a20-i2c", "allwinner,sun4i-a10-i2c";
+ compatible = "allwinner,sun7i-a20-i2c",
+ "allwinner,sun4i-a10-i2c";
reg = <0x01c2ac00 0x400>;
interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&apb1_gates 0>;
@@ -1181,7 +1251,8 @@
};
i2c1: i2c@01c2b000 {
- compatible = "allwinner,sun7i-a20-i2c", "allwinner,sun4i-a10-i2c";
+ compatible = "allwinner,sun7i-a20-i2c",
+ "allwinner,sun4i-a10-i2c";
reg = <0x01c2b000 0x400>;
interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&apb1_gates 1>;
@@ -1191,7 +1262,8 @@
};
i2c2: i2c@01c2b400 {
- compatible = "allwinner,sun7i-a20-i2c", "allwinner,sun4i-a10-i2c";
+ compatible = "allwinner,sun7i-a20-i2c",
+ "allwinner,sun4i-a10-i2c";
reg = <0x01c2b400 0x400>;
interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&apb1_gates 2>;
@@ -1201,7 +1273,8 @@
};
i2c3: i2c@01c2b800 {
- compatible = "allwinner,sun7i-a20-i2c", "allwinner,sun4i-a10-i2c";
+ compatible = "allwinner,sun7i-a20-i2c",
+ "allwinner,sun4i-a10-i2c";
reg = <0x01c2b800 0x400>;
interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&apb1_gates 3>;
@@ -1211,7 +1284,8 @@
};
i2c4: i2c@01c2c000 {
- compatible = "allwinner,sun7i-a20-i2c", "allwinner,sun4i-a10-i2c";
+ compatible = "allwinner,sun7i-a20-i2c",
+ "allwinner,sun4i-a10-i2c";
reg = <0x01c2c000 0x400>;
interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&apb1_gates 15>;
diff --git a/arch/arm/dts/sun8i-a23-a33.dtsi b/arch/arm/dts/sun8i-a23-a33.dtsi
new file mode 100644
index 0000000..faea94e
--- /dev/null
+++ b/arch/arm/dts/sun8i-a23-a33.dtsi
@@ -0,0 +1,626 @@
+/*
+ * Copyright 2014 Chen-Yu Tsai
+ *
+ * Chen-Yu Tsai <wens@csie.org>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This file is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include "skeleton.dtsi"
+
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+
+#include <dt-bindings/pinctrl/sun4i-a10.h>
+
+/ {
+ interrupt-parent = <&gic>;
+
+ chosen {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ framebuffer@0 {
+ compatible = "allwinner,simple-framebuffer",
+ "simple-framebuffer";
+ allwinner,pipeline = "de_be0-lcd0";
+ clocks = <&pll6 0>;
+ status = "disabled";
+ };
+ };
+
+ timer {
+ compatible = "arm,armv7-timer";
+ interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
+ clock-frequency = <24000000>;
+ arm,cpu-registers-not-fw-configured;
+ };
+
+ cpus {
+ enable-method = "allwinner,sun8i-a23";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cpu@0 {
+ compatible = "arm,cortex-a7";
+ device_type = "cpu";
+ reg = <0>;
+ };
+
+ cpu@1 {
+ compatible = "arm,cortex-a7";
+ device_type = "cpu";
+ reg = <1>;
+ };
+ };
+
+ clocks {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ osc24M: osc24M_clk {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <24000000>;
+ clock-output-names = "osc24M";
+ };
+
+ osc32k: osc32k_clk {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <32768>;
+ clock-output-names = "osc32k";
+ };
+
+ pll1: clk@01c20000 {
+ #clock-cells = <0>;
+ compatible = "allwinner,sun8i-a23-pll1-clk";
+ reg = <0x01c20000 0x4>;
+ clocks = <&osc24M>;
+ clock-output-names = "pll1";
+ };
+
+ /* dummy clock until actually implemented */
+ pll5: pll5_clk {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <0>;
+ clock-output-names = "pll5";
+ };
+
+ pll6: clk@01c20028 {
+ #clock-cells = <1>;
+ compatible = "allwinner,sun6i-a31-pll6-clk";
+ reg = <0x01c20028 0x4>;
+ clocks = <&osc24M>;
+ clock-output-names = "pll6", "pll6x2";
+ };
+
+ cpu: cpu_clk@01c20050 {
+ #clock-cells = <0>;
+ compatible = "allwinner,sun4i-a10-cpu-clk";
+ reg = <0x01c20050 0x4>;
+
+ /*
+ * PLL1 is listed twice here.
+ * While it looks suspicious, it's actually documented
+ * that way both in the datasheet and in the code from
+ * Allwinner.
+ */
+ clocks = <&osc32k>, <&osc24M>, <&pll1>, <&pll1>;
+ clock-output-names = "cpu";
+ };
+
+ axi: axi_clk@01c20050 {
+ #clock-cells = <0>;
+ compatible = "allwinner,sun8i-a23-axi-clk";
+ reg = <0x01c20050 0x4>;
+ clocks = <&cpu>;
+ clock-output-names = "axi";
+ };
+
+ ahb1: ahb1_clk@01c20054 {
+ #clock-cells = <0>;
+ compatible = "allwinner,sun6i-a31-ahb1-clk";
+ reg = <0x01c20054 0x4>;
+ clocks = <&osc32k>, <&osc24M>, <&axi>, <&pll6 0>;
+ clock-output-names = "ahb1";
+ };
+
+ apb1: apb1_clk@01c20054 {
+ #clock-cells = <0>;
+ compatible = "allwinner,sun4i-a10-apb0-clk";
+ reg = <0x01c20054 0x4>;
+ clocks = <&ahb1>;
+ clock-output-names = "apb1";
+ };
+
+ ahb1_gates: clk@01c20060 {
+ #clock-cells = <1>;
+ compatible = "allwinner,sun8i-a23-ahb1-gates-clk";
+ reg = <0x01c20060 0x8>;
+ clocks = <&ahb1>;
+ clock-output-names = "ahb1_mipidsi", "ahb1_dma",
+ "ahb1_mmc0", "ahb1_mmc1", "ahb1_mmc2",
+ "ahb1_nand", "ahb1_sdram",
+ "ahb1_hstimer", "ahb1_spi0",
+ "ahb1_spi1", "ahb1_otg", "ahb1_ehci",
+ "ahb1_ohci", "ahb1_ve", "ahb1_lcd",
+ "ahb1_csi", "ahb1_be", "ahb1_fe",
+ "ahb1_gpu", "ahb1_spinlock",
+ "ahb1_drc";
+ };
+
+ apb1_gates: clk@01c20068 {
+ #clock-cells = <1>;
+ compatible = "allwinner,sun8i-a23-apb1-gates-clk";
+ reg = <0x01c20068 0x4>;
+ clocks = <&apb1>;
+ clock-output-names = "apb1_codec", "apb1_pio",
+ "apb1_daudio0", "apb1_daudio1";
+ };
+
+ apb2: clk@01c20058 {
+ #clock-cells = <0>;
+ compatible = "allwinner,sun4i-a10-apb1-clk";
+ reg = <0x01c20058 0x4>;
+ clocks = <&osc32k>, <&osc24M>, <&pll6 0>, <&pll6 0>;
+ clock-output-names = "apb2";
+ };
+
+ apb2_gates: clk@01c2006c {
+ #clock-cells = <1>;
+ compatible = "allwinner,sun8i-a23-apb2-gates-clk";
+ reg = <0x01c2006c 0x4>;
+ clocks = <&apb2>;
+ clock-output-names = "apb2_i2c0", "apb2_i2c1",
+ "apb2_i2c2", "apb2_uart0",
+ "apb2_uart1", "apb2_uart2",
+ "apb2_uart3", "apb2_uart4";
+ };
+
+ mmc0_clk: clk@01c20088 {
+ #clock-cells = <1>;
+ compatible = "allwinner,sun4i-a10-mmc-clk";
+ reg = <0x01c20088 0x4>;
+ clocks = <&osc24M>, <&pll6 0>;
+ clock-output-names = "mmc0",
+ "mmc0_output",
+ "mmc0_sample";
+ };
+
+ mmc1_clk: clk@01c2008c {
+ #clock-cells = <1>;
+ compatible = "allwinner,sun4i-a10-mmc-clk";
+ reg = <0x01c2008c 0x4>;
+ clocks = <&osc24M>, <&pll6 0>;
+ clock-output-names = "mmc1",
+ "mmc1_output",
+ "mmc1_sample";
+ };
+
+ mmc2_clk: clk@01c20090 {
+ #clock-cells = <1>;
+ compatible = "allwinner,sun4i-a10-mmc-clk";
+ reg = <0x01c20090 0x4>;
+ clocks = <&osc24M>, <&pll6 0>;
+ clock-output-names = "mmc2",
+ "mmc2_output",
+ "mmc2_sample";
+ };
+
+ usb_clk: clk@01c200cc {
+ #clock-cells = <1>;
+ #reset-cells = <1>;
+ compatible = "allwinner,sun8i-a23-usb-clk";
+ reg = <0x01c200cc 0x4>;
+ clocks = <&osc24M>;
+ clock-output-names = "usb_phy0", "usb_phy1", "usb_hsic",
+ "usb_hsic_12M", "usb_ohci0";
+ };
+ };
+
+ soc@01c00000 {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ dma: dma-controller@01c02000 {
+ compatible = "allwinner,sun8i-a23-dma";
+ reg = <0x01c02000 0x1000>;
+ interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ahb1_gates 6>;
+ resets = <&ahb1_rst 6>;
+ #dma-cells = <1>;
+ };
+
+ mmc0: mmc@01c0f000 {
+ compatible = "allwinner,sun5i-a13-mmc";
+ reg = <0x01c0f000 0x1000>;
+ clocks = <&ahb1_gates 8>,
+ <&mmc0_clk 0>,
+ <&mmc0_clk 1>,
+ <&mmc0_clk 2>;
+ clock-names = "ahb",
+ "mmc",
+ "output",
+ "sample";
+ resets = <&ahb1_rst 8>;
+ reset-names = "ahb";
+ interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ mmc1: mmc@01c10000 {
+ compatible = "allwinner,sun5i-a13-mmc";
+ reg = <0x01c10000 0x1000>;
+ clocks = <&ahb1_gates 9>,
+ <&mmc1_clk 0>,
+ <&mmc1_clk 1>,
+ <&mmc1_clk 2>;
+ clock-names = "ahb",
+ "mmc",
+ "output",
+ "sample";
+ resets = <&ahb1_rst 9>;
+ reset-names = "ahb";
+ interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ mmc2: mmc@01c11000 {
+ compatible = "allwinner,sun5i-a13-mmc";
+ reg = <0x01c11000 0x1000>;
+ clocks = <&ahb1_gates 10>,
+ <&mmc2_clk 0>,
+ <&mmc2_clk 1>,
+ <&mmc2_clk 2>;
+ clock-names = "ahb",
+ "mmc",
+ "output",
+ "sample";
+ resets = <&ahb1_rst 10>;
+ reset-names = "ahb";
+ interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ pio: pinctrl@01c20800 {
+ /* compatible gets set in SoC specific dtsi file */
+ reg = <0x01c20800 0x400>;
+ /* interrupts get set in SoC specific dtsi file */
+ clocks = <&apb1_gates 5>;
+ gpio-controller;
+ interrupt-controller;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ #gpio-cells = <3>;
+
+ uart0_pins_a: uart0@0 {
+ allwinner,pins = "PF2", "PF4";
+ allwinner,function = "uart0";
+ allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+ allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ };
+
+ mmc0_pins_a: mmc0@0 {
+ allwinner,pins = "PF0", "PF1", "PF2",
+ "PF3", "PF4", "PF5";
+ allwinner,function = "mmc0";
+ allwinner,drive = <SUN4I_PINCTRL_30_MA>;
+ allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ };
+
+ mmc1_pins_a: mmc1@0 {
+ allwinner,pins = "PG0", "PG1", "PG2",
+ "PG3", "PG4", "PG5";
+ allwinner,function = "mmc1";
+ allwinner,drive = <SUN4I_PINCTRL_30_MA>;
+ allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ };
+
+ i2c0_pins_a: i2c0@0 {
+ allwinner,pins = "PH2", "PH3";
+ allwinner,function = "i2c0";
+ allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+ allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ };
+
+ i2c1_pins_a: i2c1@0 {
+ allwinner,pins = "PH4", "PH5";
+ allwinner,function = "i2c1";
+ allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+ allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ };
+
+ i2c2_pins_a: i2c2@0 {
+ allwinner,pins = "PE12", "PE13";
+ allwinner,function = "i2c2";
+ allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+ allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ };
+ };
+
+ ahb1_rst: reset@01c202c0 {
+ #reset-cells = <1>;
+ compatible = "allwinner,sun6i-a31-clock-reset";
+ reg = <0x01c202c0 0xc>;
+ };
+
+ apb1_rst: reset@01c202d0 {
+ #reset-cells = <1>;
+ compatible = "allwinner,sun6i-a31-clock-reset";
+ reg = <0x01c202d0 0x4>;
+ };
+
+ apb2_rst: reset@01c202d8 {
+ #reset-cells = <1>;
+ compatible = "allwinner,sun6i-a31-clock-reset";
+ reg = <0x01c202d8 0x4>;
+ };
+
+ timer@01c20c00 {
+ compatible = "allwinner,sun4i-a10-timer";
+ reg = <0x01c20c00 0xa0>;
+ interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&osc24M>;
+ };
+
+ wdt0: watchdog@01c20ca0 {
+ compatible = "allwinner,sun6i-a31-wdt";
+ reg = <0x01c20ca0 0x20>;
+ interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
+ lradc: lradc@01c22800 {
+ compatible = "allwinner,sun4i-a10-lradc-keys";
+ reg = <0x01c22800 0x100>;
+ interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ };
+
+ uart0: serial@01c28000 {
+ compatible = "snps,dw-apb-uart";
+ reg = <0x01c28000 0x400>;
+ interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
+ reg-shift = <2>;
+ reg-io-width = <4>;
+ clocks = <&apb2_gates 16>;
+ resets = <&apb2_rst 16>;
+ dmas = <&dma 6>, <&dma 6>;
+ dma-names = "rx", "tx";
+ status = "disabled";
+ };
+
+ uart1: serial@01c28400 {
+ compatible = "snps,dw-apb-uart";
+ reg = <0x01c28400 0x400>;
+ interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
+ reg-shift = <2>;
+ reg-io-width = <4>;
+ clocks = <&apb2_gates 17>;
+ resets = <&apb2_rst 17>;
+ dmas = <&dma 7>, <&dma 7>;
+ dma-names = "rx", "tx";
+ status = "disabled";
+ };
+
+ uart2: serial@01c28800 {
+ compatible = "snps,dw-apb-uart";
+ reg = <0x01c28800 0x400>;
+ interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
+ reg-shift = <2>;
+ reg-io-width = <4>;
+ clocks = <&apb2_gates 18>;
+ resets = <&apb2_rst 18>;
+ dmas = <&dma 8>, <&dma 8>;
+ dma-names = "rx", "tx";
+ status = "disabled";
+ };
+
+ uart3: serial@01c28c00 {
+ compatible = "snps,dw-apb-uart";
+ reg = <0x01c28c00 0x400>;
+ interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
+ reg-shift = <2>;
+ reg-io-width = <4>;
+ clocks = <&apb2_gates 19>;
+ resets = <&apb2_rst 19>;
+ dmas = <&dma 9>, <&dma 9>;
+ dma-names = "rx", "tx";
+ status = "disabled";
+ };
+
+ uart4: serial@01c29000 {
+ compatible = "snps,dw-apb-uart";
+ reg = <0x01c29000 0x400>;
+ interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
+ reg-shift = <2>;
+ reg-io-width = <4>;
+ clocks = <&apb2_gates 20>;
+ resets = <&apb2_rst 20>;
+ dmas = <&dma 10>, <&dma 10>;
+ dma-names = "rx", "tx";
+ status = "disabled";
+ };
+
+ i2c0: i2c@01c2ac00 {
+ compatible = "allwinner,sun6i-a31-i2c";
+ reg = <0x01c2ac00 0x400>;
+ interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&apb2_gates 0>;
+ resets = <&apb2_rst 0>;
+ status = "disabled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ i2c1: i2c@01c2b000 {
+ compatible = "allwinner,sun6i-a31-i2c";
+ reg = <0x01c2b000 0x400>;
+ interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&apb2_gates 1>;
+ resets = <&apb2_rst 1>;
+ status = "disabled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ i2c2: i2c@01c2b400 {
+ compatible = "allwinner,sun6i-a31-i2c";
+ reg = <0x01c2b400 0x400>;
+ interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&apb2_gates 2>;
+ resets = <&apb2_rst 2>;
+ status = "disabled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ gic: interrupt-controller@01c81000 {
+ compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic";
+ reg = <0x01c81000 0x1000>,
+ <0x01c82000 0x1000>,
+ <0x01c84000 0x2000>,
+ <0x01c86000 0x2000>;
+ interrupt-controller;
+ #interrupt-cells = <3>;
+ interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
+ };
+
+ rtc: rtc@01f00000 {
+ compatible = "allwinner,sun6i-a31-rtc";
+ reg = <0x01f00000 0x54>;
+ interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
+ prcm@01f01400 {
+ compatible = "allwinner,sun8i-a23-prcm";
+ reg = <0x01f01400 0x200>;
+
+ ar100: ar100_clk {
+ compatible = "fixed-factor-clock";
+ #clock-cells = <0>;
+ clock-div = <1>;
+ clock-mult = <1>;
+ clocks = <&osc24M>;
+ clock-output-names = "ar100";
+ };
+
+ ahb0: ahb0_clk {
+ compatible = "fixed-factor-clock";
+ #clock-cells = <0>;
+ clock-div = <1>;
+ clock-mult = <1>;
+ clocks = <&ar100>;
+ clock-output-names = "ahb0";
+ };
+
+ apb0: apb0_clk {
+ compatible = "allwinner,sun8i-a23-apb0-clk";
+ #clock-cells = <0>;
+ clocks = <&ahb0>;
+ clock-output-names = "apb0";
+ };
+
+ apb0_gates: apb0_gates_clk {
+ compatible = "allwinner,sun8i-a23-apb0-gates-clk";
+ #clock-cells = <1>;
+ clocks = <&apb0>;
+ clock-output-names = "apb0_pio", "apb0_timer",
+ "apb0_rsb", "apb0_uart",
+ "apb0_i2c";
+ };
+
+ apb0_rst: apb0_rst {
+ compatible = "allwinner,sun6i-a31-clock-reset";
+ #reset-cells = <1>;
+ };
+ };
+
+ cpucfg@01f01c00 {
+ compatible = "allwinner,sun8i-a23-cpuconfig";
+ reg = <0x01f01c00 0x300>;
+ };
+
+ r_uart: serial@01f02800 {
+ compatible = "snps,dw-apb-uart";
+ reg = <0x01f02800 0x400>;
+ interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
+ reg-shift = <2>;
+ reg-io-width = <4>;
+ clocks = <&apb0_gates 4>;
+ resets = <&apb0_rst 4>;
+ status = "disabled";
+ };
+
+ r_pio: pinctrl@01f02c00 {
+ compatible = "allwinner,sun8i-a23-r-pinctrl";
+ reg = <0x01f02c00 0x400>;
+ interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&apb0_gates 0>;
+ resets = <&apb0_rst 0>;
+ gpio-controller;
+ interrupt-controller;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ #gpio-cells = <3>;
+
+ r_uart_pins_a: r_uart@0 {
+ allwinner,pins = "PL2", "PL3";
+ allwinner,function = "s_uart";
+ allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+ allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ };
+ };
+ };
+};
diff --git a/arch/arm/dts/sun8i-a23-evb.dts b/arch/arm/dts/sun8i-a23-evb.dts
new file mode 100644
index 0000000..610786e
--- /dev/null
+++ b/arch/arm/dts/sun8i-a23-evb.dts
@@ -0,0 +1,134 @@
+/*
+ * Copyright 2015 Maxime Ripard
+ *
+ * Maxime Ripard <maxime.ripard@free-electrons.com>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This file is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+#include "sun8i-a23.dtsi"
+#include "sunxi-common-regulators.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/pinctrl/sun4i-a10.h>
+
+/ {
+ model = "Allwinner A23 Evaluation Board";
+ compatible = "allwinner,sun8i-a23-evb", "allwinner,sun8i-a23";
+
+ aliases {
+ i2c0 = &i2c0;
+ i2c1 = &i2c1;
+ serial0 = &r_uart;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+};
+
+&i2c0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c0_pins_a>;
+ status = "okay";
+};
+
+&i2c1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c1_pins_a>;
+ status = "okay";
+};
+
+&lradc {
+ vref-supply = <®_vcc3v0>;
+ status = "okay";
+
+ button@190 {
+ label = "Volume Up";
+ linux,code = <KEY_VOLUMEUP>;
+ channel = <0>;
+ voltage = <190000>;
+ };
+
+ button@390 {
+ label = "Volume Down";
+ linux,code = <KEY_VOLUMEDOWN>;
+ channel = <0>;
+ voltage = <390000>;
+ };
+
+ button@600 {
+ label = "Home";
+ linux,code = <KEY_HOME>;
+ channel = <0>;
+ voltage = <600000>;
+ };
+};
+
+&mmc0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_evb>;
+ vmmc-supply = <®_vcc3v0>;
+ bus-width = <4>;
+ cd-gpios = <&pio 1 4 GPIO_ACTIVE_HIGH>; /* PB4 */
+ cd-inverted;
+ status = "okay";
+};
+
+&pio {
+ mmc0_cd_pin_evb: mmc0_cd_pin@0 {
+ allwinner,pins = "PB4";
+ allwinner,function = "gpio_in";
+ allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+ allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+ };
+};
+
+/*
+ * The RX line has a non-populated resistance. In order to use it, you
+ * need to solder R207 on the back of the board in order to close the
+ * line and get a working UART.
+ */
+&r_uart {
+ pinctrl-names = "default";
+ pinctrl-0 = <&r_uart_pins_a>;
+ status = "okay";
+};
diff --git a/arch/arm/dts/sun8i-a23-ippo-q8h-v1.2.dts b/arch/arm/dts/sun8i-a23-ippo-q8h-v1.2.dts
index dd31c53..382d64c 100644
--- a/arch/arm/dts/sun8i-a23-ippo-q8h-v1.2.dts
+++ b/arch/arm/dts/sun8i-a23-ippo-q8h-v1.2.dts
@@ -16,11 +16,6 @@
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
- * You should have received a copy of the GNU General Public
- * License along with this file; if not, write to the Free
- * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
- * MA 02110-1301 USA
- *
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
diff --git a/arch/arm/dts/sun8i-a23-ippo-q8h-v5.dts b/arch/arm/dts/sun8i-a23-ippo-q8h-v5.dts
index f5658d1..95134c6 100644
--- a/arch/arm/dts/sun8i-a23-ippo-q8h-v5.dts
+++ b/arch/arm/dts/sun8i-a23-ippo-q8h-v5.dts
@@ -18,11 +18,6 @@
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
- * You should have received a copy of the GNU General Public
- * License along with this file; if not, write to the Free
- * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
- * MA 02110-1301 USA
- *
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
diff --git a/arch/arm/dts/sun8i-a23.dtsi b/arch/arm/dts/sun8i-a23.dtsi
index 6d6eda3..8698f7a 100644
--- a/arch/arm/dts/sun8i-a23.dtsi
+++ b/arch/arm/dts/sun8i-a23.dtsi
@@ -18,11 +18,6 @@
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
- * You should have received a copy of the GNU General Public
- * License along with this file; if not, write to the Free
- * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
- * MA 02110-1301 USA
- *
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
@@ -47,217 +42,14 @@
* OTHER DEALINGS IN THE SOFTWARE.
*/
-#include "skeleton.dtsi"
-
-#include <dt-bindings/interrupt-controller/arm-gic.h>
-
-#include <dt-bindings/pinctrl/sun4i-a10.h>
+#include "sun8i-a23-a33.dtsi"
/ {
- interrupt-parent = <&gic>;
-
- chosen {
- #address-cells = <1>;
- #size-cells = <1>;
- ranges;
-
- framebuffer@0 {
- compatible = "allwinner,simple-framebuffer",
- "simple-framebuffer";
- allwinner,pipeline = "de_be0-lcd0";
- clocks = <&pll6 0>;
- status = "disabled";
- };
- };
-
- timer {
- compatible = "arm,armv7-timer";
- interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
- <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
- <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
- <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
- clock-frequency = <24000000>;
- arm,cpu-registers-not-fw-configured;
- };
-
- cpus {
- enable-method = "allwinner,sun8i-a23";
- #address-cells = <1>;
- #size-cells = <0>;
-
- cpu@0 {
- compatible = "arm,cortex-a7";
- device_type = "cpu";
- reg = <0>;
- };
-
- cpu@1 {
- compatible = "arm,cortex-a7";
- device_type = "cpu";
- reg = <1>;
- };
- };
-
memory {
reg = <0x40000000 0x40000000>;
};
clocks {
- #address-cells = <1>;
- #size-cells = <1>;
- ranges;
-
- osc24M: osc24M_clk {
- #clock-cells = <0>;
- compatible = "fixed-clock";
- clock-frequency = <24000000>;
- clock-output-names = "osc24M";
- };
-
- osc32k: osc32k_clk {
- #clock-cells = <0>;
- compatible = "fixed-clock";
- clock-frequency = <32768>;
- clock-output-names = "osc32k";
- };
-
- pll1: clk@01c20000 {
- #clock-cells = <0>;
- compatible = "allwinner,sun8i-a23-pll1-clk";
- reg = <0x01c20000 0x4>;
- clocks = <&osc24M>;
- clock-output-names = "pll1";
- };
-
- /* dummy clock until actually implemented */
- pll5: pll5_clk {
- #clock-cells = <0>;
- compatible = "fixed-clock";
- clock-frequency = <0>;
- clock-output-names = "pll5";
- };
-
- pll6: clk@01c20028 {
- #clock-cells = <1>;
- compatible = "allwinner,sun6i-a31-pll6-clk";
- reg = <0x01c20028 0x4>;
- clocks = <&osc24M>;
- clock-output-names = "pll6", "pll6x2";
- };
-
- cpu: cpu_clk@01c20050 {
- #clock-cells = <0>;
- compatible = "allwinner,sun4i-a10-cpu-clk";
- reg = <0x01c20050 0x4>;
-
- /*
- * PLL1 is listed twice here.
- * While it looks suspicious, it's actually documented
- * that way both in the datasheet and in the code from
- * Allwinner.
- */
- clocks = <&osc32k>, <&osc24M>, <&pll1>, <&pll1>;
- clock-output-names = "cpu";
- };
-
- axi: axi_clk@01c20050 {
- #clock-cells = <0>;
- compatible = "allwinner,sun8i-a23-axi-clk";
- reg = <0x01c20050 0x4>;
- clocks = <&cpu>;
- clock-output-names = "axi";
- };
-
- ahb1: ahb1_clk@01c20054 {
- #clock-cells = <0>;
- compatible = "allwinner,sun6i-a31-ahb1-clk";
- reg = <0x01c20054 0x4>;
- clocks = <&osc32k>, <&osc24M>, <&axi>, <&pll6 0>;
- clock-output-names = "ahb1";
- };
-
- apb1: apb1_clk@01c20054 {
- #clock-cells = <0>;
- compatible = "allwinner,sun4i-a10-apb0-clk";
- reg = <0x01c20054 0x4>;
- clocks = <&ahb1>;
- clock-output-names = "apb1";
- };
-
- ahb1_gates: clk@01c20060 {
- #clock-cells = <1>;
- compatible = "allwinner,sun8i-a23-ahb1-gates-clk";
- reg = <0x01c20060 0x8>;
- clocks = <&ahb1>;
- clock-output-names = "ahb1_mipidsi", "ahb1_dma",
- "ahb1_mmc0", "ahb1_mmc1", "ahb1_mmc2",
- "ahb1_nand", "ahb1_sdram",
- "ahb1_hstimer", "ahb1_spi0",
- "ahb1_spi1", "ahb1_otg", "ahb1_ehci",
- "ahb1_ohci", "ahb1_ve", "ahb1_lcd",
- "ahb1_csi", "ahb1_be", "ahb1_fe",
- "ahb1_gpu", "ahb1_spinlock",
- "ahb1_drc";
- };
-
- apb1_gates: clk@01c20068 {
- #clock-cells = <1>;
- compatible = "allwinner,sun8i-a23-apb1-gates-clk";
- reg = <0x01c20068 0x4>;
- clocks = <&apb1>;
- clock-output-names = "apb1_codec", "apb1_pio",
- "apb1_daudio0", "apb1_daudio1";
- };
-
- apb2: clk@01c20058 {
- #clock-cells = <0>;
- compatible = "allwinner,sun4i-a10-apb1-clk";
- reg = <0x01c20058 0x4>;
- clocks = <&osc32k>, <&osc24M>, <&pll6 0>, <&pll6 0>;
- clock-output-names = "apb2";
- };
-
- apb2_gates: clk@01c2006c {
- #clock-cells = <1>;
- compatible = "allwinner,sun8i-a23-apb2-gates-clk";
- reg = <0x01c2006c 0x4>;
- clocks = <&apb2>;
- clock-output-names = "apb2_i2c0", "apb2_i2c1",
- "apb2_i2c2", "apb2_uart0",
- "apb2_uart1", "apb2_uart2",
- "apb2_uart3", "apb2_uart4";
- };
-
- mmc0_clk: clk@01c20088 {
- #clock-cells = <1>;
- compatible = "allwinner,sun4i-a10-mmc-clk";
- reg = <0x01c20088 0x4>;
- clocks = <&osc24M>, <&pll6 0>;
- clock-output-names = "mmc0",
- "mmc0_output",
- "mmc0_sample";
- };
-
- mmc1_clk: clk@01c2008c {
- #clock-cells = <1>;
- compatible = "allwinner,sun4i-a10-mmc-clk";
- reg = <0x01c2008c 0x4>;
- clocks = <&osc24M>, <&pll6 0>;
- clock-output-names = "mmc1",
- "mmc1_output",
- "mmc1_sample";
- };
-
- mmc2_clk: clk@01c20090 {
- #clock-cells = <1>;
- compatible = "allwinner,sun4i-a10-mmc-clk";
- reg = <0x01c20090 0x4>;
- clocks = <&osc24M>, <&pll6 0>;
- clock-output-names = "mmc2",
- "mmc2_output",
- "mmc2_sample";
- };
-
mbus_clk: clk@01c2015c {
#clock-cells = <0>;
compatible = "allwinner,sun8i-a23-mbus-clk";
@@ -266,368 +58,11 @@
clock-output-names = "mbus";
};
};
+};
- soc@01c00000 {
- compatible = "simple-bus";
- #address-cells = <1>;
- #size-cells = <1>;
- ranges;
-
- dma: dma-controller@01c02000 {
- compatible = "allwinner,sun8i-a23-dma";
- reg = <0x01c02000 0x1000>;
- interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&ahb1_gates 6>;
- resets = <&ahb1_rst 6>;
- #dma-cells = <1>;
- };
-
- mmc0: mmc@01c0f000 {
- compatible = "allwinner,sun5i-a13-mmc";
- reg = <0x01c0f000 0x1000>;
- clocks = <&ahb1_gates 8>,
- <&mmc0_clk 0>,
- <&mmc0_clk 1>,
- <&mmc0_clk 2>;
- clock-names = "ahb",
- "mmc",
- "output",
- "sample";
- resets = <&ahb1_rst 8>;
- reset-names = "ahb";
- interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
- status = "disabled";
- #address-cells = <1>;
- #size-cells = <0>;
- };
-
- mmc1: mmc@01c10000 {
- compatible = "allwinner,sun5i-a13-mmc";
- reg = <0x01c10000 0x1000>;
- clocks = <&ahb1_gates 9>,
- <&mmc1_clk 0>,
- <&mmc1_clk 1>,
- <&mmc1_clk 2>;
- clock-names = "ahb",
- "mmc",
- "output",
- "sample";
- resets = <&ahb1_rst 9>;
- reset-names = "ahb";
- interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
- status = "disabled";
- #address-cells = <1>;
- #size-cells = <0>;
- };
-
- mmc2: mmc@01c11000 {
- compatible = "allwinner,sun5i-a13-mmc";
- reg = <0x01c11000 0x1000>;
- clocks = <&ahb1_gates 10>,
- <&mmc2_clk 0>,
- <&mmc2_clk 1>,
- <&mmc2_clk 2>;
- clock-names = "ahb",
- "mmc",
- "output",
- "sample";
- resets = <&ahb1_rst 10>;
- reset-names = "ahb";
- interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
- status = "disabled";
- #address-cells = <1>;
- #size-cells = <0>;
- };
-
- pio: pinctrl@01c20800 {
- compatible = "allwinner,sun8i-a23-pinctrl";
- reg = <0x01c20800 0x400>;
- interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&apb1_gates 5>;
- gpio-controller;
- interrupt-controller;
- #address-cells = <1>;
- #size-cells = <0>;
- #gpio-cells = <3>;
-
- uart0_pins_a: uart0@0 {
- allwinner,pins = "PF2", "PF4";
- allwinner,function = "uart0";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
- };
-
- mmc0_pins_a: mmc0@0 {
- allwinner,pins = "PF0","PF1","PF2","PF3","PF4","PF5";
- allwinner,function = "mmc0";
- allwinner,drive = <SUN4I_PINCTRL_30_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
- };
-
- mmc1_pins_a: mmc1@0 {
- allwinner,pins = "PG0","PG1","PG2","PG3","PG4","PG5";
- allwinner,function = "mmc1";
- allwinner,drive = <SUN4I_PINCTRL_30_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
- };
-
- i2c0_pins_a: i2c0@0 {
- allwinner,pins = "PH2", "PH3";
- allwinner,function = "i2c0";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
- };
-
- i2c1_pins_a: i2c1@0 {
- allwinner,pins = "PH4", "PH5";
- allwinner,function = "i2c1";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
- };
-
- i2c2_pins_a: i2c2@0 {
- allwinner,pins = "PE12", "PE13";
- allwinner,function = "i2c2";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
- };
- };
-
- ahb1_rst: reset@01c202c0 {
- #reset-cells = <1>;
- compatible = "allwinner,sun6i-a31-clock-reset";
- reg = <0x01c202c0 0xc>;
- };
-
- apb1_rst: reset@01c202d0 {
- #reset-cells = <1>;
- compatible = "allwinner,sun6i-a31-clock-reset";
- reg = <0x01c202d0 0x4>;
- };
-
- apb2_rst: reset@01c202d8 {
- #reset-cells = <1>;
- compatible = "allwinner,sun6i-a31-clock-reset";
- reg = <0x01c202d8 0x4>;
- };
-
- timer@01c20c00 {
- compatible = "allwinner,sun4i-a10-timer";
- reg = <0x01c20c00 0xa0>;
- interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&osc24M>;
- };
-
- wdt0: watchdog@01c20ca0 {
- compatible = "allwinner,sun6i-a31-wdt";
- reg = <0x01c20ca0 0x20>;
- interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
- };
-
- lradc: lradc@01c22800 {
- compatible = "allwinner,sun4i-a10-lradc-keys";
- reg = <0x01c22800 0x100>;
- interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
- status = "disabled";
- };
-
- uart0: serial@01c28000 {
- compatible = "snps,dw-apb-uart";
- reg = <0x01c28000 0x400>;
- interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
- reg-shift = <2>;
- reg-io-width = <4>;
- clocks = <&apb2_gates 16>;
- resets = <&apb2_rst 16>;
- dmas = <&dma 6>, <&dma 6>;
- dma-names = "rx", "tx";
- status = "disabled";
- };
-
- uart1: serial@01c28400 {
- compatible = "snps,dw-apb-uart";
- reg = <0x01c28400 0x400>;
- interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
- reg-shift = <2>;
- reg-io-width = <4>;
- clocks = <&apb2_gates 17>;
- resets = <&apb2_rst 17>;
- dmas = <&dma 7>, <&dma 7>;
- dma-names = "rx", "tx";
- status = "disabled";
- };
-
- uart2: serial@01c28800 {
- compatible = "snps,dw-apb-uart";
- reg = <0x01c28800 0x400>;
- interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
- reg-shift = <2>;
- reg-io-width = <4>;
- clocks = <&apb2_gates 18>;
- resets = <&apb2_rst 18>;
- dmas = <&dma 8>, <&dma 8>;
- dma-names = "rx", "tx";
- status = "disabled";
- };
-
- uart3: serial@01c28c00 {
- compatible = "snps,dw-apb-uart";
- reg = <0x01c28c00 0x400>;
- interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
- reg-shift = <2>;
- reg-io-width = <4>;
- clocks = <&apb2_gates 19>;
- resets = <&apb2_rst 19>;
- dmas = <&dma 9>, <&dma 9>;
- dma-names = "rx", "tx";
- status = "disabled";
- };
-
- uart4: serial@01c29000 {
- compatible = "snps,dw-apb-uart";
- reg = <0x01c29000 0x400>;
- interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
- reg-shift = <2>;
- reg-io-width = <4>;
- clocks = <&apb2_gates 20>;
- resets = <&apb2_rst 20>;
- dmas = <&dma 10>, <&dma 10>;
- dma-names = "rx", "tx";
- status = "disabled";
- };
-
- i2c0: i2c@01c2ac00 {
- compatible = "allwinner,sun6i-a31-i2c";
- reg = <0x01c2ac00 0x400>;
- interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&apb2_gates 0>;
- resets = <&apb2_rst 0>;
- status = "disabled";
- #address-cells = <1>;
- #size-cells = <0>;
- };
-
- i2c1: i2c@01c2b000 {
- compatible = "allwinner,sun6i-a31-i2c";
- reg = <0x01c2b000 0x400>;
- interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&apb2_gates 1>;
- resets = <&apb2_rst 1>;
- status = "disabled";
- #address-cells = <1>;
- #size-cells = <0>;
- };
-
- i2c2: i2c@01c2b400 {
- compatible = "allwinner,sun6i-a31-i2c";
- reg = <0x01c2b400 0x400>;
- interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&apb2_gates 2>;
- resets = <&apb2_rst 2>;
- status = "disabled";
- #address-cells = <1>;
- #size-cells = <0>;
- };
-
- gic: interrupt-controller@01c81000 {
- compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic";
- reg = <0x01c81000 0x1000>,
- <0x01c82000 0x1000>,
- <0x01c84000 0x2000>,
- <0x01c86000 0x2000>;
- interrupt-controller;
- #interrupt-cells = <3>;
- interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
- };
-
- rtc: rtc@01f00000 {
- compatible = "allwinner,sun6i-a31-rtc";
- reg = <0x01f00000 0x54>;
- interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
- };
-
- prcm@01f01400 {
- compatible = "allwinner,sun8i-a23-prcm";
- reg = <0x01f01400 0x200>;
-
- ar100: ar100_clk {
- compatible = "fixed-factor-clock";
- #clock-cells = <0>;
- clock-div = <1>;
- clock-mult = <1>;
- clocks = <&osc24M>;
- clock-output-names = "ar100";
- };
-
- ahb0: ahb0_clk {
- compatible = "fixed-factor-clock";
- #clock-cells = <0>;
- clock-div = <1>;
- clock-mult = <1>;
- clocks = <&ar100>;
- clock-output-names = "ahb0";
- };
-
- apb0: apb0_clk {
- compatible = "allwinner,sun8i-a23-apb0-clk";
- #clock-cells = <0>;
- clocks = <&ahb0>;
- clock-output-names = "apb0";
- };
-
- apb0_gates: apb0_gates_clk {
- compatible = "allwinner,sun8i-a23-apb0-gates-clk";
- #clock-cells = <1>;
- clocks = <&apb0>;
- clock-output-names = "apb0_pio", "apb0_timer",
- "apb0_rsb", "apb0_uart",
- "apb0_i2c";
- };
-
- apb0_rst: apb0_rst {
- compatible = "allwinner,sun6i-a31-clock-reset";
- #reset-cells = <1>;
- };
- };
-
- cpucfg@01f01c00 {
- compatible = "allwinner,sun8i-a23-cpuconfig";
- reg = <0x01f01c00 0x300>;
- };
-
- r_uart: serial@01f02800 {
- compatible = "snps,dw-apb-uart";
- reg = <0x01f02800 0x400>;
- interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
- reg-shift = <2>;
- reg-io-width = <4>;
- clocks = <&apb0_gates 4>;
- resets = <&apb0_rst 4>;
- status = "disabled";
- };
-
- r_pio: pinctrl@01f02c00 {
- compatible = "allwinner,sun8i-a23-r-pinctrl";
- reg = <0x01f02c00 0x400>;
- interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&apb0_gates 0>;
- resets = <&apb0_rst 0>;
- gpio-controller;
- interrupt-controller;
- #address-cells = <1>;
- #size-cells = <0>;
- #gpio-cells = <3>;
-
- r_uart_pins_a: r_uart@0 {
- allwinner,pins = "PL2", "PL3";
- allwinner,function = "s_uart";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
- };
- };
- };
+&pio {
+ compatible = "allwinner,sun8i-a23-pinctrl";
+ interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
};
diff --git a/arch/arm/dts/sun8i-a33-astar-mid756.dts b/arch/arm/dts/sun8i-a33-astar-mid756.dts
deleted file mode 100644
index d9ce446..0000000
--- a/arch/arm/dts/sun8i-a33-astar-mid756.dts
+++ /dev/null
@@ -1,29 +0,0 @@
-/*
- * Copyright 2015 Hans de Goede <hdegoede@redhat.com>
- *
- * Minimal dts file for the Astar MID756 for u-boot only
- *
- * SPDX-License-Identifier: GPL-2.0+ or X11
- */
-
-/dts-v1/;
-#include "sun8i-a23.dtsi"
-
-/ {
- model = "Astar MID756";
- compatible = "astar,mid756", "allwinner,sun8i-a23";
-
- aliases {
- serial0 = &r_uart;
- };
-
- chosen {
- stdout-path = "serial0:115200n8";
- };
-};
-
-&r_uart {
- pinctrl-names = "default";
- pinctrl-0 = <&r_uart_pins_a>;
- status = "okay";
-};
diff --git a/arch/arm/dts/sun8i-a33-et-q8-v1.6.dts b/arch/arm/dts/sun8i-a33-et-q8-v1.6.dts
new file mode 100644
index 0000000..19db844
--- /dev/null
+++ b/arch/arm/dts/sun8i-a33-et-q8-v1.6.dts
@@ -0,0 +1,88 @@
+/*
+ * Copyright 2015 Vishnu Patekar
+ * Vishnu Patekar <vishnupatekar0510@gmail.com>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This file is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+#include "sun8i-a33.dtsi"
+#include "sunxi-common-regulators.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/pinctrl/sun4i-a10.h>
+
+/ {
+ model = "ET Q8 Quad Core Tablet (v1.6)";
+ compatible = "et,q8-v1.6", "allwinner,sun8i-a33";
+
+ aliases {
+ serial0 = &uart0;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+};
+
+&lradc {
+ vref-supply = <®_vcc3v0>;
+ status = "okay";
+
+ button@200 {
+ label = "Volume Up";
+ linux,code = <KEY_VOLUMEUP>;
+ channel = <0>;
+ voltage = <200000>;
+ };
+
+ button@400 {
+ label = "Volume Down";
+ linux,code = <KEY_VOLUMEDOWN>;
+ channel = <0>;
+ voltage = <400000>;
+ };
+};
+
+&uart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_pins_a>;
+ status = "okay";
+};
diff --git a/arch/arm/dts/sun8i-a33-ga10h-v1.1.dts b/arch/arm/dts/sun8i-a33-ga10h-v1.1.dts
new file mode 100644
index 0000000..8667033
--- /dev/null
+++ b/arch/arm/dts/sun8i-a33-ga10h-v1.1.dts
@@ -0,0 +1,125 @@
+/*
+ * Copyright 2015 Hans de Goede <hdegoede@redhat.com>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This file is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+#include "sun8i-a33.dtsi"
+#include "sunxi-common-regulators.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/pinctrl/sun4i-a10.h>
+
+/ {
+ model = "Allwinner GA10H Quad Core Tablet (v1.1)";
+ compatible = "allwinner,ga10h-v1.1", "allwinner,sun8i-a33";
+
+ aliases {
+ serial0 = &r_uart;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+};
+
+&i2c0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c0_pins_a>;
+ status = "okay";
+};
+
+&i2c1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c1_pins_a>;
+ status = "okay";
+};
+
+&lradc {
+ vref-supply = <®_vcc3v0>;
+ status = "okay";
+
+ button@200 {
+ label = "Volume Up";
+ linux,code = <KEY_VOLUMEUP>;
+ channel = <0>;
+ voltage = <200000>;
+ };
+
+ button@400 {
+ label = "Volume Down";
+ linux,code = <KEY_VOLUMEDOWN>;
+ channel = <0>;
+ voltage = <400000>;
+ };
+
+ button@600 {
+ label = "Back";
+ linux,code = <KEY_BACK>;
+ channel = <0>;
+ voltage = <600000>;
+ };
+};
+
+&mmc0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_q8h>;
+ vmmc-supply = <®_vcc3v0>;
+ bus-width = <4>;
+ cd-gpios = <&pio 1 4 GPIO_ACTIVE_HIGH>; /* PB4 */
+ cd-inverted;
+ status = "okay";
+};
+
+&pio {
+ mmc0_cd_pin_q8h: mmc0_cd_pin@0 {
+ allwinner,pins = "PB4";
+ allwinner,function = "gpio_in";
+ allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+ allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+ };
+};
+
+&r_uart {
+ pinctrl-names = "default";
+ pinctrl-0 = <&r_uart_pins_a>;
+ status = "okay";
+};
diff --git a/arch/arm/dts/sun8i-a33-ippo-q8h-v1.2-lcd1024x600.dts b/arch/arm/dts/sun8i-a33-ippo-q8h-v1.2-lcd1024x600.dts
index 4a43187..9777149 100644
--- a/arch/arm/dts/sun8i-a33-ippo-q8h-v1.2-lcd1024x600.dts
+++ b/arch/arm/dts/sun8i-a33-ippo-q8h-v1.2-lcd1024x600.dts
@@ -7,7 +7,7 @@
*/
/dts-v1/;
-#include "sun8i-a23.dtsi"
+#include "sun8i-a33.dtsi"
/ {
model = "Ippo Q8H V1.2 (A33, 1024x600)";
diff --git a/arch/arm/dts/sun8i-a33.dtsi b/arch/arm/dts/sun8i-a33.dtsi
new file mode 100644
index 0000000..9b43bc6
--- /dev/null
+++ b/arch/arm/dts/sun8i-a33.dtsi
@@ -0,0 +1,89 @@
+/*
+ * Copyright 2014 Chen-Yu Tsai
+ *
+ * Chen-Yu Tsai <wens@csie.org>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This file is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include "sun8i-a23-a33.dtsi"
+
+/ {
+ cpus {
+ cpu@2 {
+ compatible = "arm,cortex-a7";
+ device_type = "cpu";
+ reg = <2>;
+ };
+
+ cpu@3 {
+ compatible = "arm,cortex-a7";
+ device_type = "cpu";
+ reg = <3>;
+ };
+ };
+
+ memory {
+ reg = <0x40000000 0x80000000>;
+ };
+
+ clocks {
+ /* Dummy clock for pll11 (DDR1) until actually implemented */
+ pll11: pll11_clk {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <0>;
+ clock-output-names = "pll11";
+ };
+
+ mbus_clk: clk@01c2015c {
+ #clock-cells = <0>;
+ compatible = "allwinner,sun8i-a23-mbus-clk";
+ reg = <0x01c2015c 0x4>;
+ clocks = <&osc24M>, <&pll6 1>, <&pll5>, <&pll11>;
+ clock-output-names = "mbus";
+ };
+ };
+};
+
+&pio {
+ compatible = "allwinner,sun8i-a33-pinctrl";
+ interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
+};
diff --git a/arch/arm/dts/sun9i-a80-optimus.dts b/arch/arm/dts/sun9i-a80-optimus.dts
index e463138..6ce4b5e 100644
--- a/arch/arm/dts/sun9i-a80-optimus.dts
+++ b/arch/arm/dts/sun9i-a80-optimus.dts
@@ -18,11 +18,6 @@
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
- * You should have received a copy of the GNU General Public
- * License along with this file; if not, write to the Free
- * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
- * MA 02110-1301 USA
- *
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
diff --git a/arch/arm/dts/sun9i-a80.dtsi b/arch/arm/dts/sun9i-a80.dtsi
index d3dece2..a43ad77 100644
--- a/arch/arm/dts/sun9i-a80.dtsi
+++ b/arch/arm/dts/sun9i-a80.dtsi
@@ -18,11 +18,6 @@
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
- * You should have received a copy of the GNU General Public
- * License along with this file; if not, write to the Free
- * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
- * MA 02110-1301 USA
- *
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
@@ -289,7 +284,7 @@
"ahb0_ss", "ahb0_sd", "ahb0_nand1",
"ahb0_nand0", "ahb0_sdram",
"ahb0_mipi_hsi", "ahb0_sata", "ahb0_ts",
- "ahb0_spi0","ahb0_spi1", "ahb0_spi2",
+ "ahb0_spi0", "ahb0_spi1", "ahb0_spi2",
"ahb0_spi3";
};
@@ -570,6 +565,12 @@
clocks = <&osc24M>;
};
+ wdt: watchdog@06000ca0 {
+ compatible = "allwinner,sun6i-a31-wdt";
+ reg = <0x06000ca0 0x20>;
+ interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
pio: pinctrl@06000800 {
compatible = "allwinner,sun9i-a80-pinctrl";
reg = <0x06000800 0x400>;
diff --git a/arch/arm/dts/sunxi-common-regulators.dtsi b/arch/arm/dts/sunxi-common-regulators.dtsi
index e02baa6..51cc838 100644
--- a/arch/arm/dts/sunxi-common-regulators.dtsi
+++ b/arch/arm/dts/sunxi-common-regulators.dtsi
@@ -18,11 +18,6 @@
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
- * You should have received a copy of the GNU General Public
- * License along with this file; if not, write to the Free
- * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
- * MA 02110-1301 USA
- *
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
diff --git a/arch/arm/include/asm/arch-rmobile/r8a7794.h b/arch/arm/include/asm/arch-rmobile/r8a7794.h
index 6d11fa4..ea7dc4c 100644
--- a/arch/arm/include/asm/arch-rmobile/r8a7794.h
+++ b/arch/arm/include/asm/arch-rmobile/r8a7794.h
@@ -32,4 +32,8 @@
#define CONFIG_SYS_SH_SDHI2_BASE 0xEE160000
#define CONFIG_SYS_SH_SDHI_NR_CHANNEL 3
+#define R8A7794_CUT_ES2 2
+#define IS_R8A7794_ES2() \
+ (rmobile_get_cpu_rev_integer() == R8A7794_CUT_ES2)
+
#endif /* __ASM_ARCH_R8A7794_H */
diff --git a/arch/arm/include/asm/arch-stm32f1/gpio.h b/arch/arm/include/asm/arch-stm32f1/gpio.h
new file mode 100644
index 0000000..6976e1f
--- /dev/null
+++ b/arch/arm/include/asm/arch-stm32f1/gpio.h
@@ -0,0 +1,118 @@
+/*
+ * (C) Copyright 2011
+ * Yuri Tikhonov, Emcraft Systems, yur@emcraft.com
+ *
+ * (C) Copyright 2015
+ * Kamil Lulko, <rev13@wp.pl>
+ *
+ * Copyright 2015 ATS Advanced Telematics Systems GmbH
+ * Copyright 2015 Konsulko Group, Matt Porter <mporter@konsulko.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef _STM32_GPIO_H_
+#define _STM32_GPIO_H_
+
+enum stm32_gpio_port {
+ STM32_GPIO_PORT_A = 0,
+ STM32_GPIO_PORT_B,
+ STM32_GPIO_PORT_C,
+ STM32_GPIO_PORT_D,
+ STM32_GPIO_PORT_E,
+ STM32_GPIO_PORT_F,
+ STM32_GPIO_PORT_G,
+};
+
+enum stm32_gpio_pin {
+ STM32_GPIO_PIN_0 = 0,
+ STM32_GPIO_PIN_1,
+ STM32_GPIO_PIN_2,
+ STM32_GPIO_PIN_3,
+ STM32_GPIO_PIN_4,
+ STM32_GPIO_PIN_5,
+ STM32_GPIO_PIN_6,
+ STM32_GPIO_PIN_7,
+ STM32_GPIO_PIN_8,
+ STM32_GPIO_PIN_9,
+ STM32_GPIO_PIN_10,
+ STM32_GPIO_PIN_11,
+ STM32_GPIO_PIN_12,
+ STM32_GPIO_PIN_13,
+ STM32_GPIO_PIN_14,
+ STM32_GPIO_PIN_15
+};
+
+enum stm32_gpio_icnf {
+ STM32_GPIO_ICNF_AN = 0,
+ STM32_GPIO_ICNF_IN_FLT,
+ STM32_GPIO_ICNF_IN_PUD,
+ STM32_GPIO_ICNF_RSVD
+};
+
+enum stm32_gpio_ocnf {
+ STM32_GPIO_OCNF_GP_PP = 0,
+ STM32_GPIO_OCNF_GP_OD,
+ STM32_GPIO_OCNF_AF_PP,
+ STM32_GPIO_OCNF_AF_OD
+};
+
+enum stm32_gpio_pupd {
+ STM32_GPIO_PUPD_DOWN = 0,
+ STM32_GPIO_PUPD_UP,
+};
+
+enum stm32_gpio_mode {
+ STM32_GPIO_MODE_IN = 0,
+ STM32_GPIO_MODE_OUT_10M,
+ STM32_GPIO_MODE_OUT_2M,
+ STM32_GPIO_MODE_OUT_50M
+};
+
+enum stm32_gpio_af {
+ STM32_GPIO_AF0 = 0,
+ STM32_GPIO_AF1,
+ STM32_GPIO_AF2,
+ STM32_GPIO_AF3,
+ STM32_GPIO_AF4,
+ STM32_GPIO_AF5,
+ STM32_GPIO_AF6,
+ STM32_GPIO_AF7,
+ STM32_GPIO_AF8,
+ STM32_GPIO_AF9,
+ STM32_GPIO_AF10,
+ STM32_GPIO_AF11,
+ STM32_GPIO_AF12,
+ STM32_GPIO_AF13,
+ STM32_GPIO_AF14,
+ STM32_GPIO_AF15
+};
+
+struct stm32_gpio_dsc {
+ enum stm32_gpio_port port;
+ enum stm32_gpio_pin pin;
+};
+
+struct stm32_gpio_ctl {
+ enum stm32_gpio_icnf icnf;
+ enum stm32_gpio_ocnf ocnf;
+ enum stm32_gpio_mode mode;
+ enum stm32_gpio_pupd pupd;
+ enum stm32_gpio_af af;
+};
+
+static inline unsigned stm32_gpio_to_port(unsigned gpio)
+{
+ return gpio / 16;
+}
+
+static inline unsigned stm32_gpio_to_pin(unsigned gpio)
+{
+ return gpio % 16;
+}
+
+int stm32_gpio_config(const struct stm32_gpio_dsc *gpio_dsc,
+ const struct stm32_gpio_ctl *gpio_ctl);
+int stm32_gpout_set(const struct stm32_gpio_dsc *gpio_dsc, int state);
+
+#endif /* _STM32_GPIO_H_ */
diff --git a/arch/arm/include/asm/arch-stm32f1/stm32.h b/arch/arm/include/asm/arch-stm32f1/stm32.h
new file mode 100644
index 0000000..686cb4f
--- /dev/null
+++ b/arch/arm/include/asm/arch-stm32f1/stm32.h
@@ -0,0 +1,116 @@
+/*
+ * (C) Copyright 2011
+ * Yuri Tikhonov, Emcraft Systems, yur@emcraft.com
+ *
+ * (C) Copyright 2015
+ * Kamil Lulko, <rev13@wp.pl>
+ *
+ * Copyright 2015 ATS Advanced Telematics Systems GmbH
+ * Copyright 2015 Konsulko Group, Matt Porter <mporter@konsulko.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef _MACH_STM32_H_
+#define _MACH_STM32_H_
+
+/*
+ * Peripheral memory map
+ */
+#define STM32_PERIPH_BASE 0x40000000
+#define STM32_APB1PERIPH_BASE (STM32_PERIPH_BASE + 0x00000000)
+#define STM32_APB2PERIPH_BASE (STM32_PERIPH_BASE + 0x00010000)
+#define STM32_AHB1PERIPH_BASE (STM32_PERIPH_BASE + 0x00018000)
+
+#define STM32_BUS_MASK 0xFFFF0000
+
+/*
+ * Register maps
+ */
+struct stm32_des_regs {
+ u16 flash_size;
+ u16 pad1;
+ u32 pad2;
+ u32 uid0;
+ u32 uid1;
+ u32 uid2;
+};
+
+struct stm32_rcc_regs {
+ u32 cr; /* RCC clock control */
+ u32 cfgr; /* RCC clock configuration */
+ u32 cir; /* RCC clock interrupt */
+ u32 apb2rstr; /* RCC APB2 peripheral reset */
+ u32 apb1rstr; /* RCC APB1 peripheral reset */
+ u32 ahbenr; /* RCC AHB peripheral clock enable */
+ u32 apb2enr; /* RCC APB2 peripheral clock enable */
+ u32 apb1enr; /* RCC APB1 peripheral clock enable */
+ u32 bdcr; /* RCC Backup domain control */
+ u32 csr; /* RCC clock control & status */
+};
+
+struct stm32_pwr_regs {
+ u32 cr;
+ u32 csr;
+};
+
+struct stm32_flash_regs {
+ u32 acr;
+ u32 keyr;
+ u32 optkeyr;
+ u32 sr;
+ u32 cr;
+ u32 ar;
+ u32 rsvd1; /* Reserved */
+ u32 obr;
+ u32 wrpr;
+ u32 rsvd2[8]; /* Reserved */
+ u32 keyr2;
+ u32 rsvd3;
+ u32 sr2;
+ u32 cr2;
+ u32 ar2;
+};
+
+/* Per bank register set for XL devices */
+struct stm32_flash_bank_regs {
+ u32 keyr;
+ u32 rsvd; /* Reserved */
+ u32 sr;
+ u32 cr;
+ u32 ar;
+};
+
+/*
+ * Registers access macros
+ */
+#define STM32_DES_BASE (0x1ffff7e0)
+#define STM32_DES ((struct stm32_des_regs *)STM32_DES_BASE)
+
+#define STM32_RCC_BASE (STM32_AHB1PERIPH_BASE + 0x9000)
+#define STM32_RCC ((struct stm32_rcc_regs *)STM32_RCC_BASE)
+
+#define STM32_PWR_BASE (STM32_APB1PERIPH_BASE + 0x7000)
+#define STM32_PWR ((struct stm32_pwr_regs *)STM32_PWR_BASE)
+
+#define STM32_FLASH_BASE (STM32_AHB1PERIPH_BASE + 0xa000)
+#define STM32_FLASH ((struct stm32_flash_regs *)STM32_FLASH_BASE)
+
+#define STM32_FLASH_SR_BSY (1 << 0)
+
+#define STM32_FLASH_CR_PG (1 << 0)
+#define STM32_FLASH_CR_PER (1 << 1)
+#define STM32_FLASH_CR_STRT (1 << 6)
+#define STM32_FLASH_CR_LOCK (1 << 7)
+
+enum clock {
+ CLOCK_CORE,
+ CLOCK_AHB,
+ CLOCK_APB1,
+ CLOCK_APB2
+};
+
+int configure_clocks(void);
+unsigned long clock_get(enum clock clck);
+
+#endif /* _MACH_STM32_H_ */
diff --git a/arch/arm/include/asm/arch-sunxi/clock_sun4i.h b/arch/arm/include/asm/arch-sunxi/clock_sun4i.h
index 63c3319..58aff16 100644
--- a/arch/arm/include/asm/arch-sunxi/clock_sun4i.h
+++ b/arch/arm/include/asm/arch-sunxi/clock_sun4i.h
@@ -39,7 +39,7 @@
u32 apb0_gate; /* 0x68 apb0 module clock gating */
u32 apb1_gate; /* 0x6c apb1 module clock gating */
u8 res4[0x10];
- u32 nand_sclk_cfg; /* 0x80 nand sub clock control */
+ u32 nand0_clk_cfg; /* 0x80 nand sub clock control */
u32 ms_sclk_cfg; /* 0x84 memory stick sub clock control */
u32 sd0_clk_cfg; /* 0x88 sd0 clock control */
u32 sd1_clk_cfg; /* 0x8c sd1 clock control */
@@ -177,7 +177,7 @@
#define AHB_GATE_OFFSET_ACE 16
#define AHB_GATE_OFFSET_DLL 15
#define AHB_GATE_OFFSET_SDRAM 14
-#define AHB_GATE_OFFSET_NAND 13
+#define AHB_GATE_OFFSET_NAND0 13
#define AHB_GATE_OFFSET_MS 12
#define AHB_GATE_OFFSET_MMC3 11
#define AHB_GATE_OFFSET_MMC2 10
diff --git a/arch/arm/include/asm/arch-sunxi/clock_sun6i.h b/arch/arm/include/asm/arch-sunxi/clock_sun6i.h
index 6465f21..8a26b9f 100644
--- a/arch/arm/include/asm/arch-sunxi/clock_sun6i.h
+++ b/arch/arm/include/asm/arch-sunxi/clock_sun6i.h
@@ -215,11 +215,14 @@
#define AHB_GATE_OFFSET_USB0 24
#define AHB_GATE_OFFSET_MCTL 14
#define AHB_GATE_OFFSET_GMAC 17
+#define AHB_GATE_OFFSET_NAND0 13
+#define AHB_GATE_OFFSET_NAND1 12
#define AHB_GATE_OFFSET_MMC3 11
#define AHB_GATE_OFFSET_MMC2 10
#define AHB_GATE_OFFSET_MMC1 9
#define AHB_GATE_OFFSET_MMC0 8
#define AHB_GATE_OFFSET_MMC(n) (AHB_GATE_OFFSET_MMC0 + (n))
+#define AHB_GATE_OFFSET_DMA 6
#define AHB_GATE_OFFSET_SS 5
/* ahb_gate1 offsets */
diff --git a/arch/arm/include/asm/arch-sunxi/clock_sun9i.h b/arch/arm/include/asm/arch-sunxi/clock_sun9i.h
index c506b0a..a61934f 100644
--- a/arch/arm/include/asm/arch-sunxi/clock_sun9i.h
+++ b/arch/arm/include/asm/arch-sunxi/clock_sun9i.h
@@ -42,7 +42,7 @@
u32 clk_output_b; /* 0x184 clk_output_a */
u8 reserved5[0x278]; /* 0x188 */
- u32 nand0_clk_cfg0; /* 0x400 nand0 clock configuration0 */
+ u32 nand0_clk_cfg; /* 0x400 nand0 clock configuration0 */
u32 nand0_clk_cfg1; /* 0x404 nand1 clock configuration */
u8 reserved6[0x08]; /* 0x408 */
u32 sd0_clk_cfg; /* 0x410 sd0 clock configuration */
@@ -113,8 +113,12 @@
/* ahb_gate0 fields */
/* On sun9i all sdc-s share their ahb gate, so ignore (x) */
+#define AHB_GATE_OFFSET_NAND0 13
#define AHB_GATE_OFFSET_MMC(x) 8
+/* ahb gate1 field */
+#define AHB_GATE_OFFSET_DMA 24
+
/* apb1_gate fields */
#define APB1_GATE_UART_SHIFT 16
#define APB1_GATE_UART_MASK (0xff << APB1_GATE_UART_SHIFT)
diff --git a/arch/arm/include/asm/arch-sunxi/dma.h b/arch/arm/include/asm/arch-sunxi/dma.h
new file mode 100644
index 0000000..e54a2ba
--- /dev/null
+++ b/arch/arm/include/asm/arch-sunxi/dma.h
@@ -0,0 +1,16 @@
+/*
+ * (C) Copyright 2015 Roy Spliet <rspliet@ultimaker.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef _SUNXI_DMA_H
+#define _SUNXI_DMA_H
+
+#if defined(CONFIG_MACH_SUN4I) || defined(CONFIG_MACH_SUN5I) || defined(CONFIG_MACH_SUN7I)
+#include <asm/arch/dma_sun4i.h>
+#else
+#error "DMA definition not available for this architecture"
+#endif
+
+#endif /* _SUNXI_DMA_H */
diff --git a/arch/arm/include/asm/arch-sunxi/dma_sun4i.h b/arch/arm/include/asm/arch-sunxi/dma_sun4i.h
new file mode 100644
index 0000000..778a04b
--- /dev/null
+++ b/arch/arm/include/asm/arch-sunxi/dma_sun4i.h
@@ -0,0 +1,68 @@
+/*
+ * (C) Copyright 2015 Roy Spliet <rspliet@ultimaker.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef _SUNXI_DMA_SUN4I_H
+#define _SUNXI_DMA_SUN4I_H
+
+struct sunxi_dma_cfg
+{
+ u32 ctl; /* 0x00 Control */
+ u32 src_addr; /* 0x04 Source address */
+ u32 dst_addr; /* 0x08 Destination address */
+ u32 bc; /* 0x0C Byte counter */
+ u32 res0[2];
+ u32 ddma_para; /* 0x18 extra parameter (dedicated DMA only) */
+ u32 res1;
+};
+
+struct sunxi_dma
+{
+ u32 irq_en; /* 0x000 IRQ enable */
+ u32 irq_pend; /* 0x004 IRQ pending */
+ u32 auto_gate; /* 0x008 auto gating */
+ u32 res0[61];
+ struct sunxi_dma_cfg ndma[8]; /* 0x100 Normal DMA */
+ u32 res1[64];
+ struct sunxi_dma_cfg ddma[8]; /* 0x300 Dedicated DMA */
+};
+
+enum ddma_drq_type {
+ DDMA_DST_DRQ_SRAM = 0,
+ DDMA_SRC_DRQ_SRAM = 0,
+ DDMA_DST_DRQ_SDRAM = 1,
+ DDMA_SRC_DRQ_SDRAM = 1,
+ DDMA_DST_DRQ_PATA = 2,
+ DDMA_SRC_DRQ_PATA = 2,
+ DDMA_DST_DRQ_NAND = 3,
+ DDMA_SRC_DRQ_NAND = 3,
+ DDMA_DST_DRQ_USB0 = 4,
+ DDMA_SRC_DRQ_USB0 = 4,
+ DDMA_DST_DRQ_ETHERNET_MAC_TX = 6,
+ DDMA_SRC_DRQ_ETHERNET_MAC_RX = 7,
+ DDMA_DST_DRQ_SPI1_TX = 8,
+ DDMA_SRC_DRQ_SPI1_RX = 9,
+ DDMA_DST_DRQ_SECURITY_SYS_TX = 10,
+ DDMA_SRC_DRQ_SECURITY_SYS_RX = 11,
+ DDMA_DST_DRQ_TCON0 = 14,
+ DDMA_DST_DRQ_TCON1 = 15,
+ DDMA_DST_DRQ_MSC = 23,
+ DDMA_SRC_DRQ_MSC = 23,
+ DDMA_DST_DRQ_SPI0_TX = 26,
+ DDMA_SRC_DRQ_SPI0_RX = 27,
+ DDMA_DST_DRQ_SPI2_TX = 28,
+ DDMA_SRC_DRQ_SPI2_RX = 29,
+ DDMA_DST_DRQ_SPI3_TX = 30,
+ DDMA_SRC_DRQ_SPI3_RX = 31,
+};
+
+#define SUNXI_DMA_CTL_SRC_DRQ(a) ((a) & 0x1f)
+#define SUNXI_DMA_CTL_MODE_IO (1 << 5)
+#define SUNXI_DMA_CTL_SRC_DATA_WIDTH_32 (2 << 9)
+#define SUNXI_DMA_CTL_DST_DRQ(a) (((a) & 0x1f) << 16)
+#define SUNXI_DMA_CTL_DST_DATA_WIDTH_32 (2 << 25)
+#define SUNXI_DMA_CTL_TRIGGER (1 << 31)
+
+#endif /* _SUNXI_DMA_SUN4I_H */
diff --git a/arch/arm/include/asm/arch-sunxi/gpio.h b/arch/arm/include/asm/arch-sunxi/gpio.h
index 148123a..b628fee 100644
--- a/arch/arm/include/asm/arch-sunxi/gpio.h
+++ b/arch/arm/include/asm/arch-sunxi/gpio.h
@@ -157,6 +157,8 @@
#define SUN5I_GPB_UART0 2
#define SUN8I_GPB_UART2 2
+#define SUNXI_GPC_NAND 2
+
#define SUNXI_GPC_SDC2 3
#define SUN6I_GPC_SDC3 4
@@ -185,6 +187,7 @@
#define SUN8I_GPH_TWI1 2
#define SUN6I_GPH_TWI2 2
#define SUN6I_GPH_UART0 2
+#define SUN9I_GPH_UART0 2
#define SUNXI_GPI_SDC3 2
#define SUN7I_GPI_TWI3 3
diff --git a/arch/arm/include/asm/arch-sunxi/nand.h b/arch/arm/include/asm/arch-sunxi/nand.h
new file mode 100644
index 0000000..22844d8
--- /dev/null
+++ b/arch/arm/include/asm/arch-sunxi/nand.h
@@ -0,0 +1,67 @@
+/*
+ * (C) Copyright 2015 Roy Spliet <rspliet@ultimaker.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef _SUNXI_NAND_H
+#define _SUNXI_NAND_H
+
+#include <linux/types.h>
+
+struct sunxi_nand
+{
+ u32 ctl; /* 0x000 Configure and control */
+ u32 st; /* 0x004 Status information */
+ u32 intr; /* 0x008 Interrupt control */
+ u32 timing_ctl; /* 0x00C Timing control */
+ u32 timing_cfg; /* 0x010 Timing configure */
+ u32 addr_low; /* 0x014 Low word address */
+ u32 addr_high; /* 0x018 High word address */
+ u32 block_num; /* 0x01C Data block number */
+ u32 data_cnt; /* 0x020 Data counter for transfer */
+ u32 cmd; /* 0x024 NDFC commands */
+ u32 rcmd_set; /* 0x028 Read command set for vendor NAND mem */
+ u32 wcmd_set; /* 0x02C Write command set */
+ u32 io_data; /* 0x030 IO data */
+ u32 ecc_ctl; /* 0x034 ECC configure and control */
+ u32 ecc_st; /* 0x038 ECC status and operation info */
+ u32 efr; /* 0x03C Enhanced feature */
+ u32 err_cnt0; /* 0x040 Corrected error bit counter 0 */
+ u32 err_cnt1; /* 0x044 Corrected error bit counter 1 */
+ u32 user_data[16]; /* 0x050[16] User data field */
+ u32 efnand_st; /* 0x090 EFNAND status */
+ u32 res0[3];
+ u32 spare_area; /* 0x0A0 Spare area configure */
+ u32 pat_id; /* 0x0A4 Pattern ID register */
+ u32 rdata_sta_ctl; /* 0x0A8 Read data status control */
+ u32 rdata_sta_0; /* 0x0AC Read data status 0 */
+ u32 rdata_sta_1; /* 0x0B0 Read data status 1 */
+ u32 res1[3];
+ u32 mdma_addr; /* 0x0C0 MBUS DMA Address */
+ u32 mdma_cnt; /* 0x0C4 MBUS DMA data counter */
+};
+
+#define SUNXI_NAND_CTL_EN (1 << 0)
+#define SUNXI_NAND_CTL_RST (1 << 1)
+#define SUNXI_NAND_CTL_PAGE_SIZE(a) ((fls(a) - 11) << 8)
+#define SUNXI_NAND_CTL_RAM_METHOD_DMA (1 << 14)
+
+#define SUNXI_NAND_ST_CMD_INT (1 << 1)
+#define SUNXI_NAND_ST_DMA_INT (1 << 2)
+#define SUNXI_NAND_ST_FIFO_FULL (1 << 3)
+
+#define SUNXI_NAND_CMD_ADDR_CYCLES(a) ((a - 1) << 16);
+#define SUNXI_NAND_CMD_SEND_CMD1 (1 << 22)
+#define SUNXI_NAND_CMD_WAIT_FLAG (1 << 23)
+#define SUNXI_NAND_CMD_ORDER_INTERLEAVE 0
+#define SUNXI_NAND_CMD_ORDER_SEQ (1 << 25)
+
+#define SUNXI_NAND_ECC_CTL_ECC_EN (1 << 0)
+#define SUNXI_NAND_ECC_CTL_PIPELINE (1 << 3)
+#define SUNXI_NAND_ECC_CTL_BS_512B (1 << 5)
+#define SUNXI_NAND_ECC_CTL_RND_EN (1 << 9)
+#define SUNXI_NAND_ECC_CTL_MODE(a) ((a) << 12)
+#define SUNXI_NAND_ECC_CTL_RND_SEED(a) ((a) << 16)
+
+#endif /* _SUNXI_NAND_H */
diff --git a/arch/arm/lib/Makefile b/arch/arm/lib/Makefile
index 0e1ad0e..31a5c8d 100644
--- a/arch/arm/lib/Makefile
+++ b/arch/arm/lib/Makefile
@@ -26,6 +26,7 @@
obj-y += board.o
endif
+obj-$(CONFIG_CPU_V7M) += cmd_boot.o
obj-$(CONFIG_OF_LIBFDT) += bootm-fdt.o
obj-$(CONFIG_CMD_BOOTM) += bootm.o
obj-$(CONFIG_SYS_L2_PL310) += cache-pl310.o
diff --git a/arch/arm/lib/cmd_boot.c b/arch/arm/lib/cmd_boot.c
new file mode 100644
index 0000000..37bb6a5
--- /dev/null
+++ b/arch/arm/lib/cmd_boot.c
@@ -0,0 +1,44 @@
+/*
+ * (C) Copyright 2008-2011
+ * Graeme Russ, <graeme.russ@gmail.com>
+ *
+ * (C) Copyright 2002
+ * Daniel Engström, Omicron Ceti AB, <daniel@omicron.se>
+ *
+ * (C) Copyright 2002
+ * Wolfgang Denk, DENX Software Engineering, <wd@denx.de>
+ *
+ * (C) Copyright 2002
+ * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
+ * Marius Groeger <mgroeger@sysgo.de>
+ *
+ * Copyright 2015 ATS Advanced Telematics Systems GmbH
+ * Copyright 2015 Konsulko Group, Matt Porter <mporter@konsulko.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <command.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/*
+ * ARMv7M does not support ARM instruction mode. However, the
+ * interworking BLX and BX instructions do encode the ARM/Thumb
+ * field in bit 0. This means that when executing any Branch
+ * and eXchange instruction we must set bit 0 to one to guarantee
+ * that we keep the processor in Thumb instruction mode. From The
+ * ARMv7-M Instruction Set A4.1.1:
+ * "ARMv7-M only supports the Thumb instruction execution state,
+ * therefore the value of address bit [0] must be 1 in interworking
+ * instructions, otherwise a fault occurs."
+ */
+unsigned long do_go_exec(ulong (*entry)(int, char * const []),
+ int argc, char * const argv[])
+{
+ ulong addr = (ulong)entry | 1;
+ entry = (void *)addr;
+
+ return entry(argc, argv);
+}
diff --git a/arch/arm/mach-bcm283x/Makefile b/arch/arm/mach-bcm283x/Makefile
index ac27d00..f0dadd0 100644
--- a/arch/arm/mach-bcm283x/Makefile
+++ b/arch/arm/mach-bcm283x/Makefile
@@ -5,4 +5,4 @@
#
obj-$(CONFIG_TARGET_RPI) += lowlevel_init.o
-obj-y += init.o reset.o timer.o mbox.o phys2bus.o
+obj-y += init.o reset.o mbox.o phys2bus.o
diff --git a/arch/arm/mach-bcm283x/include/mach/timer.h b/arch/arm/mach-bcm283x/include/mach/timer.h
index fc7aec7..004c24b 100644
--- a/arch/arm/mach-bcm283x/include/mach/timer.h
+++ b/arch/arm/mach-bcm283x/include/mach/timer.h
@@ -13,6 +13,14 @@
#define BCM2835_TIMER_PHYSADDR 0x20003000
#endif
+#define BCM2835_TIMER_CS_M3 (1 << 3)
+#define BCM2835_TIMER_CS_M2 (1 << 2)
+#define BCM2835_TIMER_CS_M1 (1 << 1)
+#define BCM2835_TIMER_CS_M0 (1 << 0)
+
+#ifndef __ASSEMBLY__
+#include <linux/types.h>
+
struct bcm2835_timer_regs {
u32 cs;
u32 clo;
@@ -23,11 +31,8 @@
u32 c3;
};
-#define BCM2835_TIMER_CS_M3 (1 << 3)
-#define BCM2835_TIMER_CS_M2 (1 << 2)
-#define BCM2835_TIMER_CS_M1 (1 << 1)
-#define BCM2835_TIMER_CS_M0 (1 << 0)
-
extern ulong get_timer_us(ulong base);
#endif
+
+#endif
diff --git a/arch/arm/mach-bcm283x/include/mach/wdog.h b/arch/arm/mach-bcm283x/include/mach/wdog.h
index beb6a08..cbc350e 100644
--- a/arch/arm/mach-bcm283x/include/mach/wdog.h
+++ b/arch/arm/mach-bcm283x/include/mach/wdog.h
@@ -4,8 +4,8 @@
* SPDX-License-Identifier: GPL-2.0
*/
-#ifndef _BCM2835_TIMER_H
-#define _BCM2835_TIMER_H
+#ifndef _BCM2835_WDOG_H
+#define _BCM2835_WDOG_H
#ifdef CONFIG_BCM2836
#define BCM2835_WDOG_PHYSADDR 0x3f100000
diff --git a/arch/arm/mach-bcm283x/timer.c b/arch/arm/mach-bcm283x/timer.c
deleted file mode 100644
index 017907c..0000000
--- a/arch/arm/mach-bcm283x/timer.c
+++ /dev/null
@@ -1,58 +0,0 @@
-/*
- * (C) Copyright 2012 Stephen Warren
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * version 2 as published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#include <common.h>
-#include <asm/io.h>
-#include <asm/arch/timer.h>
-
-ulong get_timer_us(ulong base)
-{
- struct bcm2835_timer_regs *regs =
- (struct bcm2835_timer_regs *)BCM2835_TIMER_PHYSADDR;
-
- return readl(®s->clo) - base;
-}
-
-ulong get_timer(ulong base)
-{
- ulong us = get_timer_us(0);
- us /= (1000000 / CONFIG_SYS_HZ);
- us -= base;
- return us;
-}
-
-unsigned long long get_ticks(void)
-{
- return get_timer(0);
-}
-
-ulong get_tbclk(void)
-{
- return CONFIG_SYS_HZ;
-}
-
-void __udelay(unsigned long usec)
-{
- ulong endtime;
- signed long diff;
-
- endtime = get_timer_us(0) + usec;
-
- do {
- ulong now = get_timer_us(0);
- diff = endtime - now;
- } while (diff >= 0);
-}
diff --git a/arch/arm/mach-uniphier/Kconfig b/arch/arm/mach-uniphier/Kconfig
index 2d27c49..feda49e 100644
--- a/arch/arm/mach-uniphier/Kconfig
+++ b/arch/arm/mach-uniphier/Kconfig
@@ -1,5 +1,4 @@
-menu "Panasonic UniPhier platform"
- depends on ARCH_UNIPHIER
+if ARCH_UNIPHIER
config SYS_CONFIG_NAME
default "uniphier"
@@ -9,7 +8,7 @@
choice
prompt "UniPhier SoC select"
- optional
+ default MACH_PH1_PRO4
config MACH_PH1_PRO4
bool "PH1-Pro4"
@@ -78,4 +77,4 @@
default 1333 if DDR_FREQ_1333
default 1600 if DDR_FREQ_1600
-endmenu
+endif
diff --git a/arch/arm/mach-uniphier/board_late_init.c b/arch/arm/mach-uniphier/board_late_init.c
index 0622a1e..a7530eb 100644
--- a/arch/arm/mach-uniphier/board_late_init.c
+++ b/arch/arm/mach-uniphier/board_late_init.c
@@ -1,6 +1,5 @@
/*
- * Copyright (C) 2014 Panasonic Corporation
- * Author: Masahiro Yamada <yamada.m@jp.panasonic.com>
+ * Copyright (C) 2014-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
@@ -8,7 +7,7 @@
#include <common.h>
#include <spl.h>
#include <nand.h>
-#include <asm/io.h>
+#include <linux/io.h>
#include <../drivers/mtd/nand/denali.h>
static void nand_denali_wp_disable(void)
diff --git a/arch/arm/mach-uniphier/cache_uniphier.c b/arch/arm/mach-uniphier/cache_uniphier.c
index d8b8228..bf85ad6 100644
--- a/arch/arm/mach-uniphier/cache_uniphier.c
+++ b/arch/arm/mach-uniphier/cache_uniphier.c
@@ -1,13 +1,11 @@
/*
- * Copyright (C) 2012-2014 Panasonic Corporation
- * Copyright (C) 2015 Socionext Inc.
- * Author: Masahiro Yamada <yamada.masahiro@socionext.com>
+ * Copyright (C) 2012-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
-#include <asm/io.h>
+#include <linux/io.h>
#include <asm/armv7.h>
#include <mach/ssc-regs.h>
diff --git a/arch/arm/mach-uniphier/cmd_ddrphy.c b/arch/arm/mach-uniphier/cmd_ddrphy.c
index 5f44927..dbbefd4 100644
--- a/arch/arm/mach-uniphier/cmd_ddrphy.c
+++ b/arch/arm/mach-uniphier/cmd_ddrphy.c
@@ -1,12 +1,11 @@
/*
- * Copyright (C) 2014 Panasonic Corporation
- * Author: Masahiro Yamada <yamada.m@jp.panasonic.com>
+ * Copyright (C) 2014-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
-#include <asm/io.h>
+#include <linux/io.h>
#include <mach/ddrphy-regs.h>
/* Select either decimal or hexadecimal */
diff --git a/arch/arm/mach-uniphier/cpu_info.c b/arch/arm/mach-uniphier/cpu_info.c
index 13a0b1e..c4ba6d2 100644
--- a/arch/arm/mach-uniphier/cpu_info.c
+++ b/arch/arm/mach-uniphier/cpu_info.c
@@ -1,12 +1,11 @@
/*
- * Copyright (C) 2013-2014 Panasonic Corporation
- * Author: Masahiro Yamada <yamada.m@jp.panasonic.com>
+ * Copyright (C) 2013-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
-#include <asm/io.h>
+#include <linux/io.h>
#include <mach/sg-regs.h>
int print_cpuinfo(void)
diff --git a/arch/arm/mach-uniphier/ddrphy_training.c b/arch/arm/mach-uniphier/ddrphy_training.c
index b1d46cf..a98b814 100644
--- a/arch/arm/mach-uniphier/ddrphy_training.c
+++ b/arch/arm/mach-uniphier/ddrphy_training.c
@@ -1,12 +1,11 @@
/*
- * Copyright (C) 2011-2014 Panasonic Corporation
- * Author: Masahiro Yamada <yamada.m@jp.panasonic.com>
+ * Copyright (C) 2011-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
-#include <asm/io.h>
+#include <linux/io.h>
#include <mach/ddrphy-regs.h>
void ddrphy_prepare_training(struct ddrphy __iomem *phy, int rank)
@@ -116,10 +115,8 @@
do {
if (--timeout < 0) {
-#ifndef CONFIG_SPL_BUILD
printf("%s: error: timeout during DDR training\n",
__func__);
-#endif
return -1;
}
udelay(1);
@@ -128,10 +125,8 @@
for (i = 0; i < ARRAY_SIZE(init_sequence); i++) {
if (pgsr0 & init_sequence[i].err_flag) {
-#ifndef CONFIG_SPL_BUILD
printf("%s: error: %s failed\n", __func__,
init_sequence[i].description);
-#endif
return -1;
}
}
diff --git a/arch/arm/mach-uniphier/include/mach/ddrphy-regs.h b/arch/arm/mach-uniphier/include/mach/ddrphy-regs.h
index 6b7d600..fce0c01 100644
--- a/arch/arm/mach-uniphier/include/mach/ddrphy-regs.h
+++ b/arch/arm/mach-uniphier/include/mach/ddrphy-regs.h
@@ -1,8 +1,7 @@
/*
* UniPhier DDR PHY registers
*
- * Copyright (C) 2014 Panasonic Corporation
- * Author: Masahiro Yamada <yamada.m@jp.panasonic.com>
+ * Copyright (C) 2014-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
@@ -37,7 +36,10 @@
u32 dtar[4]; /* Data Training Address Register */
u32 dtdr[2]; /* Data Training Data Register */
u32 dtedr[2]; /* Data Training Eye Data Register */
- u32 rsv0[13]; /* Reserved */
+ u32 pgcr2; /* PHY General Configuration Register 2 */
+ u32 rsv0[8]; /* Reserved */
+ u32 rdimmgcr[2]; /* RDIMM General Configuration Register */
+ u32 rdimmcr0[2]; /* RDIMM Control Register */
u32 dcuar; /* DCU Address Register */
u32 dcudr; /* DCU Data Register */
u32 dcurr; /* DCU Run Register */
@@ -70,7 +72,8 @@
u32 lcdlr[3]; /* Local Calibrated Delay Line Register */
u32 mdlr; /* Master Delay Line Register */
u32 gtr; /* General Timing Register */
- u32 rsv[3]; /* Reserved */
+ u32 gsr2; /* General Status Register 2 */
+ u32 rsv[2]; /* Reserved */
} dx[9];
};
diff --git a/arch/arm/mach-uniphier/include/mach/debug-uart.S b/arch/arm/mach-uniphier/include/mach/debug-uart.S
index af55fee..d2b431f 100644
--- a/arch/arm/mach-uniphier/include/mach/debug-uart.S
+++ b/arch/arm/mach-uniphier/include/mach/debug-uart.S
@@ -1,6 +1,5 @@
/*
- * Copyright (C) 2014 Panasonic Corporation
- * Author: Masahiro Yamada <yamada.m@jp.panasonic.com>
+ * Copyright (C) 2014-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
@@ -17,8 +16,8 @@
.macro init_debug_uart, ra, rb, rc
addruart \ra, \rb, \rc
- mov \rb, #UART_LCR_WLEN8
- strb \rb, [\ra, #0x11]
+ mov \rb, #UART_LCR_WLEN8 << 8
+ str \rb, [\ra, #0x10]
ldr \rb, =DIVISOR
str \rb, [\ra, #0x24]
.endm
diff --git a/arch/arm/mach-uniphier/include/mach/led.h b/arch/arm/mach-uniphier/include/mach/led.h
index 21277da..f7749b4 100644
--- a/arch/arm/mach-uniphier/include/mach/led.h
+++ b/arch/arm/mach-uniphier/include/mach/led.h
@@ -1,6 +1,5 @@
/*
- * Copyright (C) 2012-2014 Panasonic Corporation
- * Author: Masahiro Yamada <yamada.m@jp.panasonic.com>
+ * Copyright (C) 2012-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
@@ -77,7 +76,7 @@
#else /* __ASSEMBLY__ */
-#include <asm/io.h>
+#include <linux/io.h>
#define led_write(C0, C1, C2, C3) \
do { \
diff --git a/arch/arm/mach-uniphier/include/mach/sbc-regs.h b/arch/arm/mach-uniphier/include/mach/sbc-regs.h
index efb68e8..493363b 100644
--- a/arch/arm/mach-uniphier/include/mach/sbc-regs.h
+++ b/arch/arm/mach-uniphier/include/mach/sbc-regs.h
@@ -1,7 +1,7 @@
/*
* UniPhier SBC (System Bus Controller) registers
*
- * Copyright (C) 2011-2014 Panasonic Corporation
+ * Copyright (C) 2011-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
@@ -99,7 +99,7 @@
#define ROM_BOOT_ROMRSV2 0x59801208
#ifndef __ASSEMBLY__
-#include <asm/io.h>
+#include <linux/io.h>
static inline int boot_is_swapped(void)
{
return !(readl(SBBASE0) & SBBASE_BANK_ENABLE);
diff --git a/arch/arm/mach-uniphier/include/mach/sg-regs.h b/arch/arm/mach-uniphier/include/mach/sg-regs.h
index 63408d5..a65f058 100644
--- a/arch/arm/mach-uniphier/include/mach/sg-regs.h
+++ b/arch/arm/mach-uniphier/include/mach/sg-regs.h
@@ -1,7 +1,7 @@
/*
* UniPhier SG (SoC Glue) block registers
*
- * Copyright (C) 2011-2015 Panasonic Corporation
+ * Copyright (C) 2011-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
@@ -108,7 +108,7 @@
#else
#include <linux/types.h>
-#include <asm/io.h>
+#include <linux/io.h>
static inline void sg_set_pinsel(int n, int value)
{
diff --git a/arch/arm/mach-uniphier/lowlevel_init.S b/arch/arm/mach-uniphier/lowlevel_init.S
index 825b160..fd34a4a 100644
--- a/arch/arm/mach-uniphier/lowlevel_init.S
+++ b/arch/arm/mach-uniphier/lowlevel_init.S
@@ -1,7 +1,5 @@
/*
- * Copyright (C) 2012-2015 Panasonic Corporation
- * Copyright (C) 2015 Socionext Inc.
- * Author: Masahiro Yamada <yamada.masahiro@socionext.com>
+ * Copyright (C) 2012-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
@@ -67,20 +65,6 @@
* jump to Linux
* kick secondaries ---(sev)---> jump to Linux
*/
- /*
- * ACTLR (Auxiliary Control Register) for Cortex-A9
- * bit[9] Parity on
- * bit[8] Alloc in one way
- * bit[7] EXCL (Exclusive cache bit)
- * bit[6] SMP
- * bit[3] Write full line of zeros mode
- * bit[2] L1 prefetch enable
- * bit[1] L2 prefetch enable
- * bit[0] FW (Cache and TLB maintenance broadcast)
- */
- mrc p15, 0, r0, c1, c0, 1 @ ACTLR (Auxiliary Control Register)
- orr r0, r0, #0x41 @ enable SMP, FW bit
- mcr p15, 0, r0, c1, c0, 1
/* branch by CPU ID */
mrc p15, 0, r0, c0, c0, 5 @ MPIDR (Multiprocessor Affinity Register)
@@ -112,12 +96,6 @@
str r0, [r1]
ldr r0, [r1] @ make sure str is complete before sev
sev @ kick the secondary CPU
- mrc p15, 4, r1, c15, c0, 0 @ Configuration Base Address Register
- bfc r1, #0, #13 @ clear bit 12-0
- mov r0, #-1
- str r0, [r1, #SCU_INV_ALL] @ SCU Invalidate All Register
- mov r0, #1 @ SCU enable
- str r0, [r1, #SCU_CTRL] @ SCU Control Register
#endif
bl setup_init_ram @ RAM area for temporary stack pointer
diff --git a/arch/arm/mach-uniphier/memconf.c b/arch/arm/mach-uniphier/memconf.c
index bf3c177..59ed0b5 100644
--- a/arch/arm/mach-uniphier/memconf.c
+++ b/arch/arm/mach-uniphier/memconf.c
@@ -1,13 +1,12 @@
/*
- * Copyright (C) 2011-2015 Panasonic Corporation
- * Author: Masahiro Yamada <yamada.m@jp.panasonic.com>
+ * Copyright (C) 2011-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include <linux/sizes.h>
-#include <asm/io.h>
+#include <linux/io.h>
#include <mach/sg-regs.h>
static inline u32 sg_memconf_val_ch0(unsigned long size, int num)
diff --git a/arch/arm/mach-uniphier/ph1-ld4/bcu_init.c b/arch/arm/mach-uniphier/ph1-ld4/bcu_init.c
index 837e0d1..a7bc15e 100644
--- a/arch/arm/mach-uniphier/ph1-ld4/bcu_init.c
+++ b/arch/arm/mach-uniphier/ph1-ld4/bcu_init.c
@@ -1,12 +1,11 @@
/*
- * Copyright (C) 2011-2014 Panasonic Corporation
- * Author: Masahiro Yamada <yamada.m@jp.panasonic.com>
+ * Copyright (C) 2011-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
-#include <asm/io.h>
+#include <linux/io.h>
#include <mach/bcu-regs.h>
#define ch(x) ((x) >= 32 ? 0 : (x) < 0 ? 0x11111111 : 0x11111111 << (x))
diff --git a/arch/arm/mach-uniphier/ph1-ld4/clkrst_init.c b/arch/arm/mach-uniphier/ph1-ld4/clkrst_init.c
index 4ac5411..2de81f0 100644
--- a/arch/arm/mach-uniphier/ph1-ld4/clkrst_init.c
+++ b/arch/arm/mach-uniphier/ph1-ld4/clkrst_init.c
@@ -1,11 +1,10 @@
/*
- * Copyright (C) 2011-2015 Panasonic Corporation
- * Author: Masahiro Yamada <yamada.m@jp.panasonic.com>
+ * Copyright (C) 2011-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
-#include <asm/io.h>
+#include <linux/io.h>
#include <mach/sc-regs.h>
void clkrst_init(void)
diff --git a/arch/arm/mach-uniphier/ph1-ld4/ddrphy_init.c b/arch/arm/mach-uniphier/ph1-ld4/ddrphy_init.c
index a47e87a..2add8fa 100644
--- a/arch/arm/mach-uniphier/ph1-ld4/ddrphy_init.c
+++ b/arch/arm/mach-uniphier/ph1-ld4/ddrphy_init.c
@@ -1,11 +1,11 @@
/*
- * Copyright (C) 2014 Panasonic Corporation
+ * Copyright (C) 2014-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <linux/types.h>
-#include <asm/io.h>
+#include <linux/io.h>
#include <mach/ddrphy-regs.h>
void ddrphy_init(struct ddrphy __iomem *phy, int freq, int size)
diff --git a/arch/arm/mach-uniphier/ph1-ld4/pinctrl.c b/arch/arm/mach-uniphier/ph1-ld4/pinctrl.c
index 3074d0a..20cc7b3 100644
--- a/arch/arm/mach-uniphier/ph1-ld4/pinctrl.c
+++ b/arch/arm/mach-uniphier/ph1-ld4/pinctrl.c
@@ -1,11 +1,10 @@
/*
- * Copyright (C) 2011-2015 Panasonic Corporation
- * Copyright (C) 2015 Socionext Inc.
+ * Copyright (C) 2011-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
-#include <asm/io.h>
+#include <linux/io.h>
#include <mach/sg-regs.h>
void pin_init(void)
diff --git a/arch/arm/mach-uniphier/ph1-ld4/pll_init.c b/arch/arm/mach-uniphier/ph1-ld4/pll_init.c
index 985e14f..f8ec2b6 100644
--- a/arch/arm/mach-uniphier/ph1-ld4/pll_init.c
+++ b/arch/arm/mach-uniphier/ph1-ld4/pll_init.c
@@ -1,11 +1,11 @@
/*
- * Copyright (C) 2011-2014 Panasonic Corporation
+ * Copyright (C) 2011-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
-#include <asm/io.h>
+#include <linux/io.h>
#include <mach/sc-regs.h>
#include <mach/sg-regs.h>
diff --git a/arch/arm/mach-uniphier/ph1-ld4/sbc_init.c b/arch/arm/mach-uniphier/ph1-ld4/sbc_init.c
index 00f8461..8e25792 100644
--- a/arch/arm/mach-uniphier/ph1-ld4/sbc_init.c
+++ b/arch/arm/mach-uniphier/ph1-ld4/sbc_init.c
@@ -1,12 +1,11 @@
/*
- * Copyright (C) 2011-2015 Panasonic Corporation
- * Author: Masahiro Yamada <yamada.m@jp.panasonic.com>
+ * Copyright (C) 2011-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
-#include <asm/io.h>
+#include <linux/io.h>
#include <mach/sbc-regs.h>
#include <mach/sg-regs.h>
diff --git a/arch/arm/mach-uniphier/ph1-ld4/sbc_init_3cs.c b/arch/arm/mach-uniphier/ph1-ld4/sbc_init_3cs.c
index 374a8c0..5b5958b 100644
--- a/arch/arm/mach-uniphier/ph1-ld4/sbc_init_3cs.c
+++ b/arch/arm/mach-uniphier/ph1-ld4/sbc_init_3cs.c
@@ -1,12 +1,11 @@
/*
- * Copyright (C) 2011-2015 Panasonic Corporation
- * Author: Masahiro Yamada <yamada.m@jp.panasonic.com>
+ * Copyright (C) 2011-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
-#include <asm/io.h>
+#include <linux/io.h>
#include <mach/sbc-regs.h>
#include <mach/sg-regs.h>
diff --git a/arch/arm/mach-uniphier/ph1-ld4/sg_init.c b/arch/arm/mach-uniphier/ph1-ld4/sg_init.c
index 93e44af..dab56e9 100644
--- a/arch/arm/mach-uniphier/ph1-ld4/sg_init.c
+++ b/arch/arm/mach-uniphier/ph1-ld4/sg_init.c
@@ -1,11 +1,10 @@
/*
- * Copyright (C) 2011-2015 Panasonic Corporation
- * Author: Masahiro Yamada <yamada.m@jp.panasonic.com>
+ * Copyright (C) 2011-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
-#include <asm/io.h>
+#include <linux/io.h>
#include <mach/sg-regs.h>
void sg_init(void)
diff --git a/arch/arm/mach-uniphier/ph1-ld4/umc_init.c b/arch/arm/mach-uniphier/ph1-ld4/umc_init.c
index 081b028..a7a4157 100644
--- a/arch/arm/mach-uniphier/ph1-ld4/umc_init.c
+++ b/arch/arm/mach-uniphier/ph1-ld4/umc_init.c
@@ -1,11 +1,11 @@
/*
- * Copyright (C) 2011-2014 Panasonic Corporation
+ * Copyright (C) 2011-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
-#include <asm/io.h>
+#include <linux/io.h>
#include <mach/umc-regs.h>
#include <mach/ddrphy-regs.h>
diff --git a/arch/arm/mach-uniphier/ph1-pro4/boot-mode.c b/arch/arm/mach-uniphier/ph1-pro4/boot-mode.c
index 9894c1a..54a2510 100644
--- a/arch/arm/mach-uniphier/ph1-pro4/boot-mode.c
+++ b/arch/arm/mach-uniphier/ph1-pro4/boot-mode.c
@@ -1,13 +1,12 @@
/*
- * Copyright (C) 2014 Panasonic Corporation
- * Author: Masahiro Yamada <yamada.m@jp.panasonic.com>
+ * Copyright (C) 2014-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include <spl.h>
-#include <asm/io.h>
+#include <linux/io.h>
#include <mach/boot-device.h>
#include <mach/sg-regs.h>
#include <mach/sbc-regs.h>
diff --git a/arch/arm/mach-uniphier/ph1-pro4/clkrst_init.c b/arch/arm/mach-uniphier/ph1-pro4/clkrst_init.c
index 054efa6..46cace7 100644
--- a/arch/arm/mach-uniphier/ph1-pro4/clkrst_init.c
+++ b/arch/arm/mach-uniphier/ph1-pro4/clkrst_init.c
@@ -1,11 +1,10 @@
/*
- * Copyright (C) 2011-2015 Panasonic Corporation
- * Author: Masahiro Yamada <yamada.m@jp.panasonic.com>
+ * Copyright (C) 2011-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
-#include <asm/io.h>
+#include <linux/io.h>
#include <mach/sc-regs.h>
void clkrst_init(void)
diff --git a/arch/arm/mach-uniphier/ph1-pro4/ddrphy_init.c b/arch/arm/mach-uniphier/ph1-pro4/ddrphy_init.c
index 7df5aea..61ddcf4 100644
--- a/arch/arm/mach-uniphier/ph1-pro4/ddrphy_init.c
+++ b/arch/arm/mach-uniphier/ph1-pro4/ddrphy_init.c
@@ -1,11 +1,11 @@
/*
- * Copyright (C) 2014 Panasonic Corporation
+ * Copyright (C) 2014-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <linux/types.h>
-#include <asm/io.h>
+#include <linux/io.h>
#include <mach/ddrphy-regs.h>
void ddrphy_init(struct ddrphy __iomem *phy, int freq, int size)
diff --git a/arch/arm/mach-uniphier/ph1-pro4/early_clkrst_init.c b/arch/arm/mach-uniphier/ph1-pro4/early_clkrst_init.c
index 37bb79e..60204b5 100644
--- a/arch/arm/mach-uniphier/ph1-pro4/early_clkrst_init.c
+++ b/arch/arm/mach-uniphier/ph1-pro4/early_clkrst_init.c
@@ -1,13 +1,12 @@
/*
- * Copyright (C) 2011-2015 Panasonic Corporation
- * Author: Masahiro Yamada <yamada.m@jp.panasonic.com>
+ * Copyright (C) 2011-2015 Masahiro Yamada <yamada.m@jp.panasonic.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include <spl.h>
-#include <asm/io.h>
+#include <linux/io.h>
#include <mach/sc-regs.h>
void early_clkrst_init(void)
diff --git a/arch/arm/mach-uniphier/ph1-pro4/early_pinctrl.c b/arch/arm/mach-uniphier/ph1-pro4/early_pinctrl.c
index 85bb6a0..e78d6ab 100644
--- a/arch/arm/mach-uniphier/ph1-pro4/early_pinctrl.c
+++ b/arch/arm/mach-uniphier/ph1-pro4/early_pinctrl.c
@@ -1,11 +1,10 @@
/*
- * Copyright (C) 2011-2015 Panasonic Corporation
- * Copyright (C) 2015 Socionext Inc.
+ * Copyright (C) 2011-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
-#include <asm/io.h>
+#include <linux/io.h>
#include <mach/sg-regs.h>
void early_pin_init(void)
diff --git a/arch/arm/mach-uniphier/ph1-pro4/pinctrl.c b/arch/arm/mach-uniphier/ph1-pro4/pinctrl.c
index 4df9098..2a5a296 100644
--- a/arch/arm/mach-uniphier/ph1-pro4/pinctrl.c
+++ b/arch/arm/mach-uniphier/ph1-pro4/pinctrl.c
@@ -1,11 +1,10 @@
/*
- * Copyright (C) 2011-2015 Panasonic Corporation
- * Copyright (C) 2015 Socionext Inc.
+ * Copyright (C) 2011-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
-#include <asm/io.h>
+#include <linux/io.h>
#include <mach/sg-regs.h>
void pin_init(void)
@@ -28,6 +27,8 @@
sg_set_pinsel(52, 0); /* XNFWP -> XNFWP */
sg_set_pinsel(53, 0); /* XNFCE0 -> XNFCE0 */
sg_set_pinsel(54, 0); /* NRYBY0 -> NRYBY0 */
+ /* sg_set_pinsel(131, 1); */ /* RXD2 -> NRYBY1 */
+ /* sg_set_pinsel(132, 1); */ /* TXD2 -> XNFCE1 */
#endif
#ifdef CONFIG_USB_XHCI_UNIPHIER
diff --git a/arch/arm/mach-uniphier/ph1-pro4/pll_init.c b/arch/arm/mach-uniphier/ph1-pro4/pll_init.c
index 2a965a5..d693368 100644
--- a/arch/arm/mach-uniphier/ph1-pro4/pll_init.c
+++ b/arch/arm/mach-uniphier/ph1-pro4/pll_init.c
@@ -1,11 +1,11 @@
/*
- * Copyright (C) 2011-2014 Panasonic Corporation
+ * Copyright (C) 2011-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
-#include <asm/io.h>
+#include <linux/io.h>
#include <mach/sc-regs.h>
#include <mach/sg-regs.h>
diff --git a/arch/arm/mach-uniphier/ph1-pro4/pll_spectrum.c b/arch/arm/mach-uniphier/ph1-pro4/pll_spectrum.c
index ff9c73f..fcf2ad2 100644
--- a/arch/arm/mach-uniphier/ph1-pro4/pll_spectrum.c
+++ b/arch/arm/mach-uniphier/ph1-pro4/pll_spectrum.c
@@ -1,11 +1,11 @@
/*
- * Copyright (C) 2011-2014 Panasonic Corporation
+ * Copyright (C) 2011-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
-#include <asm/io.h>
+#include <linux/io.h>
#include <mach/sc-regs.h>
void enable_dpll_ssc(void)
diff --git a/arch/arm/mach-uniphier/ph1-pro4/sbc_init.c b/arch/arm/mach-uniphier/ph1-pro4/sbc_init.c
index 5e75454..533739c 100644
--- a/arch/arm/mach-uniphier/ph1-pro4/sbc_init.c
+++ b/arch/arm/mach-uniphier/ph1-pro4/sbc_init.c
@@ -1,12 +1,11 @@
/*
- * Copyright (C) 2011-2015 Panasonic Corporation
- * Author: Masahiro Yamada <yamada.m@jp.panasonic.com>
+ * Copyright (C) 2011-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
-#include <asm/io.h>
+#include <linux/io.h>
#include <mach/sbc-regs.h>
#include <mach/sg-regs.h>
diff --git a/arch/arm/mach-uniphier/ph1-pro4/sbc_init_3cs.c b/arch/arm/mach-uniphier/ph1-pro4/sbc_init_3cs.c
index 67e6d82..877ba79 100644
--- a/arch/arm/mach-uniphier/ph1-pro4/sbc_init_3cs.c
+++ b/arch/arm/mach-uniphier/ph1-pro4/sbc_init_3cs.c
@@ -1,12 +1,11 @@
/*
- * Copyright (C) 2011-2015 Panasonic Corporation
- * Author: Masahiro Yamada <yamada.m@jp.panasonic.com>
+ * Copyright (C) 2011-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
-#include <asm/io.h>
+#include <linux/io.h>
#include <mach/sbc-regs.h>
#include <mach/sg-regs.h>
diff --git a/arch/arm/mach-uniphier/ph1-pro4/sg_init.c b/arch/arm/mach-uniphier/ph1-pro4/sg_init.c
index 8677666..d6ccffb 100644
--- a/arch/arm/mach-uniphier/ph1-pro4/sg_init.c
+++ b/arch/arm/mach-uniphier/ph1-pro4/sg_init.c
@@ -1,11 +1,10 @@
/*
- * Copyright (C) 2011-2015 Panasonic Corporation
- * Author: Masahiro Yamada <yamada.m@jp.panasonic.com>
+ * Copyright (C) 2011-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
-#include <asm/io.h>
+#include <linux/io.h>
#include <mach/sg-regs.h>
void sg_init(void)
diff --git a/arch/arm/mach-uniphier/ph1-pro4/umc_init.c b/arch/arm/mach-uniphier/ph1-pro4/umc_init.c
index 6cbb6b2..bd8b9d8 100644
--- a/arch/arm/mach-uniphier/ph1-pro4/umc_init.c
+++ b/arch/arm/mach-uniphier/ph1-pro4/umc_init.c
@@ -1,11 +1,11 @@
/*
- * Copyright (C) 2011-2014 Panasonic Corporation
+ * Copyright (C) 2011-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
-#include <asm/io.h>
+#include <linux/io.h>
#include <mach/umc-regs.h>
#include <mach/ddrphy-regs.h>
diff --git a/arch/arm/mach-uniphier/ph1-sld8/ddrphy_init.c b/arch/arm/mach-uniphier/ph1-sld8/ddrphy_init.c
index 304edfb..21efe62 100644
--- a/arch/arm/mach-uniphier/ph1-sld8/ddrphy_init.c
+++ b/arch/arm/mach-uniphier/ph1-sld8/ddrphy_init.c
@@ -1,12 +1,12 @@
/*
- * Copyright (C) 2014 Panasonic Corporation
+ * Copyright (C) 2014-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <config.h>
#include <linux/types.h>
-#include <asm/io.h>
+#include <linux/io.h>
#include <mach/ddrphy-regs.h>
void ddrphy_init(struct ddrphy __iomem *phy, int freq, int size)
diff --git a/arch/arm/mach-uniphier/ph1-sld8/pinctrl.c b/arch/arm/mach-uniphier/ph1-sld8/pinctrl.c
index 57a8093..130c831 100644
--- a/arch/arm/mach-uniphier/ph1-sld8/pinctrl.c
+++ b/arch/arm/mach-uniphier/ph1-sld8/pinctrl.c
@@ -1,11 +1,10 @@
/*
- * Copyright (C) 2011-2015 Panasonic Corporation
- * Copyright (C) 2015 Socionext Inc.
+ * Copyright (C) 2011-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
-#include <asm/io.h>
+#include <linux/io.h>
#include <mach/sg-regs.h>
void pin_init(void)
@@ -46,7 +45,7 @@
sg_set_pinsel(42, 0); /* USB0OD -> USB0OD */
sg_set_pinsel(43, 0); /* USB1VBUS -> USB1VBUS */
sg_set_pinsel(44, 0); /* USB1OD -> USB1OD */
- /* sg_set_pinsel(114, 4); */ /* TXD1 -> USB2VBUS (shared with UART) */
- /* sg_set_pinsel(115, 4); */ /* RXD1 -> USB2OD */
+ /* sg_set_pinsel(114, 1); */ /* TXD1 -> USB2VBUS (shared with UART) */
+ /* sg_set_pinsel(115, 1); */ /* RXD1 -> USB2OD */
#endif
}
diff --git a/arch/arm/mach-uniphier/ph1-sld8/pll_init.c b/arch/arm/mach-uniphier/ph1-sld8/pll_init.c
index 8851007..109cb5f 100644
--- a/arch/arm/mach-uniphier/ph1-sld8/pll_init.c
+++ b/arch/arm/mach-uniphier/ph1-sld8/pll_init.c
@@ -1,11 +1,11 @@
/*
- * Copyright (C) 2011-2014 Panasonic Corporation
+ * Copyright (C) 2011-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
-#include <asm/io.h>
+#include <linux/io.h>
#include <mach/sc-regs.h>
#include <mach/sg-regs.h>
diff --git a/arch/arm/mach-uniphier/ph1-sld8/sbc_init_3cs.c b/arch/arm/mach-uniphier/ph1-sld8/sbc_init_3cs.c
index fdef88e..c2267c7 100644
--- a/arch/arm/mach-uniphier/ph1-sld8/sbc_init_3cs.c
+++ b/arch/arm/mach-uniphier/ph1-sld8/sbc_init_3cs.c
@@ -1,12 +1,11 @@
/*
- * Copyright (C) 2011-2015 Panasonic Corporation
- * Author: Masahiro Yamada <yamada.m@jp.panasonic.com>
+ * Copyright (C) 2011-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
-#include <asm/io.h>
+#include <linux/io.h>
#include <mach/sbc-regs.h>
#include <mach/sg-regs.h>
diff --git a/arch/arm/mach-uniphier/ph1-sld8/umc_init.c b/arch/arm/mach-uniphier/ph1-sld8/umc_init.c
index 302611e..7baea7e 100644
--- a/arch/arm/mach-uniphier/ph1-sld8/umc_init.c
+++ b/arch/arm/mach-uniphier/ph1-sld8/umc_init.c
@@ -1,11 +1,11 @@
/*
- * Copyright (C) 2011-2014 Panasonic Corporation
+ * Copyright (C) 2011-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
-#include <asm/io.h>
+#include <linux/io.h>
#include <mach/umc-regs.h>
#include <mach/ddrphy-regs.h>
diff --git a/arch/arm/mach-uniphier/reset.c b/arch/arm/mach-uniphier/reset.c
index 005fbcf..4c82511 100644
--- a/arch/arm/mach-uniphier/reset.c
+++ b/arch/arm/mach-uniphier/reset.c
@@ -1,12 +1,11 @@
/*
- * Copyright (C) 2012-2014 Panasonic Corporation
- * Author: Masahiro Yamada <yamada.m@jp.panasonic.com>
+ * Copyright (C) 2012-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
-#include <asm/io.h>
+#include <linux/io.h>
#include <mach/sc-regs.h>
void reset_cpu(unsigned long ignored)
diff --git a/arch/arm/mach-uniphier/support_card.c b/arch/arm/mach-uniphier/support_card.c
index 77cc794..ea85b20 100644
--- a/arch/arm/mach-uniphier/support_card.c
+++ b/arch/arm/mach-uniphier/support_card.c
@@ -1,13 +1,11 @@
/*
- * Copyright (C) 2012-2015 Panasonic Corporation
- * Copyright (C) 2015 Socionext Inc.
- * Author: Masahiro Yamada <yamada.masahiro@socionext.com>
+ * Copyright (C) 2012-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
-#include <asm/io.h>
+#include <linux/io.h>
#include <mach/board.h>
#if defined(CONFIG_PFC_MICRO_SUPPORT_CARD)
diff --git a/arch/arm/mach-uniphier/timer.c b/arch/arm/mach-uniphier/timer.c
index adef08d..27ada29 100644
--- a/arch/arm/mach-uniphier/timer.c
+++ b/arch/arm/mach-uniphier/timer.c
@@ -1,12 +1,11 @@
/*
- * Copyright (C) 2012-2014 Panasonic Corporation
- * Author: Masahiro Yamada <yamada.m@jp.panasonic.com>
+ * Copyright (C) 2012-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
-#include <asm/io.h>
+#include <linux/io.h>
#include <mach/arm-mpcore.h>
#define PERIPHCLK (50 * 1000 * 1000) /* 50 MHz */
diff --git a/arch/powerpc/dts/.gitignore b/arch/powerpc/dts/.gitignore
new file mode 100644
index 0000000..b60ed20
--- /dev/null
+++ b/arch/powerpc/dts/.gitignore
@@ -0,0 +1 @@
+*.dtb
diff --git a/arch/sandbox/cpu/cpu.c b/arch/sandbox/cpu/cpu.c
index b6aae37..02c4cd3 100644
--- a/arch/sandbox/cpu/cpu.c
+++ b/arch/sandbox/cpu/cpu.c
@@ -22,6 +22,8 @@
void reset_cpu(ulong ignored)
{
+ /* Do this here while it still has an effect */
+ os_fd_restore();
if (state_uninit())
os_exit(2);
diff --git a/arch/sandbox/cpu/os.c b/arch/sandbox/cpu/os.c
index e6dd17e..8a4d719 100644
--- a/arch/sandbox/cpu/os.c
+++ b/arch/sandbox/cpu/os.c
@@ -107,10 +107,12 @@
static struct termios orig_term;
static bool term_setup;
-static void os_fd_restore(void)
+void os_fd_restore(void)
{
- if (term_setup)
+ if (term_setup) {
tcsetattr(0, TCSANOW, &orig_term);
+ term_setup = false;
+ }
}
/* Put tty into raw mode so <tab> and <ctrl+c> work */
@@ -120,7 +122,6 @@
if (term_setup)
return;
- term_setup = true;
/* If not a tty, don't complain */
if (tcgetattr(fd, &orig_term))
@@ -134,6 +135,7 @@
if (tcsetattr(fd, TCSANOW, &term))
return;
+ term_setup = true;
atexit(os_fd_restore);
}
diff --git a/arch/sandbox/dts/Makefile b/arch/sandbox/dts/Makefile
index 562a078..517b555 100644
--- a/arch/sandbox/dts/Makefile
+++ b/arch/sandbox/dts/Makefile
@@ -1,5 +1,5 @@
dtb-$(CONFIG_SANDBOX) += sandbox.dtb
-dtb-$(CONFIG_DM_TEST) += test.dtb
+dtb-$(CONFIG_UT_DM) += test.dtb
targets += $(dtb-y)
diff --git a/arch/sandbox/dts/sandbox.dts b/arch/sandbox/dts/sandbox.dts
index a3ebd80..8927527 100644
--- a/arch/sandbox/dts/sandbox.dts
+++ b/arch/sandbox/dts/sandbox.dts
@@ -17,30 +17,6 @@
stdout-path = "/serial";
};
- /* Needs to be available prior to relocation */
- uart0: serial {
- compatible = "sandbox,serial";
- sandbox,text-colour = "cyan";
- };
-
- triangle {
- compatible = "demo-shape";
- colour = "cyan";
- sides = <3>;
- character = <83>;
- light-gpios = <&gpio_a 2>, <&gpio_b 6 0>;
- };
- square {
- compatible = "demo-shape";
- colour = "blue";
- sides = <4>;
- };
- hexagon {
- compatible = "demo-simple";
- colour = "white";
- sides = <6>;
- };
-
cros_ec: cros-ec@0 {
reg = <0 0>;
compatible = "google,cros-ec-sandbox";
@@ -70,10 +46,22 @@
};
};
- lcd {
- compatible = "sandbox,lcd-sdl";
- xres = <1366>;
- yres = <768>;
+ eth@10002000 {
+ compatible = "sandbox,eth";
+ reg = <0x10002000 0x1000>;
+ fake-host-hwaddr = [00 00 66 44 22 00];
+ };
+
+ eth@80000000 {
+ compatible = "sandbox,eth-raw";
+ reg = <0x80000000 0x1000>;
+ host-raw-interface = "eth0";
+ };
+
+ eth@90000000 {
+ compatible = "sandbox,eth-raw";
+ reg = <0x90000000 0x1000>;
+ host-raw-interface = "lo";
};
gpio_a: gpios@0 {
@@ -92,6 +80,12 @@
num-gpios = <10>;
};
+ hexagon {
+ compatible = "demo-simple";
+ colour = "white";
+ sides = <6>;
+ };
+
i2c_0: i2c@0 {
#address-cells = <1>;
#size-cells = <0>;
@@ -120,18 +114,10 @@
};
};
- spi@0 {
- #address-cells = <1>;
- #size-cells = <0>;
- reg = <0 0>;
- compatible = "sandbox,spi";
- cs-gpios = <0>, <&gpio_a 0>;
- firmware_storage_spi: flash@0 {
- reg = <0>;
- compatible = "spansion,m25p16", "sandbox,spi-flash";
- spi-max-frequency = <40000000>;
- sandbox,filename = "spi.bin";
- };
+ lcd {
+ compatible = "sandbox,lcd-sdl";
+ xres = <1366>;
+ yres = <768>;
};
pci: pci-controller {
@@ -150,22 +136,38 @@
};
};
- eth@10002000 {
- compatible = "sandbox,eth";
- reg = <0x10002000 0x1000>;
- fake-host-hwaddr = [00 00 66 44 22 00];
+ spi@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0 0>;
+ compatible = "sandbox,spi";
+ cs-gpios = <0>, <&gpio_a 0>;
+ firmware_storage_spi: flash@0 {
+ reg = <0>;
+ compatible = "spansion,m25p16", "sandbox,spi-flash";
+ spi-max-frequency = <40000000>;
+ sandbox,filename = "spi.bin";
+ };
};
- eth@80000000 {
- compatible = "sandbox,eth-raw";
- reg = <0x80000000 0x1000>;
- host-raw-interface = "eth0";
+ square {
+ compatible = "demo-shape";
+ colour = "blue";
+ sides = <4>;
};
- eth@90000000 {
- compatible = "sandbox,eth-raw";
- reg = <0x90000000 0x1000>;
- host-raw-interface = "lo";
+ triangle {
+ compatible = "demo-shape";
+ colour = "cyan";
+ sides = <3>;
+ character = <83>;
+ light-gpios = <&gpio_a 2>, <&gpio_b 6 0>;
+ };
+
+ /* Needs to be available prior to relocation */
+ uart0: serial {
+ compatible = "sandbox,serial";
+ sandbox,text-colour = "cyan";
};
usb@0 {
diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts
index 1bc3ca0..c25614a 100644
--- a/arch/sandbox/dts/test.dts
+++ b/arch/sandbox/dts/test.dts
@@ -8,9 +8,13 @@
aliases {
console = &uart0;
+ eth0 = "/eth@10002000";
+ eth5 = ð_5;
i2c0 = "/i2c@0";
- spi0 = "/spi@0";
pci0 = &pci;
+ rtc0 = &rtc_0;
+ rtc1 = &rtc_1;
+ spi0 = "/spi@0";
testfdt6 = "/e-test";
testbus3 = "/some-bus";
testfdt0 = "/some-bus/c-test@0";
@@ -18,18 +22,11 @@
testfdt3 = "/b-test";
testfdt5 = "/some-bus/c-test@5";
testfdt8 = "/a-test";
- eth0 = "/eth@10002000";
- eth5 = ð_5;
usb0 = &usb_0;
usb1 = &usb_1;
usb2 = &usb_2;
};
- uart0: serial {
- compatible = "sandbox,serial";
- u-boot,dm-pre-reloc;
- };
-
a-test {
reg = <0>;
compatible = "denx,u-boot-fdt-test";
@@ -108,6 +105,24 @@
compatible = "denx,u-boot-fdt-test";
};
+ eth@10002000 {
+ compatible = "sandbox,eth";
+ reg = <0x10002000 0x1000>;
+ fake-host-hwaddr = <0x00 0x00 0x66 0x44 0x22 0x00>;
+ };
+
+ eth_5: eth@10003000 {
+ compatible = "sandbox,eth";
+ reg = <0x10003000 0x1000>;
+ fake-host-hwaddr = <0x00 0x00 0x66 0x44 0x22 0x11>;
+ };
+
+ eth@10004000 {
+ compatible = "sandbox,eth";
+ reg = <0x10004000 0x1000>;
+ fake-host-hwaddr = <0x00 0x00 0x66 0x44 0x22 0x22>;
+ };
+
gpio_a: base-gpios {
compatible = "sandbox,gpio";
gpio-controller;
@@ -140,6 +155,22 @@
};
};
+ rtc_0: rtc@43 {
+ reg = <0x43>;
+ compatible = "sandbox-rtc";
+ emul {
+ compatible = "sandbox,i2c-rtc";
+ };
+ };
+
+ rtc_1: rtc@61 {
+ reg = <0x61>;
+ compatible = "sandbox-rtc";
+ emul {
+ compatible = "sandbox,i2c-rtc";
+ };
+ };
+
sandbox_pmic: sandbox_pmic {
reg = <0x40>;
};
@@ -175,22 +206,9 @@
};
};
- eth@10002000 {
- compatible = "sandbox,eth";
- reg = <0x10002000 0x1000>;
- fake-host-hwaddr = <0x00 0x00 0x66 0x44 0x22 0x00>;
- };
-
- eth_5: eth@10003000 {
- compatible = "sandbox,eth";
- reg = <0x10003000 0x1000>;
- fake-host-hwaddr = <0x00 0x00 0x66 0x44 0x22 0x11>;
- };
-
- eth@10004000 {
- compatible = "sandbox,eth";
- reg = <0x10004000 0x1000>;
- fake-host-hwaddr = <0x00 0x00 0x66 0x44 0x22 0x22>;
+ uart0: serial {
+ compatible = "sandbox,serial";
+ u-boot,dm-pre-reloc;
};
usb_0: usb@0 {
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index 8e734fd..3506ba2 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -12,11 +12,14 @@
choice
prompt "Mainboard vendor"
- default VENDOR_COREBOOT
+ default VENDOR_EMULATION
config VENDOR_COREBOOT
bool "coreboot"
+config VENDOR_EMULATION
+ bool "emulation"
+
config VENDOR_GOOGLE
bool "Google"
@@ -27,6 +30,7 @@
# board-specific options below
source "board/coreboot/Kconfig"
+source "board/emulation/Kconfig"
source "board/google/Kconfig"
source "board/intel/Kconfig"
@@ -34,6 +38,7 @@
source "arch/x86/cpu/baytrail/Kconfig"
source "arch/x86/cpu/coreboot/Kconfig"
source "arch/x86/cpu/ivybridge/Kconfig"
+source "arch/x86/cpu/qemu/Kconfig"
source "arch/x86/cpu/quark/Kconfig"
source "arch/x86/cpu/queensbay/Kconfig"
@@ -182,147 +187,6 @@
memory is set as write-combining cache type. This option
enables marking the graphics memory as write-combining.
-menu "Display"
-
-config FRAMEBUFFER_SET_VESA_MODE
- prompt "Set framebuffer graphics resolution"
- bool
- help
- Set VESA/native framebuffer mode (needed for bootsplash and graphical framebuffer console)
-
-choice
- prompt "framebuffer graphics resolution"
- default FRAMEBUFFER_VESA_MODE_117
- depends on FRAMEBUFFER_SET_VESA_MODE
- help
- This option sets the resolution used for the coreboot framebuffer (and
- bootsplash screen).
-
-config FRAMEBUFFER_VESA_MODE_100
- bool "640x400 256-color"
-
-config FRAMEBUFFER_VESA_MODE_101
- bool "640x480 256-color"
-
-config FRAMEBUFFER_VESA_MODE_102
- bool "800x600 16-color"
-
-config FRAMEBUFFER_VESA_MODE_103
- bool "800x600 256-color"
-
-config FRAMEBUFFER_VESA_MODE_104
- bool "1024x768 16-color"
-
-config FRAMEBUFFER_VESA_MODE_105
- bool "1024x7686 256-color"
-
-config FRAMEBUFFER_VESA_MODE_106
- bool "1280x1024 16-color"
-
-config FRAMEBUFFER_VESA_MODE_107
- bool "1280x1024 256-color"
-
-config FRAMEBUFFER_VESA_MODE_108
- bool "80x60 text"
-
-config FRAMEBUFFER_VESA_MODE_109
- bool "132x25 text"
-
-config FRAMEBUFFER_VESA_MODE_10A
- bool "132x43 text"
-
-config FRAMEBUFFER_VESA_MODE_10B
- bool "132x50 text"
-
-config FRAMEBUFFER_VESA_MODE_10C
- bool "132x60 text"
-
-config FRAMEBUFFER_VESA_MODE_10D
- bool "320x200 32k-color (1:5:5:5)"
-
-config FRAMEBUFFER_VESA_MODE_10E
- bool "320x200 64k-color (5:6:5)"
-
-config FRAMEBUFFER_VESA_MODE_10F
- bool "320x200 16.8M-color (8:8:8)"
-
-config FRAMEBUFFER_VESA_MODE_110
- bool "640x480 32k-color (1:5:5:5)"
-
-config FRAMEBUFFER_VESA_MODE_111
- bool "640x480 64k-color (5:6:5)"
-
-config FRAMEBUFFER_VESA_MODE_112
- bool "640x480 16.8M-color (8:8:8)"
-
-config FRAMEBUFFER_VESA_MODE_113
- bool "800x600 32k-color (1:5:5:5)"
-
-config FRAMEBUFFER_VESA_MODE_114
- bool "800x600 64k-color (5:6:5)"
-
-config FRAMEBUFFER_VESA_MODE_115
- bool "800x600 16.8M-color (8:8:8)"
-
-config FRAMEBUFFER_VESA_MODE_116
- bool "1024x768 32k-color (1:5:5:5)"
-
-config FRAMEBUFFER_VESA_MODE_117
- bool "1024x768 64k-color (5:6:5)"
-
-config FRAMEBUFFER_VESA_MODE_118
- bool "1024x768 16.8M-color (8:8:8)"
-
-config FRAMEBUFFER_VESA_MODE_119
- bool "1280x1024 32k-color (1:5:5:5)"
-
-config FRAMEBUFFER_VESA_MODE_11A
- bool "1280x1024 64k-color (5:6:5)"
-
-config FRAMEBUFFER_VESA_MODE_11B
- bool "1280x1024 16.8M-color (8:8:8)"
-
-config FRAMEBUFFER_VESA_MODE_USER
- bool "Manually select VESA mode"
-
-endchoice
-
-# Map the config names to an integer (KB).
-config FRAMEBUFFER_VESA_MODE
- prompt "VESA mode" if FRAMEBUFFER_VESA_MODE_USER
- hex
- default 0x100 if FRAMEBUFFER_VESA_MODE_100
- default 0x101 if FRAMEBUFFER_VESA_MODE_101
- default 0x102 if FRAMEBUFFER_VESA_MODE_102
- default 0x103 if FRAMEBUFFER_VESA_MODE_103
- default 0x104 if FRAMEBUFFER_VESA_MODE_104
- default 0x105 if FRAMEBUFFER_VESA_MODE_105
- default 0x106 if FRAMEBUFFER_VESA_MODE_106
- default 0x107 if FRAMEBUFFER_VESA_MODE_107
- default 0x108 if FRAMEBUFFER_VESA_MODE_108
- default 0x109 if FRAMEBUFFER_VESA_MODE_109
- default 0x10A if FRAMEBUFFER_VESA_MODE_10A
- default 0x10B if FRAMEBUFFER_VESA_MODE_10B
- default 0x10C if FRAMEBUFFER_VESA_MODE_10C
- default 0x10D if FRAMEBUFFER_VESA_MODE_10D
- default 0x10E if FRAMEBUFFER_VESA_MODE_10E
- default 0x10F if FRAMEBUFFER_VESA_MODE_10F
- default 0x110 if FRAMEBUFFER_VESA_MODE_110
- default 0x111 if FRAMEBUFFER_VESA_MODE_111
- default 0x112 if FRAMEBUFFER_VESA_MODE_112
- default 0x113 if FRAMEBUFFER_VESA_MODE_113
- default 0x114 if FRAMEBUFFER_VESA_MODE_114
- default 0x115 if FRAMEBUFFER_VESA_MODE_115
- default 0x116 if FRAMEBUFFER_VESA_MODE_116
- default 0x117 if FRAMEBUFFER_VESA_MODE_117
- default 0x118 if FRAMEBUFFER_VESA_MODE_118
- default 0x119 if FRAMEBUFFER_VESA_MODE_119
- default 0x11A if FRAMEBUFFER_VESA_MODE_11A
- default 0x11B if FRAMEBUFFER_VESA_MODE_11B
- default 0x117 if FRAMEBUFFER_VESA_MODE_USER
-
-endmenu
-
config HAVE_FSP
bool "Add an Firmware Support Package binary"
help
@@ -356,6 +220,7 @@
config FSP_TEMP_RAM_ADDR
hex
+ depends on HAVE_FSP
default 0x2000000
help
Stack top address which is used in FspInit after DRAM is ready and
diff --git a/arch/x86/cpu/Makefile b/arch/x86/cpu/Makefile
index 043bea2..7ff05e6 100644
--- a/arch/x86/cpu/Makefile
+++ b/arch/x86/cpu/Makefile
@@ -14,11 +14,12 @@
obj-$(CONFIG_INTEL_BAYTRAIL) += baytrail/
obj-$(CONFIG_SYS_COREBOOT) += coreboot/
+obj-$(CONFIG_QEMU) += qemu/
obj-$(CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE) += ivybridge/
obj-$(CONFIG_NORTHBRIDGE_INTEL_IVYBRIDGE) += ivybridge/
obj-$(CONFIG_INTEL_QUARK) += quark/
obj-$(CONFIG_INTEL_QUEENSBAY) += queensbay/
-obj-y += lapic.o
+obj-y += irq.o lapic.o
obj-$(CONFIG_SMP) += mp_init.o
obj-y += mtrr.o
obj-$(CONFIG_PCI) += pci.o
diff --git a/arch/x86/cpu/baytrail/pci.c b/arch/x86/cpu/baytrail/pci.c
index 6c291f9..48409de 100644
--- a/arch/x86/cpu/baytrail/pci.c
+++ b/arch/x86/cpu/baytrail/pci.c
@@ -39,7 +39,7 @@
pci_set_region(hose->regions + 3,
0,
0,
- gd->ram_size,
+ gd->ram_size < 0x80000000 ? gd->ram_size : 0x80000000,
PCI_REGION_MEM | PCI_REGION_SYS_MEMORY);
hose->region_count = 4;
diff --git a/arch/x86/cpu/coreboot/coreboot.c b/arch/x86/cpu/coreboot/coreboot.c
index 4cdd0d4..0e9f15f 100644
--- a/arch/x86/cpu/coreboot/coreboot.c
+++ b/arch/x86/cpu/coreboot/coreboot.c
@@ -7,16 +7,11 @@
*/
#include <common.h>
-#include <asm/u-boot-x86.h>
-#include <flash.h>
+#include <fdtdec.h>
#include <netdev.h>
-#include <ns16550.h>
-#include <asm/msr.h>
-#include <asm/cache.h>
-#include <asm/cpu.h>
#include <asm/io.h>
+#include <asm/msr.h>
#include <asm/mtrr.h>
-#include <asm/arch/tables.h>
#include <asm/arch/sysinfo.h>
#include <asm/arch/timestamp.h>
@@ -53,13 +48,6 @@
return 0;
}
-#ifndef CONFIG_SYS_NO_FLASH
-ulong board_flash_get_legacy(ulong base, int banknum, flash_info_t *info)
-{
- return 0;
-}
-#endif
-
int board_eth_init(bd_t *bis)
{
return pci_eth_init(bis);
@@ -67,7 +55,8 @@
void board_final_cleanup(void)
{
- /* Un-cache the ROM so the kernel has one
+ /*
+ * Un-cache the ROM so the kernel has one
* more MTRR available.
*
* Coreboot should have assigned this to the
@@ -86,21 +75,22 @@
mtrr_close(&state);
}
- /* Issue SMI to Coreboot to lock down ME and registers */
- printf("Finalizing Coreboot\n");
- outb(0xcb, 0xb2);
-}
-
-void panic_puts(const char *str)
-{
- NS16550_t port = (NS16550_t)0x3f8;
-
- NS16550_init(port, 1);
- while (*str)
- NS16550_putc(port, *str++);
+ if (!fdtdec_get_config_bool(gd->fdt_blob, "u-boot,no-apm-finalize")) {
+ /*
+ * Issue SMI to coreboot to lock down ME and registers
+ * when allowed via device tree
+ */
+ printf("Finalizing coreboot\n");
+ outb(0xcb, 0xb2);
+ }
}
int misc_init_r(void)
{
return 0;
}
+
+int arch_misc_init(void)
+{
+ return 0;
+}
diff --git a/arch/x86/cpu/irq.c b/arch/x86/cpu/irq.c
new file mode 100644
index 0000000..74b89ad
--- /dev/null
+++ b/arch/x86/cpu/irq.c
@@ -0,0 +1,216 @@
+/*
+ * Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <errno.h>
+#include <fdtdec.h>
+#include <malloc.h>
+#include <asm/io.h>
+#include <asm/irq.h>
+#include <asm/pci.h>
+#include <asm/pirq_routing.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+static struct irq_router irq_router;
+static struct irq_routing_table *pirq_routing_table;
+
+bool pirq_check_irq_routed(int link, u8 irq)
+{
+ u8 pirq;
+ int base = irq_router.link_base;
+
+ if (irq_router.config == PIRQ_VIA_PCI)
+ pirq = x86_pci_read_config8(irq_router.bdf,
+ LINK_N2V(link, base));
+ else
+ pirq = readb(irq_router.ibase + LINK_N2V(link, base));
+
+ pirq &= 0xf;
+
+ /* IRQ# 0/1/2/8/13 are reserved */
+ if (pirq < 3 || pirq == 8 || pirq == 13)
+ return false;
+
+ return pirq == irq ? true : false;
+}
+
+int pirq_translate_link(int link)
+{
+ return LINK_V2N(link, irq_router.link_base);
+}
+
+void pirq_assign_irq(int link, u8 irq)
+{
+ int base = irq_router.link_base;
+
+ /* IRQ# 0/1/2/8/13 are reserved */
+ if (irq < 3 || irq == 8 || irq == 13)
+ return;
+
+ if (irq_router.config == PIRQ_VIA_PCI)
+ x86_pci_write_config8(irq_router.bdf,
+ LINK_N2V(link, base), irq);
+ else
+ writeb(irq, irq_router.ibase + LINK_N2V(link, base));
+}
+
+static inline void fill_irq_info(struct irq_info **slotp, int *entries, u8 bus,
+ u8 device, u8 func, u8 pin, u8 pirq)
+{
+ struct irq_info *slot = *slotp;
+
+ slot->bus = bus;
+ slot->devfn = (device << 3) | func;
+ slot->irq[pin - 1].link = LINK_N2V(pirq, irq_router.link_base);
+ slot->irq[pin - 1].bitmap = irq_router.irq_mask;
+ (*entries)++;
+ (*slotp)++;
+}
+
+__weak void cpu_irq_init(void)
+{
+ return;
+}
+
+static int create_pirq_routing_table(void)
+{
+ const void *blob = gd->fdt_blob;
+ struct fdt_pci_addr addr;
+ int node;
+ int len, count;
+ const u32 *cell;
+ struct irq_routing_table *rt;
+ struct irq_info *slot;
+ int irq_entries = 0;
+ int i;
+ int ret;
+
+ node = fdtdec_next_compatible(blob, 0, COMPAT_INTEL_IRQ_ROUTER);
+ if (node < 0) {
+ debug("%s: Cannot find irq router node\n", __func__);
+ return -EINVAL;
+ }
+
+ ret = fdtdec_get_pci_addr(blob, node, FDT_PCI_SPACE_CONFIG,
+ "reg", &addr);
+ if (ret)
+ return ret;
+
+ /* extract the bdf from fdt_pci_addr */
+ irq_router.bdf = addr.phys_hi & 0xffff00;
+
+ ret = fdt_find_string(blob, node, "intel,pirq-config", "pci");
+ if (!ret) {
+ irq_router.config = PIRQ_VIA_PCI;
+ } else {
+ ret = fdt_find_string(blob, node, "intel,pirq-config", "ibase");
+ if (!ret)
+ irq_router.config = PIRQ_VIA_IBASE;
+ else
+ return -EINVAL;
+ }
+
+ ret = fdtdec_get_int_array(blob, node, "intel,pirq-link",
+ &irq_router.link_base, 1);
+ if (ret)
+ return ret;
+
+ irq_router.irq_mask = fdtdec_get_int(blob, node,
+ "intel,pirq-mask", PIRQ_BITMAP);
+
+ if (irq_router.config == PIRQ_VIA_IBASE) {
+ int ibase_off;
+
+ ibase_off = fdtdec_get_int(blob, node, "intel,ibase-offset", 0);
+ if (!ibase_off)
+ return -EINVAL;
+
+ /*
+ * Here we assume that the IBASE register has already been
+ * properly configured by U-Boot before.
+ *
+ * By 'valid' we mean:
+ * 1) a valid memory space carved within system memory space
+ * assigned to IBASE register block.
+ * 2) memory range decoding is enabled.
+ * Hence we don't do any santify test here.
+ */
+ irq_router.ibase = x86_pci_read_config32(irq_router.bdf,
+ ibase_off);
+ irq_router.ibase &= ~0xf;
+ }
+
+ cell = fdt_getprop(blob, node, "intel,pirq-routing", &len);
+ if (!cell)
+ return -EINVAL;
+
+ if ((len % sizeof(struct pirq_routing)) == 0)
+ count = len / sizeof(struct pirq_routing);
+ else
+ return -EINVAL;
+
+ rt = malloc(sizeof(struct irq_routing_table));
+ if (!rt)
+ return -ENOMEM;
+ memset((char *)rt, 0, sizeof(struct irq_routing_table));
+
+ /* Populate the PIRQ table fields */
+ rt->signature = PIRQ_SIGNATURE;
+ rt->version = PIRQ_VERSION;
+ rt->rtr_bus = 0;
+ rt->rtr_devfn = (PCI_DEV(irq_router.bdf) << 3) |
+ PCI_FUNC(irq_router.bdf);
+ rt->rtr_vendor = PCI_VENDOR_ID_INTEL;
+ rt->rtr_device = PCI_DEVICE_ID_INTEL_ICH7_31;
+
+ slot = rt->slots;
+
+ /* Now fill in the irq_info entries in the PIRQ table */
+ for (i = 0; i < count; i++) {
+ struct pirq_routing pr;
+
+ pr.bdf = fdt_addr_to_cpu(cell[0]);
+ pr.pin = fdt_addr_to_cpu(cell[1]);
+ pr.pirq = fdt_addr_to_cpu(cell[2]);
+
+ debug("irq_info %d: b.d.f %x.%x.%x INT%c PIRQ%c\n",
+ i, PCI_BUS(pr.bdf), PCI_DEV(pr.bdf),
+ PCI_FUNC(pr.bdf), 'A' + pr.pin - 1,
+ 'A' + pr.pirq);
+ fill_irq_info(&slot, &irq_entries, PCI_BUS(pr.bdf),
+ PCI_DEV(pr.bdf), PCI_FUNC(pr.bdf),
+ pr.pin, pr.pirq);
+ cell += sizeof(struct pirq_routing) / sizeof(u32);
+ }
+
+ rt->size = irq_entries * sizeof(struct irq_info) + 32;
+
+ pirq_routing_table = rt;
+
+ return 0;
+}
+
+void pirq_init(void)
+{
+ cpu_irq_init();
+
+ if (create_pirq_routing_table()) {
+ debug("Failed to create pirq routing table\n");
+ } else {
+ /* Route PIRQ */
+ pirq_route_irqs(pirq_routing_table->slots,
+ get_irq_slot_count(pirq_routing_table));
+ }
+}
+
+u32 write_pirq_routing_table(u32 addr)
+{
+ if (!pirq_routing_table)
+ return addr;
+
+ return copy_pirq_routing_table(addr, pirq_routing_table);
+}
diff --git a/arch/x86/cpu/qemu/Kconfig b/arch/x86/cpu/qemu/Kconfig
new file mode 100644
index 0000000..fb775d7
--- /dev/null
+++ b/arch/x86/cpu/qemu/Kconfig
@@ -0,0 +1,21 @@
+#
+# Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+config QEMU
+ bool
+ select TSC_CALIBRATION_BYPASS
+
+if QEMU
+
+config SYS_CAR_ADDR
+ hex
+ default 0xd0000
+
+config SYS_CAR_SIZE
+ hex
+ default 0x10000
+
+endif
diff --git a/arch/x86/cpu/qemu/Makefile b/arch/x86/cpu/qemu/Makefile
new file mode 100644
index 0000000..be79723
--- /dev/null
+++ b/arch/x86/cpu/qemu/Makefile
@@ -0,0 +1,8 @@
+#
+# Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y += car.o dram.o qemu.o
+obj-$(CONFIG_PCI) += pci.o
diff --git a/arch/x86/cpu/qemu/car.S b/arch/x86/cpu/qemu/car.S
new file mode 100644
index 0000000..13b3aea
--- /dev/null
+++ b/arch/x86/cpu/qemu/car.S
@@ -0,0 +1,26 @@
+/*
+ * Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <config.h>
+#include <asm/post.h>
+
+.globl car_init
+car_init:
+ /* Save the BIST result */
+ movl %eax, %ebp
+
+ post_code(POST_CAR_START)
+
+ /*
+ * Since we know we are running inside emulator,
+ * we can do nothing here for CAR initialization.
+ */
+
+ /* Restore the BIST result */
+ movl %ebp, %eax
+
+ post_code(POST_CAR_CPU_CACHE)
+ jmp car_init_ret
diff --git a/arch/x86/cpu/qemu/dram.c b/arch/x86/cpu/qemu/dram.c
new file mode 100644
index 0000000..a88d0d2
--- /dev/null
+++ b/arch/x86/cpu/qemu/dram.c
@@ -0,0 +1,46 @@
+/*
+ * Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/post.h>
+#include <asm/arch/qemu.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int dram_init(void)
+{
+ u32 ram;
+
+ outb(HIGH_RAM_ADDR, CMOS_ADDR_PORT);
+ ram = ((u32)inb(CMOS_DATA_PORT)) << 14;
+ outb(LOW_RAM_ADDR, CMOS_ADDR_PORT);
+ ram |= ((u32)inb(CMOS_DATA_PORT)) << 6;
+ ram += 16 * 1024;
+
+ gd->ram_size = ram * 1024;
+ post_code(POST_DRAM);
+
+ return 0;
+}
+
+void dram_init_banksize(void)
+{
+ gd->bd->bi_dram[0].start = 0;
+ gd->bd->bi_dram[0].size = gd->ram_size;
+}
+
+/*
+ * This function looks for the highest region of memory lower than 4GB which
+ * has enough space for U-Boot where U-Boot is aligned on a page boundary.
+ * It overrides the default implementation found elsewhere which simply
+ * picks the end of ram, wherever that may be. The location of the stack,
+ * the relocation address, and how far U-Boot is moved by relocation are
+ * set in the global data structure.
+ */
+ulong board_get_usable_ram_top(ulong total_size)
+{
+ return gd->ram_size;
+}
diff --git a/arch/x86/cpu/qemu/pci.c b/arch/x86/cpu/qemu/pci.c
new file mode 100644
index 0000000..1a9140b
--- /dev/null
+++ b/arch/x86/cpu/qemu/pci.c
@@ -0,0 +1,101 @@
+/*
+ * Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <pci.h>
+#include <pci_rom.h>
+#include <asm/pci.h>
+#include <asm/arch/device.h>
+#include <asm/arch/qemu.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+void board_pci_setup_hose(struct pci_controller *hose)
+{
+ hose->first_busno = 0;
+ hose->last_busno = 0;
+
+ /* PCI memory space */
+ pci_set_region(hose->regions + 0,
+ CONFIG_PCI_MEM_BUS,
+ CONFIG_PCI_MEM_PHYS,
+ CONFIG_PCI_MEM_SIZE,
+ PCI_REGION_MEM);
+
+ /* PCI IO space */
+ pci_set_region(hose->regions + 1,
+ CONFIG_PCI_IO_BUS,
+ CONFIG_PCI_IO_PHYS,
+ CONFIG_PCI_IO_SIZE,
+ PCI_REGION_IO);
+
+ pci_set_region(hose->regions + 2,
+ CONFIG_PCI_PREF_BUS,
+ CONFIG_PCI_PREF_PHYS,
+ CONFIG_PCI_PREF_SIZE,
+ PCI_REGION_PREFETCH);
+
+ pci_set_region(hose->regions + 3,
+ 0,
+ 0,
+ gd->ram_size,
+ PCI_REGION_MEM | PCI_REGION_SYS_MEMORY);
+
+ hose->region_count = 4;
+}
+
+int board_pci_post_scan(struct pci_controller *hose)
+{
+ int ret = 0;
+ u16 device;
+ int pam, i;
+ pci_dev_t vga;
+ ulong start;
+
+ /*
+ * i440FX and Q35 chipset have different PAM register offset, but with
+ * the same bitfield layout. Here we determine the offset based on its
+ * PCI device ID.
+ */
+ device = x86_pci_read_config16(PCI_BDF(0, 0, 0), PCI_DEVICE_ID);
+ pam = (device == PCI_DEVICE_ID_INTEL_82441) ? I440FX_PAM : Q35_PAM;
+
+ /*
+ * Initialize Programmable Attribute Map (PAM) Registers
+ *
+ * Configure legacy segments C/D/E/F to system RAM
+ */
+ for (i = 0; i < PAM_NUM; i++)
+ x86_pci_write_config8(PCI_BDF(0, 0, 0), pam + i, PAM_RW);
+
+ if (device == PCI_DEVICE_ID_INTEL_82441) {
+ /*
+ * Enable legacy IDE I/O ports decode
+ *
+ * Note: QEMU always decode legacy IDE I/O port on PIIX chipset.
+ * However Linux ata_piix driver does sanity check on these two
+ * registers to see whether legacy ports decode is turned on.
+ * This is to make Linux ata_piix driver happy.
+ */
+ x86_pci_write_config16(PIIX_IDE, IDE0_TIM, IDE_DECODE_EN);
+ x86_pci_write_config16(PIIX_IDE, IDE1_TIM, IDE_DECODE_EN);
+ }
+
+ /*
+ * QEMU emulated graphic card shows in the PCI configuration space with
+ * PCI vendor id and device id as an artificial pair 0x1234:0x1111.
+ * It is on PCI bus 0, function 0, but device number is not consistent
+ * for the two x86 targets it supports. For i440FX and PIIX chipset
+ * board, it shows as device 2, while for Q35 and ICH9 chipset board,
+ * it shows as device 1.
+ */
+ vga = (device == PCI_DEVICE_ID_INTEL_82441) ? I440FX_VGA : Q35_VGA;
+ start = get_timer(0);
+ ret = pci_run_vga_bios(vga, NULL, PCI_ROM_USE_NATIVE);
+ debug("BIOS ran in %lums\n", get_timer(start));
+
+ return ret;
+}
diff --git a/arch/x86/cpu/qemu/qemu.c b/arch/x86/cpu/qemu/qemu.c
new file mode 100644
index 0000000..930d2b6
--- /dev/null
+++ b/arch/x86/cpu/qemu/qemu.c
@@ -0,0 +1,45 @@
+/*
+ * Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/irq.h>
+#include <asm/post.h>
+#include <asm/processor.h>
+
+int arch_cpu_init(void)
+{
+ int ret;
+
+ post_code(POST_CPU_INIT);
+#ifdef CONFIG_SYS_X86_TSC_TIMER
+ timer_set_base(rdtsc());
+#endif
+
+ ret = x86_cpu_init_f();
+ if (ret)
+ return ret;
+
+ return 0;
+}
+
+int print_cpuinfo(void)
+{
+ post_code(POST_CPU_INFO);
+ return default_print_cpuinfo();
+}
+
+void reset_cpu(ulong addr)
+{
+ /* cold reset */
+ x86_full_reset();
+}
+
+int arch_misc_init(void)
+{
+ pirq_init();
+
+ return 0;
+}
diff --git a/arch/x86/cpu/quark/quark.c b/arch/x86/cpu/quark/quark.c
index e78a271..20cc09e 100644
--- a/arch/x86/cpu/quark/quark.c
+++ b/arch/x86/cpu/quark/quark.c
@@ -9,6 +9,7 @@
#include <netdev.h>
#include <phy.h>
#include <asm/io.h>
+#include <asm/irq.h>
#include <asm/pci.h>
#include <asm/post.h>
#include <asm/processor.h>
@@ -147,3 +148,33 @@
else
return 0;
}
+
+void cpu_irq_init(void)
+{
+ struct quark_rcba *rcba;
+ u32 base;
+
+ base = x86_pci_read_config32(QUARK_LEGACY_BRIDGE, LB_RCBA);
+ base &= ~MEM_BAR_EN;
+ rcba = (struct quark_rcba *)base;
+
+ /*
+ * Route Quark PCI device interrupt pin to PIRQ
+ *
+ * Route device#23's INTA/B/C/D to PIRQA/B/C/D
+ * Route device#20,21's INTA/B/C/D to PIRQE/F/G/H
+ */
+ writew(PIRQC, &rcba->rmu_ir);
+ writew(PIRQA | (PIRQB << 4) | (PIRQC << 8) | (PIRQD << 12),
+ &rcba->d23_ir);
+ writew(PIRQD, &rcba->core_ir);
+ writew(PIRQE | (PIRQF << 4) | (PIRQG << 8) | (PIRQH << 12),
+ &rcba->d20d21_ir);
+}
+
+int arch_misc_init(void)
+{
+ pirq_init();
+
+ return 0;
+}
diff --git a/arch/x86/cpu/queensbay/Makefile b/arch/x86/cpu/queensbay/Makefile
index 4599a48..d8761fd 100644
--- a/arch/x86/cpu/queensbay/Makefile
+++ b/arch/x86/cpu/queensbay/Makefile
@@ -5,5 +5,5 @@
#
obj-y += fsp_configs.o
-obj-y += irq.o tnc.o topcliff.o
+obj-y += tnc.o topcliff.o
obj-$(CONFIG_PCI) += tnc_pci.o
diff --git a/arch/x86/cpu/queensbay/irq.c b/arch/x86/cpu/queensbay/irq.c
deleted file mode 100644
index faf9515..0000000
--- a/arch/x86/cpu/queensbay/irq.c
+++ /dev/null
@@ -1,242 +0,0 @@
-/*
- * Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <common.h>
-#include <errno.h>
-#include <malloc.h>
-#include <asm/io.h>
-#include <asm/pci.h>
-#include <asm/post.h>
-#include <asm/processor.h>
-#include <asm/pirq_routing.h>
-#include <asm/arch/device.h>
-#include <asm/arch/tnc.h>
-#include <asm/arch/irq.h>
-
-static struct irq_routing_table *pirq_routing_table;
-
-bool pirq_check_irq_routed(int link, u8 irq)
-{
- u8 pirq;
-
- pirq = x86_pci_read_config8(TNC_LPC, LINK_N2V(link));
- pirq &= 0xf;
-
- /* IRQ# 0/1/2/8/13 are reserved */
- if (pirq < 3 || pirq == 8 || pirq == 13)
- return false;
-
- return pirq == irq ? true : false;
-}
-
-int pirq_translate_link(int link)
-{
- return LINK_V2N(link);
-}
-
-void pirq_assign_irq(int link, u8 irq)
-{
- /* IRQ# 0/1/2/8/13 are reserved */
- if (irq < 3 || irq == 8 || irq == 13)
- return;
-
- x86_pci_write_config8(TNC_LPC, LINK_N2V(link), irq);
-}
-
-static inline void fill_irq_info(struct irq_info **slotp, int *entries, u8 bus,
- u8 device, u8 func, u8 pin, u8 pirq)
-{
- struct irq_info *slot = *slotp;
-
- slot->bus = bus;
- slot->devfn = (device << 3) | func;
- slot->irq[pin - 1].link = LINK_N2V(pirq);
- slot->irq[pin - 1].bitmap = PIRQ_BITMAP;
- (*entries)++;
- (*slotp)++;
-}
-
-/* PCIe port downstream INTx swizzle */
-static inline u8 pin_swizzle(u8 pin, int port)
-{
- return (pin + port) % 4;
-}
-
-__weak int board_fill_irq_info(struct irq_info *slot)
-{
- return 0;
-}
-
-static int create_pirq_routing_table(void)
-{
- struct irq_routing_table *rt;
- struct irq_info *slot;
- int irq_entries = 0;
- pci_dev_t tcf_bdf;
- u8 tcf_bus, bus;
- int i;
-
- rt = malloc(sizeof(struct irq_routing_table));
- if (!rt)
- return -ENOMEM;
- memset((char *)rt, 0, sizeof(struct irq_routing_table));
-
- /* Populate the PIRQ table fields */
- rt->signature = PIRQ_SIGNATURE;
- rt->version = PIRQ_VERSION;
- rt->rtr_bus = 0;
- rt->rtr_devfn = (TNC_LPC_DEV << 3) | TNC_LPC_FUNC;
- rt->rtr_vendor = PCI_VENDOR_ID_INTEL;
- rt->rtr_device = PCI_DEVICE_ID_INTEL_ICH7_31;
-
- slot = rt->slots;
-
- /*
- * Now fill in the irq_info entries in the PIRQ table
- *
- * We start from internal TunnelCreek PCI devices first, then
- * followed by all the 4 PCIe ports downstream devices, including
- * the Queensbay platform Topcliff chipset devices.
- */
- fill_irq_info(&slot, &irq_entries, 0, TNC_IGD_DEV,
- TNC_IGD_FUNC, INTA, PIRQE);
- fill_irq_info(&slot, &irq_entries, 0, TNC_SDVO_DEV,
- TNC_SDVO_FUNC, INTA, PIRQF);
- fill_irq_info(&slot, &irq_entries, 0, TNC_HDA_DEV,
- TNC_HDA_FUNC, INTA, PIRQG);
- fill_irq_info(&slot, &irq_entries, 0, TNC_PCIE0_DEV,
- TNC_PCIE0_FUNC, INTA, PIRQE);
- fill_irq_info(&slot, &irq_entries, 0, TNC_PCIE1_DEV,
- TNC_PCIE1_FUNC, INTA, PIRQF);
- fill_irq_info(&slot, &irq_entries, 0, TNC_PCIE2_DEV,
- TNC_PCIE2_FUNC, INTA, PIRQG);
- fill_irq_info(&slot, &irq_entries, 0, TNC_PCIE3_DEV,
- TNC_PCIE3_FUNC, INTA, PIRQH);
-
- /* Check which PCIe port the Topcliff chipset is connected to */
- tcf_bdf = pci_find_device(PCI_VENDOR_ID_INTEL, 0x8800, 0);
- tcf_bus = PCI_BUS(tcf_bdf);
- for (i = 0; i < 4; i++) {
- bus = x86_pci_read_config8(PCI_BDF(0, TNC_PCIE0_DEV + i, 0),
- PCI_SECONDARY_BUS);
- if (bus == tcf_bus)
- break;
- }
-
- /* Fill in the Topcliff chipset devices' irq info */
- if (i < 4) {
- fill_irq_info(&slot, &irq_entries, tcf_bus, TCF_PCIE_PORT_DEV,
- TCF_PCIE_PORT_FUNC, INTA, pin_swizzle(PIRQA, i));
-
- tcf_bus++;
- fill_irq_info(&slot, &irq_entries, tcf_bus, TCF_DEV_0,
- TCF_GBE_FUNC, INTA, pin_swizzle(PIRQA, i));
- fill_irq_info(&slot, &irq_entries, tcf_bus, TCF_DEV_0,
- TCF_GPIO_FUNC, INTA, pin_swizzle(PIRQA, i));
- fill_irq_info(&slot, &irq_entries, tcf_bus, TCF_DEV_2,
- TCF_USB1_OHCI0_FUNC, INTB, pin_swizzle(PIRQB, i));
- fill_irq_info(&slot, &irq_entries, tcf_bus, TCF_DEV_2,
- TCF_USB1_OHCI1_FUNC, INTB, pin_swizzle(PIRQB, i));
- fill_irq_info(&slot, &irq_entries, tcf_bus, TCF_DEV_2,
- TCF_USB1_OHCI2_FUNC, INTB, pin_swizzle(PIRQB, i));
- fill_irq_info(&slot, &irq_entries, tcf_bus, TCF_DEV_2,
- TCF_USB1_EHCI_FUNC, INTB, pin_swizzle(PIRQB, i));
- fill_irq_info(&slot, &irq_entries, tcf_bus, TCF_DEV_2,
- TCF_USB_DEVICE_FUNC, INTB, pin_swizzle(PIRQB, i));
- fill_irq_info(&slot, &irq_entries, tcf_bus, TCF_DEV_4,
- TCF_SDIO0_FUNC, INTC, pin_swizzle(PIRQC, i));
- fill_irq_info(&slot, &irq_entries, tcf_bus, TCF_DEV_4,
- TCF_SDIO1_FUNC, INTC, pin_swizzle(PIRQC, i));
- fill_irq_info(&slot, &irq_entries, tcf_bus, TCF_DEV_6,
- TCF_SATA_FUNC, INTD, pin_swizzle(PIRQD, i));
- fill_irq_info(&slot, &irq_entries, tcf_bus, TCF_DEV_8,
- TCF_USB2_OHCI0_FUNC, INTA, pin_swizzle(PIRQA, i));
- fill_irq_info(&slot, &irq_entries, tcf_bus, TCF_DEV_8,
- TCF_USB2_OHCI1_FUNC, INTA, pin_swizzle(PIRQA, i));
- fill_irq_info(&slot, &irq_entries, tcf_bus, TCF_DEV_8,
- TCF_USB2_OHCI2_FUNC, INTA, pin_swizzle(PIRQA, i));
- fill_irq_info(&slot, &irq_entries, tcf_bus, TCF_DEV_8,
- TCF_USB2_EHCI_FUNC, INTA, pin_swizzle(PIRQA, i));
- fill_irq_info(&slot, &irq_entries, tcf_bus, TCF_DEV_10,
- TCF_DMA1_FUNC, INTB, pin_swizzle(PIRQB, i));
- fill_irq_info(&slot, &irq_entries, tcf_bus, TCF_DEV_10,
- TCF_UART0_FUNC, INTB, pin_swizzle(PIRQB, i));
- fill_irq_info(&slot, &irq_entries, tcf_bus, TCF_DEV_10,
- TCF_UART1_FUNC, INTB, pin_swizzle(PIRQB, i));
- fill_irq_info(&slot, &irq_entries, tcf_bus, TCF_DEV_10,
- TCF_UART2_FUNC, INTB, pin_swizzle(PIRQB, i));
- fill_irq_info(&slot, &irq_entries, tcf_bus, TCF_DEV_10,
- TCF_UART3_FUNC, INTB, pin_swizzle(PIRQB, i));
- fill_irq_info(&slot, &irq_entries, tcf_bus, TCF_DEV_12,
- TCF_DMA2_FUNC, INTC, pin_swizzle(PIRQC, i));
- fill_irq_info(&slot, &irq_entries, tcf_bus, TCF_DEV_12,
- TCF_SPI_FUNC, INTC, pin_swizzle(PIRQC, i));
- fill_irq_info(&slot, &irq_entries, tcf_bus, TCF_DEV_12,
- TCF_I2C_FUNC, INTC, pin_swizzle(PIRQC, i));
- fill_irq_info(&slot, &irq_entries, tcf_bus, TCF_DEV_12,
- TCF_CAN_FUNC, INTC, pin_swizzle(PIRQC, i));
- fill_irq_info(&slot, &irq_entries, tcf_bus, TCF_DEV_12,
- TCF_1588_FUNC, INTC, pin_swizzle(PIRQC, i));
- }
-
- /* Call board-specific routine to fill in add-in card's irq info */
- irq_entries += board_fill_irq_info(slot);
-
- rt->size = irq_entries * sizeof(struct irq_info) + 32;
-
- pirq_routing_table = rt;
-
- return 0;
-}
-
-void pirq_init(void)
-{
- struct tnc_rcba *rcba;
- u32 base;
-
- base = x86_pci_read_config32(TNC_LPC, LPC_RCBA);
- base &= ~MEM_BAR_EN;
- rcba = (struct tnc_rcba *)base;
-
- /* Make sure all internal PCI devices are using INTA */
- writel(INTA, &rcba->d02ip);
- writel(INTA, &rcba->d03ip);
- writel(INTA, &rcba->d27ip);
- writel(INTA, &rcba->d31ip);
- writel(INTA, &rcba->d23ip);
- writel(INTA, &rcba->d24ip);
- writel(INTA, &rcba->d25ip);
- writel(INTA, &rcba->d26ip);
-
- /*
- * Route TunnelCreek PCI device interrupt pin to PIRQ
- *
- * Since PCIe downstream ports received INTx are routed to PIRQ
- * A/B/C/D directly and not configurable, we route internal PCI
- * device's INTx to PIRQ E/F/G/H.
- */
- writew(PIRQE, &rcba->d02ir);
- writew(PIRQF, &rcba->d03ir);
- writew(PIRQG, &rcba->d27ir);
- writew(PIRQH, &rcba->d31ir);
- writew(PIRQE, &rcba->d23ir);
- writew(PIRQF, &rcba->d24ir);
- writew(PIRQG, &rcba->d25ir);
- writew(PIRQH, &rcba->d26ir);
-
- if (create_pirq_routing_table()) {
- debug("Failed to create pirq routing table\n");
- } else {
- /* Route PIRQ */
- pirq_route_irqs(pirq_routing_table->slots,
- get_irq_slot_count(pirq_routing_table));
- }
-}
-
-u32 write_pirq_routing_table(u32 addr)
-{
- return copy_pirq_routing_table(addr, pirq_routing_table);
-}
diff --git a/arch/x86/cpu/queensbay/tnc.c b/arch/x86/cpu/queensbay/tnc.c
index b46a7e9..873de7b 100644
--- a/arch/x86/cpu/queensbay/tnc.c
+++ b/arch/x86/cpu/queensbay/tnc.c
@@ -6,10 +6,11 @@
#include <common.h>
#include <asm/io.h>
+#include <asm/irq.h>
#include <asm/pci.h>
#include <asm/post.h>
#include <asm/arch/device.h>
-#include <asm/arch/irq.h>
+#include <asm/arch/tnc.h>
#include <asm/fsp/fsp_support.h>
#include <asm/processor.h>
@@ -45,6 +46,42 @@
return 0;
}
+void cpu_irq_init(void)
+{
+ struct tnc_rcba *rcba;
+ u32 base;
+
+ base = x86_pci_read_config32(TNC_LPC, LPC_RCBA);
+ base &= ~MEM_BAR_EN;
+ rcba = (struct tnc_rcba *)base;
+
+ /* Make sure all internal PCI devices are using INTA */
+ writel(INTA, &rcba->d02ip);
+ writel(INTA, &rcba->d03ip);
+ writel(INTA, &rcba->d27ip);
+ writel(INTA, &rcba->d31ip);
+ writel(INTA, &rcba->d23ip);
+ writel(INTA, &rcba->d24ip);
+ writel(INTA, &rcba->d25ip);
+ writel(INTA, &rcba->d26ip);
+
+ /*
+ * Route TunnelCreek PCI device interrupt pin to PIRQ
+ *
+ * Since PCIe downstream ports received INTx are routed to PIRQ
+ * A/B/C/D directly and not configurable, we route internal PCI
+ * device's INTx to PIRQ E/F/G/H.
+ */
+ writew(PIRQE, &rcba->d02ir);
+ writew(PIRQF, &rcba->d03ir);
+ writew(PIRQG, &rcba->d27ir);
+ writew(PIRQH, &rcba->d31ir);
+ writew(PIRQE, &rcba->d23ir);
+ writew(PIRQF, &rcba->d24ir);
+ writew(PIRQG, &rcba->d25ir);
+ writew(PIRQH, &rcba->d26ir);
+}
+
int arch_misc_init(void)
{
pirq_init();
diff --git a/arch/x86/dts/Makefile b/arch/x86/dts/Makefile
index 431bbd8..f86514c 100644
--- a/arch/x86/dts/Makefile
+++ b/arch/x86/dts/Makefile
@@ -2,7 +2,9 @@
chromebox_panther.dtb \
crownbay.dtb \
galileo.dtb \
- minnowmax.dtb
+ minnowmax.dtb \
+ qemu-x86_i440fx.dtb \
+ qemu-x86_q35.dtb
targets += $(dtb-y)
diff --git a/arch/x86/dts/crownbay.dts b/arch/x86/dts/crownbay.dts
index fbdeade..d68efda 100644
--- a/arch/x86/dts/crownbay.dts
+++ b/arch/x86/dts/crownbay.dts
@@ -6,6 +6,8 @@
/dts-v1/;
+#include <dt-bindings/interrupt-router/intel-irq.h>
+
/include/ "skeleton.dtsi"
/include/ "serial.dtsi"
@@ -135,6 +137,58 @@
};
};
};
+
+ irq-router@1f,0 {
+ reg = <0x0000f800 0 0 0 0>;
+ compatible = "intel,irq-router";
+ intel,pirq-config = "pci";
+ intel,pirq-link = <0x60 8>;
+ intel,pirq-mask = <0xdee0>;
+ intel,pirq-routing = <
+ /* TunnelCreek PCI devices */
+ PCI_BDF(0, 2, 0) INTA PIRQE
+ PCI_BDF(0, 3, 0) INTA PIRQF
+ PCI_BDF(0, 23, 0) INTA PIRQE
+ PCI_BDF(0, 24, 0) INTA PIRQF
+ PCI_BDF(0, 25, 0) INTA PIRQG
+ PCI_BDF(0, 26, 0) INTA PIRQH
+ PCI_BDF(0, 27, 0) INTA PIRQG
+ /*
+ * Topcliff PCI devices
+ *
+ * Note on the Crown Bay board, Topcliff chipset
+ * is connected to TunnelCreek PCIe port 0, so
+ * its bus number is 1 for its PCIe port and 2
+ * for its PCI devices per U-Boot currnet PCI
+ * bus enumeration algorithm.
+ */
+ PCI_BDF(1, 0, 0) INTA PIRQA
+ PCI_BDF(2, 0, 1) INTA PIRQA
+ PCI_BDF(2, 0, 2) INTA PIRQA
+ PCI_BDF(2, 2, 0) INTB PIRQB
+ PCI_BDF(2, 2, 1) INTB PIRQB
+ PCI_BDF(2, 2, 2) INTB PIRQB
+ PCI_BDF(2, 2, 3) INTB PIRQB
+ PCI_BDF(2, 2, 4) INTB PIRQB
+ PCI_BDF(2, 4, 0) INTC PIRQC
+ PCI_BDF(2, 4, 1) INTC PIRQC
+ PCI_BDF(2, 6, 0) INTD PIRQD
+ PCI_BDF(2, 8, 0) INTA PIRQA
+ PCI_BDF(2, 8, 1) INTA PIRQA
+ PCI_BDF(2, 8, 2) INTA PIRQA
+ PCI_BDF(2, 8, 3) INTA PIRQA
+ PCI_BDF(2, 10, 0) INTB PIRQB
+ PCI_BDF(2, 10, 1) INTB PIRQB
+ PCI_BDF(2, 10, 2) INTB PIRQB
+ PCI_BDF(2, 10, 3) INTB PIRQB
+ PCI_BDF(2, 10, 4) INTB PIRQB
+ PCI_BDF(2, 12, 0) INTC PIRQC
+ PCI_BDF(2, 12, 1) INTC PIRQC
+ PCI_BDF(2, 12, 2) INTC PIRQC
+ PCI_BDF(2, 12, 3) INTC PIRQC
+ PCI_BDF(2, 12, 4) INTC PIRQC
+ >;
+ };
};
};
diff --git a/arch/x86/dts/galileo.dts b/arch/x86/dts/galileo.dts
index 60dbc5f..2ba081e 100644
--- a/arch/x86/dts/galileo.dts
+++ b/arch/x86/dts/galileo.dts
@@ -7,6 +7,7 @@
/dts-v1/;
#include <dt-bindings/mrc/quark.h>
+#include <dt-bindings/interrupt-router/intel-irq.h>
/include/ "skeleton.dtsi"
@@ -67,6 +68,27 @@
clock-frequency = <44236800>;
current-speed = <115200>;
};
+
+ irq-router@1f,0 {
+ reg = <0x0000f800 0 0 0 0>;
+ compatible = "intel,irq-router";
+ intel,pirq-config = "pci";
+ intel,pirq-link = <0x60 8>;
+ intel,pirq-mask = <0xdef8>;
+ intel,pirq-routing = <
+ PCI_BDF(0, 20, 0) INTA PIRQE
+ PCI_BDF(0, 20, 1) INTB PIRQF
+ PCI_BDF(0, 20, 2) INTC PIRQG
+ PCI_BDF(0, 20, 3) INTD PIRQH
+ PCI_BDF(0, 20, 4) INTA PIRQE
+ PCI_BDF(0, 20, 5) INTB PIRQF
+ PCI_BDF(0, 20, 6) INTC PIRQG
+ PCI_BDF(0, 20, 7) INTD PIRQH
+ PCI_BDF(0, 21, 0) INTA PIRQE
+ PCI_BDF(0, 21, 1) INTB PIRQF
+ PCI_BDF(0, 21, 2) INTC PIRQG
+ >;
+ };
};
gpioa {
diff --git a/arch/x86/dts/minnowmax.dts b/arch/x86/dts/minnowmax.dts
index 7103bc5..bd21bfb 100644
--- a/arch/x86/dts/minnowmax.dts
+++ b/arch/x86/dts/minnowmax.dts
@@ -6,6 +6,8 @@
/dts-v1/;
+#include <dt-bindings/gpio/x86-gpio.h>
+
/include/ "skeleton.dtsi"
/include/ "serial.dtsi"
@@ -22,6 +24,27 @@
silent_console = <0>;
};
+ pch_pinctrl {
+ compatible = "intel,x86-pinctrl";
+ io-base = <0x4c>;
+
+ pin_usb_host_en0@0 {
+ gpio-offset = <0x80 8>;
+ pad-offset = <0x260>;
+ mode-gpio;
+ output-value = <1>;
+ direction = <PIN_OUTPUT>;
+ };
+
+ pin_usb_host_en1@0 {
+ gpio-offset = <0x80 9>;
+ pad-offset = <0x258>;
+ mode-gpio;
+ output-value = <1>;
+ direction = <PIN_OUTPUT>;
+ };
+ };
+
gpioa {
compatible = "intel,ich6-gpio";
u-boot,dm-pre-reloc;
diff --git a/arch/x86/dts/qemu-x86_i440fx.dts b/arch/x86/dts/qemu-x86_i440fx.dts
new file mode 100644
index 0000000..557428a
--- /dev/null
+++ b/arch/x86/dts/qemu-x86_i440fx.dts
@@ -0,0 +1,50 @@
+/*
+ * Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+/dts-v1/;
+
+#include <dt-bindings/interrupt-router/intel-irq.h>
+
+/include/ "skeleton.dtsi"
+/include/ "serial.dtsi"
+
+/ {
+ model = "QEMU x86 (I440FX)";
+ compatible = "qemu,x86";
+
+ config {
+ silent_console = <0>;
+ };
+
+ chosen {
+ stdout-path = "/serial";
+ };
+
+ pci {
+ compatible = "pci-x86";
+ #address-cells = <3>;
+ #size-cells = <2>;
+ u-boot,dm-pre-reloc;
+ ranges = <0x02000000 0x0 0xc0000000 0xc0000000 0 0x10000000
+ 0x42000000 0x0 0xd0000000 0xd0000000 0 0x10000000
+ 0x01000000 0x0 0x2000 0x2000 0 0xe000>;
+
+ irq-router@1,0 {
+ reg = <0x00000800 0 0 0 0>;
+ compatible = "intel,irq-router";
+ intel,pirq-config = "pci";
+ intel,pirq-link = <0x60 4>;
+ intel,pirq-mask = <0x0e40>;
+ intel,pirq-routing = <
+ /* PIIX UHCI */
+ PCI_BDF(0, 1, 2) INTD PIRQD
+ /* e1000 NIC */
+ PCI_BDF(0, 3, 0) INTA PIRQC
+ >;
+ };
+ };
+
+};
diff --git a/arch/x86/dts/qemu-x86_q35.dts b/arch/x86/dts/qemu-x86_q35.dts
new file mode 100644
index 0000000..c259f2a
--- /dev/null
+++ b/arch/x86/dts/qemu-x86_q35.dts
@@ -0,0 +1,67 @@
+/*
+ * Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+/dts-v1/;
+
+#include <dt-bindings/interrupt-router/intel-irq.h>
+
+/* ICH9 IRQ router has discrete PIRQ control registers */
+#undef PIRQE
+#undef PIRQF
+#undef PIRQG
+#undef PIRQH
+#define PIRQE 8
+#define PIRQF 9
+#define PIRQG 10
+#define PIRQH 11
+
+/include/ "skeleton.dtsi"
+/include/ "serial.dtsi"
+
+/ {
+ model = "QEMU x86 (Q35)";
+ compatible = "qemu,x86";
+
+ config {
+ silent_console = <0>;
+ u-boot,no-apm-finalize;
+ };
+
+ chosen {
+ stdout-path = "/serial";
+ };
+
+ pci {
+ compatible = "pci-x86";
+ #address-cells = <3>;
+ #size-cells = <2>;
+ u-boot,dm-pre-reloc;
+ ranges = <0x02000000 0x0 0xc0000000 0xc0000000 0 0x10000000
+ 0x42000000 0x0 0xd0000000 0xd0000000 0 0x10000000
+ 0x01000000 0x0 0x2000 0x2000 0 0xe000>;
+
+ irq-router@1f,0 {
+ reg = <0x0000f800 0 0 0 0>;
+ compatible = "intel,irq-router";
+ intel,pirq-config = "pci";
+ intel,pirq-link = <0x60 8>;
+ intel,pirq-mask = <0x0e40>;
+ intel,pirq-routing = <
+ /* e1000 NIC */
+ PCI_BDF(0, 2, 0) INTA PIRQG
+ /* ICH9 UHCI */
+ PCI_BDF(0, 29, 0) INTA PIRQA
+ PCI_BDF(0, 29, 1) INTB PIRQB
+ PCI_BDF(0, 29, 2) INTC PIRQC
+ /* ICH9 EHCI */
+ PCI_BDF(0, 29, 7) INTD PIRQD
+ /* ICH9 SATA */
+ PCI_BDF(0, 31, 2) INTA PIRQA
+ >;
+ };
+ };
+
+};
diff --git a/arch/x86/include/asm/arch-qemu/device.h b/arch/x86/include/asm/arch-qemu/device.h
new file mode 100644
index 0000000..75a435e
--- /dev/null
+++ b/arch/x86/include/asm/arch-qemu/device.h
@@ -0,0 +1,21 @@
+/*
+ * Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef _QEMU_DEVICE_H_
+#define _QEMU_DEVICE_H_
+
+#include <pci.h>
+
+#define QEMU_I440FX PCI_BDF(0, 0, 0)
+#define PIIX_ISA PCI_BDF(0, 1, 0)
+#define PIIX_IDE PCI_BDF(0, 1, 1)
+#define PIIX_USB PCI_BDF(0, 1, 2)
+#define I440FX_VGA PCI_BDF(0, 2, 0)
+
+#define QEMU_Q35 PCI_BDF(0, 0, 0)
+#define Q35_VGA PCI_BDF(0, 1, 0)
+
+#endif /* _QEMU_DEVICE_H_ */
diff --git a/arch/x86/include/asm/arch-qemu/gpio.h b/arch/x86/include/asm/arch-qemu/gpio.h
new file mode 100644
index 0000000..ca8cba4
--- /dev/null
+++ b/arch/x86/include/asm/arch-qemu/gpio.h
@@ -0,0 +1,13 @@
+/*
+ * Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef _X86_ARCH_GPIO_H_
+#define _X86_ARCH_GPIO_H_
+
+/* Where in config space is the register that points to the GPIO registers? */
+#define PCI_CFG_GPIOBASE 0x44
+
+#endif /* _X86_ARCH_GPIO_H_ */
diff --git a/arch/x86/include/asm/arch-qemu/qemu.h b/arch/x86/include/asm/arch-qemu/qemu.h
new file mode 100644
index 0000000..5cbffff
--- /dev/null
+++ b/arch/x86/include/asm/arch-qemu/qemu.h
@@ -0,0 +1,28 @@
+/*
+ * Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef _ARCH_QEMU_H_
+#define _ARCH_QEMU_H_
+
+/* Programmable Attribute Map (PAM) Registers */
+#define I440FX_PAM 0x59
+#define Q35_PAM 0x90
+#define PAM_NUM 7
+#define PAM_RW 0x33
+
+/* IDE Timing Register */
+#define IDE0_TIM 0x40
+#define IDE1_TIM 0x42
+#define IDE_DECODE_EN 0x8000
+
+/* I/O Ports */
+#define CMOS_ADDR_PORT 0x70
+#define CMOS_DATA_PORT 0x71
+
+#define LOW_RAM_ADDR 0x34
+#define HIGH_RAM_ADDR 0x35
+
+#endif /* _ARCH_QEMU_H_ */
diff --git a/arch/x86/include/asm/arch-quark/device.h b/arch/x86/include/asm/arch-quark/device.h
index 4af3ded..7882f33 100644
--- a/arch/x86/include/asm/arch-quark/device.h
+++ b/arch/x86/include/asm/arch-quark/device.h
@@ -9,20 +9,60 @@
#include <pci.h>
-#define QUARK_HOST_BRIDGE PCI_BDF(0, 0, 0)
-#define QUARK_MMC_SDIO PCI_BDF(0, 20, 0)
-#define QUARK_UART0 PCI_BDF(0, 20, 1)
-#define QUARK_USB_DEVICE PCI_BDF(0, 20, 2)
-#define QUARK_USB_EHCI PCI_BDF(0, 20, 3)
-#define QUARK_USB_OHCI PCI_BDF(0, 20, 4)
-#define QUARK_UART1 PCI_BDF(0, 20, 5)
-#define QUARK_EMAC0 PCI_BDF(0, 20, 6)
-#define QUARK_EMAC1 PCI_BDF(0, 20, 7)
-#define QUARK_SPI0 PCI_BDF(0, 21, 0)
-#define QUARK_SPI1 PCI_BDF(0, 21, 1)
-#define QUARK_I2C_GPIO PCI_BDF(0, 21, 2)
-#define QUARK_PCIE0 PCI_BDF(0, 23, 0)
-#define QUARK_PCIE1 PCI_BDF(0, 23, 1)
-#define QUARK_LEGACY_BRIDGE PCI_BDF(0, 31, 0)
+#define QUARK_HOST_BRIDGE_DEV 0
+#define QUARK_HOST_BRIDGE_FUNC 0
+
+#define QUARK_DEV_20 20
+#define QUARK_MMC_SDIO_FUNC 0
+#define QUARK_UART0_FUNC 1
+#define QUARK_USB_DEVICE_FUNC 2
+#define QUARK_USB_EHCI_FUNC 3
+#define QUARK_USB_OHCI_FUNC 4
+#define QUARK_UART1_FUNC 5
+#define QUARK_EMAC0_FUNC 6
+#define QUARK_EMAC1_FUNC 7
+
+#define QUARK_DEV_21 21
+#define QUARK_SPI0_FUNC 0
+#define QUARK_SPI1_FUNC 1
+#define QUARK_I2C_GPIO_FUNC 2
+
+#define QUARK_DEV_23 23
+#define QUARK_PCIE0_FUNC 0
+#define QUARK_PCIE1_FUNC 1
+
+#define QUARK_LGC_BRIDGE_DEV 31
+#define QUARK_LGC_BRIDGE_FUNC 0
+
+#define QUARK_HOST_BRIDGE \
+ PCI_BDF(0, QUARK_HOST_BRIDGE_DEV, QUARK_HOST_BRIDGE_FUNC)
+#define QUARK_MMC_SDIO \
+ PCI_BDF(0, QUARK_DEV_20, QUARK_MMC_SDIO_FUNC)
+#define QUARK_UART0 \
+ PCI_BDF(0, QUARK_DEV_20, QUARK_UART0_FUNC)
+#define QUARK_USB_DEVICE \
+ PCI_BDF(0, QUARK_DEV_20, QUARK_USB_DEVICE_FUNC)
+#define QUARK_USB_EHCI \
+ PCI_BDF(0, QUARK_DEV_20, QUARK_USB_EHCI_FUNC)
+#define QUARK_USB_OHCI \
+ PCI_BDF(0, QUARK_DEV_20, QUARK_USB_OHCI_FUNC)
+#define QUARK_UART1 \
+ PCI_BDF(0, QUARK_DEV_20, QUARK_UART1_FUNC)
+#define QUARK_EMAC0 \
+ PCI_BDF(0, QUARK_DEV_20, QUARK_EMAC0_FUNC)
+#define QUARK_EMAC1 \
+ PCI_BDF(0, QUARK_DEV_20, QUARK_EMAC1_FUNC)
+#define QUARK_SPI0 \
+ PCI_BDF(0, QUARK_DEV_21, QUARK_SPI0_FUNC)
+#define QUARK_SPI1 \
+ PCI_BDF(0, QUARK_DEV_21, QUARK_SPI1_FUNC)
+#define QUARK_I2C_GPIO \
+ PCI_BDF(0, QUARK_DEV_21, QUARK_I2C_GPIO_FUNC)
+#define QUARK_PCIE0 \
+ PCI_BDF(0, QUARK_DEV_23, QUARK_PCIE0_FUNC)
+#define QUARK_PCIE1 \
+ PCI_BDF(0, QUARK_DEV_23, QUARK_PCIE1_FUNC)
+#define QUARK_LEGACY_BRIDGE \
+ PCI_BDF(0, QUARK_LGC_BRIDGE_DEV, QUARK_LGC_BRIDGE_FUNC)
#endif /* _QUARK_DEVICE_H_ */
diff --git a/arch/x86/include/asm/arch-quark/quark.h b/arch/x86/include/asm/arch-quark/quark.h
index 6dd02fd..c997928 100644
--- a/arch/x86/include/asm/arch-quark/quark.h
+++ b/arch/x86/include/asm/arch-quark/quark.h
@@ -76,4 +76,19 @@
#define LB_BC 0xd8
#define LB_RCBA 0xf0
+#ifndef __ASSEMBLY__
+
+/* Root Complex Register Block */
+struct quark_rcba {
+ u32 rctl;
+ u32 esd;
+ u32 rsvd1[3150];
+ u16 rmu_ir;
+ u16 d23_ir;
+ u16 core_ir;
+ u16 d20d21_ir;
+};
+
+#endif /* __ASSEMBLY__ */
+
#endif /* _QUARK_H_ */
diff --git a/arch/x86/include/asm/arch-queensbay/irq.h b/arch/x86/include/asm/arch-queensbay/irq.h
deleted file mode 100644
index e7f8616..0000000
--- a/arch/x86/include/asm/arch-queensbay/irq.h
+++ /dev/null
@@ -1,55 +0,0 @@
-/*
- * Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#ifndef _ARCH_IRQ_H_
-#define _ARCH_IRQ_H_
-
-enum pci_int_pin {
- INTX,
- INTA,
- INTB,
- INTC,
- INTD
-};
-
-enum pirq_pin {
- PIRQA,
- PIRQB,
- PIRQC,
- PIRQD,
- PIRQE,
- PIRQF,
- PIRQG,
- PIRQH
-};
-
-/* PIRQ link number and value conversion */
-#define LINK_V2N(link) (link - 0x60)
-#define LINK_N2V(link) (link + 0x60)
-
-#define PIRQ_BITMAP 0xdee0
-
-struct irq_info;
-
-/**
- * board_fill_irq_info() - Board-specific irq_info fill routine
- *
- * This fills the irq_info table for any board-specific add-in cards.
- *
- * @slot: pointer to the struct irq_info that is to be filled in
- * @return: number of entries were written to the struct irq_info
- */
-int board_fill_irq_info(struct irq_info *slot);
-
-/**
- * pirq_init() - Initialize platform PIRQ routing
- *
- * This initializes the PIRQ routing on the platform and configures all PCI
- * devices' interrupt line register to a working IRQ number on the 8259 PIC.
- */
-void pirq_init(void);
-
-#endif /* _ARCH_IRQ_H_ */
diff --git a/arch/x86/include/asm/gpio.h b/arch/x86/include/asm/gpio.h
index 1099427..ed85b08 100644
--- a/arch/x86/include/asm/gpio.h
+++ b/arch/x86/include/asm/gpio.h
@@ -147,6 +147,7 @@
} set3;
};
+int gpio_ich6_pinctrl_init(void);
void setup_pch_gpios(u16 gpiobase, const struct pch_gpio_map *gpio);
void ich_gpio_set_gpio_map(const struct pch_gpio_map *map);
diff --git a/arch/x86/include/asm/irq.h b/arch/x86/include/asm/irq.h
new file mode 100644
index 0000000..4de5512
--- /dev/null
+++ b/arch/x86/include/asm/irq.h
@@ -0,0 +1,76 @@
+/*
+ * Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef _ARCH_IRQ_H_
+#define _ARCH_IRQ_H_
+
+#include <dt-bindings/interrupt-router/intel-irq.h>
+
+/**
+ * Intel interrupt router configuration mechanism
+ *
+ * There are two known ways of Intel interrupt router configuration mechanism
+ * so far. On most cases, the IRQ routing configuraiton is controlled by PCI
+ * configuraiton registers on the legacy bridge, normally PCI BDF(0, 31, 0).
+ * On some newer platforms like BayTrail and Braswell, the IRQ routing is now
+ * in the IBASE register block where IBASE is memory-mapped.
+ */
+enum pirq_config {
+ PIRQ_VIA_PCI,
+ PIRQ_VIA_IBASE
+};
+
+/**
+ * Intel interrupt router control block
+ *
+ * Its members' value will be filled in based on device tree's input.
+ *
+ * @config: PIRQ_VIA_PCI or PIRQ_VIA_IBASE
+ * @link_base: link value base number
+ * @irq_mask: IRQ mask reprenting the 16 IRQs in 8259, bit N is 1 means
+ * IRQ N is available to be routed
+ * @lb_bdf: irq router's PCI bus/device/function number encoding
+ * @ibase: IBASE register block base address
+ */
+struct irq_router {
+ int config;
+ u32 link_base;
+ u16 irq_mask;
+ u32 bdf;
+ u32 ibase;
+};
+
+struct pirq_routing {
+ int bdf;
+ int pin;
+ int pirq;
+};
+
+/* PIRQ link number and value conversion */
+#define LINK_V2N(link, base) (link - base)
+#define LINK_N2V(link, base) (link + base)
+
+#define PIRQ_BITMAP 0xdef8
+
+/**
+ * cpu_irq_init() - Initialize CPU IRQ routing
+ *
+ * This initializes some platform-specific registers related to IRQ routing,
+ * like configuring internal PCI devices to use which PCI interrupt pin,
+ * and which PCI interrupt pin is mapped to which PIRQ line. Note on some
+ * platforms, such IRQ routing might be hard-coded thus cannot configure.
+ */
+void cpu_irq_init(void);
+
+/**
+ * pirq_init() - Initialize platform PIRQ routing
+ *
+ * This initializes the PIRQ routing on the platform and configures all PCI
+ * devices' interrupt line register to a working IRQ number on the 8259 PIC.
+ */
+void pirq_init(void);
+
+#endif /* _ARCH_IRQ_H_ */
diff --git a/arch/x86/include/asm/u-boot-x86.h b/arch/x86/include/asm/u-boot-x86.h
index be103c0..d1d21ed 100644
--- a/arch/x86/include/asm/u-boot-x86.h
+++ b/arch/x86/include/asm/u-boot-x86.h
@@ -16,7 +16,6 @@
void setup_gdt(gd_t *id, u64 *gdt_addr);
int init_cache(void);
int cleanup_before_linux(void);
-void panic_puts(const char *str);
/* cpu/.../timer.c */
void timer_isr(void *);
diff --git a/arch/x86/lib/fsp/fsp_support.c b/arch/x86/lib/fsp/fsp_support.c
index 5f96da1..5809235 100644
--- a/arch/x86/lib/fsp/fsp_support.c
+++ b/arch/x86/lib/fsp/fsp_support.c
@@ -279,7 +279,7 @@
res_desc = (struct hob_res_desc *)hdr;
if (res_desc->type == RES_SYS_MEM) {
phys_start = res_desc->phys_start;
- /* Need memory above 1MB to be collected here */
+ /* Need memory above 4GB to be collected here */
if (phys_start >= (phys_addr_t)FSP_HIGHMEM_BASE)
top += (u32)(res_desc->len);
}
diff --git a/board/BuR/common/bur_common.h b/board/BuR/common/bur_common.h
index e4896fb..ded69e7 100644
--- a/board/BuR/common/bur_common.h
+++ b/board/BuR/common/bur_common.h
@@ -3,7 +3,7 @@
*
* common board information header for B&R boards
*
- * Copyright (C) 2013 Hannes Petermaier <oe5hpm@oevsv.at>
+ * Copyright (C) 2013 Hannes Schmelzer <oe5hpm@oevsv.at>
* Bernecker & Rainer Industrieelektronik GmbH - http://www.br-automation.com
*
* SPDX-License-Identifier: GPL-2.0+
diff --git a/board/BuR/common/common.c b/board/BuR/common/common.c
index 5b356fb..7830d1a 100644
--- a/board/BuR/common/common.c
+++ b/board/BuR/common/common.c
@@ -3,7 +3,7 @@
*
* common board functions for B&R boards
*
- * Copyright (C) 2013 Hannes Petermaier <oe5hpm@oevsv.at>
+ * Copyright (C) 2013 Hannes Schmelzer <oe5hpm@oevsv.at>
* Bernecker & Rainer Industrieelektronik GmbH - http://www.br-automation.com
*
* SPDX-License-Identifier: GPL-2.0+
diff --git a/board/BuR/kwb/MAINTAINERS b/board/BuR/kwb/MAINTAINERS
index c28fb49..ca7d329 100644
--- a/board/BuR/kwb/MAINTAINERS
+++ b/board/BuR/kwb/MAINTAINERS
@@ -1,5 +1,5 @@
KWB BOARD
-M: Hannes Petermaier <hannes.petermaier@br-automation.com>
+M: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
S: Maintained
F: board/BuR/kwb/
F: include/configs/kwb.h
diff --git a/board/BuR/kwb/Makefile b/board/BuR/kwb/Makefile
index 7b04b26..782664c 100644
--- a/board/BuR/kwb/Makefile
+++ b/board/BuR/kwb/Makefile
@@ -1,7 +1,7 @@
#
# Makefile
#
-# Copyright (C) 2014 Hannes Petermaier <oe5hpm@oevsv.at> -
+# Copyright (C) 2014 Hannes Schmelzer <oe5hpm@oevsv.at> -
# Bernecker & Rainer Industrielektronik GmbH - http://www.br-automation.com/
#
# SPDX-License-Identifier: GPL-2.0+
diff --git a/board/BuR/kwb/board.c b/board/BuR/kwb/board.c
index 01dd1d9..640aca4 100644
--- a/board/BuR/kwb/board.c
+++ b/board/BuR/kwb/board.c
@@ -3,7 +3,7 @@
*
* Board functions for B&R KWB Board
*
- * Copyright (C) 2013 Hannes Petermaier <oe5hpm@oevsv.at>
+ * Copyright (C) 2013 Hannes Schmelzer <oe5hpm@oevsv.at>
* Bernecker & Rainer Industrieelektronik GmbH - http://www.br-automation.com
*
* SPDX-License-Identifier: GPL-2.0+
diff --git a/board/BuR/kwb/mux.c b/board/BuR/kwb/mux.c
index 2b1d8d3..40224f7 100644
--- a/board/BuR/kwb/mux.c
+++ b/board/BuR/kwb/mux.c
@@ -3,7 +3,7 @@
*
* Pinmux Setting for B&R LEIT Board(s)
*
- * Copyright (C) 2013 Hannes Petermaier <oe5hpm@oevsv.at>
+ * Copyright (C) 2013 Hannes Schmelzer <oe5hpm@oevsv.at>
* Bernecker & Rainer Industrieelektronik GmbH - http://www.br-automation.com
*
* SPDX-License-Identifier: GPL-2.0+
diff --git a/board/BuR/tseries/MAINTAINERS b/board/BuR/tseries/MAINTAINERS
index e57326a..e2e67e6 100644
--- a/board/BuR/tseries/MAINTAINERS
+++ b/board/BuR/tseries/MAINTAINERS
@@ -1,5 +1,5 @@
TSERIES BOARD
-M: Hannes Petermaier <hannes.petermaier@br-automation.com>
+M: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
S: Maintained
F: board/BuR/tseries/
F: include/configs/tseries.h
diff --git a/board/BuR/tseries/Makefile b/board/BuR/tseries/Makefile
index ec0d27a..43945d2 100644
--- a/board/BuR/tseries/Makefile
+++ b/board/BuR/tseries/Makefile
@@ -1,7 +1,7 @@
#
# Makefile
#
-# Copyright (C) 2013 Hannes Petermaier <oe5hpm@oevsv.at>
+# Copyright (C) 2013 Hannes Schmelzer <oe5hpm@oevsv.at>
# Bernecker & Rainer Industrieelektronik GmbH - http://www.br-automation.com
#
# SPDX-License-Identifier: GPL-2.0+
diff --git a/board/BuR/tseries/board.c b/board/BuR/tseries/board.c
index d1d698e..bc119e6 100644
--- a/board/BuR/tseries/board.c
+++ b/board/BuR/tseries/board.c
@@ -3,7 +3,7 @@
*
* Board functions for B&R LEIT Board
*
- * Copyright (C) 2013 Hannes Petermaier <oe5hpm@oevsv.at>
+ * Copyright (C) 2013 Hannes Schmelzer <oe5hpm@oevsv.at>
* Bernecker & Rainer Industrieelektronik GmbH - http://www.br-automation.com
*
* SPDX-License-Identifier: GPL-2.0+
diff --git a/board/BuR/tseries/mux.c b/board/BuR/tseries/mux.c
index c5dc4b7..349788a 100644
--- a/board/BuR/tseries/mux.c
+++ b/board/BuR/tseries/mux.c
@@ -3,7 +3,7 @@
*
* Pinmux Setting for B&R LEIT Board(s)
*
- * Copyright (C) 2013 Hannes Petermaier <oe5hpm@oevsv.at>
+ * Copyright (C) 2013 Hannes Schmelzer <oe5hpm@oevsv.at>
* Bernecker & Rainer Industrieelektronik GmbH - http://www.br-automation.com
*
* SPDX-License-Identifier: GPL-2.0+
diff --git a/board/buffalo/lsxl/lsxl.c b/board/buffalo/lsxl/lsxl.c
index 45dd788..0f37345 100644
--- a/board/buffalo/lsxl/lsxl.c
+++ b/board/buffalo/lsxl/lsxl.c
@@ -227,8 +227,6 @@
static void rescue_mode(void)
{
- uchar enetaddr[6];
-
printf("Entering rescue mode..\n");
setenv("bootsource", "rescue");
}
diff --git a/board/coreboot/coreboot/Kconfig b/board/coreboot/coreboot/Kconfig
index 6a04158..3ff64f4 100644
--- a/board/coreboot/coreboot/Kconfig
+++ b/board/coreboot/coreboot/Kconfig
@@ -16,21 +16,21 @@
config SYS_CONFIG_NAME
string "Board configuration file"
- default "chromebook_link"
+ default "qemu-x86"
help
This option selects the board configuration file in include/configs/
directory to be used to build U-Boot for coreboot.
config DEFAULT_DEVICE_TREE
string "Board Device Tree Source (dts) file"
- default "chromebook_link"
+ default "qemu-x86_i440fx"
help
This option selects the board Device Tree Source (dts) file in
arch/x86/dts/ directory to be used to build U-Boot for coreboot.
config SYS_CAR_ADDR
hex "Board specific Cache-As-RAM (CAR) address"
- default 0x19200000
+ default 0x01920000
help
This option specifies the board specific Cache-As-RAM (CAR) address.
diff --git a/board/emulation/Kconfig b/board/emulation/Kconfig
new file mode 100644
index 0000000..36809fd
--- /dev/null
+++ b/board/emulation/Kconfig
@@ -0,0 +1,25 @@
+#
+# Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+if VENDOR_EMULATION
+
+choice
+ prompt "Mainboard model"
+
+config TARGET_QEMU_X86
+ bool "QEMU x86"
+ help
+ This is the QEMU emulated x86 board. U-Boot supports running
+ as a coreboot payload as well as bare boot without coreboot.
+ There are two types of x86 boards supported by QEMU which are
+ supported by U-Boot. They are via QEMU '-M pc', an i440FX/PIIX
+ chipset platform and '-M q35', a Q35/ICH9 chipset platform.
+
+endchoice
+
+source "board/emulation/qemu-x86/Kconfig"
+
+endif
diff --git a/board/emulation/qemu-x86/Kconfig b/board/emulation/qemu-x86/Kconfig
new file mode 100644
index 0000000..e777ef4
--- /dev/null
+++ b/board/emulation/qemu-x86/Kconfig
@@ -0,0 +1,24 @@
+if TARGET_QEMU_X86
+
+config SYS_BOARD
+ default "qemu-x86"
+
+config SYS_VENDOR
+ default "emulation"
+
+config SYS_SOC
+ default "qemu"
+
+config SYS_CONFIG_NAME
+ default "qemu-x86"
+
+config SYS_TEXT_BASE
+ default 0xfff00000
+
+config BOARD_SPECIFIC_OPTIONS # dummy
+ def_bool y
+ select X86_RESET_VECTOR
+ select QEMU
+ select BOARD_ROMSIZE_KB_1024
+
+endif
diff --git a/board/emulation/qemu-x86/MAINTAINERS b/board/emulation/qemu-x86/MAINTAINERS
new file mode 100644
index 0000000..ea4dd19
--- /dev/null
+++ b/board/emulation/qemu-x86/MAINTAINERS
@@ -0,0 +1,6 @@
+QEMU X86 BOARD
+M: Bin Meng <bmeng.cn@gmail.com>
+S: Maintained
+F: board/emulation/qemu-x86/
+F: include/configs/qemu-x86.h
+F: configs/qemu-x86_defconfig
diff --git a/board/emulation/qemu-x86/Makefile b/board/emulation/qemu-x86/Makefile
new file mode 100644
index 0000000..ad2bbb9
--- /dev/null
+++ b/board/emulation/qemu-x86/Makefile
@@ -0,0 +1,7 @@
+#
+# Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y += qemu-x86.o start.o
diff --git a/board/emulation/qemu-x86/qemu-x86.c b/board/emulation/qemu-x86/qemu-x86.c
new file mode 100644
index 0000000..fedea81
--- /dev/null
+++ b/board/emulation/qemu-x86/qemu-x86.c
@@ -0,0 +1,13 @@
+/*
+ * Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <netdev.h>
+
+int board_eth_init(bd_t *bis)
+{
+ return pci_eth_init(bis);
+}
diff --git a/board/emulation/qemu-x86/start.S b/board/emulation/qemu-x86/start.S
new file mode 100644
index 0000000..a71db69
--- /dev/null
+++ b/board/emulation/qemu-x86/start.S
@@ -0,0 +1,9 @@
+/*
+ * Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+.globl early_board_init
+early_board_init:
+ jmp early_board_init_ret
diff --git a/board/intel/crownbay/crownbay.c b/board/intel/crownbay/crownbay.c
index 31bb320..ad2d5b6 100644
--- a/board/intel/crownbay/crownbay.c
+++ b/board/intel/crownbay/crownbay.c
@@ -12,8 +12,6 @@
#define SERIAL_DEV PNP_DEV(0x2e, 4)
-DECLARE_GLOBAL_DATA_PTR;
-
int board_early_init_f(void)
{
lpc47m_enable_serial(SERIAL_DEV, UART0_BASE, UART0_IRQ);
diff --git a/board/intel/galileo/galileo.c b/board/intel/galileo/galileo.c
index f2e7468..746ab27 100644
--- a/board/intel/galileo/galileo.c
+++ b/board/intel/galileo/galileo.c
@@ -6,8 +6,6 @@
#include <common.h>
-DECLARE_GLOBAL_DATA_PTR;
-
int board_early_init_f(void)
{
return 0;
diff --git a/board/intel/minnowmax/minnowmax.c b/board/intel/minnowmax/minnowmax.c
index fd2070a..383cae0 100644
--- a/board/intel/minnowmax/minnowmax.c
+++ b/board/intel/minnowmax/minnowmax.c
@@ -5,6 +5,7 @@
*/
#include <common.h>
+#include <asm/gpio.h>
#include <asm/ibmpc.h>
#include <asm/pnp_def.h>
#include <netdev.h>
@@ -12,7 +13,13 @@
#define SERIAL_DEV PNP_DEV(0x2e, 4)
-DECLARE_GLOBAL_DATA_PTR;
+int arch_early_init_r(void)
+{
+ /* do the pin-muxing */
+ gpio_ich6_pinctrl_init();
+
+ return 0;
+}
int board_early_init_f(void)
{
diff --git a/board/renesas/alt/Kconfig b/board/renesas/alt/Kconfig
index 957962d..39d53c1 100644
--- a/board/renesas/alt/Kconfig
+++ b/board/renesas/alt/Kconfig
@@ -9,4 +9,13 @@
config SYS_CONFIG_NAME
default "alt"
+config R8A7794_ETHERNET_B
+ bool "Use ethernet B function"
+ depends on TARGET_ALT
+ default n
+ help
+ ALT board can use default ethernet and etnernet B function.
+ This config set pin function of ethenet B. You also needt to change
+ DIP switch of board in order to use this function.
+
endif
diff --git a/board/renesas/alt/alt.c b/board/renesas/alt/alt.c
index f0010db..3501a17 100644
--- a/board/renesas/alt/alt.c
+++ b/board/renesas/alt/alt.c
@@ -1,7 +1,7 @@
/*
* board/renesas/alt/alt.c
*
- * Copyright (C) 2014 Renesas Electronics Corporation
+ * Copyright (C) 2014, 2015 Renesas Electronics Corporation
*
* SPDX-License-Identifier: GPL-2.0
*/
@@ -94,6 +94,20 @@
r8a7794_pinmux_init();
/* Ether Enable */
+#if defined(CONFIG_R8A7794_ETHERNET_B)
+ gpio_request(GPIO_FN_ETH_CRS_DV_B, NULL);
+ gpio_request(GPIO_FN_ETH_RX_ER_B, NULL);
+ gpio_request(GPIO_FN_ETH_RXD0_B, NULL);
+ gpio_request(GPIO_FN_ETH_RXD1_B, NULL);
+ gpio_request(GPIO_FN_ETH_LINK_B, NULL);
+ gpio_request(GPIO_FN_ETH_REFCLK_B, NULL);
+ gpio_request(GPIO_FN_ETH_MDIO_B, NULL);
+ gpio_request(GPIO_FN_ETH_TXD1_B, NULL);
+ gpio_request(GPIO_FN_ETH_TX_EN_B, NULL);
+ gpio_request(GPIO_FN_ETH_MAGIC_B, NULL);
+ gpio_request(GPIO_FN_ETH_TXD0_B, NULL);
+ gpio_request(GPIO_FN_ETH_MDC_B, NULL);
+#else
gpio_request(GPIO_FN_ETH_CRS_DV, NULL);
gpio_request(GPIO_FN_ETH_RX_ER, NULL);
gpio_request(GPIO_FN_ETH_RXD0, NULL);
@@ -106,6 +120,7 @@
gpio_request(GPIO_FN_ETH_MAGIC, NULL);
gpio_request(GPIO_FN_ETH_TXD0, NULL);
gpio_request(GPIO_FN_ETH_MDC, NULL);
+#endif
gpio_request(GPIO_FN_IRQ8, NULL);
/* PHY reset */
diff --git a/board/renesas/alt/qos.c b/board/renesas/alt/qos.c
index f0b349f..b6324c8 100644
--- a/board/renesas/alt/qos.c
+++ b/board/renesas/alt/qos.c
@@ -14,7 +14,7 @@
#include <asm/arch/rmobile.h>
#if defined(CONFIG_RMOBILE_EXTRAM_BOOT)
-/* QoS version 0.11 */
+/* QoS version 0.311 for ES1 and version 0.321 for ES2 */
enum {
DBSC3_00, DBSC3_01, DBSC3_02, DBSC3_03, DBSC3_04,
@@ -62,6 +62,24 @@
[DBSC3_15] = DBSC3_0_QOS_W15_BASE,
};
+#if defined(CONFIG_QOS_PRI_MEDIA)
+#define is_qos_pri_media() 1
+#else
+#define is_qos_pri_media() 0
+#endif
+
+#if defined(CONFIG_QOS_PRI_NORMAL)
+#define is_qos_pri_normal() 1
+#else
+#define is_qos_pri_normal() 0
+#endif
+
+#if defined(CONFIG_QOS_PRI_GFX)
+#define is_qos_pri_gfx() 1
+#else
+#define is_qos_pri_gfx() 0
+#endif
+
void qos_init(void)
{
int i;
@@ -77,30 +95,57 @@
/* S3C -QoS */
s3c = (struct rcar_s3c *)S3C_BASE;
- writel(0x1F0D0B0A, &s3c->s3crorr);
- writel(0x1F0D0B09, &s3c->s3cworr);
-
+ if (is_qos_pri_media()) {
+ writel(0x1F0B0604, &s3c->s3crorr);
+ writel(0x1F0E0705, &s3c->s3cworr);
+ } else if (is_qos_pri_normal()) {
+ writel(0x1F0B0908, &s3c->s3crorr);
+ writel(0x1F0E0A08, &s3c->s3cworr);
+ } else if (is_qos_pri_media()) {
+ writel(0x1F0B0B0B, &s3c->s3crorr);
+ writel(0x1F0E0C0C, &s3c->s3cworr);
+ }
/* QoS Control Registers */
s3c_qos = (struct rcar_s3c_qos *)S3C_QOS_CCI0_BASE;
writel(0x00890089, &s3c_qos->s3cqos0);
writel(0x20960010, &s3c_qos->s3cqos1);
writel(0x20302030, &s3c_qos->s3cqos2);
- writel(0x20AA2200, &s3c_qos->s3cqos3);
+ if (is_qos_pri_media())
+ writel(0x20AA2300, &s3c_qos->s3cqos3);
+ else if (is_qos_pri_normal())
+ writel(0x20AA2200, &s3c_qos->s3cqos3);
+ else if (is_qos_pri_media())
+ writel(0x20AA2100, &s3c_qos->s3cqos3);
writel(0x00002032, &s3c_qos->s3cqos4);
writel(0x20960010, &s3c_qos->s3cqos5);
writel(0x20302030, &s3c_qos->s3cqos6);
- writel(0x20AA2200, &s3c_qos->s3cqos7);
+ if (is_qos_pri_media())
+ writel(0x20AA2300, &s3c_qos->s3cqos7);
+ else if (is_qos_pri_normal())
+ writel(0x20AA2200, &s3c_qos->s3cqos7);
+ else if (is_qos_pri_gfx())
+ writel(0x20AA2100, &s3c_qos->s3cqos7);
writel(0x00002032, &s3c_qos->s3cqos8);
s3c_qos = (struct rcar_s3c_qos *)S3C_QOS_CCI1_BASE;
writel(0x00890089, &s3c_qos->s3cqos0);
writel(0x20960010, &s3c_qos->s3cqos1);
writel(0x20302030, &s3c_qos->s3cqos2);
- writel(0x20AA2200, &s3c_qos->s3cqos3);
+ if (is_qos_pri_media())
+ writel(0x20AA2300, &s3c_qos->s3cqos3);
+ else if (is_qos_pri_normal())
+ writel(0x20AA2200, &s3c_qos->s3cqos3);
+ else if (is_qos_pri_gfx())
+ writel(0x20AA2100, &s3c_qos->s3cqos3);
writel(0x00002032, &s3c_qos->s3cqos4);
writel(0x20960010, &s3c_qos->s3cqos5);
writel(0x20302030, &s3c_qos->s3cqos6);
- writel(0x20AA2200, &s3c_qos->s3cqos7);
+ if (is_qos_pri_media())
+ writel(0x20AA2300, &s3c_qos->s3cqos7);
+ else if (is_qos_pri_media())
+ writel(0x20AA2200, &s3c_qos->s3cqos7);
+ else if (is_qos_pri_media())
+ writel(0x20AA2100, &s3c_qos->s3cqos7);
writel(0x00002032, &s3c_qos->s3cqos8);
s3c_qos = (struct rcar_s3c_qos *)S3C_QOS_MXI_BASE;
@@ -115,7 +160,7 @@
writel(0x00002032, &s3c_qos->s3cqos8);
s3c_qos = (struct rcar_s3c_qos *)S3C_QOS_AXI_BASE;
- writel(0x00820082, &s3c_qos->s3cqos0);
+ writel(0x00820092, &s3c_qos->s3cqos0);
writel(0x20960020, &s3c_qos->s3cqos1);
writel(0x20302030, &s3c_qos->s3cqos2);
writel(0x20AA20FA, &s3c_qos->s3cqos3);
@@ -157,8 +202,13 @@
}
/* CCI-400 -QoS */
- writel(0x20000800, CCI_400_MAXOT_1);
- writel(0x20000800, CCI_400_MAXOT_2);
+ if (IS_R8A7794_ES2()) {
+ writel(0x20001000, CCI_400_MAXOT_1);
+ writel(0x20001000, CCI_400_MAXOT_2);
+ } else {
+ writel(0x20000800, CCI_400_MAXOT_1);
+ writel(0x20000800, CCI_400_MAXOT_2);
+ }
writel(0x0000000C, CCI_400_QOSCNTL_1);
writel(0x0000000C, CCI_400_QOSCNTL_2);
@@ -166,7 +216,7 @@
/* Transaction Control (MXI) */
mxi = (struct rcar_mxi *)MXI_BASE;
writel(0x00000013, &mxi->mxrtcr);
- writel(0x00000013, &mxi->mxwtcr);
+ writel(0x00000016, &mxi->mxwtcr);
writel(0x00780080, &mxi->mxsaar0);
writel(0x02000800, &mxi->mxsaar1);
@@ -449,7 +499,7 @@
/* QoS Register (RT-AXI) */
axi_qos = (struct rcar_axi_qos *)RT_AXI_SHX_BASE;
- writel(0x00000000, &axi_qos->qosconf);
+ writel(0x00000001, &axi_qos->qosconf);
writel(0x00002053, &axi_qos->qosctset0);
writel(0x00002096, &axi_qos->qosctset1);
writel(0x00002030, &axi_qos->qosctset2);
diff --git a/board/renesas/gose/qos.c b/board/renesas/gose/qos.c
index 64e52cf..413ad11 100644
--- a/board/renesas/gose/qos.c
+++ b/board/renesas/gose/qos.c
@@ -14,7 +14,7 @@
#include <asm/arch/rmobile.h>
#if defined(CONFIG_RMOBILE_EXTRAM_BOOT)
-/* QoS version 0.20 */
+/* QoS version 0.311 */
enum {
DBSC3_00, DBSC3_01, DBSC3_02, DBSC3_03, DBSC3_04,
DBSC3_05, DBSC3_06, DBSC3_07, DBSC3_08, DBSC3_09,
@@ -61,6 +61,24 @@
[DBSC3_15] = DBSC3_0_QOS_W15_BASE,
};
+#if defined(CONFIG_QOS_PRI_MEDIA)
+#define is_qos_pri_media() 1
+#else
+#define is_qos_pri_media() 0
+#endif
+
+#if defined(CONFIG_QOS_PRI_NORMAL)
+#define is_qos_pri_normal() 1
+#else
+#define is_qos_pri_normal() 0
+#endif
+
+#if defined(CONFIG_QOS_PRI_GFX)
+#define is_qos_pri_gfx() 1
+#else
+#define is_qos_pri_gfx() 0
+#endif
+
void qos_init(void)
{
int i;
@@ -77,34 +95,62 @@
/* S3C -QoS */
s3c = (struct rcar_s3c *)S3C_BASE;
writel(0x00000000, &s3c->s3cadsplcr);
- writel(0x1F0B0908, &s3c->s3crorr);
- writel(0x1F0C0A08, &s3c->s3cworr);
-
+ if (is_qos_pri_media()) {
+ writel(0x1F0B0604, &s3c->s3crorr);
+ writel(0x1F0E0705, &s3c->s3cworr);
+ } else if (is_qos_pri_normal()) {
+ writel(0x1F0B0908, &s3c->s3crorr);
+ writel(0x1F0C0A08, &s3c->s3cworr);
+ } else if (is_qos_pri_gfx()) {
+ writel(0x1F0B0B0B, &s3c->s3crorr);
+ writel(0x1F0E0C0C, &s3c->s3cworr);
+ }
/* QoS Control Registers */
s3c_qos = (struct rcar_s3c_qos *)S3C_QOS_CCI0_BASE;
writel(0x00890089, &s3c_qos->s3cqos0);
writel(0x20960010, &s3c_qos->s3cqos1);
writel(0x20302030, &s3c_qos->s3cqos2);
- writel(0x20AA2200, &s3c_qos->s3cqos3);
+ if (is_qos_pri_media())
+ writel(0x20AA2300, &s3c_qos->s3cqos3);
+ else if (is_qos_pri_normal())
+ writel(0x20AA2200, &s3c_qos->s3cqos3);
+ else if (is_qos_pri_gfx())
+ writel(0x20AA2100, &s3c_qos->s3cqos3);
writel(0x00002032, &s3c_qos->s3cqos4);
writel(0x20960010, &s3c_qos->s3cqos5);
writel(0x20302030, &s3c_qos->s3cqos6);
- writel(0x20AA2200, &s3c_qos->s3cqos7);
+ if (is_qos_pri_media())
+ writel(0x20AA2300, &s3c_qos->s3cqos7);
+ else if (is_qos_pri_normal())
+ writel(0x20AA2200, &s3c_qos->s3cqos7);
+ else if (is_qos_pri_gfx())
+ writel(0x20AA2100, &s3c_qos->s3cqos7);
writel(0x00002032, &s3c_qos->s3cqos8);
s3c_qos = (struct rcar_s3c_qos *)S3C_QOS_CCI1_BASE;
writel(0x00890089, &s3c_qos->s3cqos0);
writel(0x20960010, &s3c_qos->s3cqos1);
writel(0x20302030, &s3c_qos->s3cqos2);
- writel(0x20AA2200, &s3c_qos->s3cqos3);
+ if (is_qos_pri_media())
+ writel(0x20AA2300, &s3c_qos->s3cqos3);
+ else if (is_qos_pri_normal())
+ writel(0x20AA2200, &s3c_qos->s3cqos3);
+ else if (is_qos_pri_gfx())
+ writel(0x20AA2100, &s3c_qos->s3cqos3);
writel(0x00002032, &s3c_qos->s3cqos4);
writel(0x20960010, &s3c_qos->s3cqos5);
writel(0x20302030, &s3c_qos->s3cqos6);
- writel(0x20AA2200, &s3c_qos->s3cqos7);
+ if (is_qos_pri_media())
+ writel(0x20AA2300, &s3c_qos->s3cqos7);
+ else if (is_qos_pri_normal())
+ writel(0x20AA2200, &s3c_qos->s3cqos7);
+ else if (is_qos_pri_gfx())
+ writel(0x20AA2100, &s3c_qos->s3cqos7);
+ writel(0x00002032, &s3c_qos->s3cqos4);
writel(0x00002032, &s3c_qos->s3cqos8);
s3c_qos = (struct rcar_s3c_qos *)S3C_QOS_MXI_BASE;
- writel(0x00820082, &s3c_qos->s3cqos0);
+ writel(0x00820092, &s3c_qos->s3cqos0);
writel(0x20960020, &s3c_qos->s3cqos1);
writel(0x20302030, &s3c_qos->s3cqos2);
writel(0x20AA20DC, &s3c_qos->s3cqos3);
@@ -115,7 +161,7 @@
writel(0x00002032, &s3c_qos->s3cqos8);
s3c_qos = (struct rcar_s3c_qos *)S3C_QOS_AXI_BASE;
- writel(0x00820082, &s3c_qos->s3cqos0);
+ writel(0x00820092, &s3c_qos->s3cqos0);
writel(0x20960020, &s3c_qos->s3cqos1);
writel(0x20302030, &s3c_qos->s3cqos2);
writel(0x20AA20FA, &s3c_qos->s3cqos3);
@@ -166,11 +212,13 @@
/* Transaction Control (MXI) */
mxi = (struct rcar_mxi *)MXI_BASE;
writel(0x00000013, &mxi->mxrtcr);
- writel(0x00000013, &mxi->mxwtcr);
+ writel(0x00000016, &mxi->mxwtcr);
writel(0x00200000, &mxi->mxs3cracr);
writel(0x00200000, &mxi->mxs3cwacr);
writel(0x00200000, &mxi->mxaxiracr);
writel(0x00200000, &mxi->mxaxiwacr);
+ writel(0x00780080, &mxi->mxsaar0);
+ writel(0x02000800, &mxi->mxsaar1);
/* QoS Control (MXI) */
mxi_qos = (struct rcar_mxi_qos *)MXI_QOS_BASE;
@@ -554,7 +602,7 @@
/* QoS Register (RT-AXI) */
axi_qos = (struct rcar_axi_qos *)RT_AXI_SHX_BASE;
- writel(0x00000000, &axi_qos->qosconf);
+ writel(0x00000001, &axi_qos->qosconf);
writel(0x00002053, &axi_qos->qosctset0);
writel(0x00002096, &axi_qos->qosctset1);
writel(0x00002030, &axi_qos->qosctset2);
diff --git a/board/renesas/koelsch/qos.c b/board/renesas/koelsch/qos.c
index d293e3d..8cb2b48 100644
--- a/board/renesas/koelsch/qos.c
+++ b/board/renesas/koelsch/qos.c
@@ -13,7 +13,7 @@
#include <asm/io.h>
#include <asm/arch/rmobile.h>
-/* QoS version 0.240 for ES1 and version 0.334 for ES2 */
+/* QoS version 0.240 for ES1 and version 0.411 for ES2 */
#if defined(CONFIG_RMOBILE_EXTRAM_BOOT)
enum {
DBSC3_00, DBSC3_01, DBSC3_02, DBSC3_03, DBSC3_04,
@@ -99,6 +99,24 @@
[DBSC3_15] = DBSC3_1_QOS_W15_BASE,
};
+#if defined(CONFIG_QOS_PRI_MEDIA)
+#define is_qos_pri_media() 1
+#else
+#define is_qos_pri_media() 0
+#endif
+
+#if defined(CONFIG_QOS_PRI_NORMAL)
+#define is_qos_pri_normal() 1
+#else
+#define is_qos_pri_normal() 0
+#endif
+
+#if defined(CONFIG_QOS_PRI_GFX)
+#define is_qos_pri_gfx() 1
+#else
+#define is_qos_pri_gfx() 0
+#endif
+
void qos_init(void)
{
int i;
@@ -124,8 +142,17 @@
/* writel(0x00DF1B0C, &s3c->s3cadsplcr); */
/* Ssplit All mode */
/* writel(0x00FF1B0C, &s3c->s3cadsplcr); */
- writel(0x1F0B0908, &s3c->s3crorr);
- writel(0x1F0C0A08, &s3c->s3cworr);
+
+ if (is_qos_pri_media()) {
+ writel(0x1F0B0604, &s3c->s3crorr);
+ writel(0x1F0E0705, &s3c->s3cworr);
+ } else if (is_qos_pri_normal()) {
+ writel(0x1F0B0908, &s3c->s3crorr);
+ writel(0x1F0E0A08, &s3c->s3cworr);
+ } else if (is_qos_pri_gfx()) {
+ writel(0x1F0B0B0B, &s3c->s3crorr);
+ writel(0x1F0E0C0C, &s3c->s3cworr);
+ }
} else {
writel(0x00FF1B1D, &s3c->s3cadsplcr);
writel(0x1F0D0C0C, &s3c->s3crorr);
@@ -136,26 +163,67 @@
writel(0x00890089, &s3c_qos->s3cqos0);
writel(0x20960010, &s3c_qos->s3cqos1);
writel(0x20302030, &s3c_qos->s3cqos2);
- writel(0x20AA2200, &s3c_qos->s3cqos3);
+
+ if (IS_R8A7791_ES2()) {
+ if (is_qos_pri_media())
+ writel(0x20AA2300, &s3c_qos->s3cqos3);
+ else if (is_qos_pri_normal())
+ writel(0x20AA2200, &s3c_qos->s3cqos3);
+ else if (is_qos_pri_gfx())
+ writel(0x20AA2100, &s3c_qos->s3cqos3);
+ } else {
+ writel(0x20AA2200, &s3c_qos->s3cqos3);
+ }
writel(0x00002032, &s3c_qos->s3cqos4);
writel(0x20960010, &s3c_qos->s3cqos5);
writel(0x20302030, &s3c_qos->s3cqos6);
- writel(0x20AA2200, &s3c_qos->s3cqos7);
+
+ if (IS_R8A7791_ES2()) {
+ if (is_qos_pri_media())
+ writel(0x20AA2300, &s3c_qos->s3cqos7);
+ else if (is_qos_pri_normal())
+ writel(0x20AA2200, &s3c_qos->s3cqos7);
+ else if (is_qos_pri_gfx())
+ writel(0x20AA2100, &s3c_qos->s3cqos7);
+ } else {
+ writel(0x20AA2200, &s3c_qos->s3cqos7);
+ }
writel(0x00002032, &s3c_qos->s3cqos8);
s3c_qos = (struct rcar_s3c_qos *)S3C_QOS_CCI1_BASE;
writel(0x00890089, &s3c_qos->s3cqos0);
writel(0x20960010, &s3c_qos->s3cqos1);
writel(0x20302030, &s3c_qos->s3cqos2);
- writel(0x20AA2200, &s3c_qos->s3cqos3);
+ if (IS_R8A7791_ES2()) {
+ if (is_qos_pri_media())
+ writel(0x20AA2300, &s3c_qos->s3cqos3);
+ else if (is_qos_pri_normal())
+ writel(0x20AA2200, &s3c_qos->s3cqos3);
+ else if (is_qos_pri_gfx())
+ writel(0x20AA2100, &s3c_qos->s3cqos3);
+ } else {
+ writel(0x20AA2200, &s3c_qos->s3cqos3);
+ }
writel(0x00002032, &s3c_qos->s3cqos4);
writel(0x20960010, &s3c_qos->s3cqos5);
writel(0x20302030, &s3c_qos->s3cqos6);
- writel(0x20AA2200, &s3c_qos->s3cqos7);
+ if (IS_R8A7791_ES2()) {
+ if (is_qos_pri_media())
+ writel(0x20AA2300, &s3c_qos->s3cqos7);
+ else if (is_qos_pri_normal())
+ writel(0x20AA2200, &s3c_qos->s3cqos7);
+ else if (is_qos_pri_gfx())
+ writel(0x20AA2100, &s3c_qos->s3cqos7);
+ } else {
+ writel(0x20AA2200, &s3c_qos->s3cqos7);
+ }
writel(0x00002032, &s3c_qos->s3cqos8);
s3c_qos = (struct rcar_s3c_qos *)S3C_QOS_MXI_BASE;
- writel(0x00820082, &s3c_qos->s3cqos0);
+ if (IS_R8A7791_ES2())
+ writel(0x80928092, &s3c_qos->s3cqos0);
+ else
+ writel(0x00820082, &s3c_qos->s3cqos0);
writel(0x20960020, &s3c_qos->s3cqos1);
writel(0x20302030, &s3c_qos->s3cqos2);
writel(0x20AA20DC, &s3c_qos->s3cqos3);
@@ -166,7 +234,10 @@
writel(0x00002032, &s3c_qos->s3cqos8);
s3c_qos = (struct rcar_s3c_qos *)S3C_QOS_AXI_BASE;
- writel(0x00820082, &s3c_qos->s3cqos0);
+ if (IS_R8A7791_ES2())
+ writel(0x80928092, &s3c_qos->s3cqos0);
+ else
+ writel(0x00820082, &s3c_qos->s3cqos0);
writel(0x20960020, &s3c_qos->s3cqos1);
writel(0x20302030, &s3c_qos->s3cqos2);
writel(0x20AA20FA, &s3c_qos->s3cqos3);
@@ -245,9 +316,15 @@
/* MXI -QoS */
/* Transaction Control (MXI) */
- mxi = (struct rcar_mxi *)MXI_BASE;
+ mxi = (struct rcar_mxi *)XI_BASE;
writel(0x00000013, &mxi->mxrtcr);
- writel(0x00000013, &mxi->mxwtcr);
+ if (IS_R8A7791_ES2()) {
+ writel(0x00000016, &mxi->mxwtcr);
+ writel(0x00780080, &mxi->mxsaar0);
+ writel(0x02000800, &mxi->mxsaar1);
+ } else {
+ writel(0x00000013, &mxi->mxwtcr);
+ }
/* QoS Control (MXI) */
mxi_qos = (struct rcar_mxi_qos *)MXI_QOS_BASE;
@@ -632,7 +709,10 @@
/* QoS Register (RT-AXI) */
axi_qos = (struct rcar_axi_qos *)RT_AXI_SHX_BASE;
- writel(0x00000000, &axi_qos->qosconf);
+ if (IS_R8A7791_ES2())
+ writel(0x00000001, &axi_qos->qosconf);
+ else
+ writel(0x00000000, &axi_qos->qosconf);
writel(0x00002053, &axi_qos->qosctset0);
writel(0x00002096, &axi_qos->qosctset1);
writel(0x00002030, &axi_qos->qosctset2);
diff --git a/board/renesas/lager/qos.c b/board/renesas/lager/qos.c
index dec37d2..ae15551 100644
--- a/board/renesas/lager/qos.c
+++ b/board/renesas/lager/qos.c
@@ -12,7 +12,7 @@
#include <asm/io.h>
#include <asm/arch/rmobile.h>
-/* QoS version 0.955 for ES1 and version 0.963 for ES2 */
+/* QoS version 0.955 for ES1 and version 0.973 for ES2 */
#if defined(CONFIG_RMOBILE_EXTRAM_BOOT)
enum {
DBSC3_00, DBSC3_01, DBSC3_02, DBSC3_03, DBSC3_04,
@@ -1133,6 +1133,24 @@
writel(0x00000000, &axi_qos->qosqon);
}
+#if defined(CONFIG_QOS_PRI_MEDIA)
+#define is_qos_pri_media() 1
+#else
+#define is_qos_pri_media() 0
+#endif
+
+#if defined(CONFIG_QOS_PRI_NORMAL)
+#define is_qos_pri_normal() 1
+#else
+#define is_qos_pri_normal() 0
+#endif
+
+#if defined(CONFIG_QOS_PRI_GFX)
+#define is_qos_pri_gfx() 1
+#else
+#define is_qos_pri_gfx() 0
+#endif
+
/* QoS version 0.963 for ES2 */
static void qos_init_es2(void)
{
@@ -1150,30 +1168,57 @@
/* S3C -QoS */
s3c = (struct rcar_s3c *)S3C_BASE;
writel(0x80000000, &s3c->s3cadsplcr);
- writel(0x1F060504, &s3c->s3crorr);
- writel(0x1F060503, &s3c->s3cworr);
-
+ if (is_qos_pri_media()) {
+ writel(0x1F060302, &s3c->s3crorr);
+ writel(0x07070302, &s3c->s3cworr);
+ } else if (is_qos_pri_normal()) {
+ writel(0x1F060504, &s3c->s3crorr);
+ writel(0x07070503, &s3c->s3cworr);
+ } else if (is_qos_pri_gfx()) {
+ writel(0x1F060606, &s3c->s3crorr);
+ writel(0x07070606, &s3c->s3cworr);
+ }
/* QoS Control Registers */
s3c_qos = (struct rcar_s3c_qos *)S3C_QOS_CCI0_BASE;
writel(0x00890089, &s3c_qos->s3cqos0);
writel(0x20960010, &s3c_qos->s3cqos1);
writel(0x20302030, &s3c_qos->s3cqos2);
- writel(0x20AA2200, &s3c_qos->s3cqos3);
+ if (is_qos_pri_media())
+ writel(0x20AA2300, &s3c_qos->s3cqos3);
+ else if (is_qos_pri_normal())
+ writel(0x20AA2200, &s3c_qos->s3cqos3);
+ else if (is_qos_pri_gfx())
+ writel(0x20AA2100, &s3c_qos->s3cqos3);
writel(0x00002032, &s3c_qos->s3cqos4);
writel(0x20960010, &s3c_qos->s3cqos5);
writel(0x20302030, &s3c_qos->s3cqos6);
- writel(0x20AA2200, &s3c_qos->s3cqos7);
+ if (is_qos_pri_media())
+ writel(0x20AA2300, &s3c_qos->s3cqos7);
+ else if (is_qos_pri_normal())
+ writel(0x20AA2200, &s3c_qos->s3cqos7);
+ else if (is_qos_pri_gfx())
+ writel(0x20AA2100, &s3c_qos->s3cqos7);
writel(0x00002032, &s3c_qos->s3cqos8);
s3c_qos = (struct rcar_s3c_qos *)S3C_QOS_CCI1_BASE;
writel(0x00890089, &s3c_qos->s3cqos0);
writel(0x20960010, &s3c_qos->s3cqos1);
writel(0x20302030, &s3c_qos->s3cqos2);
- writel(0x20AA2200, &s3c_qos->s3cqos3);
+ if (is_qos_pri_media())
+ writel(0x20AA2300, &s3c_qos->s3cqos3);
+ else if (is_qos_pri_normal())
+ writel(0x20AA2200, &s3c_qos->s3cqos3);
+ else if (is_qos_pri_gfx())
+ writel(0x20AA2100, &s3c_qos->s3cqos3);
writel(0x00002032, &s3c_qos->s3cqos4);
writel(0x20960010, &s3c_qos->s3cqos5);
writel(0x20302030, &s3c_qos->s3cqos6);
- writel(0x20AA2200, &s3c_qos->s3cqos7);
+ if (is_qos_pri_media())
+ writel(0x20AA2300, &s3c_qos->s3cqos7);
+ else if (is_qos_pri_normal())
+ writel(0x20AA2200, &s3c_qos->s3cqos7);
+ else if (is_qos_pri_gfx())
+ writel(0x20AA2100, &s3c_qos->s3cqos7);
writel(0x00002032, &s3c_qos->s3cqos8);
s3c_qos = (struct rcar_s3c_qos *)S3C_QOS_MXI_BASE;
@@ -1188,7 +1233,7 @@
writel(0x00002032, &s3c_qos->s3cqos8);
s3c_qos = (struct rcar_s3c_qos *)S3C_QOS_AXI_BASE;
- writel(0x00820082, &s3c_qos->s3cqos0);
+ writel(0x00828092, &s3c_qos->s3cqos0);
writel(0x20960020, &s3c_qos->s3cqos1);
writel(0x20302030, &s3c_qos->s3cqos2);
writel(0x20AA20FA, &s3c_qos->s3cqos3);
@@ -1198,7 +1243,7 @@
writel(0x20AA20FA, &s3c_qos->s3cqos7);
writel(0x00002032, &s3c_qos->s3cqos8);
- writel(0x00200808, &s3c->s3carcr11);
+ writel(0x00310808, &s3c->s3carcr11);
/* DBSC -QoS */
/* DBSC0 - Read */
@@ -1235,7 +1280,7 @@
/* Transaction Control (MXI) */
mxi = (struct rcar_mxi *)MXI_BASE;
writel(0x00000013, &mxi->mxrtcr);
- writel(0x00000013, &mxi->mxwtcr);
+ writel(0x00000016, &mxi->mxwtcr);
writel(0x00B800C0, &mxi->mxsaar0);
writel(0x02000800, &mxi->mxsaar1);
@@ -1622,7 +1667,7 @@
/* QoS Register (RT-AXI) */
axi_qos = (struct rcar_axi_qos *)RT_AXI_SHX_BASE;
- writel(0x00000000, &axi_qos->qosconf);
+ writel(0x00000001, &axi_qos->qosconf);
writel(0x00002053, &axi_qos->qosctset0);
writel(0x00002096, &axi_qos->qosctset1);
writel(0x00002030, &axi_qos->qosctset2);
diff --git a/board/siemens/common/board.c b/board/siemens/common/board.c
index cc0ac6b..fb2de48 100644
--- a/board/siemens/common/board.c
+++ b/board/siemens/common/board.c
@@ -43,6 +43,11 @@
/* Initalize the board header */
enable_i2c0_pin_mux();
i2c_set_bus_num(0);
+
+ /* enable early the console */
+ gd->baudrate = CONFIG_BAUDRATE;
+ serial_init();
+ gd->have_console = 1;
if (read_eeprom() < 0)
puts("Could not get board ID.\n");
diff --git a/board/sunxi/Kconfig b/board/sunxi/Kconfig
index a6bbf6e..b2eca51 100644
--- a/board/sunxi/Kconfig
+++ b/board/sunxi/Kconfig
@@ -35,8 +35,11 @@
config MACH_SUN6I
bool "sun6i (Allwinner A31)"
select CPU_V7
+ select CPU_V7_HAS_NONSEC
+ select CPU_V7_HAS_VIRT
select SUNXI_GEN_SUN6I
select SUPPORT_SPL
+ select ARMV7_BOOT_SEC_DEFAULT if OLD_SUNXI_KERNEL_COMPAT
config MACH_SUN7I
bool "sun7i (Allwinner A20)"
@@ -50,14 +53,25 @@
config MACH_SUN8I_A23
bool "sun8i (Allwinner A23)"
select CPU_V7
+ select CPU_V7_HAS_NONSEC
+ select CPU_V7_HAS_VIRT
select SUNXI_GEN_SUN6I
select SUPPORT_SPL
+ select ARMV7_BOOT_SEC_DEFAULT if OLD_SUNXI_KERNEL_COMPAT
config MACH_SUN8I_A33
bool "sun8i (Allwinner A33)"
select CPU_V7
+ select CPU_V7_HAS_NONSEC
+ select CPU_V7_HAS_VIRT
select SUNXI_GEN_SUN6I
select SUPPORT_SPL
+ select ARMV7_BOOT_SEC_DEFAULT if OLD_SUNXI_KERNEL_COMPAT
+
+config MACH_SUN9I
+ bool "sun9i (Allwinner A80)"
+ select CPU_V7
+ select SUNXI_GEN_SUN6I
endchoice
@@ -187,6 +201,7 @@
default "sun6i" if MACH_SUN6I
default "sun7i" if MACH_SUN7I
default "sun8i" if MACH_SUN8I
+ default "sun9i" if MACH_SUN9I
config SYS_BOARD
default "sunxi"
@@ -194,24 +209,8 @@
config SYS_SOC
default "sunxi"
-config SPL_FEL
- bool "SPL/FEL mode support"
- depends on SPL
- default n
- help
- This enables support for Fast Early Loader (FEL) mode. This
- allows U-Boot to be loaded to the board over USB by the on-chip
- boot rom. U-Boot should be sent in two parts: SPL first, with
- 'fel write 0x2000 u-boot-spl.bin; fel exe 0x2000' then U-Boot with
- 'fel write 0x4a000000 u-boot.bin; fel exe 0x4a000000'. This option
- shrinks the amount of SRAM available to SPL, so only enable it if
- you need FEL. Note that enabling this option only allows FEL to be
- used; it is still possible to boot U-Boot from boot media. U-Boot
- SPL detects when it is being loaded using FEL.
-
config UART0_PORT_F
bool "UART0 on MicroSD breakout board"
- depends on SPL_FEL
default n
---help---
Repurpose the SD card slot for getting access to the UART0 serial
@@ -281,6 +280,18 @@
slot or emmc on mmc1 - mmc3. Setting this to 1, 2 or 3 will enable
support for this.
+config SPL_NAND_SUPPORT
+ bool "SPL/NAND mode support"
+ depends on SPL
+ default n
+ ---help---
+ This enables support for booting from NAND internal
+ memory. U-Boot SPL doesn't detect where is it load from,
+ therefore this option is needed to properly load image from
+ flash. Option also disables MMC functionality on U-Boot due to
+ initialization errors encountered, when both controllers are
+ enabled.
+
config USB0_VBUS_PIN
string "Vbus enable pin for usb0 (otg)"
default ""
@@ -558,9 +569,6 @@
config SYS_MALLOC_CLEAR_ON_INIT
default n
-config NET
- default y
-
config NETDEVICES
default y
@@ -573,4 +581,10 @@
config DM_USB
default y if !USB_MUSB_SUNXI
+config CMD_SETEXPR
+ default y
+
+config CMD_NET
+ default y
+
endif
diff --git a/board/sunxi/MAINTAINERS b/board/sunxi/MAINTAINERS
index a650554..7a42055 100644
--- a/board/sunxi/MAINTAINERS
+++ b/board/sunxi/MAINTAINERS
@@ -10,6 +10,7 @@
F: configs/Hyundai_A7HD_defconfig
F: configs/jesurun_q5_defconfig
F: configs/Mele_A1000_defconfig
+F: configs/Mele_A1000G_quad_defconfig
F: configs/Mele_M3_defconfig
F: configs/Mini-X_defconfig
F: configs/mk802_defconfig
@@ -40,6 +41,8 @@
F: configs/ga10h_v1_1_defconfig
F: configs/Ippo_q8h_v1_2_defconfig
F: configs/Ippo_q8h_v1_2_a33_1024x600_defconfig
+F: include/configs/sun9i.h
+F: configs/Merrii_A80_Optimus_defconfig
A20-OLINUXINO-LIME BOARD
M: FUKAUMI Naoki <naobsd@gmail.com>
@@ -61,11 +64,6 @@
S: Maintained
F: configs/Ampe_A76_defconfig
-Astar MID756 BOARD
-M: VishnuPatekar <vishnupatekar0510@gmail.com>
-S: Maintained
-F: configs/Astar_MID756_defconfig
-
COLOMBUS BOARD
M: Maxime Ripard <maxime.ripard@free-electrons.com>
S: Maintained
@@ -79,6 +77,11 @@
F: configs/Cubieboard2_defconfig
F: configs/Cubietruck_defconfig
+ET Q8 V1.6 Tablet BOARD
+M: VishnuPatekar <vishnupatekar0510@gmail.com>
+S: Maintained
+F: configs/Et_q8_v1_6_defconfig
+
FORFUN-Q88DB TABLET
M: Jens Lucius <info@jenslucius.com>
S: Maintained
diff --git a/board/sunxi/board.c b/board/sunxi/board.c
index 5f79cc1..f27967b 100644
--- a/board/sunxi/board.c
+++ b/board/sunxi/board.c
@@ -22,6 +22,9 @@
#ifdef CONFIG_AXP221_POWER
#include <axp221.h>
#endif
+#ifdef CONFIG_NAND_SUNXI
+#include <nand.h>
+#endif
#include <asm/arch/clock.h>
#include <asm/arch/cpu.h>
#include <asm/arch/display.h>
@@ -315,6 +318,21 @@
}
#endif
+#ifdef CONFIG_NAND
+void board_nand_init(void)
+{
+ unsigned int pin;
+ static u8 ports[] = CONFIG_NAND_SUNXI_GPC_PORTS;
+
+ /* Configure AHB muxes to connect output pins with NAND controller */
+ for (pin = 0; pin < 16; pin++)
+ sunxi_gpio_set_cfgpin(SUNXI_GPC(pin), SUNXI_GPC_NAND);
+
+ for (pin = 0; pin < ARRAY_SIZE(ports); pin++)
+ sunxi_gpio_set_cfgpin(SUNXI_GPC(ports[pin]), SUNXI_GPC_NAND);
+}
+#endif
+
void i2c_init_board(void)
{
#ifdef CONFIG_I2C0_ENABLE
@@ -530,10 +548,11 @@
}
}
+#ifndef CONFIG_MACH_SUN9I
ret = sunxi_usb_phy_probe();
if (ret)
return ret;
-
+#endif
#if defined(CONFIG_MUSB_HOST) || defined(CONFIG_MUSB_GADGET)
musb_register(&musb_plat, NULL, (void *)SUNXI_USB0_BASE);
#endif
diff --git a/board/ti/beagle/beagle.h b/board/ti/beagle/beagle.h
index 6dd2ffe..86bd6e9 100644
--- a/board/ti/beagle/beagle.h
+++ b/board/ti/beagle/beagle.h
@@ -375,7 +375,7 @@
#define MUX_BEAGLE_XM() \
MUX_VAL(CP(GPMC_NCS5), (IDIS | PTD | EN | M4)) /*GPIO_56*/\
- MUX_VAL(CP(GPMC_WAIT0), (IDIS | PTU | EN | M4)) /*GPIO_63*/\
+ MUX_VAL(CP(GPMC_WAIT1), (IDIS | PTU | EN | M4)) /*GPIO_63*/\
MUX_VAL(CP(MMC1_DAT7), (IDIS | PTU | EN | M4)) /*GPIO_129*/\
MUX_VAL(CP(HDQ_SIO), (IDIS | PTU | EN | M4)) /*GPIO_170*/\
MUX_VAL(CP(MCBSP3_DX), (IEN | PTD | DIS | M4)) /*GPIO_140*/\
diff --git a/board/ti/beagle_x15/mux_data.h b/board/ti/beagle_x15/mux_data.h
index 2294abe..df658c5 100644
--- a/board/ti/beagle_x15/mux_data.h
+++ b/board/ti/beagle_x15/mux_data.h
@@ -31,8 +31,8 @@
{GPMC_A26, (IEN | PTU | PDIS | M1)}, /* mmc2_dat2 */
{GPMC_A27, (IEN | PTU | PDIS | M1)}, /* mmc2_dat3 */
{GPMC_CS1, (IEN | PTU | PDIS | M1)}, /* mmm2_cmd */
- {UART3_RXD, (FSC | IEN | PTU | PDIS | M0)}, /* UART3_RXD */
- {UART3_TXD, (FSC | IEN | PTU | PDIS | M0)}, /* UART3_TXD */
+ {UART2_CTSN, (FSC | IEN | PTU | PDIS | M2)}, /* uart2_ctsn.uart3_rxd */
+ {UART2_RTSN, (FSC | IEN | PTU | PDIS | M1)}, /* uart2_rtsn.uart3_txd */
{I2C1_SDA, (IEN | PTU | PDIS | M0)}, /* I2C1_SDA */
{I2C1_SCL, (IEN | PTU | PDIS | M0)}, /* I2C1_SCL */
{MDIO_MCLK, (PTU | PEN | M0)}, /* MDIO_MCLK */
diff --git a/common/Kconfig b/common/Kconfig
index 5b8b0c3..a2167f0 100644
--- a/common/Kconfig
+++ b/common/Kconfig
@@ -252,12 +252,21 @@
help
Run script from memory
+config CMD_SETEXPR
+ bool "setexpr"
+ help
+ Evaluate boolean and math expressions and store the result in an env
+ variable.
+ Also supports loading the value at a memory location into a variable.
+ If CONFIG_REGEX is enabled, setexpr also supports a gsub function.
+
endmenu
menu "Network commands"
config CMD_NET
bool "bootp, tftpboot"
+ select NET
help
Network commands.
bootp - boot image via network using BOOTP/TFTP protocol
diff --git a/common/bootm.c b/common/bootm.c
index 6842029..667c934 100644
--- a/common/bootm.c
+++ b/common/bootm.c
@@ -206,7 +206,23 @@
return 0;
}
-static int bootm_find_ramdisk(int flag, int argc, char * const argv[])
+/**
+ * bootm_find_images - wrapper to find and locate various images
+ * @flag: Ignored Argument
+ * @argc: command argument count
+ * @argv: command argument list
+ *
+ * boot_find_images() will attempt to load an available ramdisk,
+ * flattened device tree, as well as specifically marked
+ * "loadable" images (loadables are FIT only)
+ *
+ * Note: bootm_find_images will skip an image if it is not found
+ *
+ * @return:
+ * 0, if all existing images were loaded correctly
+ * 1, if an image is found but corrupted, or invalid
+ */
+int bootm_find_images(int flag, int argc, char * const argv[])
{
int ret;
@@ -218,14 +234,7 @@
return 1;
}
- return 0;
-}
-
#if defined(CONFIG_OF_LIBFDT)
-static int bootm_find_fdt(int flag, int argc, char * const argv[])
-{
- int ret;
-
/* find flattened device tree */
ret = boot_get_fdt(flag, argc, argv, IH_ARCH_DEFAULT, &images,
&images.ft_addr, &images.ft_len);
@@ -233,21 +242,17 @@
puts("Could not find a valid device tree\n");
return 1;
}
-
set_working_fdt_addr((ulong)images.ft_addr);
-
- return 0;
-}
#endif
-int bootm_find_ramdisk_fdt(int flag, int argc, char * const argv[])
-{
- if (bootm_find_ramdisk(flag, argc, argv))
+#if defined(CONFIG_FIT)
+ /* find all of the loadables */
+ ret = boot_get_loadable(argc, argv, &images, IH_ARCH_DEFAULT,
+ NULL, NULL);
+ if (ret) {
+ printf("Loadable(s) is corrupt or invalid\n");
return 1;
-
-#if defined(CONFIG_OF_LIBFDT)
- if (bootm_find_fdt(flag, argc, argv))
- return 1;
+ }
#endif
return 0;
@@ -261,7 +266,7 @@
(images.os.type == IH_TYPE_MULTI)) &&
(images.os.os == IH_OS_LINUX ||
images.os.os == IH_OS_VXWORKS))
- return bootm_find_ramdisk_fdt(flag, argc, argv);
+ return bootm_find_images(flag, argc, argv);
return 0;
}
diff --git a/common/cmd_bootm.c b/common/cmd_bootm.c
index 6b6aca6..48738ac 100644
--- a/common/cmd_bootm.c
+++ b/common/cmd_bootm.c
@@ -580,7 +580,7 @@
* Handle the BOOTM_STATE_FINDOTHER state ourselves as we do not
* have a header that provide this informaiton.
*/
- if (bootm_find_ramdisk_fdt(flag, argc, argv))
+ if (bootm_find_images(flag, argc, argv))
return 1;
return 0;
@@ -721,7 +721,7 @@
* Handle the BOOTM_STATE_FINDOTHER state ourselves as we do not
* have a header that provide this informaiton.
*/
- if (bootm_find_ramdisk_fdt(flag, argc, argv))
+ if (bootm_find_images(flag, argc, argv))
return 1;
return 0;
diff --git a/common/cmd_ide.c b/common/cmd_ide.c
index 04a6d9b..ecd3e9d 100644
--- a/common/cmd_ide.c
+++ b/common/cmd_ide.c
@@ -79,7 +79,7 @@
#ifdef CONFIG_ATAPI
static void atapi_inquiry(block_dev_desc_t *dev_desc);
-static ulong atapi_read(int device, ulong blknr, lbaint_t blkcnt,
+static ulong atapi_read(int device, lbaint_t blknr, lbaint_t blkcnt,
void *buffer);
#endif
@@ -1388,13 +1388,13 @@
#define ATAPI_READ_BLOCK_SIZE 2048 /* assuming CD part */
#define ATAPI_READ_MAX_BLOCK (ATAPI_READ_MAX_BYTES/ATAPI_READ_BLOCK_SIZE)
-ulong atapi_read(int device, ulong blknr, lbaint_t blkcnt, void *buffer)
+ulong atapi_read(int device, lbaint_t blknr, lbaint_t blkcnt, void *buffer)
{
ulong n = 0;
unsigned char ccb[12]; /* Command descriptor block */
ulong cnt;
- debug("atapi_read dev %d start %lX, blocks " LBAF " buffer at %lX\n",
+ debug("atapi_read dev %d start " LBAF " blocks " LBAF " buffer at %lX\n",
device, blknr, blkcnt, (ulong) buffer);
do {
diff --git a/common/cmd_mem.c b/common/cmd_mem.c
index 2e85d53..43c3fb6 100644
--- a/common/cmd_mem.c
+++ b/common/cmd_mem.c
@@ -1325,7 +1325,7 @@
#endif
#ifdef CONFIG_CMD_MEMINFO
-__weak void board_show_dram(ulong size)
+__weak void board_show_dram(phys_size_t size)
{
puts("DRAM: ");
print_size(size, "\n");
diff --git a/common/cmd_pxe.c b/common/cmd_pxe.c
index 4cbb2b1..abf0941 100644
--- a/common/cmd_pxe.c
+++ b/common/cmd_pxe.c
@@ -1648,7 +1648,7 @@
is_pxe = false;
- if (strstr(argv[1], "-p")) {
+ if (argc > 1 && strstr(argv[1], "-p")) {
prompt = 1;
argc--;
argv++;
diff --git a/common/env_mmc.c b/common/env_mmc.c
index 14648e3..6c4ce2f 100644
--- a/common/env_mmc.c
+++ b/common/env_mmc.c
@@ -90,19 +90,18 @@
static inline int mmc_set_env_part(struct mmc *mmc) {return 0; };
#endif
-static int init_mmc_for_env(struct mmc *mmc)
+static const char *init_mmc_for_env(struct mmc *mmc)
{
- if (!mmc) {
- puts("No MMC card found\n");
- return -1;
- }
+ if (!mmc)
+ return "No MMC card found";
- if (mmc_init(mmc)) {
- puts("MMC init failed\n");
- return -1;
- }
+ if (mmc_init(mmc))
+ return "MMC init failed";
- return mmc_set_env_part(mmc);
+ if (mmc_set_env_part(mmc))
+ return "MMC partition switch failed";
+
+ return NULL;
}
static void fini_mmc_for_env(struct mmc *mmc)
@@ -143,9 +142,13 @@
struct mmc *mmc = find_mmc_device(CONFIG_SYS_MMC_ENV_DEV);
u32 offset;
int ret, copy = 0;
+ const char *errmsg;
- if (init_mmc_for_env(mmc))
+ errmsg = init_mmc_for_env(mmc);
+ if (errmsg) {
+ printf("%s\n", errmsg);
return 1;
+ }
ret = env_export(env_new);
if (ret)
@@ -213,6 +216,7 @@
env_t *ep;
int ret;
int dev = CONFIG_SYS_MMC_ENV_DEV;
+ const char *errmsg = NULL;
ALLOC_CACHE_ALIGN_BUFFER(env_t, tmp_env1, 1);
ALLOC_CACHE_ALIGN_BUFFER(env_t, tmp_env2, 1);
@@ -223,7 +227,8 @@
mmc = find_mmc_device(dev);
- if (init_mmc_for_env(mmc)) {
+ errmsg = init_mmc_for_env(mmc);
+ if (errmsg) {
ret = 1;
goto err;
}
@@ -249,6 +254,7 @@
(crc32(0, tmp_env2->data, ENV_SIZE) == tmp_env2->crc);
if (!crc1_ok && !crc2_ok) {
+ errmsg = "!bad CRC";
ret = 1;
goto fini;
} else if (crc1_ok && !crc2_ok) {
@@ -284,8 +290,7 @@
fini_mmc_for_env(mmc);
err:
if (ret)
- set_default_env(NULL);
-
+ set_default_env(errmsg);
#endif
}
#else /* ! CONFIG_ENV_OFFSET_REDUND */
@@ -297,6 +302,7 @@
u32 offset;
int ret;
int dev = CONFIG_SYS_MMC_ENV_DEV;
+ const char *errmsg;
#ifdef CONFIG_SPL_BUILD
dev = 0;
@@ -304,7 +310,8 @@
mmc = find_mmc_device(dev);
- if (init_mmc_for_env(mmc)) {
+ errmsg = init_mmc_for_env(mmc);
+ if (errmsg) {
ret = 1;
goto err;
}
@@ -315,6 +322,7 @@
}
if (read_env(mmc, CONFIG_ENV_SIZE, offset, buf)) {
+ errmsg = "!read failed";
ret = 1;
goto fini;
}
@@ -326,7 +334,7 @@
fini_mmc_for_env(mmc);
err:
if (ret)
- set_default_env(NULL);
+ set_default_env(errmsg);
#endif
}
#endif /* CONFIG_ENV_OFFSET_REDUND */
diff --git a/common/fdt_support.c b/common/fdt_support.c
index 9e50148..10648b5 100644
--- a/common/fdt_support.c
+++ b/common/fdt_support.c
@@ -194,6 +194,31 @@
return fdt_setprop_u32(fdt, nodeoffset, name, (uint32_t)val);
}
+int fdt_root(void *fdt)
+{
+ char *serial;
+ int err;
+
+ err = fdt_check_header(fdt);
+ if (err < 0) {
+ printf("fdt_root: %s\n", fdt_strerror(err));
+ return err;
+ }
+
+ serial = getenv("serial#");
+ if (serial) {
+ err = fdt_setprop(fdt, 0, "serial-number", serial,
+ strlen(serial) + 1);
+
+ if (err < 0) {
+ printf("WARNING: could not set serial-number %s.\n",
+ fdt_strerror(err));
+ return err;
+ }
+ }
+
+ return 0;
+}
int fdt_initrd(void *fdt, ulong initrd_start, ulong initrd_end)
{
diff --git a/common/image-fdt.c b/common/image-fdt.c
index 7e2da7b..80e3e63 100644
--- a/common/image-fdt.c
+++ b/common/image-fdt.c
@@ -471,6 +471,10 @@
int ret = -EPERM;
int fdt_ret;
+ if (fdt_root(blob) < 0) {
+ printf("ERROR: root node setup failed\n");
+ goto err;
+ }
if (fdt_chosen(blob) < 0) {
printf("ERROR: /chosen node create failed\n");
goto err;
diff --git a/common/image-fit.c b/common/image-fit.c
index 4eb4d42..28f7aa8 100644
--- a/common/image-fit.c
+++ b/common/image-fit.c
@@ -1436,6 +1436,7 @@
char *desc;
char *uname;
int ret;
+ int loadables_index;
/* Mandatory properties */
ret = fit_get_desc(fit, noffset, &desc);
@@ -1460,6 +1461,22 @@
uname = (char *)fdt_getprop(fit, noffset, FIT_FDT_PROP, NULL);
if (uname)
printf("%s FDT: %s\n", p, uname);
+
+ /* Print out all of the specified loadables */
+ for (loadables_index = 0;
+ fdt_get_string_index(fit, noffset,
+ FIT_LOADABLE_PROP,
+ loadables_index,
+ (const char **)&uname) == 0;
+ loadables_index++)
+ {
+ if (loadables_index == 0) {
+ printf("%s Loadables: ", p);
+ } else {
+ printf("%s ", p);
+ }
+ printf("%s\n", uname);
+ }
}
static int fit_image_select(const void *fit, int rd_noffset, int verify)
@@ -1527,6 +1544,8 @@
return FIT_RAMDISK_PROP;
case IH_TYPE_X86_SETUP:
return FIT_SETUP_PROP;
+ case IH_TYPE_LOADABLE:
+ return FIT_LOADABLE_PROP;
}
return "unknown";
@@ -1644,7 +1663,13 @@
os_ok = image_type == IH_TYPE_FLATDT ||
fit_image_check_os(fit, noffset, IH_OS_LINUX) ||
fit_image_check_os(fit, noffset, IH_OS_OPENRTOS);
- if (!type_ok || !os_ok) {
+
+ /*
+ * If either of the checks fail, we should report an error, but
+ * if the image type is coming from the "loadables" field, we
+ * don't care what it is
+ */
+ if ((!type_ok || !os_ok) && image_type != IH_TYPE_LOADABLE) {
fit_image_get_os(fit, noffset, &os);
printf("No %s %s %s Image\n",
genimg_get_os_name(os),
diff --git a/common/image.c b/common/image.c
index fdec496..f0f0135 100644
--- a/common/image.c
+++ b/common/image.c
@@ -462,7 +462,7 @@
tmp = 0;
-#if defined(CONFIG_ARM)
+#if defined(CONFIG_ARM) && defined(CONFIG_NR_DRAM_BANKS)
return gd->bd->bi_dram[0].size - tmp;
#else
return gd->bd->bi_memsize - tmp;
@@ -1165,6 +1165,77 @@
#endif
}
+#if defined(CONFIG_FIT)
+int boot_get_loadable(int argc, char * const argv[], bootm_headers_t *images,
+ uint8_t arch, const ulong *ld_start, ulong * const ld_len)
+{
+ /*
+ * These variables are used to hold the current image location
+ * in system memory.
+ */
+ ulong tmp_img_addr;
+ /*
+ * These two variables are requirements for fit_image_load, but
+ * their values are not used
+ */
+ ulong img_data, img_len;
+ void *buf;
+ int loadables_index;
+ int conf_noffset;
+ int fit_img_result;
+ char *uname;
+
+ /* Check to see if the images struct has a FIT configuration */
+ if (!genimg_has_config(images)) {
+ debug("## FIT configuration was not specified\n");
+ return 0;
+ }
+
+ /*
+ * Obtain the os FIT header from the images struct
+ * copy from dataflash if needed
+ */
+ tmp_img_addr = map_to_sysmem(images->fit_hdr_os);
+ tmp_img_addr = genimg_get_image(tmp_img_addr);
+ buf = map_sysmem(tmp_img_addr, 0);
+ /*
+ * Check image type. For FIT images get FIT node
+ * and attempt to locate a generic binary.
+ */
+ switch (genimg_get_format(buf)) {
+ case IMAGE_FORMAT_FIT:
+ conf_noffset = fit_conf_get_node(buf, images->fit_uname_cfg);
+
+ for (loadables_index = 0;
+ !fdt_get_string_index(buf, conf_noffset,
+ FIT_LOADABLE_PROP,
+ loadables_index,
+ (const char **)&uname) > 0;
+ loadables_index++)
+ {
+ fit_img_result = fit_image_load(images,
+ tmp_img_addr,
+ (const char **)&uname,
+ &(images->fit_uname_cfg), arch,
+ IH_TYPE_LOADABLE,
+ BOOTSTAGE_ID_FIT_LOADABLE_START,
+ FIT_LOAD_OPTIONAL_NON_ZERO,
+ &img_data, &img_len);
+ if (fit_img_result < 0) {
+ /* Something went wrong! */
+ return fit_img_result;
+ }
+ }
+ break;
+ default:
+ printf("The given image format is not supported (corrupt?)\n");
+ return 1;
+ }
+
+ return 0;
+}
+#endif
+
#ifdef CONFIG_SYS_BOOT_GET_CMDLINE
/**
* boot_get_cmdline - allocate and initialize kernel cmdline
diff --git a/common/menu.c b/common/menu.c
index e81c074..eda96d6 100644
--- a/common/menu.c
+++ b/common/menu.c
@@ -202,6 +202,9 @@
choice_item = menu_item_by_key(m, cbuf);
if (!choice_item)
printf("%s not found\n", cbuf);
+ } else if (readret == -1) {
+ printf("<INTERRUPT>\n");
+ return -EINTR;
} else {
return menu_default_choice(m, choice);
}
diff --git a/common/spl/spl_mmc.c b/common/spl/spl_mmc.c
index c96345e..de495c0 100644
--- a/common/spl/spl_mmc.c
+++ b/common/spl/spl_mmc.c
@@ -17,7 +17,7 @@
static int mmc_load_image_raw_sector(struct mmc *mmc, unsigned long sector)
{
- unsigned long err;
+ unsigned long count;
u32 image_size_sectors;
struct image_header *header;
@@ -25,8 +25,8 @@
sizeof(struct image_header));
/* read image header to find the image size & load address */
- err = mmc->block_dev.block_read(0, sector, 1, header);
- if (err == 0)
+ count = mmc->block_dev.block_read(0, sector, 1, header);
+ if (count == 0)
goto end;
if (image_get_magic(header) != IH_MAGIC)
@@ -39,24 +39,29 @@
mmc->read_bl_len;
/* Read the header too to avoid extra memcpy */
- err = mmc->block_dev.block_read(0, sector, image_size_sectors,
- (void *)spl_image.load_addr);
+ count = mmc->block_dev.block_read(0, sector, image_size_sectors,
+ (void *) spl_image.load_addr);
end:
#ifdef CONFIG_SPL_LIBCOMMON_SUPPORT
- if (err == 0)
+ if (count == 0)
printf("spl: mmc block read error\n");
#endif
- return (err == 0);
+ if (count == 0)
+ return -1;
+
+ return 0;
}
#ifdef CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION
static int mmc_load_image_raw_partition(struct mmc *mmc, int partition)
{
disk_partition_t info;
+ int err;
- if (get_partition_info(&mmc->block_dev, partition, &info)) {
+ err = get_partition_info(&mmc->block_dev, partition, &info);
+ if (err) {
#ifdef CONFIG_SPL_LIBCOMMON_SUPPORT
printf("spl: partition error\n");
#endif
@@ -70,13 +75,13 @@
#ifdef CONFIG_SPL_OS_BOOT
static int mmc_load_image_raw_os(struct mmc *mmc)
{
- unsigned long err;
+ unsigned long count;
- err = mmc->block_dev.block_read(0,
- CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR,
- CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS,
- (void *)CONFIG_SYS_SPL_ARGS_ADDR);
- if (err == 0) {
+ count = mmc->block_dev.block_read(0,
+ CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR,
+ CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS,
+ (void *) CONFIG_SYS_SPL_ARGS_ADDR);
+ if (count == 0) {
#ifdef CONFIG_SPL_LIBCOMMON_SUPPORT
printf("spl: mmc block read error\n");
#endif
diff --git a/common/usb.c b/common/usb.c
index 6283f39..7ff8ac5 100644
--- a/common/usb.c
+++ b/common/usb.c
@@ -959,8 +959,6 @@
static int usb_setup_descriptor(struct usb_device *dev, bool do_read)
{
- __maybe_unused struct usb_device_descriptor *desc;
-
/*
* This is a Windows scheme of initialization sequence, with double
* reset of the device (Linux uses the same sequence)
diff --git a/common/usb_kbd.c b/common/usb_kbd.c
index 24a1a56..49bfc09 100644
--- a/common/usb_kbd.c
+++ b/common/usb_kbd.c
@@ -31,7 +31,7 @@
#endif
/* Keyboard sampling rate */
-#define REPEAT_RATE (40 / 4) /* 40msec -> 25cps */
+#define REPEAT_RATE 40 /* 40msec -> 25cps */
#define REPEAT_DELAY 10 /* 10 x REPEAT_RATE = 400msec */
#define NUM_LOCK 0x53
@@ -103,6 +103,7 @@
unsigned long intpipe;
int intpktsize;
int intinterval;
+ unsigned long last_report;
struct int_queue *intq;
uint32_t repeat_delay;
@@ -310,7 +311,7 @@
/* Interrupt polling */
static inline void usb_kbd_poll_for_event(struct usb_device *dev)
{
-#if defined(CONFIG_SYS_USB_EVENT_POLL)
+#if defined(CONFIG_SYS_USB_EVENT_POLL)
struct usb_kbd_pdata *data = dev->privptr;
/* Submit a interrupt transfer request */
@@ -318,15 +319,17 @@
data->intinterval);
usb_kbd_irq_worker(dev);
-#elif defined(CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP)
+#elif defined(CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP) || \
+ defined(CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE)
+#if defined(CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP)
struct usb_interface *iface;
struct usb_kbd_pdata *data = dev->privptr;
iface = &dev->config.if_desc[0];
usb_get_report(dev, iface->desc.bInterfaceNumber,
1, 0, data->new, USB_KBD_BOOT_REPORT_SIZE);
- if (memcmp(data->old, data->new, USB_KBD_BOOT_REPORT_SIZE))
+ if (memcmp(data->old, data->new, USB_KBD_BOOT_REPORT_SIZE)) {
usb_kbd_irq_worker(dev);
-#elif defined(CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE)
+#else
struct usb_kbd_pdata *data = dev->privptr;
if (poll_int_queue(dev, data->intq)) {
usb_kbd_irq_worker(dev);
@@ -335,6 +338,13 @@
data->intq = create_int_queue(dev, data->intpipe, 1,
USB_KBD_BOOT_REPORT_SIZE, data->new,
data->intinterval);
+#endif
+ data->last_report = get_timer(0);
+ /* Repeat last usb hid report every REPEAT_RATE ms for keyrepeat */
+ } else if (data->last_report != -1 &&
+ get_timer(data->last_report) > REPEAT_RATE) {
+ usb_kbd_irq_worker(dev);
+ data->last_report = get_timer(0);
}
#endif
}
@@ -445,12 +455,16 @@
data->intpktsize = min(usb_maxpacket(dev, data->intpipe),
USB_KBD_BOOT_REPORT_SIZE);
data->intinterval = ep->bInterval;
+ data->last_report = -1;
/* We found a USB Keyboard, install it. */
usb_set_protocol(dev, iface->desc.bInterfaceNumber, 0);
+#if !defined(CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP) && \
+ !defined(CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE)
debug("USB KBD: found set idle...\n");
- usb_set_idle(dev, iface->desc.bInterfaceNumber, REPEAT_RATE, 0);
+ usb_set_idle(dev, iface->desc.bInterfaceNumber, REPEAT_RATE / 4, 0);
+#endif
debug("USB KBD: enable interrupt pipe...\n");
#ifdef CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE
diff --git a/configs/B4420QDS_NAND_defconfig b/configs/B4420QDS_NAND_defconfig
index a043659..5353acf 100644
--- a/configs/B4420QDS_NAND_defconfig
+++ b/configs/B4420QDS_NAND_defconfig
@@ -3,3 +3,5 @@
CONFIG_TARGET_B4860QDS=y
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_B4420,RAMBOOT_PBL,SPL_FSL_PBL,NAND"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/B4420QDS_SPIFLASH_defconfig b/configs/B4420QDS_SPIFLASH_defconfig
index 29afd8a..557c600 100644
--- a/configs/B4420QDS_SPIFLASH_defconfig
+++ b/configs/B4420QDS_SPIFLASH_defconfig
@@ -2,3 +2,5 @@
CONFIG_MPC85xx=y
CONFIG_TARGET_B4860QDS=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_B4420,RAMBOOT_PBL,SPIFLASH,SYS_TEXT_BASE=0xFFF40000"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/B4420QDS_defconfig b/configs/B4420QDS_defconfig
index dc563a7..cc11e03 100644
--- a/configs/B4420QDS_defconfig
+++ b/configs/B4420QDS_defconfig
@@ -2,3 +2,5 @@
CONFIG_MPC85xx=y
CONFIG_TARGET_B4860QDS=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_B4420"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/B4860QDS_NAND_defconfig b/configs/B4860QDS_NAND_defconfig
index 9e7462d..6ae1a2e 100644
--- a/configs/B4860QDS_NAND_defconfig
+++ b/configs/B4860QDS_NAND_defconfig
@@ -3,3 +3,5 @@
CONFIG_TARGET_B4860QDS=y
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_B4860,RAMBOOT_PBL,SPL_FSL_PBL,NAND"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/B4860QDS_SECURE_BOOT_defconfig b/configs/B4860QDS_SECURE_BOOT_defconfig
index c2e9acc..5c276c3 100644
--- a/configs/B4860QDS_SECURE_BOOT_defconfig
+++ b/configs/B4860QDS_SECURE_BOOT_defconfig
@@ -2,3 +2,5 @@
CONFIG_MPC85xx=y
CONFIG_TARGET_B4860QDS=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_B4860,SECURE_BOOT"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/B4860QDS_SPIFLASH_defconfig b/configs/B4860QDS_SPIFLASH_defconfig
index 275e494..ea8101d 100644
--- a/configs/B4860QDS_SPIFLASH_defconfig
+++ b/configs/B4860QDS_SPIFLASH_defconfig
@@ -2,3 +2,5 @@
CONFIG_MPC85xx=y
CONFIG_TARGET_B4860QDS=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_B4860,RAMBOOT_PBL,SPIFLASH,SYS_TEXT_BASE=0xFFF40000"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/B4860QDS_SRIO_PCIE_BOOT_defconfig b/configs/B4860QDS_SRIO_PCIE_BOOT_defconfig
index 928fc67..3390943 100644
--- a/configs/B4860QDS_SRIO_PCIE_BOOT_defconfig
+++ b/configs/B4860QDS_SRIO_PCIE_BOOT_defconfig
@@ -2,3 +2,5 @@
CONFIG_MPC85xx=y
CONFIG_TARGET_B4860QDS=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_B4860,SRIO_PCIE_BOOT_SLAVE,SYS_TEXT_BASE=0xFFF40000"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/B4860QDS_defconfig b/configs/B4860QDS_defconfig
index e0eafaf..50f4948 100644
--- a/configs/B4860QDS_defconfig
+++ b/configs/B4860QDS_defconfig
@@ -2,3 +2,5 @@
CONFIG_MPC85xx=y
CONFIG_TARGET_B4860QDS=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_B4860"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/BSC9131RDB_NAND_SYSCLK100_defconfig b/configs/BSC9131RDB_NAND_SYSCLK100_defconfig
index 88127b7..4ebe4a4 100644
--- a/configs/BSC9131RDB_NAND_SYSCLK100_defconfig
+++ b/configs/BSC9131RDB_NAND_SYSCLK100_defconfig
@@ -3,3 +3,5 @@
CONFIG_TARGET_BSC9131RDB=y
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="BSC9131RDB,NAND,SYS_CLK_100"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/BSC9131RDB_NAND_defconfig b/configs/BSC9131RDB_NAND_defconfig
index f80d9c6..7360bd0 100644
--- a/configs/BSC9131RDB_NAND_defconfig
+++ b/configs/BSC9131RDB_NAND_defconfig
@@ -3,3 +3,5 @@
CONFIG_TARGET_BSC9131RDB=y
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="BSC9131RDB,NAND"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/BSC9131RDB_SPIFLASH_SYSCLK100_defconfig b/configs/BSC9131RDB_SPIFLASH_SYSCLK100_defconfig
index fbe1ccd..b64d172 100644
--- a/configs/BSC9131RDB_SPIFLASH_SYSCLK100_defconfig
+++ b/configs/BSC9131RDB_SPIFLASH_SYSCLK100_defconfig
@@ -2,3 +2,5 @@
CONFIG_MPC85xx=y
CONFIG_TARGET_BSC9131RDB=y
CONFIG_SYS_EXTRA_OPTIONS="BSC9131RDB,SPIFLASH,SYS_CLK_100"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/BSC9131RDB_SPIFLASH_defconfig b/configs/BSC9131RDB_SPIFLASH_defconfig
index baaf91c..5f4028b 100644
--- a/configs/BSC9131RDB_SPIFLASH_defconfig
+++ b/configs/BSC9131RDB_SPIFLASH_defconfig
@@ -2,3 +2,5 @@
CONFIG_MPC85xx=y
CONFIG_TARGET_BSC9131RDB=y
CONFIG_SYS_EXTRA_OPTIONS="BSC9131RDB,SPIFLASH"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/BSC9132QDS_NAND_DDRCLK100_SECURE_defconfig b/configs/BSC9132QDS_NAND_DDRCLK100_SECURE_defconfig
index 4904a1d..44a7161 100644
--- a/configs/BSC9132QDS_NAND_DDRCLK100_SECURE_defconfig
+++ b/configs/BSC9132QDS_NAND_DDRCLK100_SECURE_defconfig
@@ -2,3 +2,5 @@
CONFIG_MPC85xx=y
CONFIG_TARGET_BSC9132QDS=y
CONFIG_SYS_EXTRA_OPTIONS="BSC9132QDS,NAND_SECBOOT,SYS_CLK_100_DDR_100,SECURE_BOOT"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/BSC9132QDS_NAND_DDRCLK100_defconfig b/configs/BSC9132QDS_NAND_DDRCLK100_defconfig
index 71f8faa..439369f 100644
--- a/configs/BSC9132QDS_NAND_DDRCLK100_defconfig
+++ b/configs/BSC9132QDS_NAND_DDRCLK100_defconfig
@@ -3,3 +3,5 @@
CONFIG_TARGET_BSC9132QDS=y
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="BSC9132QDS,NAND,SYS_CLK_100_DDR_100"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/BSC9132QDS_NAND_DDRCLK133_SECURE_defconfig b/configs/BSC9132QDS_NAND_DDRCLK133_SECURE_defconfig
index 721b7f5..fcae999 100644
--- a/configs/BSC9132QDS_NAND_DDRCLK133_SECURE_defconfig
+++ b/configs/BSC9132QDS_NAND_DDRCLK133_SECURE_defconfig
@@ -2,3 +2,5 @@
CONFIG_MPC85xx=y
CONFIG_TARGET_BSC9132QDS=y
CONFIG_SYS_EXTRA_OPTIONS="BSC9132QDS,NAND_SECBOOT,SYS_CLK_100_DDR_133,SECURE_BOOT"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/BSC9132QDS_NAND_DDRCLK133_defconfig b/configs/BSC9132QDS_NAND_DDRCLK133_defconfig
index 37e413d..de0f545 100644
--- a/configs/BSC9132QDS_NAND_DDRCLK133_defconfig
+++ b/configs/BSC9132QDS_NAND_DDRCLK133_defconfig
@@ -3,3 +3,5 @@
CONFIG_TARGET_BSC9132QDS=y
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="BSC9132QDS,NAND,SYS_CLK_100_DDR_133"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/BSC9132QDS_NOR_DDRCLK100_SECURE_defconfig b/configs/BSC9132QDS_NOR_DDRCLK100_SECURE_defconfig
index 1ecca15..68d1c41 100644
--- a/configs/BSC9132QDS_NOR_DDRCLK100_SECURE_defconfig
+++ b/configs/BSC9132QDS_NOR_DDRCLK100_SECURE_defconfig
@@ -2,3 +2,5 @@
CONFIG_MPC85xx=y
CONFIG_TARGET_BSC9132QDS=y
CONFIG_SYS_EXTRA_OPTIONS="BSC9132QDS,SYS_CLK_100_DDR_100,SECURE_BOOT"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/BSC9132QDS_NOR_DDRCLK100_defconfig b/configs/BSC9132QDS_NOR_DDRCLK100_defconfig
index 5e13188..b7052e5 100644
--- a/configs/BSC9132QDS_NOR_DDRCLK100_defconfig
+++ b/configs/BSC9132QDS_NOR_DDRCLK100_defconfig
@@ -2,3 +2,5 @@
CONFIG_MPC85xx=y
CONFIG_TARGET_BSC9132QDS=y
CONFIG_SYS_EXTRA_OPTIONS="BSC9132QDS,SYS_CLK_100_DDR_100"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/BSC9132QDS_NOR_DDRCLK133_SECURE_defconfig b/configs/BSC9132QDS_NOR_DDRCLK133_SECURE_defconfig
index 536ae0d..44ba152 100644
--- a/configs/BSC9132QDS_NOR_DDRCLK133_SECURE_defconfig
+++ b/configs/BSC9132QDS_NOR_DDRCLK133_SECURE_defconfig
@@ -2,3 +2,5 @@
CONFIG_MPC85xx=y
CONFIG_TARGET_BSC9132QDS=y
CONFIG_SYS_EXTRA_OPTIONS="BSC9132QDS,SYS_CLK_100_DDR_133,SECURE_BOOT"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/BSC9132QDS_NOR_DDRCLK133_defconfig b/configs/BSC9132QDS_NOR_DDRCLK133_defconfig
index aeaf1e8..1298b7f 100644
--- a/configs/BSC9132QDS_NOR_DDRCLK133_defconfig
+++ b/configs/BSC9132QDS_NOR_DDRCLK133_defconfig
@@ -2,3 +2,5 @@
CONFIG_MPC85xx=y
CONFIG_TARGET_BSC9132QDS=y
CONFIG_SYS_EXTRA_OPTIONS="BSC9132QDS,SYS_CLK_100_DDR_133"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/BSC9132QDS_SDCARD_DDRCLK100_SECURE_defconfig b/configs/BSC9132QDS_SDCARD_DDRCLK100_SECURE_defconfig
index 6ee5d30..8a2c495 100644
--- a/configs/BSC9132QDS_SDCARD_DDRCLK100_SECURE_defconfig
+++ b/configs/BSC9132QDS_SDCARD_DDRCLK100_SECURE_defconfig
@@ -2,3 +2,5 @@
CONFIG_MPC85xx=y
CONFIG_TARGET_BSC9132QDS=y
CONFIG_SYS_EXTRA_OPTIONS="BSC9132QDS,SDCARD,SYS_CLK_100_DDR_100,SECURE_BOOT"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/BSC9132QDS_SDCARD_DDRCLK100_defconfig b/configs/BSC9132QDS_SDCARD_DDRCLK100_defconfig
index 85731bc..1fceceb 100644
--- a/configs/BSC9132QDS_SDCARD_DDRCLK100_defconfig
+++ b/configs/BSC9132QDS_SDCARD_DDRCLK100_defconfig
@@ -2,3 +2,5 @@
CONFIG_MPC85xx=y
CONFIG_TARGET_BSC9132QDS=y
CONFIG_SYS_EXTRA_OPTIONS="BSC9132QDS,SDCARD,SYS_CLK_100_DDR_100"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/BSC9132QDS_SDCARD_DDRCLK133_SECURE_defconfig b/configs/BSC9132QDS_SDCARD_DDRCLK133_SECURE_defconfig
index bbd515b..f1a1ead 100644
--- a/configs/BSC9132QDS_SDCARD_DDRCLK133_SECURE_defconfig
+++ b/configs/BSC9132QDS_SDCARD_DDRCLK133_SECURE_defconfig
@@ -2,3 +2,5 @@
CONFIG_MPC85xx=y
CONFIG_TARGET_BSC9132QDS=y
CONFIG_SYS_EXTRA_OPTIONS="BSC9132QDS,SDCARD,SYS_CLK_100_DDR_133,SECURE_BOOT"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/BSC9132QDS_SDCARD_DDRCLK133_defconfig b/configs/BSC9132QDS_SDCARD_DDRCLK133_defconfig
index 5bcaae5..d1d8381 100644
--- a/configs/BSC9132QDS_SDCARD_DDRCLK133_defconfig
+++ b/configs/BSC9132QDS_SDCARD_DDRCLK133_defconfig
@@ -2,3 +2,5 @@
CONFIG_MPC85xx=y
CONFIG_TARGET_BSC9132QDS=y
CONFIG_SYS_EXTRA_OPTIONS="BSC9132QDS,SDCARD,SYS_CLK_100_DDR_133"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/BSC9132QDS_SPIFLASH_DDRCLK100_SECURE_defconfig b/configs/BSC9132QDS_SPIFLASH_DDRCLK100_SECURE_defconfig
index 610b747..2262a6c 100644
--- a/configs/BSC9132QDS_SPIFLASH_DDRCLK100_SECURE_defconfig
+++ b/configs/BSC9132QDS_SPIFLASH_DDRCLK100_SECURE_defconfig
@@ -2,3 +2,5 @@
CONFIG_MPC85xx=y
CONFIG_TARGET_BSC9132QDS=y
CONFIG_SYS_EXTRA_OPTIONS="BSC9132QDS,SPIFLASH,SYS_CLK_100_DDR_100,SECURE_BOOT"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/BSC9132QDS_SPIFLASH_DDRCLK100_defconfig b/configs/BSC9132QDS_SPIFLASH_DDRCLK100_defconfig
index 177dec4..a755f4c 100644
--- a/configs/BSC9132QDS_SPIFLASH_DDRCLK100_defconfig
+++ b/configs/BSC9132QDS_SPIFLASH_DDRCLK100_defconfig
@@ -2,3 +2,5 @@
CONFIG_MPC85xx=y
CONFIG_TARGET_BSC9132QDS=y
CONFIG_SYS_EXTRA_OPTIONS="BSC9132QDS,SPIFLASH,SYS_CLK_100_DDR_100"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/BSC9132QDS_SPIFLASH_DDRCLK133_SECURE_defconfig b/configs/BSC9132QDS_SPIFLASH_DDRCLK133_SECURE_defconfig
index d7e6281..3607060 100644
--- a/configs/BSC9132QDS_SPIFLASH_DDRCLK133_SECURE_defconfig
+++ b/configs/BSC9132QDS_SPIFLASH_DDRCLK133_SECURE_defconfig
@@ -2,3 +2,5 @@
CONFIG_MPC85xx=y
CONFIG_TARGET_BSC9132QDS=y
CONFIG_SYS_EXTRA_OPTIONS="BSC9132QDS,SPIFLASH,SYS_CLK_100_DDR_133,SECURE_BOOT"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/BSC9132QDS_SPIFLASH_DDRCLK133_defconfig b/configs/BSC9132QDS_SPIFLASH_DDRCLK133_defconfig
index 7eed6cc..22ed151 100644
--- a/configs/BSC9132QDS_SPIFLASH_DDRCLK133_defconfig
+++ b/configs/BSC9132QDS_SPIFLASH_DDRCLK133_defconfig
@@ -2,3 +2,5 @@
CONFIG_MPC85xx=y
CONFIG_TARGET_BSC9132QDS=y
CONFIG_SYS_EXTRA_OPTIONS="BSC9132QDS,SPIFLASH,SYS_CLK_100_DDR_133"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/C29XPCIE_NAND_defconfig b/configs/C29XPCIE_NAND_defconfig
index b86dea8..c788f60 100644
--- a/configs/C29XPCIE_NAND_defconfig
+++ b/configs/C29XPCIE_NAND_defconfig
@@ -4,3 +4,5 @@
CONFIG_SPL=y
CONFIG_TPL=y
CONFIG_SYS_EXTRA_OPTIONS="C29XPCIE,36BIT,NAND"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/C29XPCIE_NOR_SECBOOT_defconfig b/configs/C29XPCIE_NOR_SECBOOT_defconfig
index afbc3b3..21a8947 100644
--- a/configs/C29XPCIE_NOR_SECBOOT_defconfig
+++ b/configs/C29XPCIE_NOR_SECBOOT_defconfig
@@ -2,3 +2,5 @@
CONFIG_MPC85xx=y
CONFIG_TARGET_C29XPCIE=y
CONFIG_SYS_EXTRA_OPTIONS="C29XPCIE,36BIT,SECURE_BOOT"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/C29XPCIE_SPIFLASH_SECBOOT_defconfig b/configs/C29XPCIE_SPIFLASH_SECBOOT_defconfig
index 9d3e0b3..cabe2af 100644
--- a/configs/C29XPCIE_SPIFLASH_SECBOOT_defconfig
+++ b/configs/C29XPCIE_SPIFLASH_SECBOOT_defconfig
@@ -2,3 +2,5 @@
CONFIG_MPC85xx=y
CONFIG_TARGET_C29XPCIE=y
CONFIG_SYS_EXTRA_OPTIONS="C29XPCIE,36BIT,SPIFLASH,SECURE_BOOT"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/C29XPCIE_SPIFLASH_defconfig b/configs/C29XPCIE_SPIFLASH_defconfig
index ab196e7..baa97a0 100644
--- a/configs/C29XPCIE_SPIFLASH_defconfig
+++ b/configs/C29XPCIE_SPIFLASH_defconfig
@@ -2,3 +2,5 @@
CONFIG_MPC85xx=y
CONFIG_TARGET_C29XPCIE=y
CONFIG_SYS_EXTRA_OPTIONS="C29XPCIE,36BIT,SPIFLASH"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/C29XPCIE_defconfig b/configs/C29XPCIE_defconfig
index b968504..9fada48 100644
--- a/configs/C29XPCIE_defconfig
+++ b/configs/C29XPCIE_defconfig
@@ -2,3 +2,5 @@
CONFIG_MPC85xx=y
CONFIG_TARGET_C29XPCIE=y
CONFIG_SYS_EXTRA_OPTIONS="C29XPCIE,36BIT"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/CPCI4052_defconfig b/configs/CPCI4052_defconfig
index 5d30b79..1eff082 100644
--- a/configs/CPCI4052_defconfig
+++ b/configs/CPCI4052_defconfig
@@ -1,3 +1,4 @@
CONFIG_PPC=y
CONFIG_4xx=y
CONFIG_TARGET_CPCI4052=y
+CONFIG_CMD_NET=y
diff --git a/configs/Astar_MID756_defconfig b/configs/Et_q8_v1_6_defconfig
similarity index 91%
rename from configs/Astar_MID756_defconfig
rename to configs/Et_q8_v1_6_defconfig
index b779f88..4e8350f 100644
--- a/configs/Astar_MID756_defconfig
+++ b/configs/Et_q8_v1_6_defconfig
@@ -12,7 +12,7 @@
CONFIG_VIDEO_LCD_BL_EN="PH6"
CONFIG_VIDEO_LCD_BL_PWM="PH0"
CONFIG_USB_MUSB_SUNXI=y
-CONFIG_DEFAULT_DEVICE_TREE="sun8i-a33-astar-mid756"
+CONFIG_DEFAULT_DEVICE_TREE="sun8i-a33-et-q8-v1.6"
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=5"
CONFIG_AXP221_DLDO1_VOLT=3300
diff --git a/configs/M5208EVBE_defconfig b/configs/M5208EVBE_defconfig
index c727683..d226671 100644
--- a/configs/M5208EVBE_defconfig
+++ b/configs/M5208EVBE_defconfig
@@ -1,2 +1,3 @@
CONFIG_M68K=y
CONFIG_TARGET_M5208EVBE=y
+CONFIG_CMD_NET=y
diff --git a/configs/M5235EVB_Flash32_defconfig b/configs/M5235EVB_Flash32_defconfig
index e19b730..86befea 100644
--- a/configs/M5235EVB_Flash32_defconfig
+++ b/configs/M5235EVB_Flash32_defconfig
@@ -1,3 +1,4 @@
CONFIG_M68K=y
CONFIG_TARGET_M5235EVB=y
CONFIG_SYS_EXTRA_OPTIONS="NORFLASH_PS32BIT,SYS_TEXT_BASE=0xFFC00000"
+CONFIG_CMD_NET=y
diff --git a/configs/M5235EVB_defconfig b/configs/M5235EVB_defconfig
index afb14b0..db574fb 100644
--- a/configs/M5235EVB_defconfig
+++ b/configs/M5235EVB_defconfig
@@ -1,3 +1,4 @@
CONFIG_M68K=y
CONFIG_TARGET_M5235EVB=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_TEXT_BASE=0xFFE00000"
+CONFIG_CMD_NET=y
diff --git a/configs/M5253DEMO_defconfig b/configs/M5253DEMO_defconfig
index 68cad2f..4e465e0 100644
--- a/configs/M5253DEMO_defconfig
+++ b/configs/M5253DEMO_defconfig
@@ -1,2 +1,3 @@
CONFIG_M68K=y
CONFIG_TARGET_M5253DEMO=y
+CONFIG_CMD_NET=y
diff --git a/configs/M5272C3_defconfig b/configs/M5272C3_defconfig
index fdb872a..28daa0d 100644
--- a/configs/M5272C3_defconfig
+++ b/configs/M5272C3_defconfig
@@ -1,2 +1,3 @@
CONFIG_M68K=y
CONFIG_TARGET_M5272C3=y
+CONFIG_CMD_NET=y
diff --git a/configs/M5275EVB_defconfig b/configs/M5275EVB_defconfig
index 1e33649..ce0e80a 100644
--- a/configs/M5275EVB_defconfig
+++ b/configs/M5275EVB_defconfig
@@ -1,2 +1,3 @@
CONFIG_M68K=y
CONFIG_TARGET_M5275EVB=y
+CONFIG_CMD_NET=y
diff --git a/configs/M5282EVB_defconfig b/configs/M5282EVB_defconfig
index 66d742f..d55c163 100644
--- a/configs/M5282EVB_defconfig
+++ b/configs/M5282EVB_defconfig
@@ -1,2 +1,3 @@
CONFIG_M68K=y
CONFIG_TARGET_M5282EVB=y
+CONFIG_CMD_NET=y
diff --git a/configs/M53017EVB_defconfig b/configs/M53017EVB_defconfig
index d83e638..5525272 100644
--- a/configs/M53017EVB_defconfig
+++ b/configs/M53017EVB_defconfig
@@ -1,2 +1,3 @@
CONFIG_M68K=y
CONFIG_TARGET_M53017EVB=y
+CONFIG_CMD_NET=y
diff --git a/configs/M5329AFEE_defconfig b/configs/M5329AFEE_defconfig
index c52bfa3..ea82c75 100644
--- a/configs/M5329AFEE_defconfig
+++ b/configs/M5329AFEE_defconfig
@@ -1,3 +1,4 @@
CONFIG_M68K=y
CONFIG_TARGET_M5329EVB=y
CONFIG_SYS_EXTRA_OPTIONS="NANDFLASH_SIZE=0"
+CONFIG_CMD_NET=y
diff --git a/configs/M5329BFEE_defconfig b/configs/M5329BFEE_defconfig
index 4154742..267144a 100644
--- a/configs/M5329BFEE_defconfig
+++ b/configs/M5329BFEE_defconfig
@@ -1,3 +1,4 @@
CONFIG_M68K=y
CONFIG_TARGET_M5329EVB=y
CONFIG_SYS_EXTRA_OPTIONS="NANDFLASH_SIZE=16"
+CONFIG_CMD_NET=y
diff --git a/configs/M5373EVB_defconfig b/configs/M5373EVB_defconfig
index f71c0bf..dfadcf2 100644
--- a/configs/M5373EVB_defconfig
+++ b/configs/M5373EVB_defconfig
@@ -1,3 +1,4 @@
CONFIG_M68K=y
CONFIG_TARGET_M5373EVB=y
CONFIG_SYS_EXTRA_OPTIONS="NANDFLASH_SIZE=16"
+CONFIG_CMD_NET=y
diff --git a/configs/M54418TWR_defconfig b/configs/M54418TWR_defconfig
index dceaab3..4c8876f 100644
--- a/configs/M54418TWR_defconfig
+++ b/configs/M54418TWR_defconfig
@@ -1,3 +1,4 @@
CONFIG_M68K=y
CONFIG_TARGET_M54418TWR=y
CONFIG_SYS_EXTRA_OPTIONS="CF_SBF,SYS_SERIAL_BOOT,SYS_TEXT_BASE=0x47E00000,SYS_INPUT_CLKSRC=50000000"
+CONFIG_CMD_NET=y
diff --git a/configs/M54418TWR_nand_mii_defconfig b/configs/M54418TWR_nand_mii_defconfig
index 722cdf0..07144d6 100644
--- a/configs/M54418TWR_nand_mii_defconfig
+++ b/configs/M54418TWR_nand_mii_defconfig
@@ -1,3 +1,4 @@
CONFIG_M68K=y
CONFIG_TARGET_M54418TWR=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_NAND_BOOT,SYS_TEXT_BASE=0x47E00000,SYS_INPUT_CLKSRC=25000000"
+CONFIG_CMD_NET=y
diff --git a/configs/M54418TWR_nand_rmii_defconfig b/configs/M54418TWR_nand_rmii_defconfig
index a411f98..70b6958 100644
--- a/configs/M54418TWR_nand_rmii_defconfig
+++ b/configs/M54418TWR_nand_rmii_defconfig
@@ -1,3 +1,4 @@
CONFIG_M68K=y
CONFIG_TARGET_M54418TWR=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_NAND_BOOT,SYS_TEXT_BASE=0x47E00000,SYS_INPUT_CLKSRC=50000000"
+CONFIG_CMD_NET=y
diff --git a/configs/M54418TWR_nand_rmii_lowfreq_defconfig b/configs/M54418TWR_nand_rmii_lowfreq_defconfig
index 7fb9a1d..4482c41 100644
--- a/configs/M54418TWR_nand_rmii_lowfreq_defconfig
+++ b/configs/M54418TWR_nand_rmii_lowfreq_defconfig
@@ -1,3 +1,4 @@
CONFIG_M68K=y
CONFIG_TARGET_M54418TWR=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_NAND_BOOT,LOW_MCFCLK,SYS_TEXT_BASE=0x47E00000,SYS_INPUT_CLKSRC=50000000"
+CONFIG_CMD_NET=y
diff --git a/configs/M54418TWR_serial_mii_defconfig b/configs/M54418TWR_serial_mii_defconfig
index 83bbb98..6fa566e 100644
--- a/configs/M54418TWR_serial_mii_defconfig
+++ b/configs/M54418TWR_serial_mii_defconfig
@@ -1,3 +1,4 @@
CONFIG_M68K=y
CONFIG_TARGET_M54418TWR=y
CONFIG_SYS_EXTRA_OPTIONS="CF_SBF,SYS_SERIAL_BOOT,SYS_TEXT_BASE=0x47E00000,SYS_INPUT_CLKSRC=25000000"
+CONFIG_CMD_NET=y
diff --git a/configs/M54418TWR_serial_rmii_defconfig b/configs/M54418TWR_serial_rmii_defconfig
index dceaab3..4c8876f 100644
--- a/configs/M54418TWR_serial_rmii_defconfig
+++ b/configs/M54418TWR_serial_rmii_defconfig
@@ -1,3 +1,4 @@
CONFIG_M68K=y
CONFIG_TARGET_M54418TWR=y
CONFIG_SYS_EXTRA_OPTIONS="CF_SBF,SYS_SERIAL_BOOT,SYS_TEXT_BASE=0x47E00000,SYS_INPUT_CLKSRC=50000000"
+CONFIG_CMD_NET=y
diff --git a/configs/M54451EVB_defconfig b/configs/M54451EVB_defconfig
index 804e888..b7f4803 100644
--- a/configs/M54451EVB_defconfig
+++ b/configs/M54451EVB_defconfig
@@ -1,3 +1,4 @@
CONFIG_M68K=y
CONFIG_TARGET_M54451EVB=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_TEXT_BASE=0x00000000,SYS_INPUT_CLKSRC=24000000"
+CONFIG_CMD_NET=y
diff --git a/configs/M54451EVB_stmicro_defconfig b/configs/M54451EVB_stmicro_defconfig
index 93412d0..01e420e 100644
--- a/configs/M54451EVB_stmicro_defconfig
+++ b/configs/M54451EVB_stmicro_defconfig
@@ -1,3 +1,4 @@
CONFIG_M68K=y
CONFIG_TARGET_M54451EVB=y
CONFIG_SYS_EXTRA_OPTIONS="CF_SBF,SYS_STMICRO_BOOT,SYS_TEXT_BASE=0x47e00000,SYS_INPUT_CLKSRC=24000000"
+CONFIG_CMD_NET=y
diff --git a/configs/M54455EVB_a66_defconfig b/configs/M54455EVB_a66_defconfig
index e137545..95a00b8 100644
--- a/configs/M54455EVB_a66_defconfig
+++ b/configs/M54455EVB_a66_defconfig
@@ -1,3 +1,4 @@
CONFIG_M68K=y
CONFIG_TARGET_M54455EVB=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_ATMEL_BOOT,SYS_TEXT_BASE=0x04000000,SYS_INPUT_CLKSRC=66666666"
+CONFIG_CMD_NET=y
diff --git a/configs/M54455EVB_defconfig b/configs/M54455EVB_defconfig
index 2eddfd6..99df654 100644
--- a/configs/M54455EVB_defconfig
+++ b/configs/M54455EVB_defconfig
@@ -1,3 +1,4 @@
CONFIG_M68K=y
CONFIG_TARGET_M54455EVB=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_ATMEL_BOOT,SYS_TEXT_BASE=0x04000000,SYS_INPUT_CLKSRC=33333333"
+CONFIG_CMD_NET=y
diff --git a/configs/M54455EVB_i66_defconfig b/configs/M54455EVB_i66_defconfig
index 583d847..b633a55 100644
--- a/configs/M54455EVB_i66_defconfig
+++ b/configs/M54455EVB_i66_defconfig
@@ -1,3 +1,4 @@
CONFIG_M68K=y
CONFIG_TARGET_M54455EVB=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_INTEL_BOOT,SYS_TEXT_BASE=0x00000000,SYS_INPUT_CLKSRC=66666666"
+CONFIG_CMD_NET=y
diff --git a/configs/M54455EVB_intel_defconfig b/configs/M54455EVB_intel_defconfig
index 2ec20f4..6cf0006 100644
--- a/configs/M54455EVB_intel_defconfig
+++ b/configs/M54455EVB_intel_defconfig
@@ -1,3 +1,4 @@
CONFIG_M68K=y
CONFIG_TARGET_M54455EVB=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_INTEL_BOOT,SYS_TEXT_BASE=0x00000000,SYS_INPUT_CLKSRC=33333333"
+CONFIG_CMD_NET=y
diff --git a/configs/M54455EVB_stm33_defconfig b/configs/M54455EVB_stm33_defconfig
index e50c124..c68c386 100644
--- a/configs/M54455EVB_stm33_defconfig
+++ b/configs/M54455EVB_stm33_defconfig
@@ -1,3 +1,4 @@
CONFIG_M68K=y
CONFIG_TARGET_M54455EVB=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_STMICRO_BOOT,CF_SBF,SYS_TEXT_BASE=0x4FE00000,SYS_INPUT_CLKSRC=33333333"
+CONFIG_CMD_NET=y
diff --git a/configs/M5475AFE_defconfig b/configs/M5475AFE_defconfig
index 7eb5ec8..48d5cf9 100644
--- a/configs/M5475AFE_defconfig
+++ b/configs/M5475AFE_defconfig
@@ -1,3 +1,4 @@
CONFIG_M68K=y
CONFIG_TARGET_M5475EVB=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_BUSCLK=133333333,SYS_BOOTSZ=2,SYS_DRAMSZ=64"
+CONFIG_CMD_NET=y
diff --git a/configs/M5475BFE_defconfig b/configs/M5475BFE_defconfig
index bcf67ca..4ffe19f 100644
--- a/configs/M5475BFE_defconfig
+++ b/configs/M5475BFE_defconfig
@@ -1,3 +1,4 @@
CONFIG_M68K=y
CONFIG_TARGET_M5475EVB=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_BUSCLK=133333333,SYS_BOOTSZ=2,SYS_DRAMSZ=64,SYS_NOR1SZ=16"
+CONFIG_CMD_NET=y
diff --git a/configs/M5475CFE_defconfig b/configs/M5475CFE_defconfig
index d51fa15..31d2e33 100644
--- a/configs/M5475CFE_defconfig
+++ b/configs/M5475CFE_defconfig
@@ -1,3 +1,4 @@
CONFIG_M68K=y
CONFIG_TARGET_M5475EVB=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_BUSCLK=133333333,SYS_BOOTSZ=2,SYS_DRAMSZ=64,SYS_NOR1SZ=16,SYS_VIDEO,SYS_USBCTRL"
+CONFIG_CMD_NET=y
diff --git a/configs/M5475DFE_defconfig b/configs/M5475DFE_defconfig
index 25bee35..dd4b23b 100644
--- a/configs/M5475DFE_defconfig
+++ b/configs/M5475DFE_defconfig
@@ -1,3 +1,4 @@
CONFIG_M68K=y
CONFIG_TARGET_M5475EVB=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_BUSCLK=133333333,SYS_BOOTSZ=2,SYS_DRAMSZ=64,SYS_USBCTRL"
+CONFIG_CMD_NET=y
diff --git a/configs/M5475EFE_defconfig b/configs/M5475EFE_defconfig
index e5d7fa8..1c6d0a6 100644
--- a/configs/M5475EFE_defconfig
+++ b/configs/M5475EFE_defconfig
@@ -1,3 +1,4 @@
CONFIG_M68K=y
CONFIG_TARGET_M5475EVB=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_BUSCLK=133333333,SYS_BOOTSZ=2,SYS_DRAMSZ=64,SYS_VIDEO,SYS_USBCTRL"
+CONFIG_CMD_NET=y
diff --git a/configs/M5475FFE_defconfig b/configs/M5475FFE_defconfig
index dd26c62..6b4f0d6 100644
--- a/configs/M5475FFE_defconfig
+++ b/configs/M5475FFE_defconfig
@@ -1,3 +1,4 @@
CONFIG_M68K=y
CONFIG_TARGET_M5475EVB=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_BUSCLK=133333333,SYS_BOOTSZ=2,SYS_DRAMSZ=64,SYS_NOR1SZ=32,SYS_VIDEO,SYS_USBCTRL,SYS_DRAMSZ1=64"
+CONFIG_CMD_NET=y
diff --git a/configs/M5475GFE_defconfig b/configs/M5475GFE_defconfig
index d1560bb..b65ad58 100644
--- a/configs/M5475GFE_defconfig
+++ b/configs/M5475GFE_defconfig
@@ -1,3 +1,4 @@
CONFIG_M68K=y
CONFIG_TARGET_M5475EVB=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_BUSCLK=133333333,SYS_BOOTSZ=4,SYS_DRAMSZ=64"
+CONFIG_CMD_NET=y
diff --git a/configs/M5485AFE_defconfig b/configs/M5485AFE_defconfig
index 7f5ae64..40c2736 100644
--- a/configs/M5485AFE_defconfig
+++ b/configs/M5485AFE_defconfig
@@ -1,3 +1,4 @@
CONFIG_M68K=y
CONFIG_TARGET_M5485EVB=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_BUSCLK=100000000,SYS_BOOTSZ=2,SYS_DRAMSZ=64"
+CONFIG_CMD_NET=y
diff --git a/configs/M5485BFE_defconfig b/configs/M5485BFE_defconfig
index 7fa7fb1..b3fed5a 100644
--- a/configs/M5485BFE_defconfig
+++ b/configs/M5485BFE_defconfig
@@ -1,3 +1,4 @@
CONFIG_M68K=y
CONFIG_TARGET_M5485EVB=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_BUSCLK=100000000,SYS_BOOTSZ=2,SYS_DRAMSZ=64,SYS_NOR1SZ=16"
+CONFIG_CMD_NET=y
diff --git a/configs/M5485CFE_defconfig b/configs/M5485CFE_defconfig
index a8b9ea7..6685232 100644
--- a/configs/M5485CFE_defconfig
+++ b/configs/M5485CFE_defconfig
@@ -1,3 +1,4 @@
CONFIG_M68K=y
CONFIG_TARGET_M5485EVB=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_BUSCLK=100000000,SYS_BOOTSZ=2,SYS_DRAMSZ=64,SYS_NOR1SZ=16,SYS_VIDEO,SYS_USBCTRL"
+CONFIG_CMD_NET=y
diff --git a/configs/M5485DFE_defconfig b/configs/M5485DFE_defconfig
index f6174ec..a26bc2b 100644
--- a/configs/M5485DFE_defconfig
+++ b/configs/M5485DFE_defconfig
@@ -1,3 +1,4 @@
CONFIG_M68K=y
CONFIG_TARGET_M5485EVB=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_BUSCLK=100000000,SYS_BOOTSZ=2,SYS_DRAMSZ=64,SYS_USBCTRL"
+CONFIG_CMD_NET=y
diff --git a/configs/M5485EFE_defconfig b/configs/M5485EFE_defconfig
index 868c7f2..f9ee78f 100644
--- a/configs/M5485EFE_defconfig
+++ b/configs/M5485EFE_defconfig
@@ -1,3 +1,4 @@
CONFIG_M68K=y
CONFIG_TARGET_M5485EVB=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_BUSCLK=100000000,SYS_BOOTSZ=2,SYS_DRAMSZ=64,SYS_VIDEO,SYS_USBCTRL"
+CONFIG_CMD_NET=y
diff --git a/configs/M5485FFE_defconfig b/configs/M5485FFE_defconfig
index 773c4f4..cbdc547 100644
--- a/configs/M5485FFE_defconfig
+++ b/configs/M5485FFE_defconfig
@@ -1,3 +1,4 @@
CONFIG_M68K=y
CONFIG_TARGET_M5485EVB=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_BUSCLK=100000000,SYS_BOOTSZ=2,SYS_DRAMSZ=64,SYS_NOR1SZ=32,SYS_VIDEO,SYS_USBCTRL,SYS_DRAMSZ1=64"
+CONFIG_CMD_NET=y
diff --git a/configs/M5485GFE_defconfig b/configs/M5485GFE_defconfig
index ff1e8f4..fc8837a 100644
--- a/configs/M5485GFE_defconfig
+++ b/configs/M5485GFE_defconfig
@@ -1,3 +1,4 @@
CONFIG_M68K=y
CONFIG_TARGET_M5485EVB=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_BUSCLK=100000000,SYS_BOOTSZ=4,SYS_DRAMSZ=64"
+CONFIG_CMD_NET=y
diff --git a/configs/M5485HFE_defconfig b/configs/M5485HFE_defconfig
index ba87cb7..6b0ee23 100644
--- a/configs/M5485HFE_defconfig
+++ b/configs/M5485HFE_defconfig
@@ -1,3 +1,4 @@
CONFIG_M68K=y
CONFIG_TARGET_M5485EVB=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_BUSCLK=100000000,SYS_BOOTSZ=2,SYS_DRAMSZ=64,SYS_NOR1SZ=16,SYS_VIDEO"
+CONFIG_CMD_NET=y
diff --git a/configs/MIP405T_defconfig b/configs/MIP405T_defconfig
index f8ccc81..769ed7c 100644
--- a/configs/MIP405T_defconfig
+++ b/configs/MIP405T_defconfig
@@ -2,3 +2,4 @@
CONFIG_4xx=y
CONFIG_TARGET_MIP405=y
CONFIG_SYS_EXTRA_OPTIONS="MIP405T"
+CONFIG_CMD_NET=y
diff --git a/configs/MIP405_defconfig b/configs/MIP405_defconfig
index 57004e8..792ca2d 100644
--- a/configs/MIP405_defconfig
+++ b/configs/MIP405_defconfig
@@ -1,3 +1,4 @@
CONFIG_PPC=y
CONFIG_4xx=y
CONFIG_TARGET_MIP405=y
+CONFIG_CMD_NET=y
diff --git a/configs/MPC8308RDB_defconfig b/configs/MPC8308RDB_defconfig
index 64717ec..9c8a55b 100644
--- a/configs/MPC8308RDB_defconfig
+++ b/configs/MPC8308RDB_defconfig
@@ -1,3 +1,4 @@
CONFIG_PPC=y
CONFIG_MPC83xx=y
CONFIG_TARGET_MPC8308RDB=y
+CONFIG_CMD_NET=y
diff --git a/configs/MPC8313ERDB_33_defconfig b/configs/MPC8313ERDB_33_defconfig
index b272d9b..e8ca3cf 100644
--- a/configs/MPC8313ERDB_33_defconfig
+++ b/configs/MPC8313ERDB_33_defconfig
@@ -2,3 +2,4 @@
CONFIG_MPC83xx=y
CONFIG_TARGET_MPC8313ERDB=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_33MHZ"
+CONFIG_CMD_NET=y
diff --git a/configs/MPC8313ERDB_66_defconfig b/configs/MPC8313ERDB_66_defconfig
index 3df3653..bc8b9c0 100644
--- a/configs/MPC8313ERDB_66_defconfig
+++ b/configs/MPC8313ERDB_66_defconfig
@@ -2,3 +2,4 @@
CONFIG_MPC83xx=y
CONFIG_TARGET_MPC8313ERDB=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_66MHZ"
+CONFIG_CMD_NET=y
diff --git a/configs/MPC8313ERDB_NAND_33_defconfig b/configs/MPC8313ERDB_NAND_33_defconfig
index 5b798e4..99de0a9 100644
--- a/configs/MPC8313ERDB_NAND_33_defconfig
+++ b/configs/MPC8313ERDB_NAND_33_defconfig
@@ -3,3 +3,4 @@
CONFIG_TARGET_MPC8313ERDB=y
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_33MHZ,NAND"
+CONFIG_CMD_NET=y
diff --git a/configs/MPC8313ERDB_NAND_66_defconfig b/configs/MPC8313ERDB_NAND_66_defconfig
index 0feef7b..b4fecba 100644
--- a/configs/MPC8313ERDB_NAND_66_defconfig
+++ b/configs/MPC8313ERDB_NAND_66_defconfig
@@ -3,3 +3,4 @@
CONFIG_TARGET_MPC8313ERDB=y
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_66MHZ,NAND"
+CONFIG_CMD_NET=y
diff --git a/configs/MPC8315ERDB_defconfig b/configs/MPC8315ERDB_defconfig
index ebebbed..db8963e 100644
--- a/configs/MPC8315ERDB_defconfig
+++ b/configs/MPC8315ERDB_defconfig
@@ -1,3 +1,4 @@
CONFIG_PPC=y
CONFIG_MPC83xx=y
CONFIG_TARGET_MPC8315ERDB=y
+CONFIG_CMD_NET=y
diff --git a/configs/MPC8323ERDB_defconfig b/configs/MPC8323ERDB_defconfig
index 7c03842..8eb6c2b 100644
--- a/configs/MPC8323ERDB_defconfig
+++ b/configs/MPC8323ERDB_defconfig
@@ -1,3 +1,4 @@
CONFIG_PPC=y
CONFIG_MPC83xx=y
CONFIG_TARGET_MPC8323ERDB=y
+CONFIG_CMD_NET=y
diff --git a/configs/MPC832XEMDS_ATM_defconfig b/configs/MPC832XEMDS_ATM_defconfig
index 6c96e3a..3c544be 100644
--- a/configs/MPC832XEMDS_ATM_defconfig
+++ b/configs/MPC832XEMDS_ATM_defconfig
@@ -2,3 +2,4 @@
CONFIG_MPC83xx=y
CONFIG_TARGET_MPC832XEMDS=y
CONFIG_SYS_EXTRA_OPTIONS="PQ_MDS_PIB=1,PQ_MDS_PIB_ATM=1"
+CONFIG_CMD_NET=y
diff --git a/configs/MPC832XEMDS_HOST_33_defconfig b/configs/MPC832XEMDS_HOST_33_defconfig
index 81d3059..0be0f78 100644
--- a/configs/MPC832XEMDS_HOST_33_defconfig
+++ b/configs/MPC832XEMDS_HOST_33_defconfig
@@ -2,3 +2,4 @@
CONFIG_MPC83xx=y
CONFIG_TARGET_MPC832XEMDS=y
CONFIG_SYS_EXTRA_OPTIONS="PCI,PCI_33M,PQ_MDS_PIB=1"
+CONFIG_CMD_NET=y
diff --git a/configs/MPC832XEMDS_HOST_66_defconfig b/configs/MPC832XEMDS_HOST_66_defconfig
index 93b6860..1c8f3ab 100644
--- a/configs/MPC832XEMDS_HOST_66_defconfig
+++ b/configs/MPC832XEMDS_HOST_66_defconfig
@@ -2,3 +2,4 @@
CONFIG_MPC83xx=y
CONFIG_TARGET_MPC832XEMDS=y
CONFIG_SYS_EXTRA_OPTIONS="PCI,PCI_66M,PQ_MDS_PIB=1"
+CONFIG_CMD_NET=y
diff --git a/configs/MPC832XEMDS_SLAVE_defconfig b/configs/MPC832XEMDS_SLAVE_defconfig
index 304e035..2c0bfab 100644
--- a/configs/MPC832XEMDS_SLAVE_defconfig
+++ b/configs/MPC832XEMDS_SLAVE_defconfig
@@ -2,3 +2,4 @@
CONFIG_MPC83xx=y
CONFIG_TARGET_MPC832XEMDS=y
CONFIG_SYS_EXTRA_OPTIONS="PCI,PCISLAVE"
+CONFIG_CMD_NET=y
diff --git a/configs/MPC832XEMDS_defconfig b/configs/MPC832XEMDS_defconfig
index 0398472..19b596b 100644
--- a/configs/MPC832XEMDS_defconfig
+++ b/configs/MPC832XEMDS_defconfig
@@ -1,3 +1,4 @@
CONFIG_PPC=y
CONFIG_MPC83xx=y
CONFIG_TARGET_MPC832XEMDS=y
+CONFIG_CMD_NET=y
diff --git a/configs/MPC8349EMDS_defconfig b/configs/MPC8349EMDS_defconfig
index f6af218..0035801 100644
--- a/configs/MPC8349EMDS_defconfig
+++ b/configs/MPC8349EMDS_defconfig
@@ -1,3 +1,4 @@
CONFIG_PPC=y
CONFIG_MPC83xx=y
CONFIG_TARGET_MPC8349EMDS=y
+CONFIG_CMD_NET=y
diff --git a/configs/MPC8349ITXGP_defconfig b/configs/MPC8349ITXGP_defconfig
index 53ed247..8ebcee2 100644
--- a/configs/MPC8349ITXGP_defconfig
+++ b/configs/MPC8349ITXGP_defconfig
@@ -2,3 +2,4 @@
CONFIG_MPC83xx=y
CONFIG_TARGET_MPC8349ITX=y
CONFIG_SYS_EXTRA_OPTIONS="MPC8349ITXGP,SYS_TEXT_BASE=0xFE000000"
+CONFIG_CMD_NET=y
diff --git a/configs/MPC8349ITX_LOWBOOT_defconfig b/configs/MPC8349ITX_LOWBOOT_defconfig
index baae2c0..4bbf4fa 100644
--- a/configs/MPC8349ITX_LOWBOOT_defconfig
+++ b/configs/MPC8349ITX_LOWBOOT_defconfig
@@ -2,3 +2,4 @@
CONFIG_MPC83xx=y
CONFIG_TARGET_MPC8349ITX=y
CONFIG_SYS_EXTRA_OPTIONS="MPC8349ITX,SYS_TEXT_BASE=0xFE000000"
+CONFIG_CMD_NET=y
diff --git a/configs/MPC8349ITX_defconfig b/configs/MPC8349ITX_defconfig
index 747f79e..3f9c0c5 100644
--- a/configs/MPC8349ITX_defconfig
+++ b/configs/MPC8349ITX_defconfig
@@ -2,3 +2,4 @@
CONFIG_MPC83xx=y
CONFIG_TARGET_MPC8349ITX=y
CONFIG_SYS_EXTRA_OPTIONS="MPC8349ITX"
+CONFIG_CMD_NET=y
diff --git a/configs/MPC837XEMDS_HOST_defconfig b/configs/MPC837XEMDS_HOST_defconfig
index 8bc56ef..c0beec2 100644
--- a/configs/MPC837XEMDS_HOST_defconfig
+++ b/configs/MPC837XEMDS_HOST_defconfig
@@ -2,3 +2,4 @@
CONFIG_MPC83xx=y
CONFIG_TARGET_MPC837XEMDS=y
CONFIG_SYS_EXTRA_OPTIONS="PCI"
+CONFIG_CMD_NET=y
diff --git a/configs/MPC837XEMDS_defconfig b/configs/MPC837XEMDS_defconfig
index d3b7c1d..f622d35 100644
--- a/configs/MPC837XEMDS_defconfig
+++ b/configs/MPC837XEMDS_defconfig
@@ -1,3 +1,4 @@
CONFIG_PPC=y
CONFIG_MPC83xx=y
CONFIG_TARGET_MPC837XEMDS=y
+CONFIG_CMD_NET=y
diff --git a/configs/MPC837XERDB_defconfig b/configs/MPC837XERDB_defconfig
index bb4411a..49ebd3a 100644
--- a/configs/MPC837XERDB_defconfig
+++ b/configs/MPC837XERDB_defconfig
@@ -1,3 +1,4 @@
CONFIG_PPC=y
CONFIG_MPC83xx=y
CONFIG_TARGET_MPC837XERDB=y
+CONFIG_CMD_NET=y
diff --git a/configs/MPC8536DS_36BIT_defconfig b/configs/MPC8536DS_36BIT_defconfig
index f39153b..328791b 100644
--- a/configs/MPC8536DS_36BIT_defconfig
+++ b/configs/MPC8536DS_36BIT_defconfig
@@ -2,3 +2,5 @@
CONFIG_MPC85xx=y
CONFIG_TARGET_MPC8536DS=y
CONFIG_SYS_EXTRA_OPTIONS="36BIT"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/MPC8536DS_SDCARD_defconfig b/configs/MPC8536DS_SDCARD_defconfig
index 0ea8835..715ba0c 100644
--- a/configs/MPC8536DS_SDCARD_defconfig
+++ b/configs/MPC8536DS_SDCARD_defconfig
@@ -2,3 +2,5 @@
CONFIG_MPC85xx=y
CONFIG_TARGET_MPC8536DS=y
CONFIG_SYS_EXTRA_OPTIONS="SDCARD"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/MPC8536DS_SPIFLASH_defconfig b/configs/MPC8536DS_SPIFLASH_defconfig
index 02410ee..3bd282f 100644
--- a/configs/MPC8536DS_SPIFLASH_defconfig
+++ b/configs/MPC8536DS_SPIFLASH_defconfig
@@ -2,3 +2,5 @@
CONFIG_MPC85xx=y
CONFIG_TARGET_MPC8536DS=y
CONFIG_SYS_EXTRA_OPTIONS="SPIFLASH"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/MPC8536DS_defconfig b/configs/MPC8536DS_defconfig
index 62edc91..2aa6823 100644
--- a/configs/MPC8536DS_defconfig
+++ b/configs/MPC8536DS_defconfig
@@ -1,3 +1,5 @@
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_MPC8536DS=y
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/MPC8540ADS_defconfig b/configs/MPC8540ADS_defconfig
index 41af349..d658404 100644
--- a/configs/MPC8540ADS_defconfig
+++ b/configs/MPC8540ADS_defconfig
@@ -1,3 +1,5 @@
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_MPC8540ADS=y
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/MPC8541CDS_defconfig b/configs/MPC8541CDS_defconfig
index bc9c246..34c0d06 100644
--- a/configs/MPC8541CDS_defconfig
+++ b/configs/MPC8541CDS_defconfig
@@ -1,3 +1,5 @@
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_MPC8541CDS=y
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/MPC8541CDS_legacy_defconfig b/configs/MPC8541CDS_legacy_defconfig
index 55478ab..9860dea 100644
--- a/configs/MPC8541CDS_legacy_defconfig
+++ b/configs/MPC8541CDS_legacy_defconfig
@@ -2,3 +2,5 @@
CONFIG_MPC85xx=y
CONFIG_TARGET_MPC8541CDS=y
CONFIG_SYS_EXTRA_OPTIONS="LEGACY"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/MPC8544DS_defconfig b/configs/MPC8544DS_defconfig
index faeaa94..5461b0d 100644
--- a/configs/MPC8544DS_defconfig
+++ b/configs/MPC8544DS_defconfig
@@ -1,3 +1,5 @@
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_MPC8544DS=y
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/MPC8548CDS_36BIT_defconfig b/configs/MPC8548CDS_36BIT_defconfig
index dfe1fca..2a4f825 100644
--- a/configs/MPC8548CDS_36BIT_defconfig
+++ b/configs/MPC8548CDS_36BIT_defconfig
@@ -2,3 +2,5 @@
CONFIG_MPC85xx=y
CONFIG_TARGET_MPC8548CDS=y
CONFIG_SYS_EXTRA_OPTIONS="36BIT"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/MPC8548CDS_defconfig b/configs/MPC8548CDS_defconfig
index ba52e94..9f214d9 100644
--- a/configs/MPC8548CDS_defconfig
+++ b/configs/MPC8548CDS_defconfig
@@ -1,3 +1,5 @@
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_MPC8548CDS=y
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/MPC8548CDS_legacy_defconfig b/configs/MPC8548CDS_legacy_defconfig
index 69c44af..bdc7aa5 100644
--- a/configs/MPC8548CDS_legacy_defconfig
+++ b/configs/MPC8548CDS_legacy_defconfig
@@ -2,3 +2,5 @@
CONFIG_MPC85xx=y
CONFIG_TARGET_MPC8548CDS=y
CONFIG_SYS_EXTRA_OPTIONS="LEGACY"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/MPC8555CDS_defconfig b/configs/MPC8555CDS_defconfig
index 3bdbb0c..ba2747a 100644
--- a/configs/MPC8555CDS_defconfig
+++ b/configs/MPC8555CDS_defconfig
@@ -1,3 +1,5 @@
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_MPC8555CDS=y
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/MPC8555CDS_legacy_defconfig b/configs/MPC8555CDS_legacy_defconfig
index 8e53ee0..fdd3c10 100644
--- a/configs/MPC8555CDS_legacy_defconfig
+++ b/configs/MPC8555CDS_legacy_defconfig
@@ -2,3 +2,5 @@
CONFIG_MPC85xx=y
CONFIG_TARGET_MPC8555CDS=y
CONFIG_SYS_EXTRA_OPTIONS="LEGACY"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/MPC8560ADS_defconfig b/configs/MPC8560ADS_defconfig
index aa84d28..4ec548f 100644
--- a/configs/MPC8560ADS_defconfig
+++ b/configs/MPC8560ADS_defconfig
@@ -1,3 +1,5 @@
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_MPC8560ADS=y
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/MPC8568MDS_defconfig b/configs/MPC8568MDS_defconfig
index ac0ec8c..27cc6c4 100644
--- a/configs/MPC8568MDS_defconfig
+++ b/configs/MPC8568MDS_defconfig
@@ -1,3 +1,5 @@
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_MPC8568MDS=y
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/MPC8569MDS_ATM_defconfig b/configs/MPC8569MDS_ATM_defconfig
index 326983d..18b567e 100644
--- a/configs/MPC8569MDS_ATM_defconfig
+++ b/configs/MPC8569MDS_ATM_defconfig
@@ -2,3 +2,5 @@
CONFIG_MPC85xx=y
CONFIG_TARGET_MPC8569MDS=y
CONFIG_SYS_EXTRA_OPTIONS="ATM"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/MPC8569MDS_defconfig b/configs/MPC8569MDS_defconfig
index 81fb82a..5dbfe76 100644
--- a/configs/MPC8569MDS_defconfig
+++ b/configs/MPC8569MDS_defconfig
@@ -1,3 +1,5 @@
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_MPC8569MDS=y
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/MPC8572DS_36BIT_defconfig b/configs/MPC8572DS_36BIT_defconfig
index 0ce85e4..d0b6ce8 100644
--- a/configs/MPC8572DS_36BIT_defconfig
+++ b/configs/MPC8572DS_36BIT_defconfig
@@ -2,3 +2,5 @@
CONFIG_MPC85xx=y
CONFIG_TARGET_MPC8572DS=y
CONFIG_SYS_EXTRA_OPTIONS="36BIT"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/MPC8572DS_defconfig b/configs/MPC8572DS_defconfig
index dde9eb2..6f2178a 100644
--- a/configs/MPC8572DS_defconfig
+++ b/configs/MPC8572DS_defconfig
@@ -1,3 +1,5 @@
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_MPC8572DS=y
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/MPC8610HPCD_defconfig b/configs/MPC8610HPCD_defconfig
index f4e8951..ba94f54 100644
--- a/configs/MPC8610HPCD_defconfig
+++ b/configs/MPC8610HPCD_defconfig
@@ -1,3 +1,4 @@
CONFIG_PPC=y
CONFIG_MPC86xx=y
CONFIG_TARGET_MPC8610HPCD=y
+CONFIG_CMD_NET=y
diff --git a/configs/MPC8641HPCN_36BIT_defconfig b/configs/MPC8641HPCN_36BIT_defconfig
index 6005c59..8279461 100644
--- a/configs/MPC8641HPCN_36BIT_defconfig
+++ b/configs/MPC8641HPCN_36BIT_defconfig
@@ -2,3 +2,4 @@
CONFIG_MPC86xx=y
CONFIG_TARGET_MPC8641HPCN=y
CONFIG_SYS_EXTRA_OPTIONS="PHYS_64BIT"
+CONFIG_CMD_NET=y
diff --git a/configs/MPC8641HPCN_defconfig b/configs/MPC8641HPCN_defconfig
index 6c117d5..b4a4eb5 100644
--- a/configs/MPC8641HPCN_defconfig
+++ b/configs/MPC8641HPCN_defconfig
@@ -1,3 +1,4 @@
CONFIG_PPC=y
CONFIG_MPC86xx=y
CONFIG_TARGET_MPC8641HPCN=y
+CONFIG_CMD_NET=y
diff --git a/configs/Mele_A1000G_quad_defconfig b/configs/Mele_A1000G_quad_defconfig
new file mode 100644
index 0000000..3a746c8
--- /dev/null
+++ b/configs/Mele_A1000G_quad_defconfig
@@ -0,0 +1,24 @@
+# The Mele A1000G quad is yet another Allwinnner based Android top set box
+# from Mele.
+#
+# It uses the same case as the original Mele A1000 and the same PCB as the M9,
+# the USM sata storage slot is connected via anusb to sata bridge connected to
+# the otg controller, this renders the micro USB B receptacle non functional.
+#
+# It features an A31 SoC, 2G RAM, 16G Nand, 100Mbit ethernet, HDMI out,
+# 3 USB A receptacles, 3.5 mm jack for analog audio out, optical spdif,
+# RTL R8188EU (USB) wifi and a full size sdcard slot
+CONFIG_ARM=y
+CONFIG_ARCH_SUNXI=y
+CONFIG_MACH_SUN6I=y
+CONFIG_DRAM_ZQ=120
+CONFIG_USB1_VBUS_PIN="PC27"
+CONFIG_USB2_VBUS_PIN=""
+CONFIG_DEFAULT_DEVICE_TREE="sun6i-a31-mele-a1000g-quad"
+CONFIG_SPL=y
+CONFIG_SYS_EXTRA_OPTIONS="USB_EHCI,SUNXI_GMAC"
+CONFIG_ETH_DESIGNWARE=y
+CONFIG_AXP221_DCDC1_VOLT=3300
+CONFIG_AXP221_DLDO1_VOLT=3300
+CONFIG_AXP221_DLDO4_VOLT=3300
+CONFIG_AXP221_ALDO1_VOLT=3300
diff --git a/configs/Mele_M9_defconfig b/configs/Mele_M9_defconfig
index 4708133..16881fa 100644
--- a/configs/Mele_M9_defconfig
+++ b/configs/Mele_M9_defconfig
@@ -1,3 +1,13 @@
+# The Mele M9 is yet another Allwinnner based Android top set box from Mele.
+#
+# It uses the same PCB as the A1000G quad, but in a new case without a
+# USM sata storage slot, and the space on the PCB for the usb to sata
+# bridge connected to the otg controller is not populated, possible
+# making the micro usb otg connector functional (untested)
+#
+# It features an A31 SoC, 2G RAM, 16G Nand, 100Mbit ethernet, HDMI out,
+# 3 USB A receptacles, 3.5 mm jack for analog audio out, optical spdif,
+# micro USB B receptacle, RTL R8188EU (USB) and a full size sdcard slot
CONFIG_ARM=y
CONFIG_ARCH_SUNXI=y
CONFIG_MACH_SUN6I=y
diff --git a/configs/Merrii_A80_Optimus_defconfig b/configs/Merrii_A80_Optimus_defconfig
new file mode 100644
index 0000000..6bd5273
--- /dev/null
+++ b/configs/Merrii_A80_Optimus_defconfig
@@ -0,0 +1,11 @@
+CONFIG_DEFAULT_DEVICE_TREE="sun9i-a80-optimus"
+CONFIG_VIDEO=n
+CONFIG_USB_KEYBOARD=n
+CONFIG_MMC0_CD_PIN="PH18"
+CONFIG_ARM=y
+CONFIG_ARCH_SUNXI=y
+CONFIG_MACH_SUN9I=y
+# these are unused atm but we must set them to something
+CONFIG_DRAM_CLK=360
+CONFIG_DRAM_ZQ=123
+CONFIG_SYS_CLK_FREQ=1008000000
diff --git a/configs/MigoR_defconfig b/configs/MigoR_defconfig
index dd79ff5..d4953ce 100644
--- a/configs/MigoR_defconfig
+++ b/configs/MigoR_defconfig
@@ -1,2 +1,3 @@
CONFIG_SH=y
CONFIG_TARGET_MIGOR=y
+CONFIG_CMD_NET=y
diff --git a/configs/MiniFAP_defconfig b/configs/MiniFAP_defconfig
index 6b4f2b2..dc6c942 100644
--- a/configs/MiniFAP_defconfig
+++ b/configs/MiniFAP_defconfig
@@ -2,3 +2,4 @@
CONFIG_MPC5xxx=y
CONFIG_TARGET_TQM5200=y
CONFIG_SYS_EXTRA_OPTIONS="MINIFAP"
+CONFIG_CMD_NET=y
diff --git a/configs/O2D300_defconfig b/configs/O2D300_defconfig
index c63b5da..dcf3255 100644
--- a/configs/O2D300_defconfig
+++ b/configs/O2D300_defconfig
@@ -1,3 +1,4 @@
CONFIG_PPC=y
CONFIG_MPC5xxx=y
CONFIG_TARGET_O2D300=y
+CONFIG_CMD_NET=y
diff --git a/configs/O2DNT2_RAMBOOT_defconfig b/configs/O2DNT2_RAMBOOT_defconfig
index 8549b8e..f9d340a 100644
--- a/configs/O2DNT2_RAMBOOT_defconfig
+++ b/configs/O2DNT2_RAMBOOT_defconfig
@@ -2,3 +2,4 @@
CONFIG_MPC5xxx=y
CONFIG_TARGET_O2DNT2=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_TEXT_BASE=0x00100000"
+CONFIG_CMD_NET=y
diff --git a/configs/O2DNT2_defconfig b/configs/O2DNT2_defconfig
index 9df3b88..ce952e8 100644
--- a/configs/O2DNT2_defconfig
+++ b/configs/O2DNT2_defconfig
@@ -1,3 +1,4 @@
CONFIG_PPC=y
CONFIG_MPC5xxx=y
CONFIG_TARGET_O2DNT2=y
+CONFIG_CMD_NET=y
diff --git a/configs/O2D_defconfig b/configs/O2D_defconfig
index f2d3663..98efde8 100644
--- a/configs/O2D_defconfig
+++ b/configs/O2D_defconfig
@@ -1,3 +1,4 @@
CONFIG_PPC=y
CONFIG_MPC5xxx=y
CONFIG_TARGET_O2D=y
+CONFIG_CMD_NET=y
diff --git a/configs/O2I_defconfig b/configs/O2I_defconfig
index 84db574..80bce5d 100644
--- a/configs/O2I_defconfig
+++ b/configs/O2I_defconfig
@@ -1,3 +1,4 @@
CONFIG_PPC=y
CONFIG_MPC5xxx=y
CONFIG_TARGET_O2I=y
+CONFIG_CMD_NET=y
diff --git a/configs/O2MNT_O2M110_defconfig b/configs/O2MNT_O2M110_defconfig
index 320b898..e452f90 100644
--- a/configs/O2MNT_O2M110_defconfig
+++ b/configs/O2MNT_O2M110_defconfig
@@ -2,3 +2,4 @@
CONFIG_MPC5xxx=y
CONFIG_TARGET_O2MNT=y
CONFIG_SYS_EXTRA_OPTIONS="IFM_SENSOR_TYPE=\"O2M110\""
+CONFIG_CMD_NET=y
diff --git a/configs/O2MNT_O2M112_defconfig b/configs/O2MNT_O2M112_defconfig
index b17330a..a1ee009 100644
--- a/configs/O2MNT_O2M112_defconfig
+++ b/configs/O2MNT_O2M112_defconfig
@@ -2,3 +2,4 @@
CONFIG_MPC5xxx=y
CONFIG_TARGET_O2MNT=y
CONFIG_SYS_EXTRA_OPTIONS="IFM_SENSOR_TYPE=\"O2M112\""
+CONFIG_CMD_NET=y
diff --git a/configs/O2MNT_O2M113_defconfig b/configs/O2MNT_O2M113_defconfig
index 86ec47a..5e8db1c 100644
--- a/configs/O2MNT_O2M113_defconfig
+++ b/configs/O2MNT_O2M113_defconfig
@@ -2,3 +2,4 @@
CONFIG_MPC5xxx=y
CONFIG_TARGET_O2MNT=y
CONFIG_SYS_EXTRA_OPTIONS="IFM_SENSOR_TYPE=\"O2M113\""
+CONFIG_CMD_NET=y
diff --git a/configs/O2MNT_defconfig b/configs/O2MNT_defconfig
index 23c4dc3..d0eb289 100644
--- a/configs/O2MNT_defconfig
+++ b/configs/O2MNT_defconfig
@@ -1,3 +1,4 @@
CONFIG_PPC=y
CONFIG_MPC5xxx=y
CONFIG_TARGET_O2MNT=y
+CONFIG_CMD_NET=y
diff --git a/configs/O3DNT_defconfig b/configs/O3DNT_defconfig
index 1f28a43..d50879a 100644
--- a/configs/O3DNT_defconfig
+++ b/configs/O3DNT_defconfig
@@ -1,3 +1,4 @@
CONFIG_PPC=y
CONFIG_MPC5xxx=y
CONFIG_TARGET_O3DNT=y
+CONFIG_CMD_NET=y
diff --git a/configs/P1010RDB-PA_36BIT_NAND_SECBOOT_defconfig b/configs/P1010RDB-PA_36BIT_NAND_SECBOOT_defconfig
index 6245bd8..b5e4a91 100644
--- a/configs/P1010RDB-PA_36BIT_NAND_SECBOOT_defconfig
+++ b/configs/P1010RDB-PA_36BIT_NAND_SECBOOT_defconfig
@@ -2,3 +2,5 @@
CONFIG_MPC85xx=y
CONFIG_TARGET_P1010RDB=y
CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PA,36BIT,NAND_SECBOOT,SECURE_BOOT"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/P1010RDB-PA_36BIT_NAND_defconfig b/configs/P1010RDB-PA_36BIT_NAND_defconfig
index 35c47de..fe95616 100644
--- a/configs/P1010RDB-PA_36BIT_NAND_defconfig
+++ b/configs/P1010RDB-PA_36BIT_NAND_defconfig
@@ -4,3 +4,5 @@
CONFIG_SPL=y
CONFIG_TPL=y
CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PA,36BIT,NAND"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/P1010RDB-PA_36BIT_NOR_SECBOOT_defconfig b/configs/P1010RDB-PA_36BIT_NOR_SECBOOT_defconfig
index 6bffe04..f96db97 100644
--- a/configs/P1010RDB-PA_36BIT_NOR_SECBOOT_defconfig
+++ b/configs/P1010RDB-PA_36BIT_NOR_SECBOOT_defconfig
@@ -2,3 +2,5 @@
CONFIG_MPC85xx=y
CONFIG_TARGET_P1010RDB=y
CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PA,36BIT,SECURE_BOOT"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/P1010RDB-PA_36BIT_NOR_defconfig b/configs/P1010RDB-PA_36BIT_NOR_defconfig
index d3b99d1..2e7d281 100644
--- a/configs/P1010RDB-PA_36BIT_NOR_defconfig
+++ b/configs/P1010RDB-PA_36BIT_NOR_defconfig
@@ -2,3 +2,5 @@
CONFIG_MPC85xx=y
CONFIG_TARGET_P1010RDB=y
CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PA,36BIT"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/P1010RDB-PA_36BIT_SDCARD_defconfig b/configs/P1010RDB-PA_36BIT_SDCARD_defconfig
index 50598f0..ec52886 100644
--- a/configs/P1010RDB-PA_36BIT_SDCARD_defconfig
+++ b/configs/P1010RDB-PA_36BIT_SDCARD_defconfig
@@ -3,3 +3,5 @@
CONFIG_TARGET_P1010RDB=y
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PA,36BIT,SDCARD"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/P1010RDB-PA_36BIT_SPIFLASH_SECBOOT_defconfig b/configs/P1010RDB-PA_36BIT_SPIFLASH_SECBOOT_defconfig
index 3680b58..1b93479 100644
--- a/configs/P1010RDB-PA_36BIT_SPIFLASH_SECBOOT_defconfig
+++ b/configs/P1010RDB-PA_36BIT_SPIFLASH_SECBOOT_defconfig
@@ -2,3 +2,5 @@
CONFIG_MPC85xx=y
CONFIG_TARGET_P1010RDB=y
CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PA,36BIT,SPIFLASH,SECURE_BOOT"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig b/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig
index 54f0664..7f8b5dd 100644
--- a/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig
+++ b/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig
@@ -3,3 +3,5 @@
CONFIG_TARGET_P1010RDB=y
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PA,36BIT,SPIFLASH"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/P1010RDB-PA_NAND_SECBOOT_defconfig b/configs/P1010RDB-PA_NAND_SECBOOT_defconfig
index cec155d..5888af2 100644
--- a/configs/P1010RDB-PA_NAND_SECBOOT_defconfig
+++ b/configs/P1010RDB-PA_NAND_SECBOOT_defconfig
@@ -2,3 +2,5 @@
CONFIG_MPC85xx=y
CONFIG_TARGET_P1010RDB=y
CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PA,NAND_SECBOOT,SECURE_BOOT"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/P1010RDB-PA_NAND_defconfig b/configs/P1010RDB-PA_NAND_defconfig
index d2a4268..e6bd968 100644
--- a/configs/P1010RDB-PA_NAND_defconfig
+++ b/configs/P1010RDB-PA_NAND_defconfig
@@ -4,3 +4,5 @@
CONFIG_SPL=y
CONFIG_TPL=y
CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PA,NAND"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/P1010RDB-PA_NOR_SECBOOT_defconfig b/configs/P1010RDB-PA_NOR_SECBOOT_defconfig
index d143079..8a33351 100644
--- a/configs/P1010RDB-PA_NOR_SECBOOT_defconfig
+++ b/configs/P1010RDB-PA_NOR_SECBOOT_defconfig
@@ -2,3 +2,5 @@
CONFIG_MPC85xx=y
CONFIG_TARGET_P1010RDB=y
CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PA,SECURE_BOOT"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/P1010RDB-PA_NOR_defconfig b/configs/P1010RDB-PA_NOR_defconfig
index 223f783..f7fb973 100644
--- a/configs/P1010RDB-PA_NOR_defconfig
+++ b/configs/P1010RDB-PA_NOR_defconfig
@@ -2,3 +2,5 @@
CONFIG_MPC85xx=y
CONFIG_TARGET_P1010RDB=y
CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PA"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/P1010RDB-PA_SDCARD_defconfig b/configs/P1010RDB-PA_SDCARD_defconfig
index 6229dad..4f3891f 100644
--- a/configs/P1010RDB-PA_SDCARD_defconfig
+++ b/configs/P1010RDB-PA_SDCARD_defconfig
@@ -3,3 +3,5 @@
CONFIG_TARGET_P1010RDB=y
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PA,SDCARD"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/P1010RDB-PA_SPIFLASH_SECBOOT_defconfig b/configs/P1010RDB-PA_SPIFLASH_SECBOOT_defconfig
index a8019bb..bede3bd 100644
--- a/configs/P1010RDB-PA_SPIFLASH_SECBOOT_defconfig
+++ b/configs/P1010RDB-PA_SPIFLASH_SECBOOT_defconfig
@@ -2,3 +2,5 @@
CONFIG_MPC85xx=y
CONFIG_TARGET_P1010RDB=y
CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PA,SPIFLASH,SECURE_BOOT"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/P1010RDB-PA_SPIFLASH_defconfig b/configs/P1010RDB-PA_SPIFLASH_defconfig
index de54e1d..97e7382 100644
--- a/configs/P1010RDB-PA_SPIFLASH_defconfig
+++ b/configs/P1010RDB-PA_SPIFLASH_defconfig
@@ -3,3 +3,5 @@
CONFIG_TARGET_P1010RDB=y
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PA,SPIFLASH"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/P1010RDB-PB_36BIT_NAND_SECBOOT_defconfig b/configs/P1010RDB-PB_36BIT_NAND_SECBOOT_defconfig
index 61e559d..6a781c2 100644
--- a/configs/P1010RDB-PB_36BIT_NAND_SECBOOT_defconfig
+++ b/configs/P1010RDB-PB_36BIT_NAND_SECBOOT_defconfig
@@ -2,3 +2,5 @@
CONFIG_MPC85xx=y
CONFIG_TARGET_P1010RDB=y
CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PB,36BIT,NAND_SECBOOT,SECURE_BOOT"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/P1010RDB-PB_36BIT_NAND_defconfig b/configs/P1010RDB-PB_36BIT_NAND_defconfig
index 54bd88d..ea3456b 100644
--- a/configs/P1010RDB-PB_36BIT_NAND_defconfig
+++ b/configs/P1010RDB-PB_36BIT_NAND_defconfig
@@ -4,3 +4,5 @@
CONFIG_SPL=y
CONFIG_TPL=y
CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PB,36BIT,NAND"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/P1010RDB-PB_36BIT_NOR_SECBOOT_defconfig b/configs/P1010RDB-PB_36BIT_NOR_SECBOOT_defconfig
index a4656ea..09dafed 100644
--- a/configs/P1010RDB-PB_36BIT_NOR_SECBOOT_defconfig
+++ b/configs/P1010RDB-PB_36BIT_NOR_SECBOOT_defconfig
@@ -2,3 +2,5 @@
CONFIG_MPC85xx=y
CONFIG_TARGET_P1010RDB=y
CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PB,36BIT,SECURE_BOOT"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/P1010RDB-PB_36BIT_NOR_defconfig b/configs/P1010RDB-PB_36BIT_NOR_defconfig
index ac78763..f7243ac 100644
--- a/configs/P1010RDB-PB_36BIT_NOR_defconfig
+++ b/configs/P1010RDB-PB_36BIT_NOR_defconfig
@@ -2,3 +2,5 @@
CONFIG_MPC85xx=y
CONFIG_TARGET_P1010RDB=y
CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PB,36BIT"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/P1010RDB-PB_36BIT_SDCARD_defconfig b/configs/P1010RDB-PB_36BIT_SDCARD_defconfig
index 50e8005..a9ea8b2 100644
--- a/configs/P1010RDB-PB_36BIT_SDCARD_defconfig
+++ b/configs/P1010RDB-PB_36BIT_SDCARD_defconfig
@@ -3,3 +3,5 @@
CONFIG_TARGET_P1010RDB=y
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PB,36BIT,SDCARD"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/P1010RDB-PB_36BIT_SPIFLASH_SECBOOT_defconfig b/configs/P1010RDB-PB_36BIT_SPIFLASH_SECBOOT_defconfig
index 6ebe23c..067f9ba 100644
--- a/configs/P1010RDB-PB_36BIT_SPIFLASH_SECBOOT_defconfig
+++ b/configs/P1010RDB-PB_36BIT_SPIFLASH_SECBOOT_defconfig
@@ -2,3 +2,5 @@
CONFIG_MPC85xx=y
CONFIG_TARGET_P1010RDB=y
CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PB,36BIT,SPIFLASH,SECURE_BOOT"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig b/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig
index 7461016..8fed202 100644
--- a/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig
+++ b/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig
@@ -3,3 +3,5 @@
CONFIG_TARGET_P1010RDB=y
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PB,36BIT,SPIFLASH"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/P1010RDB-PB_NAND_SECBOOT_defconfig b/configs/P1010RDB-PB_NAND_SECBOOT_defconfig
index c43ea2b..97c4673 100644
--- a/configs/P1010RDB-PB_NAND_SECBOOT_defconfig
+++ b/configs/P1010RDB-PB_NAND_SECBOOT_defconfig
@@ -2,3 +2,5 @@
CONFIG_MPC85xx=y
CONFIG_TARGET_P1010RDB=y
CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PB,NAND_SECBOOT,SECURE_BOOT"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/P1010RDB-PB_NAND_defconfig b/configs/P1010RDB-PB_NAND_defconfig
index c6bec43..3e49a24 100644
--- a/configs/P1010RDB-PB_NAND_defconfig
+++ b/configs/P1010RDB-PB_NAND_defconfig
@@ -4,3 +4,5 @@
CONFIG_SPL=y
CONFIG_TPL=y
CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PB,NAND"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/P1010RDB-PB_NOR_SECBOOT_defconfig b/configs/P1010RDB-PB_NOR_SECBOOT_defconfig
index 9c65183..fe5ee48 100644
--- a/configs/P1010RDB-PB_NOR_SECBOOT_defconfig
+++ b/configs/P1010RDB-PB_NOR_SECBOOT_defconfig
@@ -2,3 +2,5 @@
CONFIG_MPC85xx=y
CONFIG_TARGET_P1010RDB=y
CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PB,SECURE_BOOT"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/P1010RDB-PB_NOR_defconfig b/configs/P1010RDB-PB_NOR_defconfig
index 4bf4ac9..77a1a63 100644
--- a/configs/P1010RDB-PB_NOR_defconfig
+++ b/configs/P1010RDB-PB_NOR_defconfig
@@ -2,3 +2,5 @@
CONFIG_MPC85xx=y
CONFIG_TARGET_P1010RDB=y
CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PB"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/P1010RDB-PB_SDCARD_defconfig b/configs/P1010RDB-PB_SDCARD_defconfig
index af9a4dd..27777bc 100644
--- a/configs/P1010RDB-PB_SDCARD_defconfig
+++ b/configs/P1010RDB-PB_SDCARD_defconfig
@@ -3,3 +3,5 @@
CONFIG_TARGET_P1010RDB=y
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PB,SDCARD"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/P1010RDB-PB_SPIFLASH_SECBOOT_defconfig b/configs/P1010RDB-PB_SPIFLASH_SECBOOT_defconfig
index 65a2a42..568934a 100644
--- a/configs/P1010RDB-PB_SPIFLASH_SECBOOT_defconfig
+++ b/configs/P1010RDB-PB_SPIFLASH_SECBOOT_defconfig
@@ -2,3 +2,5 @@
CONFIG_MPC85xx=y
CONFIG_TARGET_P1010RDB=y
CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PB,SPIFLASH,SECURE_BOOT"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/P1010RDB-PB_SPIFLASH_defconfig b/configs/P1010RDB-PB_SPIFLASH_defconfig
index 83f434d..835f3ca 100644
--- a/configs/P1010RDB-PB_SPIFLASH_defconfig
+++ b/configs/P1010RDB-PB_SPIFLASH_defconfig
@@ -3,3 +3,5 @@
CONFIG_TARGET_P1010RDB=y
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PB,SPIFLASH"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/P1020MBG-PC_36BIT_SDCARD_defconfig b/configs/P1020MBG-PC_36BIT_SDCARD_defconfig
index 59aa9be..64f77a7 100644
--- a/configs/P1020MBG-PC_36BIT_SDCARD_defconfig
+++ b/configs/P1020MBG-PC_36BIT_SDCARD_defconfig
@@ -3,3 +3,5 @@
CONFIG_TARGET_P1_P2_RDB_PC=y
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="P1020MBG,SDCARD,36BIT"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/P1020MBG-PC_36BIT_defconfig b/configs/P1020MBG-PC_36BIT_defconfig
index b8d9c53..c55bce6 100644
--- a/configs/P1020MBG-PC_36BIT_defconfig
+++ b/configs/P1020MBG-PC_36BIT_defconfig
@@ -2,3 +2,5 @@
CONFIG_MPC85xx=y
CONFIG_TARGET_P1_P2_RDB_PC=y
CONFIG_SYS_EXTRA_OPTIONS="P1020MBG,36BIT"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/P1020MBG-PC_SDCARD_defconfig b/configs/P1020MBG-PC_SDCARD_defconfig
index 0e64e82..bcd3513 100644
--- a/configs/P1020MBG-PC_SDCARD_defconfig
+++ b/configs/P1020MBG-PC_SDCARD_defconfig
@@ -3,3 +3,5 @@
CONFIG_TARGET_P1_P2_RDB_PC=y
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="P1020MBG,SDCARD"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/P1020MBG-PC_defconfig b/configs/P1020MBG-PC_defconfig
index 905b94c..93b125f 100644
--- a/configs/P1020MBG-PC_defconfig
+++ b/configs/P1020MBG-PC_defconfig
@@ -2,3 +2,5 @@
CONFIG_MPC85xx=y
CONFIG_TARGET_P1_P2_RDB_PC=y
CONFIG_SYS_EXTRA_OPTIONS="P1020MBG"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/P1020RDB-PC_36BIT_NAND_defconfig b/configs/P1020RDB-PC_36BIT_NAND_defconfig
index d61c848..346a702 100644
--- a/configs/P1020RDB-PC_36BIT_NAND_defconfig
+++ b/configs/P1020RDB-PC_36BIT_NAND_defconfig
@@ -4,3 +4,5 @@
CONFIG_SPL=y
CONFIG_TPL=y
CONFIG_SYS_EXTRA_OPTIONS="P1020RDB_PC,36BIT,NAND"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/P1020RDB-PC_36BIT_SDCARD_defconfig b/configs/P1020RDB-PC_36BIT_SDCARD_defconfig
index 1e59860..168c4c8 100644
--- a/configs/P1020RDB-PC_36BIT_SDCARD_defconfig
+++ b/configs/P1020RDB-PC_36BIT_SDCARD_defconfig
@@ -3,3 +3,5 @@
CONFIG_TARGET_P1_P2_RDB_PC=y
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="P1020RDB_PC,36BIT,SDCARD"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig
index 073b77c..8b19d32 100644
--- a/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig
+++ b/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig
@@ -3,3 +3,5 @@
CONFIG_TARGET_P1_P2_RDB_PC=y
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="P1020RDB_PC,36BIT,SPIFLASH"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/P1020RDB-PC_36BIT_defconfig b/configs/P1020RDB-PC_36BIT_defconfig
index b95841c..8aa547f 100644
--- a/configs/P1020RDB-PC_36BIT_defconfig
+++ b/configs/P1020RDB-PC_36BIT_defconfig
@@ -2,3 +2,5 @@
CONFIG_MPC85xx=y
CONFIG_TARGET_P1_P2_RDB_PC=y
CONFIG_SYS_EXTRA_OPTIONS="P1020RDB_PC,36BIT"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/P1020RDB-PC_NAND_defconfig b/configs/P1020RDB-PC_NAND_defconfig
index f8106a0..6149840 100644
--- a/configs/P1020RDB-PC_NAND_defconfig
+++ b/configs/P1020RDB-PC_NAND_defconfig
@@ -4,3 +4,5 @@
CONFIG_SPL=y
CONFIG_TPL=y
CONFIG_SYS_EXTRA_OPTIONS="P1020RDB_PC,NAND"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/P1020RDB-PC_SDCARD_defconfig b/configs/P1020RDB-PC_SDCARD_defconfig
index f781a7b..00fa45e 100644
--- a/configs/P1020RDB-PC_SDCARD_defconfig
+++ b/configs/P1020RDB-PC_SDCARD_defconfig
@@ -3,3 +3,5 @@
CONFIG_TARGET_P1_P2_RDB_PC=y
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="P1020RDB_PC,SDCARD"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/P1020RDB-PC_SPIFLASH_defconfig b/configs/P1020RDB-PC_SPIFLASH_defconfig
index 32d91e4..1f9c90f 100644
--- a/configs/P1020RDB-PC_SPIFLASH_defconfig
+++ b/configs/P1020RDB-PC_SPIFLASH_defconfig
@@ -3,3 +3,5 @@
CONFIG_TARGET_P1_P2_RDB_PC=y
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="P1020RDB_PC,SPIFLASH"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/P1020RDB-PC_defconfig b/configs/P1020RDB-PC_defconfig
index e3f11d5..9c273d6 100644
--- a/configs/P1020RDB-PC_defconfig
+++ b/configs/P1020RDB-PC_defconfig
@@ -2,3 +2,5 @@
CONFIG_MPC85xx=y
CONFIG_TARGET_P1_P2_RDB_PC=y
CONFIG_SYS_EXTRA_OPTIONS="P1020RDB_PC"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/P1020RDB-PD_NAND_defconfig b/configs/P1020RDB-PD_NAND_defconfig
index a869d68..3cfa7c7 100644
--- a/configs/P1020RDB-PD_NAND_defconfig
+++ b/configs/P1020RDB-PD_NAND_defconfig
@@ -4,3 +4,5 @@
CONFIG_SPL=y
CONFIG_TPL=y
CONFIG_SYS_EXTRA_OPTIONS="P1020RDB_PD,NAND"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/P1020RDB-PD_SDCARD_defconfig b/configs/P1020RDB-PD_SDCARD_defconfig
index 10827e5..4d7d8a6 100644
--- a/configs/P1020RDB-PD_SDCARD_defconfig
+++ b/configs/P1020RDB-PD_SDCARD_defconfig
@@ -3,3 +3,5 @@
CONFIG_TARGET_P1_P2_RDB_PC=y
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="P1020RDB_PD,SDCARD"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/P1020RDB-PD_SPIFLASH_defconfig b/configs/P1020RDB-PD_SPIFLASH_defconfig
index 02cbb69..d0625ee 100644
--- a/configs/P1020RDB-PD_SPIFLASH_defconfig
+++ b/configs/P1020RDB-PD_SPIFLASH_defconfig
@@ -3,3 +3,5 @@
CONFIG_TARGET_P1_P2_RDB_PC=y
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="P1020RDB_PD,SPIFLASH"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/P1020RDB-PD_defconfig b/configs/P1020RDB-PD_defconfig
index 74f6c6d..6847d23 100644
--- a/configs/P1020RDB-PD_defconfig
+++ b/configs/P1020RDB-PD_defconfig
@@ -2,3 +2,5 @@
CONFIG_MPC85xx=y
CONFIG_TARGET_P1_P2_RDB_PC=y
CONFIG_SYS_EXTRA_OPTIONS="P1020RDB_PD"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/P1020UTM-PC_36BIT_SDCARD_defconfig b/configs/P1020UTM-PC_36BIT_SDCARD_defconfig
index f94345c..3525a2e 100644
--- a/configs/P1020UTM-PC_36BIT_SDCARD_defconfig
+++ b/configs/P1020UTM-PC_36BIT_SDCARD_defconfig
@@ -3,3 +3,5 @@
CONFIG_TARGET_P1_P2_RDB_PC=y
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="P1020UTM,36BIT,SDCARD"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/P1020UTM-PC_36BIT_defconfig b/configs/P1020UTM-PC_36BIT_defconfig
index ac4bbd3..1e014f2 100644
--- a/configs/P1020UTM-PC_36BIT_defconfig
+++ b/configs/P1020UTM-PC_36BIT_defconfig
@@ -2,3 +2,5 @@
CONFIG_MPC85xx=y
CONFIG_TARGET_P1_P2_RDB_PC=y
CONFIG_SYS_EXTRA_OPTIONS="P1020UTM,36BIT"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/P1020UTM-PC_SDCARD_defconfig b/configs/P1020UTM-PC_SDCARD_defconfig
index c4cd42e..11e5803 100644
--- a/configs/P1020UTM-PC_SDCARD_defconfig
+++ b/configs/P1020UTM-PC_SDCARD_defconfig
@@ -3,3 +3,5 @@
CONFIG_TARGET_P1_P2_RDB_PC=y
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="P1020UTM,SDCARD"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/P1020UTM-PC_defconfig b/configs/P1020UTM-PC_defconfig
index aae966b..8b4a339 100644
--- a/configs/P1020UTM-PC_defconfig
+++ b/configs/P1020UTM-PC_defconfig
@@ -2,3 +2,5 @@
CONFIG_MPC85xx=y
CONFIG_TARGET_P1_P2_RDB_PC=y
CONFIG_SYS_EXTRA_OPTIONS="P1020UTM"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/P1021RDB-PC_36BIT_NAND_defconfig b/configs/P1021RDB-PC_36BIT_NAND_defconfig
index 2ef7735..c04b980 100644
--- a/configs/P1021RDB-PC_36BIT_NAND_defconfig
+++ b/configs/P1021RDB-PC_36BIT_NAND_defconfig
@@ -4,3 +4,5 @@
CONFIG_SPL=y
CONFIG_TPL=y
CONFIG_SYS_EXTRA_OPTIONS="P1021RDB,36BIT,NAND"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/P1021RDB-PC_36BIT_SDCARD_defconfig b/configs/P1021RDB-PC_36BIT_SDCARD_defconfig
index ae9280a..d0d4d3e 100644
--- a/configs/P1021RDB-PC_36BIT_SDCARD_defconfig
+++ b/configs/P1021RDB-PC_36BIT_SDCARD_defconfig
@@ -3,3 +3,5 @@
CONFIG_TARGET_P1_P2_RDB_PC=y
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="P1021RDB,36BIT,SDCARD"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/P1021RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P1021RDB-PC_36BIT_SPIFLASH_defconfig
index 260d1eb..35ea741 100644
--- a/configs/P1021RDB-PC_36BIT_SPIFLASH_defconfig
+++ b/configs/P1021RDB-PC_36BIT_SPIFLASH_defconfig
@@ -3,3 +3,5 @@
CONFIG_TARGET_P1_P2_RDB_PC=y
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="P1021RDB,36BIT,SPIFLASH"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/P1021RDB-PC_36BIT_defconfig b/configs/P1021RDB-PC_36BIT_defconfig
index 8349514..69faff9 100644
--- a/configs/P1021RDB-PC_36BIT_defconfig
+++ b/configs/P1021RDB-PC_36BIT_defconfig
@@ -2,3 +2,5 @@
CONFIG_MPC85xx=y
CONFIG_TARGET_P1_P2_RDB_PC=y
CONFIG_SYS_EXTRA_OPTIONS="P1021RDB,36BIT"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/P1021RDB-PC_NAND_defconfig b/configs/P1021RDB-PC_NAND_defconfig
index fda74df..f486926 100644
--- a/configs/P1021RDB-PC_NAND_defconfig
+++ b/configs/P1021RDB-PC_NAND_defconfig
@@ -4,3 +4,5 @@
CONFIG_SPL=y
CONFIG_TPL=y
CONFIG_SYS_EXTRA_OPTIONS="P1021RDB,NAND"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/P1021RDB-PC_SDCARD_defconfig b/configs/P1021RDB-PC_SDCARD_defconfig
index 9da9221..4ab2f67 100644
--- a/configs/P1021RDB-PC_SDCARD_defconfig
+++ b/configs/P1021RDB-PC_SDCARD_defconfig
@@ -3,3 +3,5 @@
CONFIG_TARGET_P1_P2_RDB_PC=y
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="P1021RDB,SDCARD"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/P1021RDB-PC_SPIFLASH_defconfig b/configs/P1021RDB-PC_SPIFLASH_defconfig
index e126d65..e3790e0 100644
--- a/configs/P1021RDB-PC_SPIFLASH_defconfig
+++ b/configs/P1021RDB-PC_SPIFLASH_defconfig
@@ -3,3 +3,5 @@
CONFIG_TARGET_P1_P2_RDB_PC=y
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="P1021RDB,SPIFLASH"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/P1021RDB-PC_defconfig b/configs/P1021RDB-PC_defconfig
index 761edd6..6e9e829 100644
--- a/configs/P1021RDB-PC_defconfig
+++ b/configs/P1021RDB-PC_defconfig
@@ -2,3 +2,5 @@
CONFIG_MPC85xx=y
CONFIG_TARGET_P1_P2_RDB_PC=y
CONFIG_SYS_EXTRA_OPTIONS="P1021RDB"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/P1022DS_36BIT_NAND_defconfig b/configs/P1022DS_36BIT_NAND_defconfig
index 9590558..02c7a0a 100644
--- a/configs/P1022DS_36BIT_NAND_defconfig
+++ b/configs/P1022DS_36BIT_NAND_defconfig
@@ -4,3 +4,5 @@
CONFIG_SPL=y
CONFIG_TPL=y
CONFIG_SYS_EXTRA_OPTIONS="36BIT,NAND"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/P1022DS_36BIT_SDCARD_defconfig b/configs/P1022DS_36BIT_SDCARD_defconfig
index cb297b3..f0a065e 100644
--- a/configs/P1022DS_36BIT_SDCARD_defconfig
+++ b/configs/P1022DS_36BIT_SDCARD_defconfig
@@ -3,3 +3,5 @@
CONFIG_TARGET_P1022DS=y
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="36BIT,SDCARD"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/P1022DS_36BIT_SPIFLASH_defconfig b/configs/P1022DS_36BIT_SPIFLASH_defconfig
index df57db6..9c0862f 100644
--- a/configs/P1022DS_36BIT_SPIFLASH_defconfig
+++ b/configs/P1022DS_36BIT_SPIFLASH_defconfig
@@ -3,3 +3,5 @@
CONFIG_TARGET_P1022DS=y
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="36BIT,SPIFLASH"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/P1022DS_36BIT_defconfig b/configs/P1022DS_36BIT_defconfig
index d62f9f7..037659f 100644
--- a/configs/P1022DS_36BIT_defconfig
+++ b/configs/P1022DS_36BIT_defconfig
@@ -2,3 +2,5 @@
CONFIG_MPC85xx=y
CONFIG_TARGET_P1022DS=y
CONFIG_SYS_EXTRA_OPTIONS="36BIT"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/P1022DS_NAND_defconfig b/configs/P1022DS_NAND_defconfig
index cf73c18..0008c52 100644
--- a/configs/P1022DS_NAND_defconfig
+++ b/configs/P1022DS_NAND_defconfig
@@ -4,3 +4,5 @@
CONFIG_SPL=y
CONFIG_TPL=y
CONFIG_SYS_EXTRA_OPTIONS="NAND"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/P1022DS_SDCARD_defconfig b/configs/P1022DS_SDCARD_defconfig
index b69467e..8efdd90 100644
--- a/configs/P1022DS_SDCARD_defconfig
+++ b/configs/P1022DS_SDCARD_defconfig
@@ -3,3 +3,5 @@
CONFIG_TARGET_P1022DS=y
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="SDCARD"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/P1022DS_SPIFLASH_defconfig b/configs/P1022DS_SPIFLASH_defconfig
index 808b366..db2c3ab 100644
--- a/configs/P1022DS_SPIFLASH_defconfig
+++ b/configs/P1022DS_SPIFLASH_defconfig
@@ -3,3 +3,5 @@
CONFIG_TARGET_P1022DS=y
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="SPIFLASH"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/P1022DS_defconfig b/configs/P1022DS_defconfig
index d2953a4..6cf36de 100644
--- a/configs/P1022DS_defconfig
+++ b/configs/P1022DS_defconfig
@@ -1,3 +1,5 @@
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P1022DS=y
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/P1023RDB_defconfig b/configs/P1023RDB_defconfig
index fc15e4b..fa8baa1 100644
--- a/configs/P1023RDB_defconfig
+++ b/configs/P1023RDB_defconfig
@@ -1,3 +1,5 @@
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P1023RDB=y
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/P1024RDB_36BIT_defconfig b/configs/P1024RDB_36BIT_defconfig
index b1cd35c..78066a6 100644
--- a/configs/P1024RDB_36BIT_defconfig
+++ b/configs/P1024RDB_36BIT_defconfig
@@ -2,3 +2,5 @@
CONFIG_MPC85xx=y
CONFIG_TARGET_P1_P2_RDB_PC=y
CONFIG_SYS_EXTRA_OPTIONS="P1024RDB,36BIT"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/P1024RDB_NAND_defconfig b/configs/P1024RDB_NAND_defconfig
index 7afa100..498f091 100644
--- a/configs/P1024RDB_NAND_defconfig
+++ b/configs/P1024RDB_NAND_defconfig
@@ -4,3 +4,5 @@
CONFIG_SPL=y
CONFIG_TPL=y
CONFIG_SYS_EXTRA_OPTIONS="P1024RDB,NAND"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/P1024RDB_SDCARD_defconfig b/configs/P1024RDB_SDCARD_defconfig
index 4a2e3ed..3960c40 100644
--- a/configs/P1024RDB_SDCARD_defconfig
+++ b/configs/P1024RDB_SDCARD_defconfig
@@ -3,3 +3,5 @@
CONFIG_TARGET_P1_P2_RDB_PC=y
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="P1024RDB,SDCARD"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/P1024RDB_SPIFLASH_defconfig b/configs/P1024RDB_SPIFLASH_defconfig
index 883d95e..7ee6054 100644
--- a/configs/P1024RDB_SPIFLASH_defconfig
+++ b/configs/P1024RDB_SPIFLASH_defconfig
@@ -3,3 +3,5 @@
CONFIG_TARGET_P1_P2_RDB_PC=y
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="P1024RDB,SPIFLASH"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/P1024RDB_defconfig b/configs/P1024RDB_defconfig
index 5a9edb7..883a562 100644
--- a/configs/P1024RDB_defconfig
+++ b/configs/P1024RDB_defconfig
@@ -2,3 +2,5 @@
CONFIG_MPC85xx=y
CONFIG_TARGET_P1_P2_RDB_PC=y
CONFIG_SYS_EXTRA_OPTIONS="P1024RDB"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/P1025RDB_36BIT_defconfig b/configs/P1025RDB_36BIT_defconfig
index 832eeb3..56d46fa 100644
--- a/configs/P1025RDB_36BIT_defconfig
+++ b/configs/P1025RDB_36BIT_defconfig
@@ -2,3 +2,5 @@
CONFIG_MPC85xx=y
CONFIG_TARGET_P1_P2_RDB_PC=y
CONFIG_SYS_EXTRA_OPTIONS="P1025RDB,36BIT"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/P1025RDB_NAND_defconfig b/configs/P1025RDB_NAND_defconfig
index baf055e..7d5d4b9 100644
--- a/configs/P1025RDB_NAND_defconfig
+++ b/configs/P1025RDB_NAND_defconfig
@@ -4,3 +4,5 @@
CONFIG_SPL=y
CONFIG_TPL=y
CONFIG_SYS_EXTRA_OPTIONS="P1025RDB,NAND"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/P1025RDB_SDCARD_defconfig b/configs/P1025RDB_SDCARD_defconfig
index 95f841e..6efa5a3 100644
--- a/configs/P1025RDB_SDCARD_defconfig
+++ b/configs/P1025RDB_SDCARD_defconfig
@@ -3,3 +3,5 @@
CONFIG_TARGET_P1_P2_RDB_PC=y
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="P1025RDB,SDCARD"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/P1025RDB_SPIFLASH_defconfig b/configs/P1025RDB_SPIFLASH_defconfig
index 3affb9e..efcaed8 100644
--- a/configs/P1025RDB_SPIFLASH_defconfig
+++ b/configs/P1025RDB_SPIFLASH_defconfig
@@ -3,3 +3,5 @@
CONFIG_TARGET_P1_P2_RDB_PC=y
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="P1025RDB,SPIFLASH"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/P1025RDB_defconfig b/configs/P1025RDB_defconfig
index 43b38a1..93c48db 100644
--- a/configs/P1025RDB_defconfig
+++ b/configs/P1025RDB_defconfig
@@ -2,3 +2,5 @@
CONFIG_MPC85xx=y
CONFIG_TARGET_P1_P2_RDB_PC=y
CONFIG_SYS_EXTRA_OPTIONS="P1025RDB"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/P2020RDB-PC_36BIT_NAND_defconfig b/configs/P2020RDB-PC_36BIT_NAND_defconfig
index aaf9450..c283105 100644
--- a/configs/P2020RDB-PC_36BIT_NAND_defconfig
+++ b/configs/P2020RDB-PC_36BIT_NAND_defconfig
@@ -4,3 +4,5 @@
CONFIG_SPL=y
CONFIG_TPL=y
CONFIG_SYS_EXTRA_OPTIONS="P2020RDB,36BIT,NAND"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig
index 054bebf..96d8a86 100644
--- a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig
+++ b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig
@@ -3,3 +3,5 @@
CONFIG_TARGET_P1_P2_RDB_PC=y
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="P2020RDB,36BIT,SDCARD"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig
index dd20fe0..501547f 100644
--- a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig
+++ b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig
@@ -3,3 +3,5 @@
CONFIG_TARGET_P1_P2_RDB_PC=y
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="P2020RDB,36BIT,SPIFLASH"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/P2020RDB-PC_36BIT_defconfig b/configs/P2020RDB-PC_36BIT_defconfig
index bcae073..7ac1ea1 100644
--- a/configs/P2020RDB-PC_36BIT_defconfig
+++ b/configs/P2020RDB-PC_36BIT_defconfig
@@ -2,3 +2,5 @@
CONFIG_MPC85xx=y
CONFIG_TARGET_P1_P2_RDB_PC=y
CONFIG_SYS_EXTRA_OPTIONS="P2020RDB,36BIT"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/P2020RDB-PC_NAND_defconfig b/configs/P2020RDB-PC_NAND_defconfig
index f58795e..8dfdc13 100644
--- a/configs/P2020RDB-PC_NAND_defconfig
+++ b/configs/P2020RDB-PC_NAND_defconfig
@@ -4,3 +4,5 @@
CONFIG_SPL=y
CONFIG_TPL=y
CONFIG_SYS_EXTRA_OPTIONS="P2020RDB,NAND"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/P2020RDB-PC_SDCARD_defconfig b/configs/P2020RDB-PC_SDCARD_defconfig
index e72a17b..c21b2be 100644
--- a/configs/P2020RDB-PC_SDCARD_defconfig
+++ b/configs/P2020RDB-PC_SDCARD_defconfig
@@ -3,3 +3,5 @@
CONFIG_TARGET_P1_P2_RDB_PC=y
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="P2020RDB,SDCARD"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/P2020RDB-PC_SPIFLASH_defconfig b/configs/P2020RDB-PC_SPIFLASH_defconfig
index f56dac4..66c5aa8 100644
--- a/configs/P2020RDB-PC_SPIFLASH_defconfig
+++ b/configs/P2020RDB-PC_SPIFLASH_defconfig
@@ -3,3 +3,5 @@
CONFIG_TARGET_P1_P2_RDB_PC=y
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="P2020RDB,SPIFLASH"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/P2020RDB-PC_defconfig b/configs/P2020RDB-PC_defconfig
index a9c3d76..53696e1 100644
--- a/configs/P2020RDB-PC_defconfig
+++ b/configs/P2020RDB-PC_defconfig
@@ -2,3 +2,5 @@
CONFIG_MPC85xx=y
CONFIG_TARGET_P1_P2_RDB_PC=y
CONFIG_SYS_EXTRA_OPTIONS="P2020RDB"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/P2041RDB_NAND_defconfig b/configs/P2041RDB_NAND_defconfig
index 6a6a98f..3405f82 100644
--- a/configs/P2041RDB_NAND_defconfig
+++ b/configs/P2041RDB_NAND_defconfig
@@ -2,3 +2,5 @@
CONFIG_MPC85xx=y
CONFIG_TARGET_P2041RDB=y
CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,NAND,SYS_TEXT_BASE=0xFFF40000"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/P2041RDB_SDCARD_defconfig b/configs/P2041RDB_SDCARD_defconfig
index 48df22c..bd4502a 100644
--- a/configs/P2041RDB_SDCARD_defconfig
+++ b/configs/P2041RDB_SDCARD_defconfig
@@ -2,3 +2,5 @@
CONFIG_MPC85xx=y
CONFIG_TARGET_P2041RDB=y
CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SDCARD,SYS_TEXT_BASE=0xFFF40000"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/P2041RDB_SECURE_BOOT_defconfig b/configs/P2041RDB_SECURE_BOOT_defconfig
index 50f02af..ed832ef 100644
--- a/configs/P2041RDB_SECURE_BOOT_defconfig
+++ b/configs/P2041RDB_SECURE_BOOT_defconfig
@@ -2,3 +2,5 @@
CONFIG_MPC85xx=y
CONFIG_TARGET_P2041RDB=y
CONFIG_SYS_EXTRA_OPTIONS="SECURE_BOOT"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/P2041RDB_SPIFLASH_defconfig b/configs/P2041RDB_SPIFLASH_defconfig
index 6939ed9..5e97cb5 100644
--- a/configs/P2041RDB_SPIFLASH_defconfig
+++ b/configs/P2041RDB_SPIFLASH_defconfig
@@ -2,3 +2,5 @@
CONFIG_MPC85xx=y
CONFIG_TARGET_P2041RDB=y
CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPIFLASH,SYS_TEXT_BASE=0xFFF40000"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/P2041RDB_SRIO_PCIE_BOOT_defconfig b/configs/P2041RDB_SRIO_PCIE_BOOT_defconfig
index f5dd3af..9ac10a0 100644
--- a/configs/P2041RDB_SRIO_PCIE_BOOT_defconfig
+++ b/configs/P2041RDB_SRIO_PCIE_BOOT_defconfig
@@ -2,3 +2,5 @@
CONFIG_MPC85xx=y
CONFIG_TARGET_P2041RDB=y
CONFIG_SYS_EXTRA_OPTIONS="SRIO_PCIE_BOOT_SLAVE,SYS_TEXT_BASE=0xFFF40000"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/P2041RDB_defconfig b/configs/P2041RDB_defconfig
index 802b38d..3b358c9 100644
--- a/configs/P2041RDB_defconfig
+++ b/configs/P2041RDB_defconfig
@@ -1,3 +1,5 @@
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P2041RDB=y
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/P3041DS_NAND_defconfig b/configs/P3041DS_NAND_defconfig
index 20d2449..5f53ea1 100644
--- a/configs/P3041DS_NAND_defconfig
+++ b/configs/P3041DS_NAND_defconfig
@@ -2,3 +2,5 @@
CONFIG_MPC85xx=y
CONFIG_TARGET_P3041DS=y
CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,NAND,SYS_TEXT_BASE=0xFFF40000"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/P3041DS_SDCARD_defconfig b/configs/P3041DS_SDCARD_defconfig
index 870d783..595306e 100644
--- a/configs/P3041DS_SDCARD_defconfig
+++ b/configs/P3041DS_SDCARD_defconfig
@@ -2,3 +2,5 @@
CONFIG_MPC85xx=y
CONFIG_TARGET_P3041DS=y
CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SDCARD,SYS_TEXT_BASE=0xFFF40000"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/P3041DS_SECURE_BOOT_defconfig b/configs/P3041DS_SECURE_BOOT_defconfig
index 9e0155a..a1f5c14 100644
--- a/configs/P3041DS_SECURE_BOOT_defconfig
+++ b/configs/P3041DS_SECURE_BOOT_defconfig
@@ -2,3 +2,5 @@
CONFIG_MPC85xx=y
CONFIG_TARGET_P3041DS=y
CONFIG_SYS_EXTRA_OPTIONS="SECURE_BOOT"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/P3041DS_SPIFLASH_defconfig b/configs/P3041DS_SPIFLASH_defconfig
index 17e6413..d4b0fd9 100644
--- a/configs/P3041DS_SPIFLASH_defconfig
+++ b/configs/P3041DS_SPIFLASH_defconfig
@@ -2,3 +2,5 @@
CONFIG_MPC85xx=y
CONFIG_TARGET_P3041DS=y
CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPIFLASH,SYS_TEXT_BASE=0xFFF40000"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/P3041DS_SRIO_PCIE_BOOT_defconfig b/configs/P3041DS_SRIO_PCIE_BOOT_defconfig
index 4d06bed..eadcb04 100644
--- a/configs/P3041DS_SRIO_PCIE_BOOT_defconfig
+++ b/configs/P3041DS_SRIO_PCIE_BOOT_defconfig
@@ -2,3 +2,5 @@
CONFIG_MPC85xx=y
CONFIG_TARGET_P3041DS=y
CONFIG_SYS_EXTRA_OPTIONS="SRIO_PCIE_BOOT_SLAVE,SYS_TEXT_BASE=0xFFF40000"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/P3041DS_defconfig b/configs/P3041DS_defconfig
index 3277650..ffed6a7 100644
--- a/configs/P3041DS_defconfig
+++ b/configs/P3041DS_defconfig
@@ -1,3 +1,5 @@
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P3041DS=y
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/P4080DS_SDCARD_defconfig b/configs/P4080DS_SDCARD_defconfig
index ba3ea16..f683c38 100644
--- a/configs/P4080DS_SDCARD_defconfig
+++ b/configs/P4080DS_SDCARD_defconfig
@@ -2,3 +2,5 @@
CONFIG_MPC85xx=y
CONFIG_TARGET_P4080DS=y
CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SDCARD,SYS_TEXT_BASE=0xFFF40000"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/P4080DS_SECURE_BOOT_defconfig b/configs/P4080DS_SECURE_BOOT_defconfig
index e2c6bcc..1d4a128 100644
--- a/configs/P4080DS_SECURE_BOOT_defconfig
+++ b/configs/P4080DS_SECURE_BOOT_defconfig
@@ -2,3 +2,5 @@
CONFIG_MPC85xx=y
CONFIG_TARGET_P4080DS=y
CONFIG_SYS_EXTRA_OPTIONS="SECURE_BOOT"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/P4080DS_SPIFLASH_defconfig b/configs/P4080DS_SPIFLASH_defconfig
index 8c74031..5b5ca77 100644
--- a/configs/P4080DS_SPIFLASH_defconfig
+++ b/configs/P4080DS_SPIFLASH_defconfig
@@ -2,3 +2,5 @@
CONFIG_MPC85xx=y
CONFIG_TARGET_P4080DS=y
CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPIFLASH,SYS_TEXT_BASE=0xFFF40000"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/P4080DS_SRIO_PCIE_BOOT_defconfig b/configs/P4080DS_SRIO_PCIE_BOOT_defconfig
index e1c1e43..8443412 100644
--- a/configs/P4080DS_SRIO_PCIE_BOOT_defconfig
+++ b/configs/P4080DS_SRIO_PCIE_BOOT_defconfig
@@ -2,3 +2,5 @@
CONFIG_MPC85xx=y
CONFIG_TARGET_P4080DS=y
CONFIG_SYS_EXTRA_OPTIONS="SRIO_PCIE_BOOT_SLAVE,SYS_TEXT_BASE=0xFFF40000"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/P4080DS_defconfig b/configs/P4080DS_defconfig
index 9b5fc89..34b6979 100644
--- a/configs/P4080DS_defconfig
+++ b/configs/P4080DS_defconfig
@@ -1,3 +1,5 @@
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P4080DS=y
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/P5020DS_NAND_defconfig b/configs/P5020DS_NAND_defconfig
index 1693cae..55e2e10 100644
--- a/configs/P5020DS_NAND_defconfig
+++ b/configs/P5020DS_NAND_defconfig
@@ -2,3 +2,5 @@
CONFIG_MPC85xx=y
CONFIG_TARGET_P5020DS=y
CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,NAND,SYS_TEXT_BASE=0xFFF40000"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/P5020DS_SDCARD_defconfig b/configs/P5020DS_SDCARD_defconfig
index b1bd63c..087815b 100644
--- a/configs/P5020DS_SDCARD_defconfig
+++ b/configs/P5020DS_SDCARD_defconfig
@@ -2,3 +2,5 @@
CONFIG_MPC85xx=y
CONFIG_TARGET_P5020DS=y
CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SDCARD,SYS_TEXT_BASE=0xFFF40000"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/P5020DS_SECURE_BOOT_defconfig b/configs/P5020DS_SECURE_BOOT_defconfig
index 8ab306e..adb65ae 100644
--- a/configs/P5020DS_SECURE_BOOT_defconfig
+++ b/configs/P5020DS_SECURE_BOOT_defconfig
@@ -2,3 +2,5 @@
CONFIG_MPC85xx=y
CONFIG_TARGET_P5020DS=y
CONFIG_SYS_EXTRA_OPTIONS="SECURE_BOOT"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/P5020DS_SPIFLASH_defconfig b/configs/P5020DS_SPIFLASH_defconfig
index 4a4b112..6e86ea0 100644
--- a/configs/P5020DS_SPIFLASH_defconfig
+++ b/configs/P5020DS_SPIFLASH_defconfig
@@ -2,3 +2,5 @@
CONFIG_MPC85xx=y
CONFIG_TARGET_P5020DS=y
CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPIFLASH,SYS_TEXT_BASE=0xFFF40000"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/P5020DS_SRIO_PCIE_BOOT_defconfig b/configs/P5020DS_SRIO_PCIE_BOOT_defconfig
index 7ebaebd..8772c7b 100644
--- a/configs/P5020DS_SRIO_PCIE_BOOT_defconfig
+++ b/configs/P5020DS_SRIO_PCIE_BOOT_defconfig
@@ -2,3 +2,5 @@
CONFIG_MPC85xx=y
CONFIG_TARGET_P5020DS=y
CONFIG_SYS_EXTRA_OPTIONS="SRIO_PCIE_BOOT_SLAVE,SYS_TEXT_BASE=0xFFF40000"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/P5020DS_defconfig b/configs/P5020DS_defconfig
index d1c5c72..f4b8b3c 100644
--- a/configs/P5020DS_defconfig
+++ b/configs/P5020DS_defconfig
@@ -1,3 +1,5 @@
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P5020DS=y
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/P5040DS_NAND_defconfig b/configs/P5040DS_NAND_defconfig
index f738dd4..9f7b45b 100644
--- a/configs/P5040DS_NAND_defconfig
+++ b/configs/P5040DS_NAND_defconfig
@@ -2,3 +2,5 @@
CONFIG_MPC85xx=y
CONFIG_TARGET_P5040DS=y
CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,NAND,SYS_TEXT_BASE=0xFFF40000"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/P5040DS_SDCARD_defconfig b/configs/P5040DS_SDCARD_defconfig
index da37167..dd78085 100644
--- a/configs/P5040DS_SDCARD_defconfig
+++ b/configs/P5040DS_SDCARD_defconfig
@@ -2,3 +2,5 @@
CONFIG_MPC85xx=y
CONFIG_TARGET_P5040DS=y
CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SDCARD,SYS_TEXT_BASE=0xFFF40000"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/P5040DS_SECURE_BOOT_defconfig b/configs/P5040DS_SECURE_BOOT_defconfig
index e4fbcc9..2224bb2 100644
--- a/configs/P5040DS_SECURE_BOOT_defconfig
+++ b/configs/P5040DS_SECURE_BOOT_defconfig
@@ -2,3 +2,5 @@
CONFIG_MPC85xx=y
CONFIG_TARGET_P5040DS=y
CONFIG_SYS_EXTRA_OPTIONS="SECURE_BOOT"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/P5040DS_SPIFLASH_defconfig b/configs/P5040DS_SPIFLASH_defconfig
index a8fb94a..e3b7896 100644
--- a/configs/P5040DS_SPIFLASH_defconfig
+++ b/configs/P5040DS_SPIFLASH_defconfig
@@ -2,3 +2,5 @@
CONFIG_MPC85xx=y
CONFIG_TARGET_P5040DS=y
CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPIFLASH,SYS_TEXT_BASE=0xFFF40000"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/P5040DS_defconfig b/configs/P5040DS_defconfig
index 38f3d58..d2f9c06 100644
--- a/configs/P5040DS_defconfig
+++ b/configs/P5040DS_defconfig
@@ -1,3 +1,5 @@
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P5040DS=y
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/PIP405_defconfig b/configs/PIP405_defconfig
index 38b3acb..1aec3cb 100644
--- a/configs/PIP405_defconfig
+++ b/configs/PIP405_defconfig
@@ -1,3 +1,4 @@
CONFIG_PPC=y
CONFIG_4xx=y
CONFIG_TARGET_PIP405=y
+CONFIG_CMD_NET=y
diff --git a/configs/PLU405_defconfig b/configs/PLU405_defconfig
index 15477c4..459b690 100644
--- a/configs/PLU405_defconfig
+++ b/configs/PLU405_defconfig
@@ -1,3 +1,4 @@
CONFIG_PPC=y
CONFIG_4xx=y
CONFIG_TARGET_PLU405=y
+CONFIG_CMD_NET=y
diff --git a/configs/PMC405DE_defconfig b/configs/PMC405DE_defconfig
index 78c5d39..e7e157f 100644
--- a/configs/PMC405DE_defconfig
+++ b/configs/PMC405DE_defconfig
@@ -1,3 +1,4 @@
CONFIG_PPC=y
CONFIG_4xx=y
CONFIG_TARGET_PMC405DE=y
+CONFIG_CMD_NET=y
diff --git a/configs/PMC440_defconfig b/configs/PMC440_defconfig
index 27869ac..779087d 100644
--- a/configs/PMC440_defconfig
+++ b/configs/PMC440_defconfig
@@ -1,3 +1,4 @@
CONFIG_PPC=y
CONFIG_4xx=y
CONFIG_TARGET_PMC440=y
+CONFIG_CMD_NET=y
diff --git a/configs/T1023RDB_NAND_defconfig b/configs/T1023RDB_NAND_defconfig
index 54cee92..a1a32d5 100644
--- a/configs/T1023RDB_NAND_defconfig
+++ b/configs/T1023RDB_NAND_defconfig
@@ -3,3 +3,5 @@
CONFIG_TARGET_T102XRDB=y
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T1023,T1023RDB,RAMBOOT_PBL,SPL_FSL_PBL,NAND"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/T1023RDB_SDCARD_defconfig b/configs/T1023RDB_SDCARD_defconfig
index f39b94a..93b39d6 100644
--- a/configs/T1023RDB_SDCARD_defconfig
+++ b/configs/T1023RDB_SDCARD_defconfig
@@ -3,3 +3,5 @@
CONFIG_TARGET_T102XRDB=y
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T1023,T1023RDB,RAMBOOT_PBL,SPL_FSL_PBL,SDCARD"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/T1023RDB_SECURE_BOOT_defconfig b/configs/T1023RDB_SECURE_BOOT_defconfig
index 0da1db2..35ac227 100644
--- a/configs/T1023RDB_SECURE_BOOT_defconfig
+++ b/configs/T1023RDB_SECURE_BOOT_defconfig
@@ -2,3 +2,5 @@
CONFIG_MPC85xx=y
CONFIG_TARGET_T102XRDB=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T1023,T1023RDB,SECURE_BOOT"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/T1023RDB_SPIFLASH_defconfig b/configs/T1023RDB_SPIFLASH_defconfig
index a8e8e7c..9fc6576 100644
--- a/configs/T1023RDB_SPIFLASH_defconfig
+++ b/configs/T1023RDB_SPIFLASH_defconfig
@@ -3,3 +3,5 @@
CONFIG_TARGET_T102XRDB=y
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T1023,T1023RDB,RAMBOOT_PBL,SPL_FSL_PBL,SPIFLASH"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/T1023RDB_defconfig b/configs/T1023RDB_defconfig
index eea0b9b..7075b28 100644
--- a/configs/T1023RDB_defconfig
+++ b/configs/T1023RDB_defconfig
@@ -2,3 +2,5 @@
CONFIG_MPC85xx=y
CONFIG_TARGET_T102XRDB=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T1023,T1023RDB"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/T1024QDS_D4_SECURE_BOOT_defconfig b/configs/T1024QDS_D4_SECURE_BOOT_defconfig
index 1570ee0..329dd15 100644
--- a/configs/T1024QDS_D4_SECURE_BOOT_defconfig
+++ b/configs/T1024QDS_D4_SECURE_BOOT_defconfig
@@ -2,3 +2,5 @@
CONFIG_MPC85xx=y
CONFIG_TARGET_T102XQDS=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T1024,SYS_FSL_DDR4,SECURE_BOOT"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/T1024QDS_NAND_defconfig b/configs/T1024QDS_NAND_defconfig
index 3563b14..57a452a 100644
--- a/configs/T1024QDS_NAND_defconfig
+++ b/configs/T1024QDS_NAND_defconfig
@@ -3,3 +3,5 @@
CONFIG_TARGET_T102XQDS=y
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T1024,RAMBOOT_PBL,SPL_FSL_PBL,NAND"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/T1024QDS_SDCARD_defconfig b/configs/T1024QDS_SDCARD_defconfig
index f4cf6be..6fd626b 100644
--- a/configs/T1024QDS_SDCARD_defconfig
+++ b/configs/T1024QDS_SDCARD_defconfig
@@ -3,3 +3,5 @@
CONFIG_TARGET_T102XQDS=y
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T1024,RAMBOOT_PBL,SPL_FSL_PBL,SDCARD"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/T1024QDS_SECURE_BOOT_defconfig b/configs/T1024QDS_SECURE_BOOT_defconfig
index dedc60d..2dc1e64 100644
--- a/configs/T1024QDS_SECURE_BOOT_defconfig
+++ b/configs/T1024QDS_SECURE_BOOT_defconfig
@@ -2,3 +2,5 @@
CONFIG_MPC85xx=y
CONFIG_TARGET_T102XQDS=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T1024,SECURE_BOOT"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/T1024QDS_SPIFLASH_defconfig b/configs/T1024QDS_SPIFLASH_defconfig
index 91f0ab8..89ce4eb 100644
--- a/configs/T1024QDS_SPIFLASH_defconfig
+++ b/configs/T1024QDS_SPIFLASH_defconfig
@@ -3,3 +3,5 @@
CONFIG_TARGET_T102XQDS=y
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T1024,RAMBOOT_PBL,SPL_FSL_PBL,SPIFLASH"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/T1024QDS_defconfig b/configs/T1024QDS_defconfig
index ed5a667..61f13d3 100644
--- a/configs/T1024QDS_defconfig
+++ b/configs/T1024QDS_defconfig
@@ -2,3 +2,5 @@
CONFIG_MPC85xx=y
CONFIG_TARGET_T102XQDS=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T1024"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/T1024RDB_NAND_defconfig b/configs/T1024RDB_NAND_defconfig
index 5c90d3a..13f7586 100644
--- a/configs/T1024RDB_NAND_defconfig
+++ b/configs/T1024RDB_NAND_defconfig
@@ -3,3 +3,5 @@
CONFIG_TARGET_T102XRDB=y
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T1024,T1024RDB,RAMBOOT_PBL,SPL_FSL_PBL,NAND"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/T1024RDB_SDCARD_defconfig b/configs/T1024RDB_SDCARD_defconfig
index 5d295ac..8beb714 100644
--- a/configs/T1024RDB_SDCARD_defconfig
+++ b/configs/T1024RDB_SDCARD_defconfig
@@ -3,3 +3,5 @@
CONFIG_TARGET_T102XRDB=y
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T1024,T1024RDB,RAMBOOT_PBL,SPL_FSL_PBL,SDCARD"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/T1024RDB_SECURE_BOOT_defconfig b/configs/T1024RDB_SECURE_BOOT_defconfig
index 08da947..79f68c6 100644
--- a/configs/T1024RDB_SECURE_BOOT_defconfig
+++ b/configs/T1024RDB_SECURE_BOOT_defconfig
@@ -2,3 +2,5 @@
CONFIG_MPC85xx=y
CONFIG_TARGET_T102XRDB=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T1024,T1024RDB,SECURE_BOOT"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/T1024RDB_SPIFLASH_defconfig b/configs/T1024RDB_SPIFLASH_defconfig
index 474da0b..e323f57 100644
--- a/configs/T1024RDB_SPIFLASH_defconfig
+++ b/configs/T1024RDB_SPIFLASH_defconfig
@@ -3,3 +3,5 @@
CONFIG_TARGET_T102XRDB=y
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T1024,T1024RDB,RAMBOOT_PBL,SPL_FSL_PBL,SPIFLASH"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/T1024RDB_defconfig b/configs/T1024RDB_defconfig
index 9e96797..7e69b92 100644
--- a/configs/T1024RDB_defconfig
+++ b/configs/T1024RDB_defconfig
@@ -2,3 +2,5 @@
CONFIG_MPC85xx=y
CONFIG_TARGET_T102XRDB=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T1024,T1024RDB"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/T1040QDS_D4_defconfig b/configs/T1040QDS_D4_defconfig
index ce70c37..bfe077a 100644
--- a/configs/T1040QDS_D4_defconfig
+++ b/configs/T1040QDS_D4_defconfig
@@ -2,3 +2,5 @@
CONFIG_MPC85xx=y
CONFIG_TARGET_T1040QDS=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T1040,SYS_FSL_DDR4"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/T1040QDS_SECURE_BOOT_defconfig b/configs/T1040QDS_SECURE_BOOT_defconfig
index 005e762..043db10 100644
--- a/configs/T1040QDS_SECURE_BOOT_defconfig
+++ b/configs/T1040QDS_SECURE_BOOT_defconfig
@@ -2,3 +2,5 @@
CONFIG_MPC85xx=y
CONFIG_TARGET_T1040QDS=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T1040,SECURE_BOOT"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/T1040QDS_defconfig b/configs/T1040QDS_defconfig
index 6de2bd6..fbfa5fb 100644
--- a/configs/T1040QDS_defconfig
+++ b/configs/T1040QDS_defconfig
@@ -2,3 +2,5 @@
CONFIG_MPC85xx=y
CONFIG_TARGET_T1040QDS=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T1040"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/T1040RDB_NAND_defconfig b/configs/T1040RDB_NAND_defconfig
index fdd25c3..70c0b59 100644
--- a/configs/T1040RDB_NAND_defconfig
+++ b/configs/T1040RDB_NAND_defconfig
@@ -3,3 +3,5 @@
CONFIG_TARGET_T104XRDB=y
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T1040,T1040RDB,RAMBOOT_PBL,SPL_FSL_PBL,NAND"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/T1040RDB_SDCARD_defconfig b/configs/T1040RDB_SDCARD_defconfig
index af20611..980189c 100644
--- a/configs/T1040RDB_SDCARD_defconfig
+++ b/configs/T1040RDB_SDCARD_defconfig
@@ -3,3 +3,5 @@
CONFIG_TARGET_T104XRDB=y
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T1040,T1040RDB,RAMBOOT_PBL,SPL_FSL_PBL,SDCARD"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/T1040RDB_SECURE_BOOT_defconfig b/configs/T1040RDB_SECURE_BOOT_defconfig
index 2e00ccb..2dd87ed 100644
--- a/configs/T1040RDB_SECURE_BOOT_defconfig
+++ b/configs/T1040RDB_SECURE_BOOT_defconfig
@@ -2,3 +2,5 @@
CONFIG_MPC85xx=y
CONFIG_TARGET_T104XRDB=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T1040,SECURE_BOOT,T1040RDB"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/T1040RDB_SPIFLASH_defconfig b/configs/T1040RDB_SPIFLASH_defconfig
index 598dedf..2efe475 100644
--- a/configs/T1040RDB_SPIFLASH_defconfig
+++ b/configs/T1040RDB_SPIFLASH_defconfig
@@ -3,3 +3,5 @@
CONFIG_TARGET_T104XRDB=y
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T1040,T1040RDB,RAMBOOT_PBL,SPL_FSL_PBL,SPIFLASH"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/T1040RDB_defconfig b/configs/T1040RDB_defconfig
index 71ecc81..9db5699 100644
--- a/configs/T1040RDB_defconfig
+++ b/configs/T1040RDB_defconfig
@@ -2,3 +2,5 @@
CONFIG_MPC85xx=y
CONFIG_TARGET_T104XRDB=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T1040,T1040RDB"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/T1042RDB_PI_NAND_defconfig b/configs/T1042RDB_PI_NAND_defconfig
index 164def3..f1cebff 100644
--- a/configs/T1042RDB_PI_NAND_defconfig
+++ b/configs/T1042RDB_PI_NAND_defconfig
@@ -3,3 +3,5 @@
CONFIG_TARGET_T104XRDB=y
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T1042,T1042RDB_PI,RAMBOOT_PBL,SPL_FSL_PBL,NAND"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/T1042RDB_PI_SDCARD_defconfig b/configs/T1042RDB_PI_SDCARD_defconfig
index 581a8f6..0d27434 100644
--- a/configs/T1042RDB_PI_SDCARD_defconfig
+++ b/configs/T1042RDB_PI_SDCARD_defconfig
@@ -3,3 +3,5 @@
CONFIG_TARGET_T104XRDB=y
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T1042,T1042RDB_PI,RAMBOOT_PBL,SPL_FSL_PBL,SDCARD"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/T1042RDB_PI_SPIFLASH_defconfig b/configs/T1042RDB_PI_SPIFLASH_defconfig
index 4bd853c..f6589a8 100644
--- a/configs/T1042RDB_PI_SPIFLASH_defconfig
+++ b/configs/T1042RDB_PI_SPIFLASH_defconfig
@@ -3,3 +3,5 @@
CONFIG_TARGET_T104XRDB=y
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T1042,T1042RDB_PI,RAMBOOT_PBL,SPL_FSL_PBL,SPIFLASH"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/T1042RDB_PI_defconfig b/configs/T1042RDB_PI_defconfig
index 078a105..2b4094e 100644
--- a/configs/T1042RDB_PI_defconfig
+++ b/configs/T1042RDB_PI_defconfig
@@ -2,3 +2,5 @@
CONFIG_MPC85xx=y
CONFIG_TARGET_T104XRDB=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T1042,T1042RDB_PI"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/T1042RDB_SECURE_BOOT_defconfig b/configs/T1042RDB_SECURE_BOOT_defconfig
index 8aee85f..bed4c93 100644
--- a/configs/T1042RDB_SECURE_BOOT_defconfig
+++ b/configs/T1042RDB_SECURE_BOOT_defconfig
@@ -2,3 +2,5 @@
CONFIG_MPC85xx=y
CONFIG_TARGET_T104XRDB=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T1042,SECURE_BOOT,T1042RDB"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/T1042RDB_defconfig b/configs/T1042RDB_defconfig
index 7c6de00..b2387f2 100644
--- a/configs/T1042RDB_defconfig
+++ b/configs/T1042RDB_defconfig
@@ -2,3 +2,5 @@
CONFIG_MPC85xx=y
CONFIG_TARGET_T104XRDB=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T1042,T1042RDB"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/T2080QDS_NAND_defconfig b/configs/T2080QDS_NAND_defconfig
index 83697da..5ca32a6 100644
--- a/configs/T2080QDS_NAND_defconfig
+++ b/configs/T2080QDS_NAND_defconfig
@@ -3,3 +3,5 @@
CONFIG_TARGET_T208XQDS=y
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T2080,RAMBOOT_PBL,SPL_FSL_PBL,NAND"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/T2080QDS_SDCARD_defconfig b/configs/T2080QDS_SDCARD_defconfig
index 830ced3..0947d33 100644
--- a/configs/T2080QDS_SDCARD_defconfig
+++ b/configs/T2080QDS_SDCARD_defconfig
@@ -3,3 +3,5 @@
CONFIG_TARGET_T208XQDS=y
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T2080,RAMBOOT_PBL,SPL_FSL_PBL,SDCARD"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/T2080QDS_SECURE_BOOT_defconfig b/configs/T2080QDS_SECURE_BOOT_defconfig
index eb3f086..2d05aa5 100644
--- a/configs/T2080QDS_SECURE_BOOT_defconfig
+++ b/configs/T2080QDS_SECURE_BOOT_defconfig
@@ -2,3 +2,5 @@
CONFIG_MPC85xx=y
CONFIG_TARGET_T208XQDS=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T2080,SECURE_BOOT"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/T2080QDS_SPIFLASH_defconfig b/configs/T2080QDS_SPIFLASH_defconfig
index 805a730..82df11c 100644
--- a/configs/T2080QDS_SPIFLASH_defconfig
+++ b/configs/T2080QDS_SPIFLASH_defconfig
@@ -3,3 +3,5 @@
CONFIG_TARGET_T208XQDS=y
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T2080,RAMBOOT_PBL,SPL_FSL_PBL,SPIFLASH"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig b/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig
index c086c2b..d46934a 100644
--- a/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig
+++ b/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig
@@ -2,3 +2,5 @@
CONFIG_MPC85xx=y
CONFIG_TARGET_T208XQDS=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T2080,SRIO_PCIE_BOOT_SLAVE,SYS_TEXT_BASE=0xFFF40000"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/T2080QDS_defconfig b/configs/T2080QDS_defconfig
index d657dbd..0b9abc0 100644
--- a/configs/T2080QDS_defconfig
+++ b/configs/T2080QDS_defconfig
@@ -2,3 +2,5 @@
CONFIG_MPC85xx=y
CONFIG_TARGET_T208XQDS=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T2080"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/T2080RDB_NAND_defconfig b/configs/T2080RDB_NAND_defconfig
index ed38d0c..f6c386c 100644
--- a/configs/T2080RDB_NAND_defconfig
+++ b/configs/T2080RDB_NAND_defconfig
@@ -3,3 +3,5 @@
CONFIG_TARGET_T208XRDB=y
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T2080,RAMBOOT_PBL,SPL_FSL_PBL,NAND"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/T2080RDB_SDCARD_defconfig b/configs/T2080RDB_SDCARD_defconfig
index 7cb4a72..ffef84d 100644
--- a/configs/T2080RDB_SDCARD_defconfig
+++ b/configs/T2080RDB_SDCARD_defconfig
@@ -3,3 +3,5 @@
CONFIG_TARGET_T208XRDB=y
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T2080,RAMBOOT_PBL,SPL_FSL_PBL,SDCARD"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/T2080RDB_SECURE_BOOT_defconfig b/configs/T2080RDB_SECURE_BOOT_defconfig
index 4af6d0c..0c1eaf9 100644
--- a/configs/T2080RDB_SECURE_BOOT_defconfig
+++ b/configs/T2080RDB_SECURE_BOOT_defconfig
@@ -2,3 +2,5 @@
CONFIG_MPC85xx=y
CONFIG_TARGET_T208XRDB=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T2080,SECURE_BOOT"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/T2080RDB_SPIFLASH_defconfig b/configs/T2080RDB_SPIFLASH_defconfig
index 0dce597..84ca685 100644
--- a/configs/T2080RDB_SPIFLASH_defconfig
+++ b/configs/T2080RDB_SPIFLASH_defconfig
@@ -3,3 +3,5 @@
CONFIG_TARGET_T208XRDB=y
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T2080,RAMBOOT_PBL,SPL_FSL_PBL,SPIFLASH"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/T2080RDB_SRIO_PCIE_BOOT_defconfig b/configs/T2080RDB_SRIO_PCIE_BOOT_defconfig
index 824f021..9e147c7 100644
--- a/configs/T2080RDB_SRIO_PCIE_BOOT_defconfig
+++ b/configs/T2080RDB_SRIO_PCIE_BOOT_defconfig
@@ -2,3 +2,5 @@
CONFIG_MPC85xx=y
CONFIG_TARGET_T208XRDB=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T2080,SRIO_PCIE_BOOT_SLAVE,SYS_TEXT_BASE=0xFFF40000"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/T2080RDB_defconfig b/configs/T2080RDB_defconfig
index 9da8e89..7a6f88c 100644
--- a/configs/T2080RDB_defconfig
+++ b/configs/T2080RDB_defconfig
@@ -2,3 +2,5 @@
CONFIG_MPC85xx=y
CONFIG_TARGET_T208XRDB=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T2080"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/T2081QDS_NAND_defconfig b/configs/T2081QDS_NAND_defconfig
index ca0259c..2c41e9c 100644
--- a/configs/T2081QDS_NAND_defconfig
+++ b/configs/T2081QDS_NAND_defconfig
@@ -3,3 +3,5 @@
CONFIG_TARGET_T208XQDS=y
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T2081,RAMBOOT_PBL,SPL_FSL_PBL,NAND"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/T2081QDS_SDCARD_defconfig b/configs/T2081QDS_SDCARD_defconfig
index a76cf42..99b74a9 100644
--- a/configs/T2081QDS_SDCARD_defconfig
+++ b/configs/T2081QDS_SDCARD_defconfig
@@ -3,3 +3,5 @@
CONFIG_TARGET_T208XQDS=y
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T2081,RAMBOOT_PBL,SPL_FSL_PBL,SDCARD"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/T2081QDS_SPIFLASH_defconfig b/configs/T2081QDS_SPIFLASH_defconfig
index 32376b6..6d8f16c 100644
--- a/configs/T2081QDS_SPIFLASH_defconfig
+++ b/configs/T2081QDS_SPIFLASH_defconfig
@@ -3,3 +3,5 @@
CONFIG_TARGET_T208XQDS=y
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T2081,RAMBOOT_PBL,SPL_FSL_PBL,SPIFLASH"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/T2081QDS_SRIO_PCIE_BOOT_defconfig b/configs/T2081QDS_SRIO_PCIE_BOOT_defconfig
index 4d4e44f..6179808 100644
--- a/configs/T2081QDS_SRIO_PCIE_BOOT_defconfig
+++ b/configs/T2081QDS_SRIO_PCIE_BOOT_defconfig
@@ -2,3 +2,5 @@
CONFIG_MPC85xx=y
CONFIG_TARGET_T208XQDS=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T2081,SRIO_PCIE_BOOT_SLAVE,SYS_TEXT_BASE=0xFFF40000"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/T2081QDS_defconfig b/configs/T2081QDS_defconfig
index b24ee59..55fb344 100644
--- a/configs/T2081QDS_defconfig
+++ b/configs/T2081QDS_defconfig
@@ -2,3 +2,5 @@
CONFIG_MPC85xx=y
CONFIG_TARGET_T208XQDS=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T2081"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/T4160QDS_NAND_defconfig b/configs/T4160QDS_NAND_defconfig
index 191005a..47702ea 100644
--- a/configs/T4160QDS_NAND_defconfig
+++ b/configs/T4160QDS_NAND_defconfig
@@ -3,3 +3,5 @@
CONFIG_TARGET_T4240QDS=y
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T4160,RAMBOOT_PBL,SPL_FSL_PBL,NAND"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/T4160QDS_SDCARD_defconfig b/configs/T4160QDS_SDCARD_defconfig
index 4f1148a..6476375 100644
--- a/configs/T4160QDS_SDCARD_defconfig
+++ b/configs/T4160QDS_SDCARD_defconfig
@@ -3,3 +3,5 @@
CONFIG_TARGET_T4240QDS=y
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T4160,RAMBOOT_PBL,SPL_FSL_PBL,SDCARD"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/T4160QDS_SECURE_BOOT_defconfig b/configs/T4160QDS_SECURE_BOOT_defconfig
index b55cab9..c4ea42a 100644
--- a/configs/T4160QDS_SECURE_BOOT_defconfig
+++ b/configs/T4160QDS_SECURE_BOOT_defconfig
@@ -2,3 +2,5 @@
CONFIG_MPC85xx=y
CONFIG_TARGET_T4240QDS=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T4160,SECURE_BOOT"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/T4160QDS_defconfig b/configs/T4160QDS_defconfig
index b2f81b4..a2fe946 100644
--- a/configs/T4160QDS_defconfig
+++ b/configs/T4160QDS_defconfig
@@ -2,3 +2,5 @@
CONFIG_MPC85xx=y
CONFIG_TARGET_T4240QDS=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T4160"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/T4160RDB_defconfig b/configs/T4160RDB_defconfig
index fc73a47..c892a02 100644
--- a/configs/T4160RDB_defconfig
+++ b/configs/T4160RDB_defconfig
@@ -2,3 +2,5 @@
CONFIG_MPC85xx=y
CONFIG_TARGET_T4240RDB=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T4160"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/T4240QDS_NAND_defconfig b/configs/T4240QDS_NAND_defconfig
index 9922f13..af933e0 100644
--- a/configs/T4240QDS_NAND_defconfig
+++ b/configs/T4240QDS_NAND_defconfig
@@ -3,3 +3,5 @@
CONFIG_TARGET_T4240QDS=y
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T4240,RAMBOOT_PBL,SPL_FSL_PBL,NAND"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/T4240QDS_SDCARD_defconfig b/configs/T4240QDS_SDCARD_defconfig
index d31e836..aa98a43 100644
--- a/configs/T4240QDS_SDCARD_defconfig
+++ b/configs/T4240QDS_SDCARD_defconfig
@@ -3,3 +3,5 @@
CONFIG_TARGET_T4240QDS=y
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T4240,RAMBOOT_PBL,SPL_FSL_PBL,SDCARD"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/T4240QDS_SECURE_BOOT_defconfig b/configs/T4240QDS_SECURE_BOOT_defconfig
index 1488967..60d205e 100644
--- a/configs/T4240QDS_SECURE_BOOT_defconfig
+++ b/configs/T4240QDS_SECURE_BOOT_defconfig
@@ -2,3 +2,5 @@
CONFIG_MPC85xx=y
CONFIG_TARGET_T4240QDS=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T4240,SECURE_BOOT"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/T4240QDS_SRIO_PCIE_BOOT_defconfig b/configs/T4240QDS_SRIO_PCIE_BOOT_defconfig
index 5ded552..67dda4c 100644
--- a/configs/T4240QDS_SRIO_PCIE_BOOT_defconfig
+++ b/configs/T4240QDS_SRIO_PCIE_BOOT_defconfig
@@ -2,3 +2,5 @@
CONFIG_MPC85xx=y
CONFIG_TARGET_T4240QDS=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T4240,SRIO_PCIE_BOOT_SLAVE,SYS_TEXT_BASE=0xFFF40000"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/T4240QDS_defconfig b/configs/T4240QDS_defconfig
index 0fb7e0e..a36e429 100644
--- a/configs/T4240QDS_defconfig
+++ b/configs/T4240QDS_defconfig
@@ -2,3 +2,5 @@
CONFIG_MPC85xx=y
CONFIG_TARGET_T4240QDS=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T4240"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/T4240RDB_SDCARD_defconfig b/configs/T4240RDB_SDCARD_defconfig
index eac2bc4..5b5b34d 100644
--- a/configs/T4240RDB_SDCARD_defconfig
+++ b/configs/T4240RDB_SDCARD_defconfig
@@ -3,3 +3,5 @@
CONFIG_TARGET_T4240RDB=y
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T4240,RAMBOOT_PBL,SPL_FSL_PBL,SDCARD"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/T4240RDB_defconfig b/configs/T4240RDB_defconfig
index 35e4aa4..e65c62c 100644
--- a/configs/T4240RDB_defconfig
+++ b/configs/T4240RDB_defconfig
@@ -2,3 +2,5 @@
CONFIG_MPC85xx=y
CONFIG_TARGET_T4240RDB=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T4240"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/TQM5200S_HIGHBOOT_defconfig b/configs/TQM5200S_HIGHBOOT_defconfig
index 3e2c400..e81759a 100644
--- a/configs/TQM5200S_HIGHBOOT_defconfig
+++ b/configs/TQM5200S_HIGHBOOT_defconfig
@@ -2,3 +2,4 @@
CONFIG_MPC5xxx=y
CONFIG_TARGET_TQM5200=y
CONFIG_SYS_EXTRA_OPTIONS="TQM5200_B,TQM5200S,SYS_TEXT_BASE=0xFFF00000"
+CONFIG_CMD_NET=y
diff --git a/configs/TQM5200S_defconfig b/configs/TQM5200S_defconfig
index 050410a..4bae198 100644
--- a/configs/TQM5200S_defconfig
+++ b/configs/TQM5200S_defconfig
@@ -2,3 +2,4 @@
CONFIG_MPC5xxx=y
CONFIG_TARGET_TQM5200=y
CONFIG_SYS_EXTRA_OPTIONS="TQM5200_B,TQM5200S"
+CONFIG_CMD_NET=y
diff --git a/configs/TQM5200_B_HIGHBOOT_defconfig b/configs/TQM5200_B_HIGHBOOT_defconfig
index 68b0843..5c64746 100644
--- a/configs/TQM5200_B_HIGHBOOT_defconfig
+++ b/configs/TQM5200_B_HIGHBOOT_defconfig
@@ -2,3 +2,4 @@
CONFIG_MPC5xxx=y
CONFIG_TARGET_TQM5200=y
CONFIG_SYS_EXTRA_OPTIONS="TQM5200_B,SYS_TEXT_BASE=0xFFF00000"
+CONFIG_CMD_NET=y
diff --git a/configs/TQM5200_B_defconfig b/configs/TQM5200_B_defconfig
index 0ddfe9b..331dcab 100644
--- a/configs/TQM5200_B_defconfig
+++ b/configs/TQM5200_B_defconfig
@@ -2,3 +2,4 @@
CONFIG_MPC5xxx=y
CONFIG_TARGET_TQM5200=y
CONFIG_SYS_EXTRA_OPTIONS="TQM5200_B"
+CONFIG_CMD_NET=y
diff --git a/configs/TQM5200_STK100_defconfig b/configs/TQM5200_STK100_defconfig
index 24be3d9..e384834 100644
--- a/configs/TQM5200_STK100_defconfig
+++ b/configs/TQM5200_STK100_defconfig
@@ -2,3 +2,4 @@
CONFIG_MPC5xxx=y
CONFIG_TARGET_TQM5200=y
CONFIG_SYS_EXTRA_OPTIONS="STK52XX_REV100"
+CONFIG_CMD_NET=y
diff --git a/configs/TQM5200_defconfig b/configs/TQM5200_defconfig
index 1fe9682..6a4d25e 100644
--- a/configs/TQM5200_defconfig
+++ b/configs/TQM5200_defconfig
@@ -1,3 +1,4 @@
CONFIG_PPC=y
CONFIG_MPC5xxx=y
CONFIG_TARGET_TQM5200=y
+CONFIG_CMD_NET=y
diff --git a/configs/TQM823L_LCD_defconfig b/configs/TQM823L_LCD_defconfig
index 2ccd1bc..94bda12 100644
--- a/configs/TQM823L_LCD_defconfig
+++ b/configs/TQM823L_LCD_defconfig
@@ -2,3 +2,4 @@
CONFIG_8xx=y
CONFIG_TARGET_TQM823L=y
CONFIG_SYS_EXTRA_OPTIONS="LCD,NEC_NL6448BC20"
+CONFIG_CMD_NET=y
diff --git a/configs/TQM823L_defconfig b/configs/TQM823L_defconfig
index 5678bf2..96e16c6 100644
--- a/configs/TQM823L_defconfig
+++ b/configs/TQM823L_defconfig
@@ -1,3 +1,4 @@
CONFIG_PPC=y
CONFIG_8xx=y
CONFIG_TARGET_TQM823L=y
+CONFIG_CMD_NET=y
diff --git a/configs/TQM823M_defconfig b/configs/TQM823M_defconfig
index 974bc91..b4bd8e9 100644
--- a/configs/TQM823M_defconfig
+++ b/configs/TQM823M_defconfig
@@ -1,3 +1,4 @@
CONFIG_PPC=y
CONFIG_8xx=y
CONFIG_TARGET_TQM823M=y
+CONFIG_CMD_NET=y
diff --git a/configs/TQM834x_defconfig b/configs/TQM834x_defconfig
index 2cf89b4..d2c4bd5 100644
--- a/configs/TQM834x_defconfig
+++ b/configs/TQM834x_defconfig
@@ -1,3 +1,4 @@
CONFIG_PPC=y
CONFIG_MPC83xx=y
CONFIG_TARGET_TQM834X=y
+CONFIG_CMD_NET=y
diff --git a/configs/TQM850L_defconfig b/configs/TQM850L_defconfig
index f3d5f4d..06cc72c 100644
--- a/configs/TQM850L_defconfig
+++ b/configs/TQM850L_defconfig
@@ -1,3 +1,4 @@
CONFIG_PPC=y
CONFIG_8xx=y
CONFIG_TARGET_TQM850L=y
+CONFIG_CMD_NET=y
diff --git a/configs/TQM850M_defconfig b/configs/TQM850M_defconfig
index 6052ada..5f8d89d 100644
--- a/configs/TQM850M_defconfig
+++ b/configs/TQM850M_defconfig
@@ -1,3 +1,4 @@
CONFIG_PPC=y
CONFIG_8xx=y
CONFIG_TARGET_TQM850M=y
+CONFIG_CMD_NET=y
diff --git a/configs/TQM855L_defconfig b/configs/TQM855L_defconfig
index b7d5891..6858682 100644
--- a/configs/TQM855L_defconfig
+++ b/configs/TQM855L_defconfig
@@ -1,3 +1,4 @@
CONFIG_PPC=y
CONFIG_8xx=y
CONFIG_TARGET_TQM855L=y
+CONFIG_CMD_NET=y
diff --git a/configs/TQM855M_defconfig b/configs/TQM855M_defconfig
index 367a709..460f91b 100644
--- a/configs/TQM855M_defconfig
+++ b/configs/TQM855M_defconfig
@@ -1,3 +1,4 @@
CONFIG_PPC=y
CONFIG_8xx=y
CONFIG_TARGET_TQM855M=y
+CONFIG_CMD_NET=y
diff --git a/configs/TQM860L_defconfig b/configs/TQM860L_defconfig
index 0a215a7..2178a1a 100644
--- a/configs/TQM860L_defconfig
+++ b/configs/TQM860L_defconfig
@@ -1,3 +1,4 @@
CONFIG_PPC=y
CONFIG_8xx=y
CONFIG_TARGET_TQM860L=y
+CONFIG_CMD_NET=y
diff --git a/configs/TQM860M_defconfig b/configs/TQM860M_defconfig
index 5c9a4f1..d262d6f 100644
--- a/configs/TQM860M_defconfig
+++ b/configs/TQM860M_defconfig
@@ -1,3 +1,4 @@
CONFIG_PPC=y
CONFIG_8xx=y
CONFIG_TARGET_TQM860M=y
+CONFIG_CMD_NET=y
diff --git a/configs/TQM862L_defconfig b/configs/TQM862L_defconfig
index 24a290e..b85f6be 100644
--- a/configs/TQM862L_defconfig
+++ b/configs/TQM862L_defconfig
@@ -1,3 +1,4 @@
CONFIG_PPC=y
CONFIG_8xx=y
CONFIG_TARGET_TQM862L=y
+CONFIG_CMD_NET=y
diff --git a/configs/TQM862M_defconfig b/configs/TQM862M_defconfig
index ca8dba1..81fba41 100644
--- a/configs/TQM862M_defconfig
+++ b/configs/TQM862M_defconfig
@@ -1,3 +1,4 @@
CONFIG_PPC=y
CONFIG_8xx=y
CONFIG_TARGET_TQM862M=y
+CONFIG_CMD_NET=y
diff --git a/configs/TQM866M_defconfig b/configs/TQM866M_defconfig
index bcf039a..c644f87 100644
--- a/configs/TQM866M_defconfig
+++ b/configs/TQM866M_defconfig
@@ -1,3 +1,4 @@
CONFIG_PPC=y
CONFIG_8xx=y
CONFIG_TARGET_TQM866M=y
+CONFIG_CMD_NET=y
diff --git a/configs/TQM885D_defconfig b/configs/TQM885D_defconfig
index 6a0268a..a1a2fbb 100644
--- a/configs/TQM885D_defconfig
+++ b/configs/TQM885D_defconfig
@@ -1,3 +1,4 @@
CONFIG_PPC=y
CONFIG_8xx=y
CONFIG_TARGET_TQM885D=y
+CONFIG_CMD_NET=y
diff --git a/configs/TTTech_defconfig b/configs/TTTech_defconfig
index 5270094..cec9f2d 100644
--- a/configs/TTTech_defconfig
+++ b/configs/TTTech_defconfig
@@ -2,3 +2,4 @@
CONFIG_8xx=y
CONFIG_TARGET_TQM823L=y
CONFIG_SYS_EXTRA_OPTIONS="LCD,SHARP_LQ104V7DS01"
+CONFIG_CMD_NET=y
diff --git a/configs/TWR-P1025_defconfig b/configs/TWR-P1025_defconfig
index c86900a..1456929 100644
--- a/configs/TWR-P1025_defconfig
+++ b/configs/TWR-P1025_defconfig
@@ -2,3 +2,5 @@
CONFIG_MPC85xx=y
CONFIG_TARGET_P1_TWR=y
CONFIG_SYS_EXTRA_OPTIONS="TWR_P1025"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/UCP1020_SPIFLASH_defconfig b/configs/UCP1020_SPIFLASH_defconfig
index c512439..d6ea20e 100644
--- a/configs/UCP1020_SPIFLASH_defconfig
+++ b/configs/UCP1020_SPIFLASH_defconfig
@@ -2,3 +2,5 @@
CONFIG_MPC85xx=y
CONFIG_TARGET_UCP1020=y
CONFIG_TARGET_UCP1020_SPIFLASH=y
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/UCP1020_defconfig b/configs/UCP1020_defconfig
index 1c272d6..50cb7de 100644
--- a/configs/UCP1020_defconfig
+++ b/configs/UCP1020_defconfig
@@ -1,3 +1,5 @@
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_UCP1020=y
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/VCMA9_defconfig b/configs/VCMA9_defconfig
index 6aa8de0..3cc4185 100644
--- a/configs/VCMA9_defconfig
+++ b/configs/VCMA9_defconfig
@@ -1,2 +1,3 @@
CONFIG_ARM=y
CONFIG_TARGET_VCMA9=y
+CONFIG_CMD_NET=y
diff --git a/configs/VOM405_defconfig b/configs/VOM405_defconfig
index b65515f..e439997 100644
--- a/configs/VOM405_defconfig
+++ b/configs/VOM405_defconfig
@@ -1,3 +1,4 @@
CONFIG_PPC=y
CONFIG_4xx=y
CONFIG_TARGET_VOM405=y
+CONFIG_CMD_NET=y
diff --git a/configs/a3m071_defconfig b/configs/a3m071_defconfig
index eeaff87..1a052e4 100644
--- a/configs/a3m071_defconfig
+++ b/configs/a3m071_defconfig
@@ -2,3 +2,4 @@
CONFIG_MPC5xxx=y
CONFIG_TARGET_A3M071=y
CONFIG_SPL=y
+CONFIG_CMD_NET=y
diff --git a/configs/a4m072_defconfig b/configs/a4m072_defconfig
index ddc8d3f..a91c89b 100644
--- a/configs/a4m072_defconfig
+++ b/configs/a4m072_defconfig
@@ -1,3 +1,4 @@
CONFIG_PPC=y
CONFIG_MPC5xxx=y
CONFIG_TARGET_A4M072=y
+CONFIG_CMD_NET=y
diff --git a/configs/a4m2k_defconfig b/configs/a4m2k_defconfig
index 15c6411..6efb1fd 100644
--- a/configs/a4m2k_defconfig
+++ b/configs/a4m2k_defconfig
@@ -3,3 +3,4 @@
CONFIG_TARGET_A3M071=y
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="A4M2K"
+CONFIG_CMD_NET=y
diff --git a/configs/ac14xx_defconfig b/configs/ac14xx_defconfig
index 3796632..121883f 100644
--- a/configs/ac14xx_defconfig
+++ b/configs/ac14xx_defconfig
@@ -1,3 +1,4 @@
CONFIG_PPC=y
CONFIG_MPC512X=y
CONFIG_TARGET_AC14XX=y
+CONFIG_CMD_NET=y
diff --git a/configs/acadia_defconfig b/configs/acadia_defconfig
index 4e0d81c..e869b26 100644
--- a/configs/acadia_defconfig
+++ b/configs/acadia_defconfig
@@ -1,4 +1,5 @@
CONFIG_PPC=y
CONFIG_4xx=y
CONFIG_TARGET_ACADIA=y
-CONFIG_REGEX=y
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/adp-ag101_defconfig b/configs/adp-ag101_defconfig
index 2891154..39a0510 100644
--- a/configs/adp-ag101_defconfig
+++ b/configs/adp-ag101_defconfig
@@ -1,2 +1,3 @@
CONFIG_NDS32=y
CONFIG_TARGET_ADP_AG101=y
+CONFIG_CMD_NET=y
diff --git a/configs/adp-ag101p_defconfig b/configs/adp-ag101p_defconfig
index 0a7a64c..7ef93b3 100644
--- a/configs/adp-ag101p_defconfig
+++ b/configs/adp-ag101p_defconfig
@@ -1,2 +1,3 @@
CONFIG_NDS32=y
CONFIG_TARGET_ADP_AG101P=y
+CONFIG_CMD_NET=y
diff --git a/configs/adp-ag102_defconfig b/configs/adp-ag102_defconfig
index 03f2241..217016b 100644
--- a/configs/adp-ag102_defconfig
+++ b/configs/adp-ag102_defconfig
@@ -1,2 +1,3 @@
CONFIG_NDS32=y
CONFIG_TARGET_ADP_AG102=y
+CONFIG_CMD_NET=y
diff --git a/configs/alpr_defconfig b/configs/alpr_defconfig
index 9f613c8..6865410 100644
--- a/configs/alpr_defconfig
+++ b/configs/alpr_defconfig
@@ -1,3 +1,4 @@
CONFIG_PPC=y
CONFIG_4xx=y
CONFIG_TARGET_ALPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/alt_defconfig b/configs/alt_defconfig
index 0a18409..0006eba 100644
--- a/configs/alt_defconfig
+++ b/configs/alt_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
CONFIG_RMOBILE=y
CONFIG_TARGET_ALT=y
+CONFIG_CMD_NET=y
CONFIG_SH_SDHI=y
diff --git a/configs/am335x_boneblack_defconfig b/configs/am335x_boneblack_defconfig
index 624717c..07ebb17 100644
--- a/configs/am335x_boneblack_defconfig
+++ b/configs/am335x_boneblack_defconfig
@@ -4,3 +4,4 @@
CONFIG_SPL_STACK_R=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
CONFIG_SYS_EXTRA_OPTIONS="EMMC_BOOT"
+CONFIG_CMD_NET=y
diff --git a/configs/am335x_boneblack_vboot_defconfig b/configs/am335x_boneblack_vboot_defconfig
index e805c9d..a8584e9 100644
--- a/configs/am335x_boneblack_vboot_defconfig
+++ b/configs/am335x_boneblack_vboot_defconfig
@@ -8,4 +8,5 @@
CONFIG_FIT_VERBOSE=y
CONFIG_FIT_SIGNATURE=y
CONFIG_SYS_EXTRA_OPTIONS="EMMC_BOOT,ENABLE_VBOOT"
+CONFIG_CMD_NET=y
CONFIG_OF_CONTROL=y
diff --git a/configs/am335x_evm_defconfig b/configs/am335x_evm_defconfig
index f23c0e3..f06baa6 100644
--- a/configs/am335x_evm_defconfig
+++ b/configs/am335x_evm_defconfig
@@ -4,3 +4,4 @@
CONFIG_SPL_STACK_R=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
CONFIG_SYS_EXTRA_OPTIONS="NAND"
+CONFIG_CMD_NET=y
diff --git a/configs/am335x_evm_nor_defconfig b/configs/am335x_evm_nor_defconfig
index 0f62bbc..c288528 100644
--- a/configs/am335x_evm_nor_defconfig
+++ b/configs/am335x_evm_nor_defconfig
@@ -5,3 +5,4 @@
CONFIG_SPL_STACK_R=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
CONFIG_SYS_EXTRA_OPTIONS="NAND"
+CONFIG_CMD_NET=y
diff --git a/configs/am335x_evm_norboot_defconfig b/configs/am335x_evm_norboot_defconfig
index 1e25d89..49ea2f8 100644
--- a/configs/am335x_evm_norboot_defconfig
+++ b/configs/am335x_evm_norboot_defconfig
@@ -2,3 +2,4 @@
CONFIG_TARGET_AM335X_EVM=y
CONFIG_NOR=y
CONFIG_NOR_BOOT=y
+CONFIG_CMD_NET=y
diff --git a/configs/am335x_evm_spiboot_defconfig b/configs/am335x_evm_spiboot_defconfig
index 5c992e1..56e9ea1 100644
--- a/configs/am335x_evm_spiboot_defconfig
+++ b/configs/am335x_evm_spiboot_defconfig
@@ -4,3 +4,4 @@
CONFIG_SPL_STACK_R=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
CONFIG_SYS_EXTRA_OPTIONS="SPI_BOOT"
+CONFIG_CMD_NET=y
diff --git a/configs/am335x_evm_usbspl_defconfig b/configs/am335x_evm_usbspl_defconfig
index 0cc86e3..88598b0 100644
--- a/configs/am335x_evm_usbspl_defconfig
+++ b/configs/am335x_evm_usbspl_defconfig
@@ -4,3 +4,4 @@
CONFIG_SPL_STACK_R=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
CONFIG_SYS_EXTRA_OPTIONS="NAND,SPL_USBETH_SUPPORT"
+CONFIG_CMD_NET=y
diff --git a/configs/am335x_igep0033_defconfig b/configs/am335x_igep0033_defconfig
index 8b212c6..3d8d285 100644
--- a/configs/am335x_igep0033_defconfig
+++ b/configs/am335x_igep0033_defconfig
@@ -3,3 +3,4 @@
CONFIG_SPL=y
CONFIG_SPL_STACK_R=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
+CONFIG_CMD_NET=y
diff --git a/configs/am3517_evm_defconfig b/configs/am3517_evm_defconfig
index d084f77..3b71cc6 100644
--- a/configs/am3517_evm_defconfig
+++ b/configs/am3517_evm_defconfig
@@ -2,3 +2,4 @@
CONFIG_OMAP34XX=y
CONFIG_TARGET_AM3517_EVM=y
CONFIG_SPL=y
+CONFIG_CMD_NET=y
diff --git a/configs/am43xx_evm_defconfig b/configs/am43xx_evm_defconfig
index 46d2fd2..4ad2667 100644
--- a/configs/am43xx_evm_defconfig
+++ b/configs/am43xx_evm_defconfig
@@ -2,3 +2,4 @@
CONFIG_TARGET_AM43XX_EVM=y
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="SERIAL1,CONS_INDEX=1"
+CONFIG_CMD_NET=y
diff --git a/configs/am43xx_evm_qspiboot_defconfig b/configs/am43xx_evm_qspiboot_defconfig
index a0a18f2..6b06cff 100644
--- a/configs/am43xx_evm_qspiboot_defconfig
+++ b/configs/am43xx_evm_qspiboot_defconfig
@@ -1,3 +1,4 @@
CONFIG_ARM=y
CONFIG_TARGET_AM43XX_EVM=y
CONFIG_SYS_EXTRA_OPTIONS="SERIAL1,CONS_INDEX=1,QSPI,QSPI_BOOT"
+CONFIG_CMD_NET=y
diff --git a/configs/ap325rxa_defconfig b/configs/ap325rxa_defconfig
index ae2039c..c34d7e9 100644
--- a/configs/ap325rxa_defconfig
+++ b/configs/ap325rxa_defconfig
@@ -1,2 +1,3 @@
CONFIG_SH=y
CONFIG_TARGET_AP325RXA=y
+CONFIG_CMD_NET=y
diff --git a/configs/ap_sh4a_4a_defconfig b/configs/ap_sh4a_4a_defconfig
index f76329b..16c1132 100644
--- a/configs/ap_sh4a_4a_defconfig
+++ b/configs/ap_sh4a_4a_defconfig
@@ -1,2 +1,3 @@
CONFIG_SH=y
CONFIG_TARGET_AP_SH4A_4A=y
+CONFIG_CMD_NET=y
diff --git a/configs/apalis_t30_defconfig b/configs/apalis_t30_defconfig
index 3d9ae96..9ec73f2 100644
--- a/configs/apalis_t30_defconfig
+++ b/configs/apalis_t30_defconfig
@@ -3,3 +3,5 @@
CONFIG_TEGRA30=y
CONFIG_TARGET_APALIS_T30=y
CONFIG_DEFAULT_DEVICE_TREE="tegra30-apalis"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/apf27_defconfig b/configs/apf27_defconfig
index 87f6986..231ef6d 100644
--- a/configs/apf27_defconfig
+++ b/configs/apf27_defconfig
@@ -1,3 +1,5 @@
CONFIG_ARM=y
CONFIG_TARGET_APF27=y
CONFIG_SPL=y
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/apx4devkit_defconfig b/configs/apx4devkit_defconfig
index 2d78654..e88794a 100644
--- a/configs/apx4devkit_defconfig
+++ b/configs/apx4devkit_defconfig
@@ -1,3 +1,4 @@
CONFIG_ARM=y
CONFIG_TARGET_APX4DEVKIT=y
CONFIG_SPL=y
+CONFIG_CMD_NET=y
diff --git a/configs/arcangel4-be_defconfig b/configs/arcangel4-be_defconfig
index f7ecfdd..2f9d0c8 100644
--- a/configs/arcangel4-be_defconfig
+++ b/configs/arcangel4-be_defconfig
@@ -5,6 +5,7 @@
CONFIG_DM_SERIAL=y
CONFIG_SYS_TEXT_BASE=0x81000000
CONFIG_DEFAULT_DEVICE_TREE="arcangel4"
+CONFIG_CMD_NET=y
CONFIG_OF_CONTROL=y
CONFIG_OF_EMBED=y
CONFIG_DM=y
diff --git a/configs/arcangel4_defconfig b/configs/arcangel4_defconfig
index 12dc3f2..f1bfba0 100644
--- a/configs/arcangel4_defconfig
+++ b/configs/arcangel4_defconfig
@@ -4,6 +4,7 @@
CONFIG_DM_SERIAL=y
CONFIG_SYS_TEXT_BASE=0x81000000
CONFIG_DEFAULT_DEVICE_TREE="arcangel4"
+CONFIG_CMD_NET=y
CONFIG_OF_CONTROL=y
CONFIG_OF_EMBED=y
CONFIG_DM=y
diff --git a/configs/arches_defconfig b/configs/arches_defconfig
index 9084a3a..469dace 100644
--- a/configs/arches_defconfig
+++ b/configs/arches_defconfig
@@ -3,4 +3,6 @@
CONFIG_TARGET_CANYONLANDS=y
CONFIG_ARCHES=y
CONFIG_DEFAULT_DEVICE_TREE="arches"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
CONFIG_OF_CONTROL=y
diff --git a/configs/aria_defconfig b/configs/aria_defconfig
index f7ebfa6..85d673d 100644
--- a/configs/aria_defconfig
+++ b/configs/aria_defconfig
@@ -1,3 +1,4 @@
CONFIG_PPC=y
CONFIG_MPC512X=y
CONFIG_TARGET_ARIA=y
+CONFIG_CMD_NET=y
diff --git a/configs/aristainetos2_defconfig b/configs/aristainetos2_defconfig
index e536646..af92f69 100644
--- a/configs/aristainetos2_defconfig
+++ b/configs/aristainetos2_defconfig
@@ -1,3 +1,5 @@
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/aristainetos/aristainetos2.cfg,MX6DL"
CONFIG_ARM=y
CONFIG_TARGET_ARISTAINETOS2=y
+CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/aristainetos/aristainetos2.cfg,MX6DL"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/aristainetos_defconfig b/configs/aristainetos_defconfig
index 162e739..306d4a8 100644
--- a/configs/aristainetos_defconfig
+++ b/configs/aristainetos_defconfig
@@ -1,3 +1,5 @@
CONFIG_ARM=y
CONFIG_TARGET_ARISTAINETOS=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/aristainetos/aristainetos.cfg,MX6DL"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/armadillo-800eva_defconfig b/configs/armadillo-800eva_defconfig
index 22dc1f8..e859281 100644
--- a/configs/armadillo-800eva_defconfig
+++ b/configs/armadillo-800eva_defconfig
@@ -1,3 +1,4 @@
CONFIG_ARM=y
CONFIG_RMOBILE=y
CONFIG_TARGET_ARMADILLO_800EVA=y
+CONFIG_CMD_NET=y
diff --git a/configs/arndale_defconfig b/configs/arndale_defconfig
index e48003a..43f39f2 100644
--- a/configs/arndale_defconfig
+++ b/configs/arndale_defconfig
@@ -3,6 +3,7 @@
CONFIG_TARGET_ARNDALE=y
CONFIG_DEFAULT_DEVICE_TREE="exynos5250-arndale"
CONFIG_SPL=y
+CONFIG_CMD_NET=y
CONFIG_CMD_SOUND=y
CONFIG_SOUND=y
CONFIG_I2S=y
diff --git a/configs/at91rm9200ek_defconfig b/configs/at91rm9200ek_defconfig
index e1fd2ec..932a48f 100644
--- a/configs/at91rm9200ek_defconfig
+++ b/configs/at91rm9200ek_defconfig
@@ -1,3 +1,4 @@
CONFIG_ARM=y
CONFIG_ARCH_AT91=y
CONFIG_TARGET_AT91RM9200EK=y
+CONFIG_CMD_NET=y
diff --git a/configs/at91rm9200ek_ram_defconfig b/configs/at91rm9200ek_ram_defconfig
index 3573d39..44b6fb9 100644
--- a/configs/at91rm9200ek_ram_defconfig
+++ b/configs/at91rm9200ek_ram_defconfig
@@ -2,3 +2,4 @@
CONFIG_ARCH_AT91=y
CONFIG_TARGET_AT91RM9200EK=y
CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT"
+CONFIG_CMD_NET=y
diff --git a/configs/at91sam9260ek_dataflash_cs0_defconfig b/configs/at91sam9260ek_dataflash_cs0_defconfig
index 052f8af..5f629b6 100644
--- a/configs/at91sam9260ek_dataflash_cs0_defconfig
+++ b/configs/at91sam9260ek_dataflash_cs0_defconfig
@@ -2,3 +2,4 @@
CONFIG_ARCH_AT91=y
CONFIG_TARGET_AT91SAM9260EK=y
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9260,SYS_USE_DATAFLASH_CS0"
+CONFIG_CMD_NET=y
diff --git a/configs/at91sam9260ek_dataflash_cs1_defconfig b/configs/at91sam9260ek_dataflash_cs1_defconfig
index f654294..05a4d2d 100644
--- a/configs/at91sam9260ek_dataflash_cs1_defconfig
+++ b/configs/at91sam9260ek_dataflash_cs1_defconfig
@@ -2,3 +2,4 @@
CONFIG_ARCH_AT91=y
CONFIG_TARGET_AT91SAM9260EK=y
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9260,SYS_USE_DATAFLASH_CS1"
+CONFIG_CMD_NET=y
diff --git a/configs/at91sam9260ek_nandflash_defconfig b/configs/at91sam9260ek_nandflash_defconfig
index 1b2d232..883d363 100644
--- a/configs/at91sam9260ek_nandflash_defconfig
+++ b/configs/at91sam9260ek_nandflash_defconfig
@@ -2,3 +2,4 @@
CONFIG_ARCH_AT91=y
CONFIG_TARGET_AT91SAM9260EK=y
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9260,SYS_USE_NANDFLASH"
+CONFIG_CMD_NET=y
diff --git a/configs/at91sam9261ek_dataflash_cs0_defconfig b/configs/at91sam9261ek_dataflash_cs0_defconfig
index d8299da..e465319 100644
--- a/configs/at91sam9261ek_dataflash_cs0_defconfig
+++ b/configs/at91sam9261ek_dataflash_cs0_defconfig
@@ -2,3 +2,4 @@
CONFIG_ARCH_AT91=y
CONFIG_TARGET_AT91SAM9261EK=y
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9261,SYS_USE_DATAFLASH_CS0"
+CONFIG_CMD_NET=y
diff --git a/configs/at91sam9261ek_dataflash_cs3_defconfig b/configs/at91sam9261ek_dataflash_cs3_defconfig
index 1eb0e78..883fe86 100644
--- a/configs/at91sam9261ek_dataflash_cs3_defconfig
+++ b/configs/at91sam9261ek_dataflash_cs3_defconfig
@@ -2,3 +2,4 @@
CONFIG_ARCH_AT91=y
CONFIG_TARGET_AT91SAM9261EK=y
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9261,SYS_USE_DATAFLASH_CS3"
+CONFIG_CMD_NET=y
diff --git a/configs/at91sam9261ek_nandflash_defconfig b/configs/at91sam9261ek_nandflash_defconfig
index d14e5a9..9c0dc1a 100644
--- a/configs/at91sam9261ek_nandflash_defconfig
+++ b/configs/at91sam9261ek_nandflash_defconfig
@@ -2,3 +2,4 @@
CONFIG_ARCH_AT91=y
CONFIG_TARGET_AT91SAM9261EK=y
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9261,SYS_USE_NANDFLASH"
+CONFIG_CMD_NET=y
diff --git a/configs/at91sam9263ek_dataflash_cs0_defconfig b/configs/at91sam9263ek_dataflash_cs0_defconfig
index b272745..fac7637 100644
--- a/configs/at91sam9263ek_dataflash_cs0_defconfig
+++ b/configs/at91sam9263ek_dataflash_cs0_defconfig
@@ -2,3 +2,4 @@
CONFIG_ARCH_AT91=y
CONFIG_TARGET_AT91SAM9263EK=y
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9263,SYS_USE_DATAFLASH"
+CONFIG_CMD_NET=y
diff --git a/configs/at91sam9263ek_dataflash_defconfig b/configs/at91sam9263ek_dataflash_defconfig
index b272745..fac7637 100644
--- a/configs/at91sam9263ek_dataflash_defconfig
+++ b/configs/at91sam9263ek_dataflash_defconfig
@@ -2,3 +2,4 @@
CONFIG_ARCH_AT91=y
CONFIG_TARGET_AT91SAM9263EK=y
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9263,SYS_USE_DATAFLASH"
+CONFIG_CMD_NET=y
diff --git a/configs/at91sam9263ek_nandflash_defconfig b/configs/at91sam9263ek_nandflash_defconfig
index 05e6e8c..4486957 100644
--- a/configs/at91sam9263ek_nandflash_defconfig
+++ b/configs/at91sam9263ek_nandflash_defconfig
@@ -2,3 +2,4 @@
CONFIG_ARCH_AT91=y
CONFIG_TARGET_AT91SAM9263EK=y
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9263,SYS_USE_NANDFLASH"
+CONFIG_CMD_NET=y
diff --git a/configs/at91sam9263ek_norflash_boot_defconfig b/configs/at91sam9263ek_norflash_boot_defconfig
index 3318ad7..6bc4f40 100644
--- a/configs/at91sam9263ek_norflash_boot_defconfig
+++ b/configs/at91sam9263ek_norflash_boot_defconfig
@@ -2,3 +2,4 @@
CONFIG_ARCH_AT91=y
CONFIG_TARGET_AT91SAM9263EK=y
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9263,SYS_USE_BOOT_NORFLASH"
+CONFIG_CMD_NET=y
diff --git a/configs/at91sam9263ek_norflash_defconfig b/configs/at91sam9263ek_norflash_defconfig
index 04efa1b..1b37f4e 100644
--- a/configs/at91sam9263ek_norflash_defconfig
+++ b/configs/at91sam9263ek_norflash_defconfig
@@ -2,3 +2,4 @@
CONFIG_ARCH_AT91=y
CONFIG_TARGET_AT91SAM9263EK=y
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9263,SYS_USE_NORFLASH"
+CONFIG_CMD_NET=y
diff --git a/configs/at91sam9g10ek_dataflash_cs0_defconfig b/configs/at91sam9g10ek_dataflash_cs0_defconfig
index bdd4e1f..3cb93e9 100644
--- a/configs/at91sam9g10ek_dataflash_cs0_defconfig
+++ b/configs/at91sam9g10ek_dataflash_cs0_defconfig
@@ -2,3 +2,4 @@
CONFIG_ARCH_AT91=y
CONFIG_TARGET_AT91SAM9261EK=y
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G10,SYS_USE_DATAFLASH_CS0"
+CONFIG_CMD_NET=y
diff --git a/configs/at91sam9g10ek_dataflash_cs3_defconfig b/configs/at91sam9g10ek_dataflash_cs3_defconfig
index 809d803..2c1d9f6 100644
--- a/configs/at91sam9g10ek_dataflash_cs3_defconfig
+++ b/configs/at91sam9g10ek_dataflash_cs3_defconfig
@@ -2,3 +2,4 @@
CONFIG_ARCH_AT91=y
CONFIG_TARGET_AT91SAM9261EK=y
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G10,SYS_USE_DATAFLASH_CS3"
+CONFIG_CMD_NET=y
diff --git a/configs/at91sam9g10ek_nandflash_defconfig b/configs/at91sam9g10ek_nandflash_defconfig
index 9c0b4f5..06fb78f 100644
--- a/configs/at91sam9g10ek_nandflash_defconfig
+++ b/configs/at91sam9g10ek_nandflash_defconfig
@@ -2,3 +2,4 @@
CONFIG_ARCH_AT91=y
CONFIG_TARGET_AT91SAM9261EK=y
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G10,SYS_USE_NANDFLASH"
+CONFIG_CMD_NET=y
diff --git a/configs/at91sam9g20ek_2mmc_defconfig b/configs/at91sam9g20ek_2mmc_defconfig
index 4441e09..d3197b4 100644
--- a/configs/at91sam9g20ek_2mmc_defconfig
+++ b/configs/at91sam9g20ek_2mmc_defconfig
@@ -2,3 +2,4 @@
CONFIG_ARCH_AT91=y
CONFIG_TARGET_AT91SAM9260EK=y
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G20,AT91SAM9G20EK_2MMC,SYS_USE_MMC"
+CONFIG_CMD_NET=y
diff --git a/configs/at91sam9g20ek_2mmc_nandflash_defconfig b/configs/at91sam9g20ek_2mmc_nandflash_defconfig
index 49be950..8d08dc1 100644
--- a/configs/at91sam9g20ek_2mmc_nandflash_defconfig
+++ b/configs/at91sam9g20ek_2mmc_nandflash_defconfig
@@ -2,3 +2,4 @@
CONFIG_ARCH_AT91=y
CONFIG_TARGET_AT91SAM9260EK=y
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G20,AT91SAM9G20EK_2MMC,SYS_USE_NANDFLASH"
+CONFIG_CMD_NET=y
diff --git a/configs/at91sam9g20ek_dataflash_cs0_defconfig b/configs/at91sam9g20ek_dataflash_cs0_defconfig
index 0b259ed..62b8ed3 100644
--- a/configs/at91sam9g20ek_dataflash_cs0_defconfig
+++ b/configs/at91sam9g20ek_dataflash_cs0_defconfig
@@ -2,3 +2,4 @@
CONFIG_ARCH_AT91=y
CONFIG_TARGET_AT91SAM9260EK=y
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G20,SYS_USE_DATAFLASH_CS0"
+CONFIG_CMD_NET=y
diff --git a/configs/at91sam9g20ek_dataflash_cs1_defconfig b/configs/at91sam9g20ek_dataflash_cs1_defconfig
index 974138c..dba8f77 100644
--- a/configs/at91sam9g20ek_dataflash_cs1_defconfig
+++ b/configs/at91sam9g20ek_dataflash_cs1_defconfig
@@ -2,3 +2,4 @@
CONFIG_ARCH_AT91=y
CONFIG_TARGET_AT91SAM9260EK=y
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G20,SYS_USE_DATAFLASH_CS1"
+CONFIG_CMD_NET=y
diff --git a/configs/at91sam9g20ek_nandflash_defconfig b/configs/at91sam9g20ek_nandflash_defconfig
index 9cac5f4..e1b99d3 100644
--- a/configs/at91sam9g20ek_nandflash_defconfig
+++ b/configs/at91sam9g20ek_nandflash_defconfig
@@ -2,3 +2,4 @@
CONFIG_ARCH_AT91=y
CONFIG_TARGET_AT91SAM9260EK=y
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G20,SYS_USE_NANDFLASH"
+CONFIG_CMD_NET=y
diff --git a/configs/at91sam9m10g45ek_mmc_defconfig b/configs/at91sam9m10g45ek_mmc_defconfig
index 201d0c4..a9ab01a 100644
--- a/configs/at91sam9m10g45ek_mmc_defconfig
+++ b/configs/at91sam9m10g45ek_mmc_defconfig
@@ -3,3 +3,4 @@
CONFIG_TARGET_AT91SAM9M10G45EK=y
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9M10G45,SYS_USE_MMC"
+CONFIG_CMD_NET=y
diff --git a/configs/at91sam9m10g45ek_nandflash_defconfig b/configs/at91sam9m10g45ek_nandflash_defconfig
index 844acd4..b57f2ca 100644
--- a/configs/at91sam9m10g45ek_nandflash_defconfig
+++ b/configs/at91sam9m10g45ek_nandflash_defconfig
@@ -3,3 +3,4 @@
CONFIG_TARGET_AT91SAM9M10G45EK=y
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9M10G45,SYS_USE_NANDFLASH"
+CONFIG_CMD_NET=y
diff --git a/configs/at91sam9n12ek_mmc_defconfig b/configs/at91sam9n12ek_mmc_defconfig
index d9cf7d1..463e23c 100644
--- a/configs/at91sam9n12ek_mmc_defconfig
+++ b/configs/at91sam9n12ek_mmc_defconfig
@@ -2,3 +2,4 @@
CONFIG_ARCH_AT91=y
CONFIG_TARGET_AT91SAM9N12EK=y
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9N12,SYS_USE_MMC"
+CONFIG_CMD_NET=y
diff --git a/configs/at91sam9n12ek_nandflash_defconfig b/configs/at91sam9n12ek_nandflash_defconfig
index 9f0ceb9..a554f83 100644
--- a/configs/at91sam9n12ek_nandflash_defconfig
+++ b/configs/at91sam9n12ek_nandflash_defconfig
@@ -3,3 +3,4 @@
CONFIG_TARGET_AT91SAM9N12EK=y
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9N12,SYS_USE_NANDFLASH"
+CONFIG_CMD_NET=y
diff --git a/configs/at91sam9n12ek_spiflash_defconfig b/configs/at91sam9n12ek_spiflash_defconfig
index 81650c5..b4bddbc 100644
--- a/configs/at91sam9n12ek_spiflash_defconfig
+++ b/configs/at91sam9n12ek_spiflash_defconfig
@@ -3,3 +3,4 @@
CONFIG_TARGET_AT91SAM9N12EK=y
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9N12,SYS_USE_SPIFLASH"
+CONFIG_CMD_NET=y
diff --git a/configs/at91sam9x5ek_dataflash_defconfig b/configs/at91sam9x5ek_dataflash_defconfig
index 91bfd99..6662721 100644
--- a/configs/at91sam9x5ek_dataflash_defconfig
+++ b/configs/at91sam9x5ek_dataflash_defconfig
@@ -2,3 +2,4 @@
CONFIG_ARCH_AT91=y
CONFIG_TARGET_AT91SAM9X5EK=y
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9X5,SYS_USE_DATAFLASH"
+CONFIG_CMD_NET=y
diff --git a/configs/at91sam9x5ek_mmc_defconfig b/configs/at91sam9x5ek_mmc_defconfig
index d915382..85b2429 100644
--- a/configs/at91sam9x5ek_mmc_defconfig
+++ b/configs/at91sam9x5ek_mmc_defconfig
@@ -2,3 +2,4 @@
CONFIG_ARCH_AT91=y
CONFIG_TARGET_AT91SAM9X5EK=y
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9X5,SYS_USE_MMC"
+CONFIG_CMD_NET=y
diff --git a/configs/at91sam9x5ek_nandflash_defconfig b/configs/at91sam9x5ek_nandflash_defconfig
index 5d0c13f..a1d3f2d 100644
--- a/configs/at91sam9x5ek_nandflash_defconfig
+++ b/configs/at91sam9x5ek_nandflash_defconfig
@@ -3,3 +3,4 @@
CONFIG_TARGET_AT91SAM9X5EK=y
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9X5,SYS_USE_NANDFLASH"
+CONFIG_CMD_NET=y
diff --git a/configs/at91sam9x5ek_spiflash_defconfig b/configs/at91sam9x5ek_spiflash_defconfig
index c2d7fd4..27e4f18 100644
--- a/configs/at91sam9x5ek_spiflash_defconfig
+++ b/configs/at91sam9x5ek_spiflash_defconfig
@@ -3,3 +3,4 @@
CONFIG_TARGET_AT91SAM9X5EK=y
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9X5,SYS_USE_SPIFLASH"
+CONFIG_CMD_NET=y
diff --git a/configs/at91sam9xeek_dataflash_cs0_defconfig b/configs/at91sam9xeek_dataflash_cs0_defconfig
index e7ee6c6..9577c0f 100644
--- a/configs/at91sam9xeek_dataflash_cs0_defconfig
+++ b/configs/at91sam9xeek_dataflash_cs0_defconfig
@@ -2,3 +2,4 @@
CONFIG_ARCH_AT91=y
CONFIG_TARGET_AT91SAM9260EK=y
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9XE,SYS_USE_DATAFLASH_CS0"
+CONFIG_CMD_NET=y
diff --git a/configs/at91sam9xeek_dataflash_cs1_defconfig b/configs/at91sam9xeek_dataflash_cs1_defconfig
index 0512f06..d72737b 100644
--- a/configs/at91sam9xeek_dataflash_cs1_defconfig
+++ b/configs/at91sam9xeek_dataflash_cs1_defconfig
@@ -2,3 +2,4 @@
CONFIG_ARCH_AT91=y
CONFIG_TARGET_AT91SAM9260EK=y
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9XE,SYS_USE_DATAFLASH_CS1"
+CONFIG_CMD_NET=y
diff --git a/configs/at91sam9xeek_nandflash_defconfig b/configs/at91sam9xeek_nandflash_defconfig
index 2e3c132..ac88c96 100644
--- a/configs/at91sam9xeek_nandflash_defconfig
+++ b/configs/at91sam9xeek_nandflash_defconfig
@@ -2,3 +2,4 @@
CONFIG_ARCH_AT91=y
CONFIG_TARGET_AT91SAM9260EK=y
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9XE,SYS_USE_NANDFLASH"
+CONFIG_CMD_NET=y
diff --git a/configs/atngw100_defconfig b/configs/atngw100_defconfig
index cd79990..b00ae3a 100644
--- a/configs/atngw100_defconfig
+++ b/configs/atngw100_defconfig
@@ -1,2 +1,3 @@
CONFIG_AVR32=y
CONFIG_TARGET_ATNGW100=y
+CONFIG_CMD_NET=y
diff --git a/configs/atngw100mkii_defconfig b/configs/atngw100mkii_defconfig
index 88b1de2..6caf691 100644
--- a/configs/atngw100mkii_defconfig
+++ b/configs/atngw100mkii_defconfig
@@ -1,2 +1,3 @@
CONFIG_AVR32=y
CONFIG_TARGET_ATNGW100MKII=y
+CONFIG_CMD_NET=y
diff --git a/configs/atstk1002_defconfig b/configs/atstk1002_defconfig
index d6e9a77..e407dc5 100644
--- a/configs/atstk1002_defconfig
+++ b/configs/atstk1002_defconfig
@@ -1,2 +1,3 @@
CONFIG_AVR32=y
CONFIG_TARGET_ATSTK1002=y
+CONFIG_CMD_NET=y
diff --git a/configs/atstk1006_defconfig b/configs/atstk1006_defconfig
index 54beb0b..31482fc 100644
--- a/configs/atstk1006_defconfig
+++ b/configs/atstk1006_defconfig
@@ -1,2 +1,3 @@
CONFIG_AVR32=y
CONFIG_TARGET_ATSTK1006=y
+CONFIG_CMD_NET=y
diff --git a/configs/axm_defconfig b/configs/axm_defconfig
index a1d9f1d..d7dd3fd 100644
--- a/configs/axm_defconfig
+++ b/configs/axm_defconfig
@@ -3,3 +3,4 @@
CONFIG_TARGET_TAURUS=y
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G20,MACH_TYPE=2068,BOARD_AXM"
+CONFIG_CMD_NET=y
diff --git a/configs/axs101_defconfig b/configs/axs101_defconfig
index d33cc00..61c56e6 100644
--- a/configs/axs101_defconfig
+++ b/configs/axs101_defconfig
@@ -3,7 +3,7 @@
CONFIG_ARC_CACHE_LINE_SHIFT=5
CONFIG_TARGET_AXS101=y
CONFIG_SYS_CLK_FREQ=750000000
-CONFIG_NET=y
CONFIG_NETDEVICES=y
CONFIG_SYS_TEXT_BASE=0x81000000
+CONFIG_CMD_NET=y
CONFIG_ETH_DESIGNWARE=y
diff --git a/configs/axs103_defconfig b/configs/axs103_defconfig
index d30088e..444a95d 100644
--- a/configs/axs103_defconfig
+++ b/configs/axs103_defconfig
@@ -2,7 +2,7 @@
CONFIG_ISA_ARCV2=y
CONFIG_TARGET_AXS101=y
CONFIG_SYS_CLK_FREQ=50000000
-CONFIG_NET=y
CONFIG_NETDEVICES=y
CONFIG_SYS_TEXT_BASE=0x81000000
+CONFIG_CMD_NET=y
CONFIG_ETH_DESIGNWARE=y
diff --git a/configs/bamboo_defconfig b/configs/bamboo_defconfig
index df4adb6..420803c 100644
--- a/configs/bamboo_defconfig
+++ b/configs/bamboo_defconfig
@@ -1,4 +1,5 @@
CONFIG_PPC=y
CONFIG_4xx=y
CONFIG_TARGET_BAMBOO=y
-CONFIG_REGEX=y
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/bcm911360_entphn-ns_defconfig b/configs/bcm911360_entphn-ns_defconfig
index a650507..1e23da3 100644
--- a/configs/bcm911360_entphn-ns_defconfig
+++ b/configs/bcm911360_entphn-ns_defconfig
@@ -1,3 +1,4 @@
CONFIG_ARM=y
CONFIG_TARGET_BCMCYGNUS=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_SDRAM_SIZE=0x20000000,ARMV7_NONSEC"
+CONFIG_CMD_NET=y
diff --git a/configs/bcm911360_entphn_defconfig b/configs/bcm911360_entphn_defconfig
index 0f9397f..86d233f 100644
--- a/configs/bcm911360_entphn_defconfig
+++ b/configs/bcm911360_entphn_defconfig
@@ -1,3 +1,4 @@
CONFIG_ARM=y
CONFIG_TARGET_BCMCYGNUS=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_SDRAM_SIZE=0x20000000"
+CONFIG_CMD_NET=y
diff --git a/configs/bcm911360k_defconfig b/configs/bcm911360k_defconfig
index 0eedc35..a7feb86 100644
--- a/configs/bcm911360k_defconfig
+++ b/configs/bcm911360k_defconfig
@@ -1,3 +1,4 @@
CONFIG_ARM=y
CONFIG_TARGET_BCMCYGNUS=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_SDRAM_SIZE=0x40000000"
+CONFIG_CMD_NET=y
diff --git a/configs/bcm958300k-ns_defconfig b/configs/bcm958300k-ns_defconfig
index 5d3aee1..52551ad 100644
--- a/configs/bcm958300k-ns_defconfig
+++ b/configs/bcm958300k-ns_defconfig
@@ -1,3 +1,4 @@
CONFIG_ARM=y
CONFIG_TARGET_BCMCYGNUS=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_SDRAM_SIZE=0x40000000,ARMV7_NONSEC"
+CONFIG_CMD_NET=y
diff --git a/configs/bcm958300k_defconfig b/configs/bcm958300k_defconfig
index 0eedc35..a7feb86 100644
--- a/configs/bcm958300k_defconfig
+++ b/configs/bcm958300k_defconfig
@@ -1,3 +1,4 @@
CONFIG_ARM=y
CONFIG_TARGET_BCMCYGNUS=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_SDRAM_SIZE=0x40000000"
+CONFIG_CMD_NET=y
diff --git a/configs/bcm958305k_defconfig b/configs/bcm958305k_defconfig
index 0eedc35..a7feb86 100644
--- a/configs/bcm958305k_defconfig
+++ b/configs/bcm958305k_defconfig
@@ -1,3 +1,4 @@
CONFIG_ARM=y
CONFIG_TARGET_BCMCYGNUS=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_SDRAM_SIZE=0x40000000"
+CONFIG_CMD_NET=y
diff --git a/configs/bcm958622hr_defconfig b/configs/bcm958622hr_defconfig
index bb3236d..844a151 100644
--- a/configs/bcm958622hr_defconfig
+++ b/configs/bcm958622hr_defconfig
@@ -1,3 +1,4 @@
CONFIG_ARM=y
CONFIG_TARGET_BCMNSP=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_SDRAM_SIZE=0x01000000"
+CONFIG_CMD_NET=y
diff --git a/configs/bct-brettl2_defconfig b/configs/bct-brettl2_defconfig
index 84eb1fe..b585aa7 100644
--- a/configs/bct-brettl2_defconfig
+++ b/configs/bct-brettl2_defconfig
@@ -1,4 +1,5 @@
CONFIG_BLACKFIN=y
-CONFIG_NET=y
+CONFIG_TARGET_BCT_BRETTL2=y
+CONFIG_CMD_NET=y
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED=y
diff --git a/configs/beagle_x15_defconfig b/configs/beagle_x15_defconfig
index 7199468..bf224fc 100644
--- a/configs/beagle_x15_defconfig
+++ b/configs/beagle_x15_defconfig
@@ -3,3 +3,4 @@
CONFIG_TARGET_BEAGLE_X15=y
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=3"
+CONFIG_CMD_NET=y
diff --git a/configs/beaver_defconfig b/configs/beaver_defconfig
index 097bf22..a73d151 100644
--- a/configs/beaver_defconfig
+++ b/configs/beaver_defconfig
@@ -3,3 +3,4 @@
CONFIG_TEGRA30=y
CONFIG_TARGET_BEAVER=y
CONFIG_DEFAULT_DEVICE_TREE="tegra30-beaver"
+CONFIG_CMD_NET=y
diff --git a/configs/bf518f-ezbrd_defconfig b/configs/bf518f-ezbrd_defconfig
index 51f93f8..8406294 100644
--- a/configs/bf518f-ezbrd_defconfig
+++ b/configs/bf518f-ezbrd_defconfig
@@ -1,5 +1,5 @@
CONFIG_BLACKFIN=y
-CONFIG_NET=y
CONFIG_TARGET_BF518F_EZBRD=y
+CONFIG_CMD_NET=y
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED=y
diff --git a/configs/bf526-ezbrd_defconfig b/configs/bf526-ezbrd_defconfig
index 245faac..f557db0 100644
--- a/configs/bf526-ezbrd_defconfig
+++ b/configs/bf526-ezbrd_defconfig
@@ -1,5 +1,5 @@
CONFIG_BLACKFIN=y
-CONFIG_NET=y
CONFIG_TARGET_BF526_EZBRD=y
+CONFIG_CMD_NET=y
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED=y
diff --git a/configs/bf527-ezkit-v2_defconfig b/configs/bf527-ezkit-v2_defconfig
index 3dd8013..f963502 100644
--- a/configs/bf527-ezkit-v2_defconfig
+++ b/configs/bf527-ezkit-v2_defconfig
@@ -1,4 +1,5 @@
CONFIG_BLACKFIN=y
CONFIG_TARGET_BF527_EZKIT=y
CONFIG_SYS_EXTRA_OPTIONS="BF527_EZKIT_REV_2_1"
+CONFIG_CMD_NET=y
CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED=y
diff --git a/configs/bf527-ezkit_defconfig b/configs/bf527-ezkit_defconfig
index 0451c64..25ef5a9 100644
--- a/configs/bf527-ezkit_defconfig
+++ b/configs/bf527-ezkit_defconfig
@@ -1,5 +1,5 @@
CONFIG_BLACKFIN=y
-CONFIG_NET=y
CONFIG_TARGET_BF527_EZKIT=y
+CONFIG_CMD_NET=y
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED=y
diff --git a/configs/bf533-ezkit_defconfig b/configs/bf533-ezkit_defconfig
index 57f8da1..66c1145 100644
--- a/configs/bf533-ezkit_defconfig
+++ b/configs/bf533-ezkit_defconfig
@@ -1,3 +1,4 @@
CONFIG_BLACKFIN=y
CONFIG_TARGET_BF533_EZKIT=y
+CONFIG_CMD_NET=y
CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED=y
diff --git a/configs/bf533-stamp_defconfig b/configs/bf533-stamp_defconfig
index 1bcf3d3..ca1202d 100644
--- a/configs/bf533-stamp_defconfig
+++ b/configs/bf533-stamp_defconfig
@@ -1,3 +1,4 @@
CONFIG_BLACKFIN=y
CONFIG_TARGET_BF533_STAMP=y
+CONFIG_CMD_NET=y
CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED=y
diff --git a/configs/bf537-minotaur_defconfig b/configs/bf537-minotaur_defconfig
index 1f398a0..8e4ea92 100644
--- a/configs/bf537-minotaur_defconfig
+++ b/configs/bf537-minotaur_defconfig
@@ -1,4 +1,4 @@
CONFIG_BLACKFIN=y
-CONFIG_NET=y
CONFIG_TARGET_BF537_MINOTAUR=y
+CONFIG_CMD_NET=y
CONFIG_NET_RANDOM_ETHADDR=y
diff --git a/configs/bf537-pnav_defconfig b/configs/bf537-pnav_defconfig
index 6372258..405471f 100644
--- a/configs/bf537-pnav_defconfig
+++ b/configs/bf537-pnav_defconfig
@@ -1,4 +1,4 @@
CONFIG_BLACKFIN=y
-CONFIG_NET=y
CONFIG_TARGET_BF537_PNAV=y
+CONFIG_CMD_NET=y
CONFIG_NET_RANDOM_ETHADDR=y
diff --git a/configs/bf537-srv1_defconfig b/configs/bf537-srv1_defconfig
index f007c82..19d6832 100644
--- a/configs/bf537-srv1_defconfig
+++ b/configs/bf537-srv1_defconfig
@@ -1,4 +1,4 @@
CONFIG_BLACKFIN=y
-CONFIG_NET=y
CONFIG_TARGET_BF537_SRV1=y
+CONFIG_CMD_NET=y
CONFIG_NET_RANDOM_ETHADDR=y
diff --git a/configs/bf537-stamp_defconfig b/configs/bf537-stamp_defconfig
index 50483b1..753bbc4 100644
--- a/configs/bf537-stamp_defconfig
+++ b/configs/bf537-stamp_defconfig
@@ -1,5 +1,5 @@
CONFIG_BLACKFIN=y
-CONFIG_NET=y
CONFIG_TARGET_BF537_STAMP=y
+CONFIG_CMD_NET=y
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED=y
diff --git a/configs/bf538f-ezkit_defconfig b/configs/bf538f-ezkit_defconfig
index 1892151..84449ec 100644
--- a/configs/bf538f-ezkit_defconfig
+++ b/configs/bf538f-ezkit_defconfig
@@ -1,3 +1,4 @@
CONFIG_BLACKFIN=y
CONFIG_TARGET_BF538F_EZKIT=y
+CONFIG_CMD_NET=y
CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED=y
diff --git a/configs/bf548-ezkit_defconfig b/configs/bf548-ezkit_defconfig
index 5236984..46c8fe2 100644
--- a/configs/bf548-ezkit_defconfig
+++ b/configs/bf548-ezkit_defconfig
@@ -1,3 +1,4 @@
CONFIG_BLACKFIN=y
CONFIG_TARGET_BF548_EZKIT=y
+CONFIG_CMD_NET=y
CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED=y
diff --git a/configs/bf561-acvilon_defconfig b/configs/bf561-acvilon_defconfig
index 098f31f..b558066 100644
--- a/configs/bf561-acvilon_defconfig
+++ b/configs/bf561-acvilon_defconfig
@@ -1,3 +1,4 @@
CONFIG_BLACKFIN=y
CONFIG_TARGET_BF561_ACVILON=y
+CONFIG_CMD_NET=y
CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED=y
diff --git a/configs/bf561-ezkit_defconfig b/configs/bf561-ezkit_defconfig
index 5665288..0ef1a1c 100644
--- a/configs/bf561-ezkit_defconfig
+++ b/configs/bf561-ezkit_defconfig
@@ -1,3 +1,4 @@
CONFIG_BLACKFIN=y
CONFIG_TARGET_BF561_EZKIT=y
+CONFIG_CMD_NET=y
CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED=y
diff --git a/configs/bf609-ezkit_defconfig b/configs/bf609-ezkit_defconfig
index d947a09..72e0606 100644
--- a/configs/bf609-ezkit_defconfig
+++ b/configs/bf609-ezkit_defconfig
@@ -1,5 +1,5 @@
CONFIG_BLACKFIN=y
-CONFIG_NET=y
CONFIG_NETDEVICES=y
CONFIG_TARGET_BF609_EZKIT=y
+CONFIG_CMD_NET=y
CONFIG_ETH_DESIGNWARE=y
diff --git a/configs/bg0900_defconfig b/configs/bg0900_defconfig
index 27c6e11..3e57959 100644
--- a/configs/bg0900_defconfig
+++ b/configs/bg0900_defconfig
@@ -1,3 +1,5 @@
CONFIG_ARM=y
CONFIG_TARGET_BG0900=y
CONFIG_SPL=y
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/birdland_bav335a_defconfig b/configs/birdland_bav335a_defconfig
index 43a4206..4d79c79 100644
--- a/configs/birdland_bav335a_defconfig
+++ b/configs/birdland_bav335a_defconfig
@@ -3,3 +3,4 @@
CONFIG_BAV_VERSION=1
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="SERIAL1,CONS_INDEX=1"
+CONFIG_CMD_NET=y
diff --git a/configs/birdland_bav335b_defconfig b/configs/birdland_bav335b_defconfig
index 7206e8e..f8745ee 100644
--- a/configs/birdland_bav335b_defconfig
+++ b/configs/birdland_bav335b_defconfig
@@ -3,3 +3,4 @@
CONFIG_BAV_VERSION=2
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="SERIAL1,CONS_INDEX=1"
+CONFIG_CMD_NET=y
diff --git a/configs/blackstamp_defconfig b/configs/blackstamp_defconfig
index d531ffc..c19a8f0 100644
--- a/configs/blackstamp_defconfig
+++ b/configs/blackstamp_defconfig
@@ -1,2 +1,3 @@
CONFIG_BLACKFIN=y
CONFIG_TARGET_BLACKSTAMP=y
+CONFIG_CMD_NET=y
diff --git a/configs/blackvme_defconfig b/configs/blackvme_defconfig
index 1ec2fa9..93b5ce5 100644
--- a/configs/blackvme_defconfig
+++ b/configs/blackvme_defconfig
@@ -1,2 +1,3 @@
CONFIG_BLACKFIN=y
CONFIG_TARGET_BLACKVME=y
+CONFIG_CMD_NET=y
diff --git a/configs/br4_defconfig b/configs/br4_defconfig
index 5655d54..e6970a4 100644
--- a/configs/br4_defconfig
+++ b/configs/br4_defconfig
@@ -1,3 +1,4 @@
CONFIG_BLACKFIN=y
CONFIG_TARGET_BR4=y
+CONFIG_CMD_NET=y
CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED=y
diff --git a/configs/bubinga_defconfig b/configs/bubinga_defconfig
index 532448d..3b15eaa 100644
--- a/configs/bubinga_defconfig
+++ b/configs/bubinga_defconfig
@@ -1,4 +1,5 @@
CONFIG_PPC=y
CONFIG_4xx=y
CONFIG_TARGET_BUBINGA=y
-CONFIG_REGEX=y
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/caddy2_defconfig b/configs/caddy2_defconfig
index bdce6aa..ccc27c2 100644
--- a/configs/caddy2_defconfig
+++ b/configs/caddy2_defconfig
@@ -2,3 +2,4 @@
CONFIG_MPC83xx=y
CONFIG_TARGET_VME8349=y
CONFIG_SYS_EXTRA_OPTIONS="CADDY2"
+CONFIG_CMD_NET=y
diff --git a/configs/cairo_defconfig b/configs/cairo_defconfig
index c9d2917..d2d47ae 100644
--- a/configs/cairo_defconfig
+++ b/configs/cairo_defconfig
@@ -2,3 +2,4 @@
CONFIG_OMAP34XX=y
CONFIG_TARGET_OMAP3_CAIRO=y
CONFIG_SPL=y
+CONFIG_CMD_SETEXPR=y
diff --git a/configs/calimain_defconfig b/configs/calimain_defconfig
index 02d3912..a601b03 100644
--- a/configs/calimain_defconfig
+++ b/configs/calimain_defconfig
@@ -1,3 +1,4 @@
CONFIG_ARM=y
CONFIG_ARCH_DAVINCI=y
CONFIG_TARGET_CALIMAIN=y
+CONFIG_CMD_NET=y
diff --git a/configs/cam5200_defconfig b/configs/cam5200_defconfig
index 33db80b..e1796e3 100644
--- a/configs/cam5200_defconfig
+++ b/configs/cam5200_defconfig
@@ -2,3 +2,4 @@
CONFIG_MPC5xxx=y
CONFIG_TARGET_TQM5200=y
CONFIG_SYS_EXTRA_OPTIONS="CAM5200,TQM5200S,TQM5200_B"
+CONFIG_CMD_NET=y
diff --git a/configs/cam5200_niosflash_defconfig b/configs/cam5200_niosflash_defconfig
index c13b9bf..c382486 100644
--- a/configs/cam5200_niosflash_defconfig
+++ b/configs/cam5200_niosflash_defconfig
@@ -2,3 +2,4 @@
CONFIG_MPC5xxx=y
CONFIG_TARGET_TQM5200=y
CONFIG_SYS_EXTRA_OPTIONS="CAM5200,TQM5200S,TQM5200_B,CAM5200_NIOSFLASH"
+CONFIG_CMD_NET=y
diff --git a/configs/cam_enc_4xx_defconfig b/configs/cam_enc_4xx_defconfig
index 89bffa0..261f155 100644
--- a/configs/cam_enc_4xx_defconfig
+++ b/configs/cam_enc_4xx_defconfig
@@ -2,3 +2,4 @@
CONFIG_ARCH_DAVINCI=y
CONFIG_TARGET_CAM_ENC_4XX=y
CONFIG_SPL=y
+CONFIG_CMD_NET=y
diff --git a/configs/canmb_defconfig b/configs/canmb_defconfig
index 86ffbd2..c005299 100644
--- a/configs/canmb_defconfig
+++ b/configs/canmb_defconfig
@@ -1,3 +1,4 @@
CONFIG_PPC=y
CONFIG_MPC5xxx=y
CONFIG_TARGET_CANMB=y
+CONFIG_CMD_NET=y
diff --git a/configs/canyonlands_defconfig b/configs/canyonlands_defconfig
index e936d7b..12d3352 100644
--- a/configs/canyonlands_defconfig
+++ b/configs/canyonlands_defconfig
@@ -3,6 +3,7 @@
CONFIG_TARGET_CANYONLANDS=y
CONFIG_CANYONLANDS=y
CONFIG_DEFAULT_DEVICE_TREE="canyonlands"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
CONFIG_OF_CONTROL=y
CONFIG_OF_EMBED=y
-CONFIG_REGEX=y
diff --git a/configs/cardhu_defconfig b/configs/cardhu_defconfig
index 1a9c12e..3f14178 100644
--- a/configs/cardhu_defconfig
+++ b/configs/cardhu_defconfig
@@ -3,3 +3,4 @@
CONFIG_TEGRA30=y
CONFIG_TARGET_CARDHU=y
CONFIG_DEFAULT_DEVICE_TREE="tegra30-cardhu"
+CONFIG_CMD_NET=y
diff --git a/configs/cgtqmx6qeval_defconfig b/configs/cgtqmx6qeval_defconfig
index 5a20f22..58b98b7 100644
--- a/configs/cgtqmx6qeval_defconfig
+++ b/configs/cgtqmx6qeval_defconfig
@@ -1,3 +1,4 @@
CONFIG_ARM=y
CONFIG_TARGET_CGTQMX6EVAL=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/congatec/cgtqmx6eval/imximage.cfg,MX6Q"
+CONFIG_CMD_NET=y
diff --git a/configs/charon_defconfig b/configs/charon_defconfig
index 1dd3f5d..250e949 100644
--- a/configs/charon_defconfig
+++ b/configs/charon_defconfig
@@ -1,3 +1,4 @@
CONFIG_PPC=y
CONFIG_MPC5xxx=y
CONFIG_TARGET_CHARON=y
+CONFIG_CMD_NET=y
diff --git a/configs/chromebook_link_defconfig b/configs/chromebook_link_defconfig
index 3d2bdf6..4f7f779 100644
--- a/configs/chromebook_link_defconfig
+++ b/configs/chromebook_link_defconfig
@@ -5,6 +5,7 @@
CONFIG_HAVE_MRC=y
CONFIG_FRAMEBUFFER_SET_VESA_MODE=y
CONFIG_FRAMEBUFFER_VESA_MODE_11A=y
+CONFIG_CMD_NET=y
CONFIG_OF_CONTROL=y
CONFIG_DM_PCI=y
CONFIG_VIDEO_VESA=y
diff --git a/configs/chromebox_panther_defconfig b/configs/chromebox_panther_defconfig
index 4bbce09..941033f 100644
--- a/configs/chromebox_panther_defconfig
+++ b/configs/chromebox_panther_defconfig
@@ -5,6 +5,7 @@
CONFIG_HAVE_MRC=y
CONFIG_FRAMEBUFFER_SET_VESA_MODE=y
CONFIG_FRAMEBUFFER_VESA_MODE_11A=y
+CONFIG_CMD_NET=y
CONFIG_OF_CONTROL=y
CONFIG_DM_PCI=y
CONFIG_VIDEO_VESA=y
diff --git a/configs/cm-bf527_defconfig b/configs/cm-bf527_defconfig
index 5bceb17..1394c5a 100644
--- a/configs/cm-bf527_defconfig
+++ b/configs/cm-bf527_defconfig
@@ -1,5 +1,5 @@
CONFIG_BLACKFIN=y
-CONFIG_NET=y
CONFIG_TARGET_CM_BF527=y
+CONFIG_CMD_NET=y
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED=y
diff --git a/configs/cm-bf533_defconfig b/configs/cm-bf533_defconfig
index b9508ae..42d568e 100644
--- a/configs/cm-bf533_defconfig
+++ b/configs/cm-bf533_defconfig
@@ -1,3 +1,4 @@
CONFIG_BLACKFIN=y
CONFIG_TARGET_CM_BF533=y
+CONFIG_CMD_NET=y
CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED=y
diff --git a/configs/cm-bf537e_defconfig b/configs/cm-bf537e_defconfig
index fd9dd00..0264d2f 100644
--- a/configs/cm-bf537e_defconfig
+++ b/configs/cm-bf537e_defconfig
@@ -1,5 +1,5 @@
CONFIG_BLACKFIN=y
-CONFIG_NET=y
CONFIG_TARGET_CM_BF537E=y
+CONFIG_CMD_NET=y
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED=y
diff --git a/configs/cm-bf537u_defconfig b/configs/cm-bf537u_defconfig
index 4a8f123..90f5066 100644
--- a/configs/cm-bf537u_defconfig
+++ b/configs/cm-bf537u_defconfig
@@ -1,5 +1,5 @@
CONFIG_BLACKFIN=y
-CONFIG_NET=y
CONFIG_TARGET_CM_BF537U=y
+CONFIG_CMD_NET=y
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED=y
diff --git a/configs/cm-bf548_defconfig b/configs/cm-bf548_defconfig
index 525f2e7..906a9bd 100644
--- a/configs/cm-bf548_defconfig
+++ b/configs/cm-bf548_defconfig
@@ -1,3 +1,4 @@
CONFIG_BLACKFIN=y
CONFIG_TARGET_CM_BF548=y
+CONFIG_CMD_NET=y
CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED=y
diff --git a/configs/cm-bf561_defconfig b/configs/cm-bf561_defconfig
index 062bfeb..023cc65 100644
--- a/configs/cm-bf561_defconfig
+++ b/configs/cm-bf561_defconfig
@@ -1,3 +1,4 @@
CONFIG_BLACKFIN=y
CONFIG_TARGET_CM_BF561=y
+CONFIG_CMD_NET=y
CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED=y
diff --git a/configs/cm5200_defconfig b/configs/cm5200_defconfig
index 8f5dd3c..5a44476 100644
--- a/configs/cm5200_defconfig
+++ b/configs/cm5200_defconfig
@@ -1,3 +1,4 @@
CONFIG_PPC=y
CONFIG_MPC5xxx=y
CONFIG_TARGET_CM5200=y
+CONFIG_CMD_NET=y
diff --git a/configs/cm_fx6_defconfig b/configs/cm_fx6_defconfig
index 18a7157..4db785d 100644
--- a/configs/cm_fx6_defconfig
+++ b/configs/cm_fx6_defconfig
@@ -2,3 +2,4 @@
CONFIG_TARGET_CM_FX6=y
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/imx-common/spl_sd.cfg,MX6QDL,SPL"
+CONFIG_CMD_NET=y
diff --git a/configs/cm_t335_defconfig b/configs/cm_t335_defconfig
index a694bb5..b390079 100644
--- a/configs/cm_t335_defconfig
+++ b/configs/cm_t335_defconfig
@@ -1,3 +1,4 @@
CONFIG_ARM=y
CONFIG_TARGET_CM_T335=y
CONFIG_SPL=y
+CONFIG_CMD_NET=y
diff --git a/configs/cm_t3517_defconfig b/configs/cm_t3517_defconfig
index da18e5f..c3d02e5 100644
--- a/configs/cm_t3517_defconfig
+++ b/configs/cm_t3517_defconfig
@@ -1,3 +1,4 @@
CONFIG_ARM=y
CONFIG_OMAP34XX=y
CONFIG_TARGET_CM_T3517=y
+CONFIG_CMD_NET=y
diff --git a/configs/cm_t35_defconfig b/configs/cm_t35_defconfig
index a4e0daa..bbc60ff 100644
--- a/configs/cm_t35_defconfig
+++ b/configs/cm_t35_defconfig
@@ -2,3 +2,4 @@
CONFIG_OMAP34XX=y
CONFIG_TARGET_CM_T35=y
CONFIG_SPL=y
+CONFIG_CMD_NET=y
diff --git a/configs/cm_t54_defconfig b/configs/cm_t54_defconfig
index aa7eedb..762a216 100644
--- a/configs/cm_t54_defconfig
+++ b/configs/cm_t54_defconfig
@@ -2,3 +2,4 @@
CONFIG_OMAP54XX=y
CONFIG_TARGET_CM_T54=y
CONFIG_SPL=y
+CONFIG_CMD_NET=y
diff --git a/configs/cobra5272_defconfig b/configs/cobra5272_defconfig
index dc1552d..007e30b 100644
--- a/configs/cobra5272_defconfig
+++ b/configs/cobra5272_defconfig
@@ -1,2 +1,3 @@
CONFIG_M68K=y
CONFIG_TARGET_COBRA5272=y
+CONFIG_CMD_NET=y
diff --git a/configs/colibri_pxa270_defconfig b/configs/colibri_pxa270_defconfig
index c8faf0b..de2ad14 100644
--- a/configs/colibri_pxa270_defconfig
+++ b/configs/colibri_pxa270_defconfig
@@ -1,2 +1,3 @@
CONFIG_ARM=y
CONFIG_TARGET_COLIBRI_PXA270=y
+CONFIG_CMD_NET=y
diff --git a/configs/colibri_t20_defconfig b/configs/colibri_t20_defconfig
index 8987567..292eccb 100644
--- a/configs/colibri_t20_defconfig
+++ b/configs/colibri_t20_defconfig
@@ -3,3 +3,5 @@
CONFIG_TEGRA20=y
CONFIG_TARGET_COLIBRI_T20=y
CONFIG_DEFAULT_DEVICE_TREE="tegra20-colibri"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/colibri_t30_defconfig b/configs/colibri_t30_defconfig
index 4e41143..54d73a2 100644
--- a/configs/colibri_t30_defconfig
+++ b/configs/colibri_t30_defconfig
@@ -3,3 +3,5 @@
CONFIG_TEGRA30=y
CONFIG_TARGET_COLIBRI_T30=y
CONFIG_DEFAULT_DEVICE_TREE="tegra30-colibri"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/colibri_vf_defconfig b/configs/colibri_vf_defconfig
index 0715267..5d4f307 100644
--- a/configs/colibri_vf_defconfig
+++ b/configs/colibri_vf_defconfig
@@ -1,6 +1,7 @@
CONFIG_ARM=y
CONFIG_TARGET_COLIBRI_VF=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/toradex/colibri_vf/imximage.cfg,ENV_IS_IN_NAND,IMX_NAND"
+CONFIG_CMD_NET=y
CONFIG_NAND_VF610_NFC=y
CONFIG_SYS_NAND_VF610_NFC_60_ECC_BYTES=y
CONFIG_DM=y
diff --git a/configs/controlcenterd_36BIT_SDCARD_DEVELOP_defconfig b/configs/controlcenterd_36BIT_SDCARD_DEVELOP_defconfig
index 2943298..63b24c0 100644
--- a/configs/controlcenterd_36BIT_SDCARD_DEVELOP_defconfig
+++ b/configs/controlcenterd_36BIT_SDCARD_DEVELOP_defconfig
@@ -2,3 +2,5 @@
CONFIG_MPC85xx=y
CONFIG_TARGET_CONTROLCENTERD=y
CONFIG_SYS_EXTRA_OPTIONS="36BIT,SDCARD,DEVELOP"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/controlcenterd_36BIT_SDCARD_defconfig b/configs/controlcenterd_36BIT_SDCARD_defconfig
index 1c18315..ef64586 100644
--- a/configs/controlcenterd_36BIT_SDCARD_defconfig
+++ b/configs/controlcenterd_36BIT_SDCARD_defconfig
@@ -2,3 +2,5 @@
CONFIG_MPC85xx=y
CONFIG_TARGET_CONTROLCENTERD=y
CONFIG_SYS_EXTRA_OPTIONS="36BIT,SDCARD"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/controlcenterd_TRAILBLAZER_DEVELOP_defconfig b/configs/controlcenterd_TRAILBLAZER_DEVELOP_defconfig
index bfd6449..f61fcf8 100644
--- a/configs/controlcenterd_TRAILBLAZER_DEVELOP_defconfig
+++ b/configs/controlcenterd_TRAILBLAZER_DEVELOP_defconfig
@@ -3,3 +3,4 @@
CONFIG_TARGET_CONTROLCENTERD=y
CONFIG_SYS_EXTRA_OPTIONS="TRAILBLAZER,SPIFLASH,DEVELOP"
# CONFIG_CMD_BOOTM is not set
+CONFIG_CMD_NET=y
diff --git a/configs/controlcenterd_TRAILBLAZER_defconfig b/configs/controlcenterd_TRAILBLAZER_defconfig
index 17ee3a8..4fc8b04 100644
--- a/configs/controlcenterd_TRAILBLAZER_defconfig
+++ b/configs/controlcenterd_TRAILBLAZER_defconfig
@@ -3,3 +3,4 @@
CONFIG_TARGET_CONTROLCENTERD=y
CONFIG_SYS_EXTRA_OPTIONS="TRAILBLAZER,SPIFLASH"
# CONFIG_CMD_BOOTM is not set
+CONFIG_CMD_NET=y
diff --git a/configs/coreboot-x86_defconfig b/configs/coreboot-x86_defconfig
index 66f94d0..97ac1fa 100644
--- a/configs/coreboot-x86_defconfig
+++ b/configs/coreboot-x86_defconfig
@@ -1,4 +1,7 @@
CONFIG_X86=y
+CONFIG_VENDOR_COREBOOT=y
CONFIG_TARGET_COREBOOT=y
+CONFIG_CMD_NET=y
CONFIG_OF_CONTROL=y
CONFIG_DM_PCI=y
+CONFIG_TSC_CALIBRATION_BYPASS=y
diff --git a/configs/corvus_defconfig b/configs/corvus_defconfig
index 06e5a28..eb11174 100644
--- a/configs/corvus_defconfig
+++ b/configs/corvus_defconfig
@@ -3,3 +3,4 @@
CONFIG_TARGET_CORVUS=y
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9M10G45,MACH_TYPE=2066,SYS_USE_NANDFLASH"
+CONFIG_CMD_NET=y
diff --git a/configs/cpu9260_128M_defconfig b/configs/cpu9260_128M_defconfig
index e59356c..7e93b3e 100644
--- a/configs/cpu9260_128M_defconfig
+++ b/configs/cpu9260_128M_defconfig
@@ -2,3 +2,4 @@
CONFIG_ARCH_AT91=y
CONFIG_TARGET_CPU9260=y
CONFIG_SYS_EXTRA_OPTIONS="CPU9260,CPU9260_128M"
+CONFIG_CMD_NET=y
diff --git a/configs/cpu9260_defconfig b/configs/cpu9260_defconfig
index 8b6c543..a1f4398 100644
--- a/configs/cpu9260_defconfig
+++ b/configs/cpu9260_defconfig
@@ -2,3 +2,4 @@
CONFIG_ARCH_AT91=y
CONFIG_TARGET_CPU9260=y
CONFIG_SYS_EXTRA_OPTIONS="CPU9260"
+CONFIG_CMD_NET=y
diff --git a/configs/cpu9260_nand_128M_defconfig b/configs/cpu9260_nand_128M_defconfig
index 47f885b..135e1fa 100644
--- a/configs/cpu9260_nand_128M_defconfig
+++ b/configs/cpu9260_nand_128M_defconfig
@@ -2,3 +2,4 @@
CONFIG_ARCH_AT91=y
CONFIG_TARGET_CPU9260=y
CONFIG_SYS_EXTRA_OPTIONS="CPU9260,CPU9260_128M,NANDBOOT"
+CONFIG_CMD_NET=y
diff --git a/configs/cpu9260_nand_defconfig b/configs/cpu9260_nand_defconfig
index c6ff773..4aadb29 100644
--- a/configs/cpu9260_nand_defconfig
+++ b/configs/cpu9260_nand_defconfig
@@ -2,3 +2,4 @@
CONFIG_ARCH_AT91=y
CONFIG_TARGET_CPU9260=y
CONFIG_SYS_EXTRA_OPTIONS="CPU9260,NANDBOOT"
+CONFIG_CMD_NET=y
diff --git a/configs/cpu9G20_128M_defconfig b/configs/cpu9G20_128M_defconfig
index aa6a335..aa95f79 100644
--- a/configs/cpu9G20_128M_defconfig
+++ b/configs/cpu9G20_128M_defconfig
@@ -2,3 +2,4 @@
CONFIG_ARCH_AT91=y
CONFIG_TARGET_CPU9260=y
CONFIG_SYS_EXTRA_OPTIONS="CPU9G20,CPU9G20_128M"
+CONFIG_CMD_NET=y
diff --git a/configs/cpu9G20_defconfig b/configs/cpu9G20_defconfig
index b63841f..a13f6cb 100644
--- a/configs/cpu9G20_defconfig
+++ b/configs/cpu9G20_defconfig
@@ -2,3 +2,4 @@
CONFIG_ARCH_AT91=y
CONFIG_TARGET_CPU9260=y
CONFIG_SYS_EXTRA_OPTIONS="CPU9G20"
+CONFIG_CMD_NET=y
diff --git a/configs/cpu9G20_nand_128M_defconfig b/configs/cpu9G20_nand_128M_defconfig
index 2871f31..a7d473e 100644
--- a/configs/cpu9G20_nand_128M_defconfig
+++ b/configs/cpu9G20_nand_128M_defconfig
@@ -2,3 +2,4 @@
CONFIG_ARCH_AT91=y
CONFIG_TARGET_CPU9260=y
CONFIG_SYS_EXTRA_OPTIONS="CPU9G20,CPU9G20_128M,NANDBOOT"
+CONFIG_CMD_NET=y
diff --git a/configs/cpu9G20_nand_defconfig b/configs/cpu9G20_nand_defconfig
index b0ef7d4..d021c8d 100644
--- a/configs/cpu9G20_nand_defconfig
+++ b/configs/cpu9G20_nand_defconfig
@@ -2,3 +2,4 @@
CONFIG_ARCH_AT91=y
CONFIG_TARGET_CPU9260=y
CONFIG_SYS_EXTRA_OPTIONS="CPU9G20,NANDBOOT"
+CONFIG_CMD_NET=y
diff --git a/configs/cpuat91_defconfig b/configs/cpuat91_defconfig
index 5a1ef3a..7a87f4a 100644
--- a/configs/cpuat91_defconfig
+++ b/configs/cpuat91_defconfig
@@ -1,3 +1,4 @@
CONFIG_ARM=y
CONFIG_ARCH_AT91=y
CONFIG_TARGET_CPUAT91=y
+CONFIG_CMD_NET=y
diff --git a/configs/cpuat91_ram_defconfig b/configs/cpuat91_ram_defconfig
index 408ef62..7b92ed6 100644
--- a/configs/cpuat91_ram_defconfig
+++ b/configs/cpuat91_ram_defconfig
@@ -2,3 +2,4 @@
CONFIG_ARCH_AT91=y
CONFIG_TARGET_CPUAT91=y
CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT"
+CONFIG_CMD_NET=y
diff --git a/configs/crownbay_defconfig b/configs/crownbay_defconfig
index 9804ea7..d3a370d 100644
--- a/configs/crownbay_defconfig
+++ b/configs/crownbay_defconfig
@@ -3,4 +3,5 @@
CONFIG_DEFAULT_DEVICE_TREE="crownbay"
CONFIG_TARGET_CROWNBAY=y
CONFIG_GENERATE_PIRQ_TABLE=y
+CONFIG_CMD_NET=y
CONFIG_OF_CONTROL=y
diff --git a/configs/csb272_defconfig b/configs/csb272_defconfig
index 8ccd645..5ac3c19 100644
--- a/configs/csb272_defconfig
+++ b/configs/csb272_defconfig
@@ -1,3 +1,4 @@
CONFIG_PPC=y
CONFIG_4xx=y
CONFIG_TARGET_CSB272=y
+CONFIG_CMD_NET=y
diff --git a/configs/csb472_defconfig b/configs/csb472_defconfig
index 81a0cf1..7c43e57 100644
--- a/configs/csb472_defconfig
+++ b/configs/csb472_defconfig
@@ -1,3 +1,4 @@
CONFIG_PPC=y
CONFIG_4xx=y
CONFIG_TARGET_CSB472=y
+CONFIG_CMD_NET=y
diff --git a/configs/d2net_v2_defconfig b/configs/d2net_v2_defconfig
index e54dcf4..a28032e 100644
--- a/configs/d2net_v2_defconfig
+++ b/configs/d2net_v2_defconfig
@@ -2,3 +2,4 @@
CONFIG_KIRKWOOD=y
CONFIG_TARGET_NET2BIG_V2=y
CONFIG_SYS_EXTRA_OPTIONS="D2NET_V2"
+CONFIG_CMD_NET=y
diff --git a/configs/da830evm_defconfig b/configs/da830evm_defconfig
index d27cdb0..846b75c 100644
--- a/configs/da830evm_defconfig
+++ b/configs/da830evm_defconfig
@@ -1,3 +1,4 @@
CONFIG_ARM=y
CONFIG_ARCH_DAVINCI=y
CONFIG_TARGET_DA830EVM=y
+CONFIG_CMD_NET=y
diff --git a/configs/da850_am18xxevm_defconfig b/configs/da850_am18xxevm_defconfig
index 092696e..b3def20 100644
--- a/configs/da850_am18xxevm_defconfig
+++ b/configs/da850_am18xxevm_defconfig
@@ -3,3 +3,4 @@
CONFIG_TARGET_DA850EVM=y
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="DA850_AM18X_EVM,MAC_ADDR_IN_EEPROM,SYS_I2C_EEPROM_ADDR_LEN=2,SYS_I2C_EEPROM_ADDR=0x50"
+CONFIG_CMD_NET=y
diff --git a/configs/da850evm_defconfig b/configs/da850evm_defconfig
index f3e3e9a..e012763 100644
--- a/configs/da850evm_defconfig
+++ b/configs/da850evm_defconfig
@@ -3,3 +3,4 @@
CONFIG_TARGET_DA850EVM=y
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="MAC_ADDR_IN_SPIFLASH"
+CONFIG_CMD_NET=y
diff --git a/configs/da850evm_direct_nor_defconfig b/configs/da850evm_direct_nor_defconfig
index 24148da..22afff5 100644
--- a/configs/da850evm_direct_nor_defconfig
+++ b/configs/da850evm_direct_nor_defconfig
@@ -2,3 +2,4 @@
CONFIG_ARCH_DAVINCI=y
CONFIG_TARGET_DA850EVM=y
CONFIG_SYS_EXTRA_OPTIONS="MAC_ADDR_IN_SPIFLASH,USE_NOR,DIRECT_NOR_BOOT"
+CONFIG_CMD_NET=y
diff --git a/configs/dalmore_defconfig b/configs/dalmore_defconfig
index 1beff84..67b8c9a 100644
--- a/configs/dalmore_defconfig
+++ b/configs/dalmore_defconfig
@@ -3,3 +3,4 @@
CONFIG_TEGRA114=y
CONFIG_TARGET_DALMORE=y
CONFIG_DEFAULT_DEVICE_TREE="tegra114-dalmore"
+CONFIG_CMD_NET=y
diff --git a/configs/davinci_dm355evm_defconfig b/configs/davinci_dm355evm_defconfig
index d3a03b2..874decb 100644
--- a/configs/davinci_dm355evm_defconfig
+++ b/configs/davinci_dm355evm_defconfig
@@ -1,3 +1,4 @@
CONFIG_ARM=y
CONFIG_ARCH_DAVINCI=y
CONFIG_TARGET_DAVINCI_DM355EVM=y
+CONFIG_CMD_NET=y
diff --git a/configs/davinci_dm355leopard_defconfig b/configs/davinci_dm355leopard_defconfig
index 875c0b5..2655001 100644
--- a/configs/davinci_dm355leopard_defconfig
+++ b/configs/davinci_dm355leopard_defconfig
@@ -1,3 +1,4 @@
CONFIG_ARM=y
CONFIG_ARCH_DAVINCI=y
CONFIG_TARGET_DAVINCI_DM355LEOPARD=y
+CONFIG_CMD_NET=y
diff --git a/configs/davinci_dm365evm_defconfig b/configs/davinci_dm365evm_defconfig
index f841fd9..b7ccfae 100644
--- a/configs/davinci_dm365evm_defconfig
+++ b/configs/davinci_dm365evm_defconfig
@@ -1,3 +1,4 @@
CONFIG_ARM=y
CONFIG_ARCH_DAVINCI=y
CONFIG_TARGET_DAVINCI_DM365EVM=y
+CONFIG_CMD_NET=y
diff --git a/configs/davinci_dm6467Tevm_defconfig b/configs/davinci_dm6467Tevm_defconfig
index 5671c38..87bc077 100644
--- a/configs/davinci_dm6467Tevm_defconfig
+++ b/configs/davinci_dm6467Tevm_defconfig
@@ -2,3 +2,4 @@
CONFIG_ARCH_DAVINCI=y
CONFIG_TARGET_DAVINCI_DM6467EVM=y
CONFIG_SYS_EXTRA_OPTIONS="DAVINCI_DM6467TEVM,REFCLK_FREQ=33000000"
+CONFIG_CMD_NET=y
diff --git a/configs/davinci_dm6467evm_defconfig b/configs/davinci_dm6467evm_defconfig
index f9741a1..b7f94b2 100644
--- a/configs/davinci_dm6467evm_defconfig
+++ b/configs/davinci_dm6467evm_defconfig
@@ -2,3 +2,4 @@
CONFIG_ARCH_DAVINCI=y
CONFIG_TARGET_DAVINCI_DM6467EVM=y
CONFIG_SYS_EXTRA_OPTIONS="REFCLK_FREQ=27000000"
+CONFIG_CMD_NET=y
diff --git a/configs/davinci_dvevm_defconfig b/configs/davinci_dvevm_defconfig
index 74e55b9..0ef6645 100644
--- a/configs/davinci_dvevm_defconfig
+++ b/configs/davinci_dvevm_defconfig
@@ -1,3 +1,4 @@
CONFIG_ARM=y
CONFIG_ARCH_DAVINCI=y
CONFIG_TARGET_DAVINCI_DVEVM=y
+CONFIG_CMD_NET=y
diff --git a/configs/davinci_schmoogie_defconfig b/configs/davinci_schmoogie_defconfig
index 64ed2c1..ef7f8bb 100644
--- a/configs/davinci_schmoogie_defconfig
+++ b/configs/davinci_schmoogie_defconfig
@@ -1,3 +1,4 @@
CONFIG_ARM=y
CONFIG_ARCH_DAVINCI=y
CONFIG_TARGET_DAVINCI_SCHMOOGIE=y
+CONFIG_CMD_NET=y
diff --git a/configs/davinci_sffsdr_defconfig b/configs/davinci_sffsdr_defconfig
index 9eb0f07..4c1e411 100644
--- a/configs/davinci_sffsdr_defconfig
+++ b/configs/davinci_sffsdr_defconfig
@@ -1,3 +1,4 @@
CONFIG_ARM=y
CONFIG_ARCH_DAVINCI=y
CONFIG_TARGET_DAVINCI_SFFSDR=y
+CONFIG_CMD_NET=y
diff --git a/configs/davinci_sonata_defconfig b/configs/davinci_sonata_defconfig
index d8f0f77..dd90bc0 100644
--- a/configs/davinci_sonata_defconfig
+++ b/configs/davinci_sonata_defconfig
@@ -1,3 +1,4 @@
CONFIG_ARM=y
CONFIG_ARCH_DAVINCI=y
CONFIG_TARGET_DAVINCI_SONATA=y
+CONFIG_CMD_NET=y
diff --git a/configs/db-88f6820-gp_defconfig b/configs/db-88f6820-gp_defconfig
index 0d6f0de..5f53522 100644
--- a/configs/db-88f6820-gp_defconfig
+++ b/configs/db-88f6820-gp_defconfig
@@ -1,2 +1,3 @@
CONFIG_ARM=y
CONFIG_TARGET_DB_88F6820_GP=y
+CONFIG_CMD_NET=y
diff --git a/configs/db-mv784mp-gp_defconfig b/configs/db-mv784mp-gp_defconfig
index 07b9183..637694b 100644
--- a/configs/db-mv784mp-gp_defconfig
+++ b/configs/db-mv784mp-gp_defconfig
@@ -1,3 +1,4 @@
CONFIG_ARM=y
CONFIG_TARGET_DB_MV784MP_GP=y
CONFIG_SPL=y
+CONFIG_CMD_NET=y
diff --git a/configs/dbau1000_defconfig b/configs/dbau1000_defconfig
index 8692c0d..fb6c4af 100644
--- a/configs/dbau1000_defconfig
+++ b/configs/dbau1000_defconfig
@@ -1,3 +1,4 @@
CONFIG_MIPS=y
CONFIG_TARGET_DBAU1X00=y
CONFIG_SYS_EXTRA_OPTIONS="DBAU1000"
+CONFIG_CMD_NET=y
diff --git a/configs/dbau1100_defconfig b/configs/dbau1100_defconfig
index 9c16424..cda1332 100644
--- a/configs/dbau1100_defconfig
+++ b/configs/dbau1100_defconfig
@@ -1,3 +1,4 @@
CONFIG_MIPS=y
CONFIG_TARGET_DBAU1X00=y
CONFIG_DBAU1100=y
+CONFIG_CMD_NET=y
diff --git a/configs/dbau1500_defconfig b/configs/dbau1500_defconfig
index d665d8e..f6f2202 100644
--- a/configs/dbau1500_defconfig
+++ b/configs/dbau1500_defconfig
@@ -1,3 +1,4 @@
CONFIG_MIPS=y
CONFIG_TARGET_DBAU1X00=y
CONFIG_DBAU1500=y
+CONFIG_CMD_NET=y
diff --git a/configs/dbau1550_defconfig b/configs/dbau1550_defconfig
index f27fb23..85875a9 100644
--- a/configs/dbau1550_defconfig
+++ b/configs/dbau1550_defconfig
@@ -1,3 +1,4 @@
CONFIG_MIPS=y
CONFIG_TARGET_DBAU1X00=y
CONFIG_DBAU1550=y
+CONFIG_CMD_NET=y
diff --git a/configs/dbau1550_el_defconfig b/configs/dbau1550_el_defconfig
index 3b1d74d..5b22978 100644
--- a/configs/dbau1550_el_defconfig
+++ b/configs/dbau1550_el_defconfig
@@ -2,3 +2,4 @@
CONFIG_TARGET_DBAU1X00=y
CONFIG_DBAU1550=y
CONFIG_SYS_LITTLE_ENDIAN=y
+CONFIG_CMD_NET=y
diff --git a/configs/devconcenter_defconfig b/configs/devconcenter_defconfig
index ecf766e..99d57ea 100644
--- a/configs/devconcenter_defconfig
+++ b/configs/devconcenter_defconfig
@@ -2,3 +2,5 @@
CONFIG_4xx=y
CONFIG_TARGET_INTIP=y
CONFIG_SYS_EXTRA_OPTIONS="DEVCONCENTER"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/devkit3250_defconfig b/configs/devkit3250_defconfig
index ba990bc..3da2c61 100644
--- a/configs/devkit3250_defconfig
+++ b/configs/devkit3250_defconfig
@@ -1,2 +1,3 @@
CONFIG_ARM=y
CONFIG_TARGET_DEVKIT3250=y
+CONFIG_CMD_NET=y
diff --git a/configs/devkit8000_defconfig b/configs/devkit8000_defconfig
index 9f3bc18..f592124 100644
--- a/configs/devkit8000_defconfig
+++ b/configs/devkit8000_defconfig
@@ -2,3 +2,4 @@
CONFIG_OMAP34XX=y
CONFIG_TARGET_DEVKIT8000=y
CONFIG_SPL=y
+CONFIG_CMD_NET=y
diff --git a/configs/dig297_defconfig b/configs/dig297_defconfig
index 95bc353..a50ca2b 100644
--- a/configs/dig297_defconfig
+++ b/configs/dig297_defconfig
@@ -1,3 +1,4 @@
CONFIG_ARM=y
CONFIG_OMAP34XX=y
CONFIG_TARGET_DIG297=y
+CONFIG_CMD_NET=y
diff --git a/configs/digsy_mtc_RAMBOOT_defconfig b/configs/digsy_mtc_RAMBOOT_defconfig
index fa7fd06..daaf1dc 100644
--- a/configs/digsy_mtc_RAMBOOT_defconfig
+++ b/configs/digsy_mtc_RAMBOOT_defconfig
@@ -2,3 +2,4 @@
CONFIG_MPC5xxx=y
CONFIG_TARGET_DIGSY_MTC=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_TEXT_BASE=0x00100000"
+CONFIG_CMD_NET=y
diff --git a/configs/digsy_mtc_defconfig b/configs/digsy_mtc_defconfig
index 666c5c8..c1706d1 100644
--- a/configs/digsy_mtc_defconfig
+++ b/configs/digsy_mtc_defconfig
@@ -1,3 +1,4 @@
CONFIG_PPC=y
CONFIG_MPC5xxx=y
CONFIG_TARGET_DIGSY_MTC=y
+CONFIG_CMD_NET=y
diff --git a/configs/digsy_mtc_rev5_RAMBOOT_defconfig b/configs/digsy_mtc_rev5_RAMBOOT_defconfig
index be297fe..6a4869d 100644
--- a/configs/digsy_mtc_rev5_RAMBOOT_defconfig
+++ b/configs/digsy_mtc_rev5_RAMBOOT_defconfig
@@ -2,3 +2,4 @@
CONFIG_MPC5xxx=y
CONFIG_TARGET_DIGSY_MTC=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_TEXT_BASE=0x00100000,DIGSY_REV5"
+CONFIG_CMD_NET=y
diff --git a/configs/digsy_mtc_rev5_defconfig b/configs/digsy_mtc_rev5_defconfig
index 12f82da..9370fdd 100644
--- a/configs/digsy_mtc_rev5_defconfig
+++ b/configs/digsy_mtc_rev5_defconfig
@@ -2,3 +2,4 @@
CONFIG_MPC5xxx=y
CONFIG_TARGET_DIGSY_MTC=y
CONFIG_SYS_EXTRA_OPTIONS="DIGSY_REV5"
+CONFIG_CMD_NET=y
diff --git a/configs/dlvision-10g_defconfig b/configs/dlvision-10g_defconfig
index 2f508c3..b067c86 100644
--- a/configs/dlvision-10g_defconfig
+++ b/configs/dlvision-10g_defconfig
@@ -1,4 +1,5 @@
CONFIG_PPC=y
CONFIG_4xx=y
CONFIG_TARGET_DLVISION_10G=y
-CONFIG_REGEX=y
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/dlvision_defconfig b/configs/dlvision_defconfig
index 3149cb1..c381757 100644
--- a/configs/dlvision_defconfig
+++ b/configs/dlvision_defconfig
@@ -1,4 +1,5 @@
CONFIG_PPC=y
CONFIG_4xx=y
CONFIG_TARGET_DLVISION=y
-CONFIG_REGEX=y
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/dnp5370_defconfig b/configs/dnp5370_defconfig
index c7104ca..e8aba3d 100644
--- a/configs/dnp5370_defconfig
+++ b/configs/dnp5370_defconfig
@@ -1,4 +1,4 @@
CONFIG_BLACKFIN=y
-CONFIG_NET=y
CONFIG_TARGET_DNP5370=y
+CONFIG_CMD_NET=y
CONFIG_NET_RANDOM_ETHADDR=y
diff --git a/configs/dns325_defconfig b/configs/dns325_defconfig
index cc4a03b..8f50524 100644
--- a/configs/dns325_defconfig
+++ b/configs/dns325_defconfig
@@ -1,3 +1,4 @@
CONFIG_ARM=y
CONFIG_KIRKWOOD=y
CONFIG_TARGET_DNS325=y
+CONFIG_CMD_NET=y
diff --git a/configs/dockstar_defconfig b/configs/dockstar_defconfig
index b773cde..523a3ed 100644
--- a/configs/dockstar_defconfig
+++ b/configs/dockstar_defconfig
@@ -1,3 +1,4 @@
CONFIG_ARM=y
CONFIG_KIRKWOOD=y
CONFIG_TARGET_DOCKSTAR=y
+CONFIG_CMD_NET=y
diff --git a/configs/dra7xx_evm_defconfig b/configs/dra7xx_evm_defconfig
index 520f35f..682a6cc 100644
--- a/configs/dra7xx_evm_defconfig
+++ b/configs/dra7xx_evm_defconfig
@@ -3,3 +3,4 @@
CONFIG_TARGET_DRA7XX_EVM=y
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=1"
+CONFIG_CMD_NET=y
diff --git a/configs/dra7xx_evm_qspiboot_defconfig b/configs/dra7xx_evm_qspiboot_defconfig
index 04e0532..86dad88 100644
--- a/configs/dra7xx_evm_qspiboot_defconfig
+++ b/configs/dra7xx_evm_qspiboot_defconfig
@@ -3,3 +3,4 @@
CONFIG_TARGET_DRA7XX_EVM=y
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=1,QSPI_BOOT"
+CONFIG_CMD_NET=y
diff --git a/configs/dra7xx_evm_uart3_defconfig b/configs/dra7xx_evm_uart3_defconfig
index 32830fb..c4bd587 100644
--- a/configs/dra7xx_evm_uart3_defconfig
+++ b/configs/dra7xx_evm_uart3_defconfig
@@ -3,3 +3,4 @@
CONFIG_TARGET_DRA7XX_EVM=y
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=3,SPL_YMODEM_SUPPORT"
+CONFIG_CMD_NET=y
diff --git a/configs/draco_defconfig b/configs/draco_defconfig
index ebd6b08..4c514a3 100644
--- a/configs/draco_defconfig
+++ b/configs/draco_defconfig
@@ -1,3 +1,4 @@
CONFIG_ARM=y
CONFIG_TARGET_DRACO=y
CONFIG_SPL=y
+CONFIG_CMD_NET=y
diff --git a/configs/dreamplug_defconfig b/configs/dreamplug_defconfig
index 45113c8..0d0dfe9 100644
--- a/configs/dreamplug_defconfig
+++ b/configs/dreamplug_defconfig
@@ -1,3 +1,4 @@
CONFIG_ARM=y
CONFIG_KIRKWOOD=y
CONFIG_TARGET_DREAMPLUG=y
+CONFIG_CMD_NET=y
diff --git a/configs/duovero_defconfig b/configs/duovero_defconfig
index de89ec9..59863dd 100644
--- a/configs/duovero_defconfig
+++ b/configs/duovero_defconfig
@@ -2,3 +2,4 @@
CONFIG_OMAP44XX=y
CONFIG_TARGET_DUOVERO=y
CONFIG_SPL=y
+CONFIG_CMD_NET=y
diff --git a/configs/dxr2_defconfig b/configs/dxr2_defconfig
index c6530ed..c2a14b7 100644
--- a/configs/dxr2_defconfig
+++ b/configs/dxr2_defconfig
@@ -1,3 +1,4 @@
CONFIG_ARM=y
CONFIG_TARGET_DXR2=y
CONFIG_SPL=y
+CONFIG_CMD_NET=y
diff --git a/configs/ea20_defconfig b/configs/ea20_defconfig
index 93676cd..87c64fd 100644
--- a/configs/ea20_defconfig
+++ b/configs/ea20_defconfig
@@ -1,3 +1,4 @@
CONFIG_ARM=y
CONFIG_ARCH_DAVINCI=y
CONFIG_TARGET_EA20=y
+CONFIG_CMD_NET=y
diff --git a/configs/eb_cpu5282_defconfig b/configs/eb_cpu5282_defconfig
index 7c7f188..ed9c66a 100644
--- a/configs/eb_cpu5282_defconfig
+++ b/configs/eb_cpu5282_defconfig
@@ -1,3 +1,4 @@
CONFIG_M68K=y
CONFIG_TARGET_EB_CPU5282=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_TEXT_BASE=0xFF000000,SYS_MONITOR_BASE=0xFF000400"
+CONFIG_CMD_NET=y
diff --git a/configs/eb_cpu5282_internal_defconfig b/configs/eb_cpu5282_internal_defconfig
index 095d554..567f0b0 100644
--- a/configs/eb_cpu5282_internal_defconfig
+++ b/configs/eb_cpu5282_internal_defconfig
@@ -1,3 +1,4 @@
CONFIG_M68K=y
CONFIG_TARGET_EB_CPU5282=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_TEXT_BASE=0xF0000000,SYS_MONITOR_BASE=0xF0000418"
+CONFIG_CMD_NET=y
diff --git a/configs/eb_cpux9k2_defconfig b/configs/eb_cpux9k2_defconfig
index 257fee5..e7f62c7 100644
--- a/configs/eb_cpux9k2_defconfig
+++ b/configs/eb_cpux9k2_defconfig
@@ -1,3 +1,4 @@
CONFIG_ARM=y
CONFIG_ARCH_AT91=y
CONFIG_TARGET_EB_CPUX9K2=y
+CONFIG_CMD_NET=y
diff --git a/configs/eb_cpux9k2_ram_defconfig b/configs/eb_cpux9k2_ram_defconfig
index 93acc13..2716774 100644
--- a/configs/eb_cpux9k2_ram_defconfig
+++ b/configs/eb_cpux9k2_ram_defconfig
@@ -2,3 +2,4 @@
CONFIG_ARCH_AT91=y
CONFIG_TARGET_EB_CPUX9K2=y
CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT"
+CONFIG_CMD_NET=y
diff --git a/configs/ebony_defconfig b/configs/ebony_defconfig
index bf2dab6..6165a7b 100644
--- a/configs/ebony_defconfig
+++ b/configs/ebony_defconfig
@@ -1,4 +1,5 @@
CONFIG_PPC=y
CONFIG_4xx=y
CONFIG_TARGET_EBONY=y
-CONFIG_REGEX=y
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/eco5pk_defconfig b/configs/eco5pk_defconfig
index 230bd87..44b096b 100644
--- a/configs/eco5pk_defconfig
+++ b/configs/eco5pk_defconfig
@@ -2,3 +2,4 @@
CONFIG_OMAP34XX=y
CONFIG_TARGET_ECO5PK=y
CONFIG_SPL=y
+CONFIG_CMD_NET=y
diff --git a/configs/ecovec_defconfig b/configs/ecovec_defconfig
index 57771e4..5e11e44 100644
--- a/configs/ecovec_defconfig
+++ b/configs/ecovec_defconfig
@@ -1,2 +1,3 @@
CONFIG_SH=y
CONFIG_TARGET_ECOVEC=y
+CONFIG_CMD_NET=y
diff --git a/configs/edb9315a_defconfig b/configs/edb9315a_defconfig
index 0d4bb2d..839efb5 100644
--- a/configs/edb9315a_defconfig
+++ b/configs/edb9315a_defconfig
@@ -1,3 +1,4 @@
CONFIG_ARM=y
CONFIG_TARGET_EDB93XX=y
CONFIG_SYS_EXTRA_OPTIONS="MK_edb9315a"
+CONFIG_CMD_NET=y
diff --git a/configs/edminiv2_defconfig b/configs/edminiv2_defconfig
index 1476d4d..510bcce 100644
--- a/configs/edminiv2_defconfig
+++ b/configs/edminiv2_defconfig
@@ -2,3 +2,4 @@
CONFIG_ORION5X=y
CONFIG_TARGET_EDMINIV2=y
CONFIG_SPL=y
+CONFIG_CMD_NET=y
diff --git a/configs/enbw_cmc_defconfig b/configs/enbw_cmc_defconfig
index 92c4926..d8e03c0 100644
--- a/configs/enbw_cmc_defconfig
+++ b/configs/enbw_cmc_defconfig
@@ -1,3 +1,4 @@
CONFIG_ARM=y
CONFIG_ARCH_DAVINCI=y
CONFIG_TARGET_ENBW_CMC=y
+CONFIG_CMD_NET=y
diff --git a/configs/espt_defconfig b/configs/espt_defconfig
index a50781d..150936e 100644
--- a/configs/espt_defconfig
+++ b/configs/espt_defconfig
@@ -1,2 +1,3 @@
CONFIG_SH=y
CONFIG_TARGET_ESPT=y
+CONFIG_CMD_NET=y
diff --git a/configs/ethernut5_defconfig b/configs/ethernut5_defconfig
index 5fc79ca..8f18999 100644
--- a/configs/ethernut5_defconfig
+++ b/configs/ethernut5_defconfig
@@ -2,3 +2,5 @@
CONFIG_ARCH_AT91=y
CONFIG_TARGET_ETHERNUT5=y
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9XE"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/favr-32-ezkit_defconfig b/configs/favr-32-ezkit_defconfig
index 941e028..fabb50c 100644
--- a/configs/favr-32-ezkit_defconfig
+++ b/configs/favr-32-ezkit_defconfig
@@ -1,2 +1,3 @@
CONFIG_AVR32=y
CONFIG_TARGET_FAVR_32_EZKIT=y
+CONFIG_CMD_NET=y
diff --git a/configs/flea3_defconfig b/configs/flea3_defconfig
index ac112cd..22844cc 100644
--- a/configs/flea3_defconfig
+++ b/configs/flea3_defconfig
@@ -1,2 +1,3 @@
CONFIG_ARM=y
CONFIG_TARGET_FLEA3=y
+CONFIG_CMD_NET=y
diff --git a/configs/fo300_defconfig b/configs/fo300_defconfig
index 05068d4..dbf0ef5 100644
--- a/configs/fo300_defconfig
+++ b/configs/fo300_defconfig
@@ -2,3 +2,4 @@
CONFIG_MPC5xxx=y
CONFIG_TARGET_TQM5200=y
CONFIG_SYS_EXTRA_OPTIONS="FO300"
+CONFIG_CMD_NET=y
diff --git a/configs/ga10h_v1_1_defconfig b/configs/ga10h_v1_1_defconfig
index 3eca023..67b40c2 100644
--- a/configs/ga10h_v1_1_defconfig
+++ b/configs/ga10h_v1_1_defconfig
@@ -1,29 +1,21 @@
-# The ga10h is an 10" tablet with an A33 or A23 soc, 1G RAM, 8G or 16G nand,
-# sdio wifi, 2 micro usb ports, 1 otg and 1 host and 1 micro sd slot.
-#
-# This defconfig is for the v1.1 pcb with an a33 soc.
-CONFIG_SPL=y
-CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=5"
-CONFIG_DEFAULT_DEVICE_TREE="sun8i-a33-ippo-q8h-v1.2-lcd1024x600"
-CONFIG_USB_MUSB_SUNXI=y
-CONFIG_USB0_VBUS_PIN="AXP0-VBUS-ENABLE"
-CONFIG_USB0_VBUS_DET="AXP0-VBUS-DETECT"
-CONFIG_AXP_GPIO=y
-CONFIG_VIDEO_LCD_MODE="x:1024,y:600,depth:18,pclk_khz:52000,le:138,ri:162,up:22,lo:10,hs:20,vs:3,sync:3,vmode:0"
-CONFIG_VIDEO_LCD_PANEL_LVDS=y
-CONFIG_VIDEO_LCD_DCLK_PHASE=0
-CONFIG_VIDEO_LCD_POWER="PH7"
-CONFIG_VIDEO_LCD_BL_EN="PH6"
-CONFIG_VIDEO_LCD_BL_PWM="PH0"
-#CONFIG_VIDEO_LCD_BL_PWM_ACTIVE_LOW=n
CONFIG_ARM=y
CONFIG_ARCH_SUNXI=y
CONFIG_MACH_SUN8I_A33=y
CONFIG_DRAM_CLK=432
-# zq = 0x3bbb
CONFIG_DRAM_ZQ=15291
CONFIG_DRAM_ODT_EN=y
-# Wifi power
+CONFIG_USB0_VBUS_PIN="AXP0-VBUS-ENABLE"
+CONFIG_USB0_VBUS_DET="AXP0-VBUS-DETECT"
+CONFIG_AXP_GPIO=y
+CONFIG_VIDEO_LCD_MODE="x:1024,y:600,depth:18,pclk_khz:52000,le:138,ri:162,up:22,lo:10,hs:20,vs:3,sync:3,vmode:0"
+CONFIG_VIDEO_LCD_DCLK_PHASE=0
+CONFIG_VIDEO_LCD_POWER="PH7"
+CONFIG_VIDEO_LCD_BL_EN="PH6"
+CONFIG_VIDEO_LCD_BL_PWM="PH0"
+CONFIG_VIDEO_LCD_PANEL_LVDS=y
+CONFIG_USB_MUSB_SUNXI=y
+CONFIG_DEFAULT_DEVICE_TREE="sun8i-a33-ga10h-v1.1"
+CONFIG_SPL=y
+CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=5"
CONFIG_AXP221_DLDO1_VOLT=3300
-# aldo1 is connected to VCC-IO, VCC-PD, VCC-USB and VCC-HP
CONFIG_AXP221_ALDO1_VOLT=3000
diff --git a/configs/galileo_defconfig b/configs/galileo_defconfig
index 7de7749..a3b564e 100644
--- a/configs/galileo_defconfig
+++ b/configs/galileo_defconfig
@@ -1,8 +1,9 @@
CONFIG_X86=y
-CONFIG_NET=y
CONFIG_NETDEVICES=y
CONFIG_VENDOR_INTEL=y
CONFIG_DEFAULT_DEVICE_TREE="galileo"
CONFIG_TARGET_GALILEO=y
+CONFIG_CMD_NET=y
CONFIG_OF_CONTROL=y
CONFIG_ETH_DESIGNWARE=y
+CONFIG_GENERATE_PIRQ_TABLE=y
diff --git a/configs/gdppc440etx_defconfig b/configs/gdppc440etx_defconfig
index 5aa579a..c6c7161 100644
--- a/configs/gdppc440etx_defconfig
+++ b/configs/gdppc440etx_defconfig
@@ -1,4 +1,5 @@
CONFIG_PPC=y
CONFIG_4xx=y
CONFIG_TARGET_GDPPC440ETX=y
-CONFIG_REGEX=y
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/glacier_defconfig b/configs/glacier_defconfig
index d318f82..926d391 100644
--- a/configs/glacier_defconfig
+++ b/configs/glacier_defconfig
@@ -3,5 +3,7 @@
CONFIG_TARGET_CANYONLANDS=y
CONFIG_GLACIER=y
CONFIG_DEFAULT_DEVICE_TREE="glacier"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
CONFIG_OF_CONTROL=y
CONFIG_OF_EMBED=y
diff --git a/configs/glacier_ramboot_defconfig b/configs/glacier_ramboot_defconfig
index 98bcaf4..f4041e8 100644
--- a/configs/glacier_ramboot_defconfig
+++ b/configs/glacier_ramboot_defconfig
@@ -4,5 +4,7 @@
CONFIG_GLACIER=y
CONFIG_DEFAULT_DEVICE_TREE="glacier"
CONFIG_SYS_EXTRA_OPTIONS="SYS_RAMBOOT,SYS_TEXT_BASE=0x01000000,SYS_LDSCRIPT=board/amcc/canyonlands/u-boot-ram.lds"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
CONFIG_OF_CONTROL=y
CONFIG_OF_EMBED=y
diff --git a/configs/goflexhome_defconfig b/configs/goflexhome_defconfig
index 276489b..c6c3ef7 100644
--- a/configs/goflexhome_defconfig
+++ b/configs/goflexhome_defconfig
@@ -1,3 +1,4 @@
CONFIG_ARM=y
CONFIG_KIRKWOOD=y
CONFIG_TARGET_GOFLEXHOME=y
+CONFIG_CMD_NET=y
diff --git a/configs/gose_defconfig b/configs/gose_defconfig
index b6054f7..6d0c3ae 100644
--- a/configs/gose_defconfig
+++ b/configs/gose_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
CONFIG_RMOBILE=y
CONFIG_TARGET_GOSE=y
+CONFIG_CMD_NET=y
CONFIG_SH_SDHI=y
diff --git a/configs/gplugd_defconfig b/configs/gplugd_defconfig
index ec8f45c..a92b4e4 100644
--- a/configs/gplugd_defconfig
+++ b/configs/gplugd_defconfig
@@ -1,2 +1,3 @@
CONFIG_ARM=y
CONFIG_TARGET_GPLUGD=y
+CONFIG_CMD_NET=y
diff --git a/configs/gr_cpci_ax2000_defconfig b/configs/gr_cpci_ax2000_defconfig
index 73ac213..f2fb544 100644
--- a/configs/gr_cpci_ax2000_defconfig
+++ b/configs/gr_cpci_ax2000_defconfig
@@ -1,3 +1,4 @@
CONFIG_SPARC=y
CONFIG_TARGET_GR_CPCI_AX2000=y
CONFIG_SYS_TEXT_BASE=0x00000000
+CONFIG_CMD_NET=y
diff --git a/configs/gr_ep2s60_defconfig b/configs/gr_ep2s60_defconfig
index a59f0ad..7afd109 100644
--- a/configs/gr_ep2s60_defconfig
+++ b/configs/gr_ep2s60_defconfig
@@ -1,3 +1,4 @@
CONFIG_SPARC=y
CONFIG_TARGET_GR_EP2S60=y
CONFIG_SYS_TEXT_BASE=0x00000000
+CONFIG_CMD_NET=y
diff --git a/configs/gr_xc3s_1500_defconfig b/configs/gr_xc3s_1500_defconfig
index 257759f..cac67c2 100644
--- a/configs/gr_xc3s_1500_defconfig
+++ b/configs/gr_xc3s_1500_defconfig
@@ -1,3 +1,4 @@
CONFIG_SPARC=y
CONFIG_TARGET_GR_XC3S_1500=y
CONFIG_SYS_TEXT_BASE=0x00000000
+CONFIG_CMD_NET=y
diff --git a/configs/grasshopper_defconfig b/configs/grasshopper_defconfig
index 72013e7..451ce9f 100644
--- a/configs/grasshopper_defconfig
+++ b/configs/grasshopper_defconfig
@@ -1,2 +1,3 @@
CONFIG_AVR32=y
CONFIG_TARGET_GRASSHOPPER=y
+CONFIG_CMD_NET=y
diff --git a/configs/grsim_defconfig b/configs/grsim_defconfig
index 43d232c..d114a86 100644
--- a/configs/grsim_defconfig
+++ b/configs/grsim_defconfig
@@ -1,3 +1,4 @@
CONFIG_SPARC=y
CONFIG_TARGET_GRSIM=y
CONFIG_SYS_TEXT_BASE=0x00000000
+CONFIG_CMD_NET=y
diff --git a/configs/guruplug_defconfig b/configs/guruplug_defconfig
index 912a089..8d3d8c2 100644
--- a/configs/guruplug_defconfig
+++ b/configs/guruplug_defconfig
@@ -1,3 +1,4 @@
CONFIG_ARM=y
CONFIG_KIRKWOOD=y
CONFIG_TARGET_GURUPLUG=y
+CONFIG_CMD_NET=y
diff --git a/configs/gwventana_defconfig b/configs/gwventana_defconfig
index 2d6552f..5cfe983 100644
--- a/configs/gwventana_defconfig
+++ b/configs/gwventana_defconfig
@@ -2,6 +2,8 @@
CONFIG_TARGET_GW_VENTANA=y
CONFIG_SYS_MALLOC_F=y
CONFIG_SPL=y
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/imx-common/spl_sd.cfg,MX6QDL"
CONFIG_SPL_STACK_R=y
CONFIG_SPL_STACK_R_ADDR=0x18000000
+CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/imx-common/spl_sd.cfg,MX6QDL"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/h2200_defconfig b/configs/h2200_defconfig
index 7040c09..40c28ee 100644
--- a/configs/h2200_defconfig
+++ b/configs/h2200_defconfig
@@ -1,2 +1,3 @@
CONFIG_ARM=y
CONFIG_TARGET_H2200=y
+CONFIG_CMD_NET=y
diff --git a/configs/haleakala_defconfig b/configs/haleakala_defconfig
index 81e3398..ba33749 100644
--- a/configs/haleakala_defconfig
+++ b/configs/haleakala_defconfig
@@ -2,3 +2,5 @@
CONFIG_4xx=y
CONFIG_TARGET_KILAUEA=y
CONFIG_SYS_EXTRA_OPTIONS="HALEAKALA"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/hammerhead_defconfig b/configs/hammerhead_defconfig
index 0d69cc6..1130d92 100644
--- a/configs/hammerhead_defconfig
+++ b/configs/hammerhead_defconfig
@@ -1,2 +1,3 @@
CONFIG_AVR32=y
CONFIG_TARGET_HAMMERHEAD=y
+CONFIG_CMD_NET=y
diff --git a/configs/harmony_defconfig b/configs/harmony_defconfig
index b2c0afc..aa556a1 100644
--- a/configs/harmony_defconfig
+++ b/configs/harmony_defconfig
@@ -3,3 +3,4 @@
CONFIG_TEGRA20=y
CONFIG_TARGET_HARMONY=y
CONFIG_DEFAULT_DEVICE_TREE="tegra20-harmony"
+CONFIG_CMD_NET=y
diff --git a/configs/highbank_defconfig b/configs/highbank_defconfig
index 88efbdf..e1875db 100644
--- a/configs/highbank_defconfig
+++ b/configs/highbank_defconfig
@@ -1,2 +1,3 @@
CONFIG_ARM=y
CONFIG_ARCH_HIGHBANK=y
+CONFIG_CMD_NET=y
diff --git a/configs/hrcon_defconfig b/configs/hrcon_defconfig
index 69c65ba..4f2a55d 100644
--- a/configs/hrcon_defconfig
+++ b/configs/hrcon_defconfig
@@ -1,3 +1,4 @@
CONFIG_PPC=y
CONFIG_MPC83xx=y
CONFIG_TARGET_HRCON=y
+CONFIG_CMD_NET=y
diff --git a/configs/ib62x0_defconfig b/configs/ib62x0_defconfig
index b6780c5..ea4756f 100644
--- a/configs/ib62x0_defconfig
+++ b/configs/ib62x0_defconfig
@@ -1,3 +1,4 @@
CONFIG_ARM=y
CONFIG_KIRKWOOD=y
CONFIG_TARGET_IB62X0=y
+CONFIG_CMD_NET=y
diff --git a/configs/ibf-dsp561_defconfig b/configs/ibf-dsp561_defconfig
index 41a5c65..eb80798 100644
--- a/configs/ibf-dsp561_defconfig
+++ b/configs/ibf-dsp561_defconfig
@@ -1,2 +1,3 @@
CONFIG_BLACKFIN=y
CONFIG_TARGET_IBF_DSP561=y
+CONFIG_CMD_NET=y
diff --git a/configs/icon_defconfig b/configs/icon_defconfig
index caf7c23..e4ca30a 100644
--- a/configs/icon_defconfig
+++ b/configs/icon_defconfig
@@ -1,4 +1,5 @@
CONFIG_PPC=y
CONFIG_4xx=y
CONFIG_TARGET_ICON=y
-CONFIG_REGEX=y
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/iconnect_defconfig b/configs/iconnect_defconfig
index 7ff8d67..a96b810 100644
--- a/configs/iconnect_defconfig
+++ b/configs/iconnect_defconfig
@@ -1,3 +1,4 @@
CONFIG_ARM=y
CONFIG_KIRKWOOD=y
CONFIG_TARGET_ICONNECT=y
+CONFIG_CMD_NET=y
diff --git a/configs/ids8313_defconfig b/configs/ids8313_defconfig
index 36db73a..21977c8 100644
--- a/configs/ids8313_defconfig
+++ b/configs/ids8313_defconfig
@@ -4,3 +4,4 @@
CONFIG_FIT=y
CONFIG_FIT_SIGNATURE=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_TEXT_BASE=0xFFF00000"
+CONFIG_CMD_NET=y
diff --git a/configs/igep0020_defconfig b/configs/igep0020_defconfig
index 950bac5..fc8d9c1 100644
--- a/configs/igep0020_defconfig
+++ b/configs/igep0020_defconfig
@@ -3,3 +3,4 @@
CONFIG_TARGET_OMAP3_IGEP00X0=y
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="MACH_TYPE=MACH_TYPE_IGEP0020,BOOT_ONENAND"
+CONFIG_CMD_NET=y
diff --git a/configs/igep0020_nand_defconfig b/configs/igep0020_nand_defconfig
index 4686a88..bf3581d9 100644
--- a/configs/igep0020_nand_defconfig
+++ b/configs/igep0020_nand_defconfig
@@ -3,3 +3,4 @@
CONFIG_TARGET_OMAP3_IGEP00X0=y
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="MACH_TYPE=MACH_TYPE_IGEP0020,BOOT_NAND"
+CONFIG_CMD_NET=y
diff --git a/configs/igep0030_defconfig b/configs/igep0030_defconfig
index 5e1d43d..cd9753d 100644
--- a/configs/igep0030_defconfig
+++ b/configs/igep0030_defconfig
@@ -3,3 +3,4 @@
CONFIG_TARGET_OMAP3_IGEP00X0=y
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="MACH_TYPE=MACH_TYPE_IGEP0030,BOOT_ONENAND"
+CONFIG_CMD_NET=y
diff --git a/configs/igep0030_nand_defconfig b/configs/igep0030_nand_defconfig
index d92dd44..8bdd1eb 100644
--- a/configs/igep0030_nand_defconfig
+++ b/configs/igep0030_nand_defconfig
@@ -3,3 +3,4 @@
CONFIG_TARGET_OMAP3_IGEP00X0=y
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="MACH_TYPE=MACH_TYPE_IGEP0030,BOOT_NAND"
+CONFIG_CMD_NET=y
diff --git a/configs/igep0032_defconfig b/configs/igep0032_defconfig
index cf120cd..ded479a 100644
--- a/configs/igep0032_defconfig
+++ b/configs/igep0032_defconfig
@@ -3,3 +3,4 @@
CONFIG_TARGET_OMAP3_IGEP00X0=y
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="MACH_TYPE=MACH_TYPE_IGEP0032,BOOT_ONENAND"
+CONFIG_CMD_NET=y
diff --git a/configs/ima3-mx53_defconfig b/configs/ima3-mx53_defconfig
index 0ada8a1..3190b71 100644
--- a/configs/ima3-mx53_defconfig
+++ b/configs/ima3-mx53_defconfig
@@ -1,3 +1,4 @@
CONFIG_ARM=y
CONFIG_TARGET_IMA3_MX53=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/esg/ima3-mx53/imximage.cfg"
+CONFIG_CMD_NET=y
diff --git a/configs/imx27lite_defconfig b/configs/imx27lite_defconfig
index 03803c6..b83cd24 100644
--- a/configs/imx27lite_defconfig
+++ b/configs/imx27lite_defconfig
@@ -1,2 +1,3 @@
CONFIG_ARM=y
CONFIG_TARGET_IMX27LITE=y
+CONFIG_CMD_NET=y
diff --git a/configs/imx31_litekit_defconfig b/configs/imx31_litekit_defconfig
index cd41c0e..8373c04 100644
--- a/configs/imx31_litekit_defconfig
+++ b/configs/imx31_litekit_defconfig
@@ -1,2 +1,3 @@
CONFIG_ARM=y
CONFIG_TARGET_IMX31_LITEKIT=y
+CONFIG_CMD_NET=y
diff --git a/configs/imx31_phycore_defconfig b/configs/imx31_phycore_defconfig
index 563de57..a388ea7 100644
--- a/configs/imx31_phycore_defconfig
+++ b/configs/imx31_phycore_defconfig
@@ -1,2 +1,3 @@
CONFIG_ARM=y
CONFIG_TARGET_IMX31_PHYCORE=y
+CONFIG_CMD_NET=y
diff --git a/configs/imx31_phycore_eet_defconfig b/configs/imx31_phycore_eet_defconfig
index eca9cdb..b4d37fd 100644
--- a/configs/imx31_phycore_eet_defconfig
+++ b/configs/imx31_phycore_eet_defconfig
@@ -1,3 +1,4 @@
CONFIG_ARM=y
CONFIG_TARGET_IMX31_PHYCORE=y
CONFIG_SYS_EXTRA_OPTIONS="IMX31_PHYCORE_EET"
+CONFIG_CMD_NET=y
diff --git a/configs/inetspace_v2_defconfig b/configs/inetspace_v2_defconfig
index a8c254d..35aabc8 100644
--- a/configs/inetspace_v2_defconfig
+++ b/configs/inetspace_v2_defconfig
@@ -2,3 +2,4 @@
CONFIG_KIRKWOOD=y
CONFIG_TARGET_NETSPACE_V2=y
CONFIG_SYS_EXTRA_OPTIONS="INETSPACE_V2"
+CONFIG_CMD_NET=y
diff --git a/configs/inka4x0_defconfig b/configs/inka4x0_defconfig
index 6581b0a..2c3b9e0 100644
--- a/configs/inka4x0_defconfig
+++ b/configs/inka4x0_defconfig
@@ -1,3 +1,4 @@
CONFIG_PPC=y
CONFIG_MPC5xxx=y
CONFIG_TARGET_INKA4X0=y
+CONFIG_CMD_NET=y
diff --git a/configs/integratorap_cm720t_defconfig b/configs/integratorap_cm720t_defconfig
index fc0dc67..fccbb3f 100644
--- a/configs/integratorap_cm720t_defconfig
+++ b/configs/integratorap_cm720t_defconfig
@@ -2,3 +2,4 @@
CONFIG_ARCH_INTEGRATOR=y
CONFIG_ARCH_INTEGRATOR_AP=y
CONFIG_CM720T=y
+CONFIG_CMD_NET=y
diff --git a/configs/integratorap_cm920t_defconfig b/configs/integratorap_cm920t_defconfig
index eb6afb9..f2e1fcb 100644
--- a/configs/integratorap_cm920t_defconfig
+++ b/configs/integratorap_cm920t_defconfig
@@ -2,3 +2,4 @@
CONFIG_ARCH_INTEGRATOR=y
CONFIG_ARCH_INTEGRATOR_AP=y
CONFIG_CM920T=y
+CONFIG_CMD_NET=y
diff --git a/configs/integratorap_cm926ejs_defconfig b/configs/integratorap_cm926ejs_defconfig
index 8667fcb..060c18c 100644
--- a/configs/integratorap_cm926ejs_defconfig
+++ b/configs/integratorap_cm926ejs_defconfig
@@ -2,3 +2,4 @@
CONFIG_ARCH_INTEGRATOR=y
CONFIG_ARCH_INTEGRATOR_AP=y
CONFIG_CM926EJ_S=y
+CONFIG_CMD_NET=y
diff --git a/configs/integratorap_cm946es_defconfig b/configs/integratorap_cm946es_defconfig
index 1e8c157..dc933c5 100644
--- a/configs/integratorap_cm946es_defconfig
+++ b/configs/integratorap_cm946es_defconfig
@@ -2,3 +2,4 @@
CONFIG_ARCH_INTEGRATOR=y
CONFIG_ARCH_INTEGRATOR_AP=y
CONFIG_CM946ES=y
+CONFIG_CMD_NET=y
diff --git a/configs/integratorcp_cm1136_defconfig b/configs/integratorcp_cm1136_defconfig
index f039470..5635cb14 100644
--- a/configs/integratorcp_cm1136_defconfig
+++ b/configs/integratorcp_cm1136_defconfig
@@ -2,3 +2,4 @@
CONFIG_ARCH_INTEGRATOR=y
CONFIG_ARCH_INTEGRATOR_CP=y
CONFIG_CM1136=y
+CONFIG_CMD_NET=y
diff --git a/configs/integratorcp_cm920t_defconfig b/configs/integratorcp_cm920t_defconfig
index cb364a1..25041ff 100644
--- a/configs/integratorcp_cm920t_defconfig
+++ b/configs/integratorcp_cm920t_defconfig
@@ -2,3 +2,4 @@
CONFIG_ARCH_INTEGRATOR=y
CONFIG_ARCH_INTEGRATOR_CP=y
CONFIG_CM920T=y
+CONFIG_CMD_NET=y
diff --git a/configs/integratorcp_cm926ejs_defconfig b/configs/integratorcp_cm926ejs_defconfig
index 32ea7b9..5c82326 100644
--- a/configs/integratorcp_cm926ejs_defconfig
+++ b/configs/integratorcp_cm926ejs_defconfig
@@ -2,3 +2,4 @@
CONFIG_ARCH_INTEGRATOR=y
CONFIG_ARCH_INTEGRATOR_CP=y
CONFIG_CM926EJ_S=y
+CONFIG_CMD_NET=y
diff --git a/configs/integratorcp_cm946es_defconfig b/configs/integratorcp_cm946es_defconfig
index e7fc706..cd4c94a 100644
--- a/configs/integratorcp_cm946es_defconfig
+++ b/configs/integratorcp_cm946es_defconfig
@@ -2,3 +2,4 @@
CONFIG_ARCH_INTEGRATOR=y
CONFIG_ARCH_INTEGRATOR_CP=y
CONFIG_CM946ES=y
+CONFIG_CMD_NET=y
diff --git a/configs/intip_defconfig b/configs/intip_defconfig
index 3aa372f..476616c 100644
--- a/configs/intip_defconfig
+++ b/configs/intip_defconfig
@@ -2,4 +2,5 @@
CONFIG_4xx=y
CONFIG_TARGET_INTIP=y
CONFIG_SYS_EXTRA_OPTIONS="INTIB"
-CONFIG_REGEX=y
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/io64_defconfig b/configs/io64_defconfig
index 9c0566e..7f1825a 100644
--- a/configs/io64_defconfig
+++ b/configs/io64_defconfig
@@ -1,4 +1,5 @@
CONFIG_PPC=y
CONFIG_4xx=y
CONFIG_TARGET_IO64=y
-CONFIG_REGEX=y
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/io_defconfig b/configs/io_defconfig
index 5037ff3..7713232 100644
--- a/configs/io_defconfig
+++ b/configs/io_defconfig
@@ -1,4 +1,5 @@
CONFIG_PPC=y
CONFIG_4xx=y
CONFIG_TARGET_IO=y
-CONFIG_REGEX=y
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/iocon_defconfig b/configs/iocon_defconfig
index 72956d4..95758cf 100644
--- a/configs/iocon_defconfig
+++ b/configs/iocon_defconfig
@@ -1,4 +1,5 @@
CONFIG_PPC=y
CONFIG_4xx=y
CONFIG_TARGET_IOCON=y
-CONFIG_REGEX=y
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/ip04_defconfig b/configs/ip04_defconfig
index 69110a3..22bb8b8 100644
--- a/configs/ip04_defconfig
+++ b/configs/ip04_defconfig
@@ -1,5 +1,5 @@
CONFIG_BLACKFIN=y
-CONFIG_NET=y
CONFIG_TARGET_IP04=y
+CONFIG_CMD_NET=y
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED=y
diff --git a/configs/ipam390_defconfig b/configs/ipam390_defconfig
index ca17d1b..8233677 100644
--- a/configs/ipam390_defconfig
+++ b/configs/ipam390_defconfig
@@ -2,3 +2,4 @@
CONFIG_ARCH_DAVINCI=y
CONFIG_TARGET_IPAM390=y
CONFIG_SPL=y
+CONFIG_CMD_NET=y
diff --git a/configs/ipek01_defconfig b/configs/ipek01_defconfig
index 83cf557..099bf64 100644
--- a/configs/ipek01_defconfig
+++ b/configs/ipek01_defconfig
@@ -1,3 +1,4 @@
CONFIG_PPC=y
CONFIG_MPC5xxx=y
CONFIG_TARGET_IPEK01=y
+CONFIG_CMD_NET=y
diff --git a/configs/jetson-tk1_defconfig b/configs/jetson-tk1_defconfig
index 168b919..dc68c6d 100644
--- a/configs/jetson-tk1_defconfig
+++ b/configs/jetson-tk1_defconfig
@@ -3,3 +3,4 @@
CONFIG_TEGRA124=y
CONFIG_TARGET_JETSON_TK1=y
CONFIG_DEFAULT_DEVICE_TREE="tegra124-jetson-tk1"
+CONFIG_CMD_NET=y
diff --git a/configs/jupiter_defconfig b/configs/jupiter_defconfig
index dac4f1a..02c63e1 100644
--- a/configs/jupiter_defconfig
+++ b/configs/jupiter_defconfig
@@ -1,3 +1,4 @@
CONFIG_PPC=y
CONFIG_MPC5xxx=y
CONFIG_TARGET_JUPITER=y
+CONFIG_CMD_NET=y
diff --git a/configs/k2e_evm_defconfig b/configs/k2e_evm_defconfig
index f9edee5..8dc8d69 100644
--- a/configs/k2e_evm_defconfig
+++ b/configs/k2e_evm_defconfig
@@ -2,3 +2,4 @@
CONFIG_ARCH_KEYSTONE=y
CONFIG_TARGET_K2E_EVM=y
CONFIG_SPL=y
+CONFIG_CMD_NET=y
diff --git a/configs/k2hk_evm_defconfig b/configs/k2hk_evm_defconfig
index fd959f4..0976598 100644
--- a/configs/k2hk_evm_defconfig
+++ b/configs/k2hk_evm_defconfig
@@ -2,3 +2,4 @@
CONFIG_ARCH_KEYSTONE=y
CONFIG_TARGET_K2HK_EVM=y
CONFIG_SPL=y
+CONFIG_CMD_NET=y
diff --git a/configs/k2l_evm_defconfig b/configs/k2l_evm_defconfig
index 7ab19d5..45c600b 100644
--- a/configs/k2l_evm_defconfig
+++ b/configs/k2l_evm_defconfig
@@ -2,3 +2,4 @@
CONFIG_ARCH_KEYSTONE=y
CONFIG_TARGET_K2L_EVM=y
CONFIG_SPL=y
+CONFIG_CMD_NET=y
diff --git a/configs/katmai_defconfig b/configs/katmai_defconfig
index 02cff2f..7821e19 100644
--- a/configs/katmai_defconfig
+++ b/configs/katmai_defconfig
@@ -1,4 +1,5 @@
CONFIG_PPC=y
CONFIG_4xx=y
CONFIG_TARGET_KATMAI=y
-CONFIG_REGEX=y
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/kilauea_defconfig b/configs/kilauea_defconfig
index 99c78a9..2ef0f56 100644
--- a/configs/kilauea_defconfig
+++ b/configs/kilauea_defconfig
@@ -2,4 +2,5 @@
CONFIG_4xx=y
CONFIG_TARGET_KILAUEA=y
CONFIG_SYS_EXTRA_OPTIONS="KILAUEA"
-CONFIG_REGEX=y
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/km_kirkwood_128m16_defconfig b/configs/km_kirkwood_128m16_defconfig
index 6b69c6d..9768d5a 100644
--- a/configs/km_kirkwood_128m16_defconfig
+++ b/configs/km_kirkwood_128m16_defconfig
@@ -2,3 +2,5 @@
CONFIG_KIRKWOOD=y
CONFIG_TARGET_KM_KIRKWOOD=y
CONFIG_SYS_EXTRA_OPTIONS="KM_KIRKWOOD_128M16"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/km_kirkwood_defconfig b/configs/km_kirkwood_defconfig
index b7ac8ae..5f93285 100644
--- a/configs/km_kirkwood_defconfig
+++ b/configs/km_kirkwood_defconfig
@@ -2,3 +2,5 @@
CONFIG_KIRKWOOD=y
CONFIG_TARGET_KM_KIRKWOOD=y
CONFIG_SYS_EXTRA_OPTIONS="KM_KIRKWOOD"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/km_kirkwood_pci_defconfig b/configs/km_kirkwood_pci_defconfig
index 825ad69..82b02ae 100644
--- a/configs/km_kirkwood_pci_defconfig
+++ b/configs/km_kirkwood_pci_defconfig
@@ -2,3 +2,5 @@
CONFIG_KIRKWOOD=y
CONFIG_TARGET_KM_KIRKWOOD=y
CONFIG_SYS_EXTRA_OPTIONS="KM_KIRKWOOD_PCI"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/kmcoge4_defconfig b/configs/kmcoge4_defconfig
index 4947d1a..bcc2cc8 100644
--- a/configs/kmcoge4_defconfig
+++ b/configs/kmcoge4_defconfig
@@ -2,3 +2,5 @@
CONFIG_MPC85xx=y
CONFIG_TARGET_KMP204X=y
CONFIG_SYS_EXTRA_OPTIONS="KMCOGE4"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/kmcoge5ne_defconfig b/configs/kmcoge5ne_defconfig
index a8b5275..bd7b8f9 100644
--- a/configs/kmcoge5ne_defconfig
+++ b/configs/kmcoge5ne_defconfig
@@ -2,3 +2,5 @@
CONFIG_MPC83xx=y
CONFIG_TARGET_KM8360=y
CONFIG_SYS_EXTRA_OPTIONS="KMCOGE5NE"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/kmcoge5un_defconfig b/configs/kmcoge5un_defconfig
index 3d734d8..3484e8a 100644
--- a/configs/kmcoge5un_defconfig
+++ b/configs/kmcoge5un_defconfig
@@ -2,3 +2,5 @@
CONFIG_KIRKWOOD=y
CONFIG_TARGET_KM_KIRKWOOD=y
CONFIG_SYS_EXTRA_OPTIONS="KM_COGE5UN"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/kmeter1_defconfig b/configs/kmeter1_defconfig
index 3374ab0..2b04d33 100644
--- a/configs/kmeter1_defconfig
+++ b/configs/kmeter1_defconfig
@@ -2,3 +2,5 @@
CONFIG_MPC83xx=y
CONFIG_TARGET_KM8360=y
CONFIG_SYS_EXTRA_OPTIONS="KMETER1"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/kmlion1_defconfig b/configs/kmlion1_defconfig
index fb2c639..6fa48a0 100644
--- a/configs/kmlion1_defconfig
+++ b/configs/kmlion1_defconfig
@@ -2,3 +2,5 @@
CONFIG_MPC85xx=y
CONFIG_TARGET_KMP204X=y
CONFIG_SYS_EXTRA_OPTIONS="KMLION1"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/kmnusa_defconfig b/configs/kmnusa_defconfig
index 97e5f32..e40aa3f 100644
--- a/configs/kmnusa_defconfig
+++ b/configs/kmnusa_defconfig
@@ -2,3 +2,5 @@
CONFIG_KIRKWOOD=y
CONFIG_TARGET_KM_KIRKWOOD=y
CONFIG_SYS_EXTRA_OPTIONS="KM_NUSA"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/kmopti2_defconfig b/configs/kmopti2_defconfig
index 11c53b5..d24e147 100644
--- a/configs/kmopti2_defconfig
+++ b/configs/kmopti2_defconfig
@@ -2,3 +2,5 @@
CONFIG_MPC83xx=y
CONFIG_TARGET_TUXX1=y
CONFIG_SYS_EXTRA_OPTIONS="KMOPTI2"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/kmsugp1_defconfig b/configs/kmsugp1_defconfig
index 181eff1..a9d23a2 100644
--- a/configs/kmsugp1_defconfig
+++ b/configs/kmsugp1_defconfig
@@ -2,3 +2,5 @@
CONFIG_KIRKWOOD=y
CONFIG_TARGET_KM_KIRKWOOD=y
CONFIG_SYS_EXTRA_OPTIONS="KM_SUGP1"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/kmsupx5_defconfig b/configs/kmsupx5_defconfig
index fd4bb9a..78c19fb 100644
--- a/configs/kmsupx5_defconfig
+++ b/configs/kmsupx5_defconfig
@@ -2,3 +2,5 @@
CONFIG_MPC83xx=y
CONFIG_TARGET_TUXX1=y
CONFIG_SYS_EXTRA_OPTIONS="KMSUPX5"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/kmsuv31_defconfig b/configs/kmsuv31_defconfig
index bb1bee3..68b5178 100644
--- a/configs/kmsuv31_defconfig
+++ b/configs/kmsuv31_defconfig
@@ -2,3 +2,5 @@
CONFIG_KIRKWOOD=y
CONFIG_TARGET_KM_KIRKWOOD=y
CONFIG_SYS_EXTRA_OPTIONS="KM_SUV31"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/kmvect1_defconfig b/configs/kmvect1_defconfig
index 512d12c..de74080 100644
--- a/configs/kmvect1_defconfig
+++ b/configs/kmvect1_defconfig
@@ -2,3 +2,5 @@
CONFIG_MPC83xx=y
CONFIG_TARGET_SUVD3=y
CONFIG_SYS_EXTRA_OPTIONS="KMVECT1"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/koelsch_defconfig b/configs/koelsch_defconfig
index 7ab2bfd..6be722c 100644
--- a/configs/koelsch_defconfig
+++ b/configs/koelsch_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
CONFIG_RMOBILE=y
CONFIG_TARGET_KOELSCH=y
+CONFIG_CMD_NET=y
CONFIG_SH_SDHI=y
diff --git a/configs/kwb_defconfig b/configs/kwb_defconfig
index cd2e5e6..9b07084 100644
--- a/configs/kwb_defconfig
+++ b/configs/kwb_defconfig
@@ -3,3 +3,4 @@
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="SERIAL1,CONS_INDEX=1"
# CONFIG_CMD_CRC32 is not set
+CONFIG_CMD_NET=y
diff --git a/configs/kzm9g_defconfig b/configs/kzm9g_defconfig
index 20656dd..91a0437 100644
--- a/configs/kzm9g_defconfig
+++ b/configs/kzm9g_defconfig
@@ -1,3 +1,4 @@
CONFIG_ARM=y
CONFIG_RMOBILE=y
CONFIG_TARGET_KZM9G=y
+CONFIG_CMD_NET=y
diff --git a/configs/lager_defconfig b/configs/lager_defconfig
index 08adfe3..6b4184c 100644
--- a/configs/lager_defconfig
+++ b/configs/lager_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
CONFIG_RMOBILE=y
CONFIG_TARGET_LAGER=y
+CONFIG_CMD_NET=y
CONFIG_SH_SDHI=y
diff --git a/configs/lcd4_lwmon5_defconfig b/configs/lcd4_lwmon5_defconfig
index 241457a..786b458 100644
--- a/configs/lcd4_lwmon5_defconfig
+++ b/configs/lcd4_lwmon5_defconfig
@@ -3,3 +3,4 @@
CONFIG_TARGET_LWMON5=y
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="LCD4_LWMON5"
+CONFIG_CMD_NET=y
diff --git a/configs/lp8x4x_defconfig b/configs/lp8x4x_defconfig
index 2fc2cbc..af02d37 100644
--- a/configs/lp8x4x_defconfig
+++ b/configs/lp8x4x_defconfig
@@ -1,2 +1,3 @@
CONFIG_ARM=y
CONFIG_TARGET_LP8X4X=y
+CONFIG_CMD_NET=y
diff --git a/configs/ls1021aqds_ddr4_nor_defconfig b/configs/ls1021aqds_ddr4_nor_defconfig
index caf1ae2..8d78c7f 100644
--- a/configs/ls1021aqds_ddr4_nor_defconfig
+++ b/configs/ls1021aqds_ddr4_nor_defconfig
@@ -1,3 +1,4 @@
CONFIG_ARM=y
CONFIG_TARGET_LS1021AQDS=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4"
+CONFIG_CMD_NET=y
diff --git a/configs/ls1021aqds_ddr4_nor_lpuart_defconfig b/configs/ls1021aqds_ddr4_nor_lpuart_defconfig
index ac9a4d5..1d76b65 100644
--- a/configs/ls1021aqds_ddr4_nor_lpuart_defconfig
+++ b/configs/ls1021aqds_ddr4_nor_lpuart_defconfig
@@ -1,3 +1,4 @@
CONFIG_ARM=y
CONFIG_TARGET_LS1021AQDS=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4,LPUART"
+CONFIG_CMD_NET=y
diff --git a/configs/ls1021aqds_nand_defconfig b/configs/ls1021aqds_nand_defconfig
index 6f7227d..b5b77b9 100644
--- a/configs/ls1021aqds_nand_defconfig
+++ b/configs/ls1021aqds_nand_defconfig
@@ -2,3 +2,4 @@
CONFIG_TARGET_LS1021AQDS=y
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,NAND_BOOT"
+CONFIG_CMD_NET=y
diff --git a/configs/ls1021aqds_nor_SECURE_BOOT_defconfig b/configs/ls1021aqds_nor_SECURE_BOOT_defconfig
index 6c4ec8f..6f1b602 100644
--- a/configs/ls1021aqds_nor_SECURE_BOOT_defconfig
+++ b/configs/ls1021aqds_nor_SECURE_BOOT_defconfig
@@ -1,3 +1,4 @@
CONFIG_ARM=y
CONFIG_TARGET_LS1021AQDS=y
CONFIG_SYS_EXTRA_OPTIONS="SECURE_BOOT"
+CONFIG_CMD_NET=y
diff --git a/configs/ls1021aqds_nor_defconfig b/configs/ls1021aqds_nor_defconfig
index 9e42d61..6c7ea6f 100644
--- a/configs/ls1021aqds_nor_defconfig
+++ b/configs/ls1021aqds_nor_defconfig
@@ -1,2 +1,3 @@
CONFIG_ARM=y
CONFIG_TARGET_LS1021AQDS=y
+CONFIG_CMD_NET=y
diff --git a/configs/ls1021aqds_nor_lpuart_defconfig b/configs/ls1021aqds_nor_lpuart_defconfig
index db81c4c..e586215 100644
--- a/configs/ls1021aqds_nor_lpuart_defconfig
+++ b/configs/ls1021aqds_nor_lpuart_defconfig
@@ -1,3 +1,4 @@
CONFIG_ARM=y
CONFIG_TARGET_LS1021AQDS=y
CONFIG_SYS_EXTRA_OPTIONS="LPUART"
+CONFIG_CMD_NET=y
diff --git a/configs/ls1021aqds_qspi_defconfig b/configs/ls1021aqds_qspi_defconfig
index ee3f5ca..c5372b7 100644
--- a/configs/ls1021aqds_qspi_defconfig
+++ b/configs/ls1021aqds_qspi_defconfig
@@ -1,3 +1,4 @@
CONFIG_ARM=y
CONFIG_TARGET_LS1021AQDS=y
CONFIG_SYS_EXTRA_OPTIONS="QSPI_BOOT"
+CONFIG_CMD_NET=y
diff --git a/configs/ls1021aqds_sdcard_defconfig b/configs/ls1021aqds_sdcard_defconfig
index 61cbc12..d131834 100644
--- a/configs/ls1021aqds_sdcard_defconfig
+++ b/configs/ls1021aqds_sdcard_defconfig
@@ -2,3 +2,4 @@
CONFIG_TARGET_LS1021AQDS=y
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,SD_BOOT"
+CONFIG_CMD_NET=y
diff --git a/configs/ls1021atwr_nor_SECURE_BOOT_defconfig b/configs/ls1021atwr_nor_SECURE_BOOT_defconfig
index cd6bc80..867f3d3 100644
--- a/configs/ls1021atwr_nor_SECURE_BOOT_defconfig
+++ b/configs/ls1021atwr_nor_SECURE_BOOT_defconfig
@@ -1,3 +1,4 @@
CONFIG_ARM=y
CONFIG_TARGET_LS1021ATWR=y
CONFIG_SYS_EXTRA_OPTIONS="SECURE_BOOT"
+CONFIG_CMD_NET=y
diff --git a/configs/ls1021atwr_nor_defconfig b/configs/ls1021atwr_nor_defconfig
index 5f465d3..3b31375 100644
--- a/configs/ls1021atwr_nor_defconfig
+++ b/configs/ls1021atwr_nor_defconfig
@@ -1,2 +1,3 @@
CONFIG_ARM=y
CONFIG_TARGET_LS1021ATWR=y
+CONFIG_CMD_NET=y
diff --git a/configs/ls1021atwr_nor_lpuart_defconfig b/configs/ls1021atwr_nor_lpuart_defconfig
index 1351949..4cfda5f 100644
--- a/configs/ls1021atwr_nor_lpuart_defconfig
+++ b/configs/ls1021atwr_nor_lpuart_defconfig
@@ -1,3 +1,4 @@
CONFIG_ARM=y
CONFIG_TARGET_LS1021ATWR=y
CONFIG_SYS_EXTRA_OPTIONS="LPUART"
+CONFIG_CMD_NET=y
diff --git a/configs/ls1021atwr_qspi_defconfig b/configs/ls1021atwr_qspi_defconfig
index 57e180d..1ae0f9c 100644
--- a/configs/ls1021atwr_qspi_defconfig
+++ b/configs/ls1021atwr_qspi_defconfig
@@ -1,3 +1,4 @@
CONFIG_ARM=y
CONFIG_TARGET_LS1021ATWR=y
CONFIG_SYS_EXTRA_OPTIONS="QSPI_BOOT"
+CONFIG_CMD_NET=y
diff --git a/configs/ls1021atwr_sdcard_defconfig b/configs/ls1021atwr_sdcard_defconfig
index b9217dd..769f7f5 100644
--- a/configs/ls1021atwr_sdcard_defconfig
+++ b/configs/ls1021atwr_sdcard_defconfig
@@ -2,3 +2,4 @@
CONFIG_TARGET_LS1021ATWR=y
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,SD_BOOT"
+CONFIG_CMD_NET=y
diff --git a/configs/ls2085a_emu_D4_defconfig b/configs/ls2085a_emu_D4_defconfig
index f6d57b4..f0e9c59 100644
--- a/configs/ls2085a_emu_D4_defconfig
+++ b/configs/ls2085a_emu_D4_defconfig
@@ -1,3 +1,4 @@
CONFIG_ARM=y
CONFIG_TARGET_LS2085A_EMU=y
CONFIG_SYS_EXTRA_OPTIONS="EMU,SYS_FSL_DDR4"
+CONFIG_CMD_NET=y
diff --git a/configs/ls2085a_emu_defconfig b/configs/ls2085a_emu_defconfig
index 2858138..27c58a7 100644
--- a/configs/ls2085a_emu_defconfig
+++ b/configs/ls2085a_emu_defconfig
@@ -1,3 +1,4 @@
CONFIG_ARM=y
CONFIG_TARGET_LS2085A_EMU=y
CONFIG_SYS_EXTRA_OPTIONS="EMU"
+CONFIG_CMD_NET=y
diff --git a/configs/ls2085a_simu_defconfig b/configs/ls2085a_simu_defconfig
index 5443bf8..b3d861b 100644
--- a/configs/ls2085a_simu_defconfig
+++ b/configs/ls2085a_simu_defconfig
@@ -1,3 +1,4 @@
CONFIG_ARM=y
CONFIG_TARGET_LS2085A_SIMU=y
CONFIG_SYS_EXTRA_OPTIONS="SIMU"
+CONFIG_CMD_NET=y
diff --git a/configs/ls2085aqds_defconfig b/configs/ls2085aqds_defconfig
index d58b783..9dacd21 100644
--- a/configs/ls2085aqds_defconfig
+++ b/configs/ls2085aqds_defconfig
@@ -1,3 +1,4 @@
CONFIG_ARM=y
CONFIG_TARGET_LS2085AQDS=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4"
+CONFIG_CMD_NET=y
diff --git a/configs/ls2085aqds_nand_defconfig b/configs/ls2085aqds_nand_defconfig
index c4ee1ea..fb123bd 100644
--- a/configs/ls2085aqds_nand_defconfig
+++ b/configs/ls2085aqds_nand_defconfig
@@ -2,3 +2,4 @@
CONFIG_TARGET_LS2085AQDS=y
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4,NAND"
+CONFIG_CMD_NET=y
diff --git a/configs/ls2085ardb_defconfig b/configs/ls2085ardb_defconfig
index edf89bf..0e3c518 100644
--- a/configs/ls2085ardb_defconfig
+++ b/configs/ls2085ardb_defconfig
@@ -1,3 +1,4 @@
CONFIG_ARM=y
CONFIG_TARGET_LS2085ARDB=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4"
+CONFIG_CMD_NET=y
diff --git a/configs/ls2085ardb_nand_defconfig b/configs/ls2085ardb_nand_defconfig
index c4f2147..02747ae 100644
--- a/configs/ls2085ardb_nand_defconfig
+++ b/configs/ls2085ardb_nand_defconfig
@@ -2,3 +2,4 @@
CONFIG_TARGET_LS2085ARDB=y
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4,NAND"
+CONFIG_CMD_NET=y
diff --git a/configs/lschlv2_defconfig b/configs/lschlv2_defconfig
index 31452a3..636040a 100644
--- a/configs/lschlv2_defconfig
+++ b/configs/lschlv2_defconfig
@@ -1,6 +1,6 @@
CONFIG_ARM=y
CONFIG_KIRKWOOD=y
CONFIG_TARGET_LSXL=y
-CONFIG_NET=y
CONFIG_SYS_EXTRA_OPTIONS="LSCHLV2"
+CONFIG_CMD_NET=y
CONFIG_NET_RANDOM_ETHADDR=y
diff --git a/configs/lsxhl_defconfig b/configs/lsxhl_defconfig
index 00f48bc..125fbaf 100644
--- a/configs/lsxhl_defconfig
+++ b/configs/lsxhl_defconfig
@@ -1,6 +1,6 @@
CONFIG_ARM=y
CONFIG_KIRKWOOD=y
CONFIG_TARGET_LSXL=y
-CONFIG_NET=y
CONFIG_SYS_EXTRA_OPTIONS="LSXHL"
+CONFIG_CMD_NET=y
CONFIG_NET_RANDOM_ETHADDR=y
diff --git a/configs/luan_defconfig b/configs/luan_defconfig
index 3ca5ad1..82c9b3a 100644
--- a/configs/luan_defconfig
+++ b/configs/luan_defconfig
@@ -1,4 +1,5 @@
CONFIG_PPC=y
CONFIG_4xx=y
CONFIG_TARGET_LUAN=y
-CONFIG_REGEX=y
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/lwmon5_defconfig b/configs/lwmon5_defconfig
index 1ae2109..e65a8d5 100644
--- a/configs/lwmon5_defconfig
+++ b/configs/lwmon5_defconfig
@@ -1,3 +1,4 @@
CONFIG_PPC=y
CONFIG_4xx=y
CONFIG_TARGET_LWMON5=y
+CONFIG_CMD_NET=y
diff --git a/configs/m28evk_defconfig b/configs/m28evk_defconfig
index 9b5e593..28af941 100644
--- a/configs/m28evk_defconfig
+++ b/configs/m28evk_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
CONFIG_TARGET_M28EVK=y
CONFIG_SPL=y
-CONFIG_REGEX=y
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/m53evk_defconfig b/configs/m53evk_defconfig
index c918532..0a40f18 100644
--- a/configs/m53evk_defconfig
+++ b/configs/m53evk_defconfig
@@ -2,4 +2,5 @@
CONFIG_TARGET_M53EVK=y
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/denx/m53evk/imximage.cfg"
-CONFIG_REGEX=y
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/magnesium_defconfig b/configs/magnesium_defconfig
index d45cfd7..4969603 100644
--- a/configs/magnesium_defconfig
+++ b/configs/magnesium_defconfig
@@ -1,2 +1,3 @@
CONFIG_ARM=y
CONFIG_TARGET_MAGNESIUM=y
+CONFIG_CMD_NET=y
diff --git a/configs/makalu_defconfig b/configs/makalu_defconfig
index 18c7a20..094ff47 100644
--- a/configs/makalu_defconfig
+++ b/configs/makalu_defconfig
@@ -1,4 +1,5 @@
CONFIG_PPC=y
CONFIG_4xx=y
CONFIG_TARGET_MAKALU=y
-CONFIG_REGEX=y
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/malta_defconfig b/configs/malta_defconfig
index 1035bd6..29fd977 100644
--- a/configs/malta_defconfig
+++ b/configs/malta_defconfig
@@ -1,2 +1,3 @@
CONFIG_MIPS=y
CONFIG_TARGET_MALTA=y
+CONFIG_CMD_NET=y
diff --git a/configs/maltael_defconfig b/configs/maltael_defconfig
index 011525f..2935860 100644
--- a/configs/maltael_defconfig
+++ b/configs/maltael_defconfig
@@ -1,3 +1,4 @@
CONFIG_MIPS=y
CONFIG_TARGET_MALTA=y
CONFIG_SYS_LITTLE_ENDIAN=y
+CONFIG_CMD_NET=y
diff --git a/configs/marsboard_defconfig b/configs/marsboard_defconfig
index 460e2d0..cfe6e8e 100644
--- a/configs/marsboard_defconfig
+++ b/configs/marsboard_defconfig
@@ -1,5 +1,7 @@
CONFIG_ARM=y
CONFIG_TARGET_EMBESTMX6BOARDS=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6q.cfg,MX6Q,DDR_MB=1024,ENV_IS_IN_SPI_FLASH"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
CONFIG_DM=y
CONFIG_DM_THERMAL=y
diff --git a/configs/maxbcm_defconfig b/configs/maxbcm_defconfig
index 96ff2b9..23af99b 100644
--- a/configs/maxbcm_defconfig
+++ b/configs/maxbcm_defconfig
@@ -1,3 +1,4 @@
CONFIG_ARM=y
CONFIG_TARGET_MAXBCM=y
CONFIG_SPL=y
+CONFIG_CMD_NET=y
diff --git a/configs/mcx_defconfig b/configs/mcx_defconfig
index be3d50b..28d1953 100644
--- a/configs/mcx_defconfig
+++ b/configs/mcx_defconfig
@@ -2,3 +2,4 @@
CONFIG_OMAP34XX=y
CONFIG_TARGET_MCX=y
CONFIG_SPL=y
+CONFIG_CMD_NET=y
diff --git a/configs/mecp5123_defconfig b/configs/mecp5123_defconfig
index 3b0a0a0..55ac810 100644
--- a/configs/mecp5123_defconfig
+++ b/configs/mecp5123_defconfig
@@ -1,3 +1,4 @@
CONFIG_PPC=y
CONFIG_MPC512X=y
CONFIG_TARGET_MECP5123=y
+CONFIG_CMD_NET=y
diff --git a/configs/medcom-wide_defconfig b/configs/medcom-wide_defconfig
index 1be16d8..664b075 100644
--- a/configs/medcom-wide_defconfig
+++ b/configs/medcom-wide_defconfig
@@ -3,3 +3,4 @@
CONFIG_TEGRA20=y
CONFIG_TARGET_MEDCOM_WIDE=y
CONFIG_DEFAULT_DEVICE_TREE="tegra20-medcom-wide"
+CONFIG_CMD_NET=y
diff --git a/configs/meesc_dataflash_defconfig b/configs/meesc_dataflash_defconfig
index de1d055..4db6744 100644
--- a/configs/meesc_dataflash_defconfig
+++ b/configs/meesc_dataflash_defconfig
@@ -2,3 +2,4 @@
CONFIG_ARCH_AT91=y
CONFIG_TARGET_MEESC=y
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9263,SYS_USE_DATAFLASH"
+CONFIG_CMD_NET=y
diff --git a/configs/meesc_defconfig b/configs/meesc_defconfig
index e725837..0f4dbb0 100644
--- a/configs/meesc_defconfig
+++ b/configs/meesc_defconfig
@@ -2,3 +2,4 @@
CONFIG_ARCH_AT91=y
CONFIG_TARGET_MEESC=y
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9263,SYS_USE_NANDFLASH"
+CONFIG_CMD_NET=y
diff --git a/configs/mgcoge3ne_defconfig b/configs/mgcoge3ne_defconfig
index 7b795f5..4acfa5f 100644
--- a/configs/mgcoge3ne_defconfig
+++ b/configs/mgcoge3ne_defconfig
@@ -2,3 +2,5 @@
CONFIG_MPC8260=y
CONFIG_TARGET_KM82XX=y
CONFIG_SYS_EXTRA_OPTIONS="MGCOGE3NE"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/mgcoge3un_defconfig b/configs/mgcoge3un_defconfig
index 1f2e436..9468b41 100644
--- a/configs/mgcoge3un_defconfig
+++ b/configs/mgcoge3un_defconfig
@@ -2,3 +2,5 @@
CONFIG_KIRKWOOD=y
CONFIG_TARGET_KM_KIRKWOOD=y
CONFIG_SYS_EXTRA_OPTIONS="KM_MGCOGE3UN"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/mgcoge_defconfig b/configs/mgcoge_defconfig
index 1fb8dfd..13d56b9 100644
--- a/configs/mgcoge_defconfig
+++ b/configs/mgcoge_defconfig
@@ -2,3 +2,5 @@
CONFIG_MPC8260=y
CONFIG_TARGET_KM82XX=y
CONFIG_SYS_EXTRA_OPTIONS="MGCOGE"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/microblaze-generic_defconfig b/configs/microblaze-generic_defconfig
index 77e07da..5740359 100644
--- a/configs/microblaze-generic_defconfig
+++ b/configs/microblaze-generic_defconfig
@@ -2,5 +2,6 @@
CONFIG_TARGET_MICROBLAZE_GENERIC=y
CONFIG_DEFAULT_DEVICE_TREE="microblaze-generic"
CONFIG_SPL=y
+CONFIG_CMD_NET=y
CONFIG_OF_CONTROL=y
CONFIG_OF_EMBED=y
diff --git a/configs/mimc200_defconfig b/configs/mimc200_defconfig
index f6edbc7..85c646e 100644
--- a/configs/mimc200_defconfig
+++ b/configs/mimc200_defconfig
@@ -1,2 +1,3 @@
CONFIG_AVR32=y
CONFIG_TARGET_MIMC200=y
+CONFIG_CMD_NET=y
diff --git a/configs/minnowmax_defconfig b/configs/minnowmax_defconfig
index ad794aa..744aca3 100644
--- a/configs/minnowmax_defconfig
+++ b/configs/minnowmax_defconfig
@@ -3,10 +3,12 @@
CONFIG_DEFAULT_DEVICE_TREE="minnowmax"
CONFIG_TARGET_MINNOWMAX=y
CONFIG_HAVE_INTEL_ME=y
+CONFIG_VIDEO_VESA=y
CONFIG_FRAMEBUFFER_SET_VESA_MODE=y
CONFIG_FRAMEBUFFER_VESA_MODE_11A=y
CONFIG_SMP=y
CONFIG_GENERATE_SFI_TABLE=y
CONFIG_CMD_CPU=y
+CONFIG_CMD_NET=y
CONFIG_OF_CONTROL=y
CONFIG_CPU=y
diff --git a/configs/motionpro_defconfig b/configs/motionpro_defconfig
index 535cb84..8bc367b 100644
--- a/configs/motionpro_defconfig
+++ b/configs/motionpro_defconfig
@@ -1,3 +1,4 @@
CONFIG_PPC=y
CONFIG_MPC5xxx=y
CONFIG_TARGET_MOTIONPRO=y
+CONFIG_CMD_NET=y
diff --git a/configs/mpc5121ads_defconfig b/configs/mpc5121ads_defconfig
index 4d76470..c9ce78c 100644
--- a/configs/mpc5121ads_defconfig
+++ b/configs/mpc5121ads_defconfig
@@ -1,3 +1,4 @@
CONFIG_PPC=y
CONFIG_MPC512X=y
CONFIG_TARGET_MPC5121ADS=y
+CONFIG_CMD_NET=y
diff --git a/configs/mpc5121ads_rev2_defconfig b/configs/mpc5121ads_rev2_defconfig
index bda0863..b9cbb3b 100644
--- a/configs/mpc5121ads_rev2_defconfig
+++ b/configs/mpc5121ads_rev2_defconfig
@@ -2,3 +2,4 @@
CONFIG_MPC512X=y
CONFIG_TARGET_MPC5121ADS=y
CONFIG_SYS_EXTRA_OPTIONS="MPC5121ADS_REV2"
+CONFIG_CMD_NET=y
diff --git a/configs/mpc8308_p1m_defconfig b/configs/mpc8308_p1m_defconfig
index 2b8fc4e..f0b2bc4 100644
--- a/configs/mpc8308_p1m_defconfig
+++ b/configs/mpc8308_p1m_defconfig
@@ -1,3 +1,4 @@
CONFIG_PPC=y
CONFIG_MPC83xx=y
CONFIG_TARGET_MPC8308_P1M=y
+CONFIG_CMD_NET=y
diff --git a/configs/ms7722se_defconfig b/configs/ms7722se_defconfig
index 4acb509..552f449 100644
--- a/configs/ms7722se_defconfig
+++ b/configs/ms7722se_defconfig
@@ -1,2 +1,3 @@
CONFIG_SH=y
CONFIG_TARGET_MS7722SE=y
+CONFIG_CMD_NET=y
diff --git a/configs/mt_ventoux_defconfig b/configs/mt_ventoux_defconfig
index 7092f76..2f078c4 100644
--- a/configs/mt_ventoux_defconfig
+++ b/configs/mt_ventoux_defconfig
@@ -2,3 +2,4 @@
CONFIG_OMAP34XX=y
CONFIG_TARGET_MT_VENTOUX=y
CONFIG_SPL=y
+CONFIG_CMD_NET=y
diff --git a/configs/munices_defconfig b/configs/munices_defconfig
index cc9f75e..a64b3e8 100644
--- a/configs/munices_defconfig
+++ b/configs/munices_defconfig
@@ -1,3 +1,4 @@
CONFIG_PPC=y
CONFIG_MPC5xxx=y
CONFIG_TARGET_MUNICES=y
+CONFIG_CMD_NET=y
diff --git a/configs/mv88f6281gtw_ge_defconfig b/configs/mv88f6281gtw_ge_defconfig
index 0650032..be9e3a0 100644
--- a/configs/mv88f6281gtw_ge_defconfig
+++ b/configs/mv88f6281gtw_ge_defconfig
@@ -1,3 +1,4 @@
CONFIG_ARM=y
CONFIG_KIRKWOOD=y
CONFIG_TARGET_MV88F6281GTW_GE=y
+CONFIG_CMD_NET=y
diff --git a/configs/mx23_olinuxino_defconfig b/configs/mx23_olinuxino_defconfig
index 491e5ad..7103e30 100644
--- a/configs/mx23_olinuxino_defconfig
+++ b/configs/mx23_olinuxino_defconfig
@@ -1,3 +1,4 @@
CONFIG_ARM=y
CONFIG_TARGET_MX23_OLINUXINO=y
CONFIG_SPL=y
+CONFIG_CMD_NET=y
diff --git a/configs/mx25pdk_defconfig b/configs/mx25pdk_defconfig
index 99af9df..cf55b9f 100644
--- a/configs/mx25pdk_defconfig
+++ b/configs/mx25pdk_defconfig
@@ -1,3 +1,4 @@
CONFIG_ARM=y
CONFIG_TARGET_MX25PDK=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx25pdk/imximage.cfg"
+CONFIG_CMD_NET=y
diff --git a/configs/mx28evk_auart_console_defconfig b/configs/mx28evk_auart_console_defconfig
index 353f827..174c019 100644
--- a/configs/mx28evk_auart_console_defconfig
+++ b/configs/mx28evk_auart_console_defconfig
@@ -2,3 +2,5 @@
CONFIG_TARGET_MX28EVK=y
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="MXS_AUART,MXS_AUART_BASE=MXS_UARTAPP3_BASE,ENV_IS_IN_MMC"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/mx28evk_defconfig b/configs/mx28evk_defconfig
index 8399cbd..0f8867f 100644
--- a/configs/mx28evk_defconfig
+++ b/configs/mx28evk_defconfig
@@ -2,3 +2,5 @@
CONFIG_TARGET_MX28EVK=y
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="ENV_IS_IN_MMC"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/mx28evk_nand_defconfig b/configs/mx28evk_nand_defconfig
index 20e2bd4..89eda0b 100644
--- a/configs/mx28evk_nand_defconfig
+++ b/configs/mx28evk_nand_defconfig
@@ -2,3 +2,5 @@
CONFIG_TARGET_MX28EVK=y
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="ENV_IS_IN_NAND"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/mx28evk_spi_defconfig b/configs/mx28evk_spi_defconfig
index 5411e47..19f088c 100644
--- a/configs/mx28evk_spi_defconfig
+++ b/configs/mx28evk_spi_defconfig
@@ -2,3 +2,5 @@
CONFIG_TARGET_MX28EVK=y
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="ENV_IS_IN_SPI_FLASH"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/mx31ads_defconfig b/configs/mx31ads_defconfig
index 5105a9a..096028c 100644
--- a/configs/mx31ads_defconfig
+++ b/configs/mx31ads_defconfig
@@ -1,2 +1,3 @@
CONFIG_ARM=y
CONFIG_TARGET_MX31ADS=y
+CONFIG_CMD_NET=y
diff --git a/configs/mx31pdk_defconfig b/configs/mx31pdk_defconfig
index 3c961b4..7f35233 100644
--- a/configs/mx31pdk_defconfig
+++ b/configs/mx31pdk_defconfig
@@ -1,3 +1,4 @@
CONFIG_ARM=y
CONFIG_TARGET_MX31PDK=y
CONFIG_SPL=y
+CONFIG_CMD_NET=y
diff --git a/configs/mx35pdk_defconfig b/configs/mx35pdk_defconfig
index 3d79fe1..992cd1d 100644
--- a/configs/mx35pdk_defconfig
+++ b/configs/mx35pdk_defconfig
@@ -1,2 +1,3 @@
CONFIG_ARM=y
CONFIG_TARGET_MX35PDK=y
+CONFIG_CMD_NET=y
diff --git a/configs/mx51_efikamx_defconfig b/configs/mx51_efikamx_defconfig
index 89b2527..55dcd67 100644
--- a/configs/mx51_efikamx_defconfig
+++ b/configs/mx51_efikamx_defconfig
@@ -1,3 +1,4 @@
CONFIG_ARM=y
CONFIG_TARGET_MX51_EFIKAMX=y
CONFIG_SYS_EXTRA_OPTIONS="MACH_TYPE=MACH_TYPE_MX51_EFIKAMX,IMX_CONFIG=board/genesi/mx51_efikamx/imximage_mx.cfg"
+CONFIG_CMD_NET=y
diff --git a/configs/mx51_efikasb_defconfig b/configs/mx51_efikasb_defconfig
index b7faacf..9958645 100644
--- a/configs/mx51_efikasb_defconfig
+++ b/configs/mx51_efikasb_defconfig
@@ -1,3 +1,4 @@
CONFIG_ARM=y
CONFIG_TARGET_MX51_EFIKAMX=y
CONFIG_SYS_EXTRA_OPTIONS="MACH_TYPE=MACH_TYPE_MX51_EFIKASB,IMX_CONFIG=board/genesi/mx51_efikamx/imximage_sb.cfg"
+CONFIG_CMD_NET=y
diff --git a/configs/mx51evk_defconfig b/configs/mx51evk_defconfig
index b3ac9f6..e208a44 100644
--- a/configs/mx51evk_defconfig
+++ b/configs/mx51evk_defconfig
@@ -1,3 +1,4 @@
CONFIG_ARM=y
CONFIG_TARGET_MX51EVK=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx51evk/imximage.cfg"
+CONFIG_CMD_NET=y
diff --git a/configs/mx53ard_defconfig b/configs/mx53ard_defconfig
index 988a7fd..85fbaf6 100644
--- a/configs/mx53ard_defconfig
+++ b/configs/mx53ard_defconfig
@@ -1,3 +1,5 @@
CONFIG_ARM=y
CONFIG_TARGET_MX53ARD=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx53ard/imximage_dd3.cfg"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/mx53evk_defconfig b/configs/mx53evk_defconfig
index 73e6095..fa07df4 100644
--- a/configs/mx53evk_defconfig
+++ b/configs/mx53evk_defconfig
@@ -1,3 +1,4 @@
CONFIG_ARM=y
CONFIG_TARGET_MX53EVK=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx53evk/imximage.cfg"
+CONFIG_CMD_NET=y
diff --git a/configs/mx53loco_defconfig b/configs/mx53loco_defconfig
index 8bb225b..e23fce8 100644
--- a/configs/mx53loco_defconfig
+++ b/configs/mx53loco_defconfig
@@ -1,3 +1,4 @@
CONFIG_ARM=y
CONFIG_TARGET_MX53LOCO=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx53loco/imximage.cfg"
+CONFIG_CMD_NET=y
diff --git a/configs/mx53smd_defconfig b/configs/mx53smd_defconfig
index bb8b8eb..9707964 100644
--- a/configs/mx53smd_defconfig
+++ b/configs/mx53smd_defconfig
@@ -1,3 +1,4 @@
CONFIG_ARM=y
CONFIG_TARGET_MX53SMD=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx53smd/imximage.cfg"
+CONFIG_CMD_NET=y
diff --git a/configs/mx6cuboxi_defconfig b/configs/mx6cuboxi_defconfig
index 68eec29..12899d6 100644
--- a/configs/mx6cuboxi_defconfig
+++ b/configs/mx6cuboxi_defconfig
@@ -2,5 +2,7 @@
CONFIG_TARGET_MX6CUBOXI=y
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/imx-common/spl_sd.cfg,MX6QDL"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
CONFIG_DM=y
CONFIG_DM_THERMAL=y
diff --git a/configs/mx6dlarm2_defconfig b/configs/mx6dlarm2_defconfig
index e2711ec..4324ccf 100644
--- a/configs/mx6dlarm2_defconfig
+++ b/configs/mx6dlarm2_defconfig
@@ -1,3 +1,4 @@
CONFIG_ARM=y
CONFIG_TARGET_MX6QARM2=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6qarm2/imximage_mx6dl.cfg,MX6DL,DDR_MB=2048"
+CONFIG_CMD_NET=y
diff --git a/configs/mx6dlarm2_lpddr2_defconfig b/configs/mx6dlarm2_lpddr2_defconfig
index f8af528..7681814 100644
--- a/configs/mx6dlarm2_lpddr2_defconfig
+++ b/configs/mx6dlarm2_lpddr2_defconfig
@@ -1,3 +1,4 @@
CONFIG_ARM=y
CONFIG_TARGET_MX6QARM2=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6qarm2/imximage_mx6dl.cfg,MX6DL,MX6DL_LPDDR2,DDR_MB=512"
+CONFIG_CMD_NET=y
diff --git a/configs/mx6dlsabreauto_defconfig b/configs/mx6dlsabreauto_defconfig
index 1f19dc3..7578fc8 100644
--- a/configs/mx6dlsabreauto_defconfig
+++ b/configs/mx6dlsabreauto_defconfig
@@ -1,3 +1,5 @@
CONFIG_ARM=y
CONFIG_TARGET_MX6QSABREAUTO=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6qsabreauto/mx6dl.cfg,MX6DL"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/mx6dlsabresd_defconfig b/configs/mx6dlsabresd_defconfig
index 5ca0e26..92d77f9 100644
--- a/configs/mx6dlsabresd_defconfig
+++ b/configs/mx6dlsabresd_defconfig
@@ -1,3 +1,5 @@
CONFIG_ARM=y
CONFIG_TARGET_MX6SABRESD=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6sabresd/mx6dlsabresd.cfg,MX6DL"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/mx6qarm2_defconfig b/configs/mx6qarm2_defconfig
index f229702..51ab7e3 100644
--- a/configs/mx6qarm2_defconfig
+++ b/configs/mx6qarm2_defconfig
@@ -1,3 +1,4 @@
CONFIG_ARM=y
CONFIG_TARGET_MX6QARM2=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6qarm2/imximage.cfg,MX6Q,DDR_MB=2048"
+CONFIG_CMD_NET=y
diff --git a/configs/mx6qarm2_lpddr2_defconfig b/configs/mx6qarm2_lpddr2_defconfig
index 477a692..c590c39 100644
--- a/configs/mx6qarm2_lpddr2_defconfig
+++ b/configs/mx6qarm2_lpddr2_defconfig
@@ -1,3 +1,4 @@
CONFIG_ARM=y
CONFIG_TARGET_MX6QARM2=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6qarm2/imximage.cfg,MX6Q,MX6DQ_LPDDR2,DDR_MB=512"
+CONFIG_CMD_NET=y
diff --git a/configs/mx6qsabreauto_defconfig b/configs/mx6qsabreauto_defconfig
index 595177c..3d584bd 100644
--- a/configs/mx6qsabreauto_defconfig
+++ b/configs/mx6qsabreauto_defconfig
@@ -1,3 +1,5 @@
CONFIG_ARM=y
CONFIG_TARGET_MX6QSABREAUTO=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6qsabreauto/imximage.cfg,MX6Q"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/mx6qsabrelite_defconfig b/configs/mx6qsabrelite_defconfig
index 012ab6b2..9ccf097 100644
--- a/configs/mx6qsabrelite_defconfig
+++ b/configs/mx6qsabrelite_defconfig
@@ -1,5 +1,7 @@
CONFIG_ARM=y
CONFIG_TARGET_NITROGEN6X=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6q.cfg,MX6Q,DDR_MB=1024,SABRELITE"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
CONFIG_DM=y
CONFIG_DM_THERMAL=y
diff --git a/configs/mx6qsabresd_defconfig b/configs/mx6qsabresd_defconfig
index 821c251..887a509 100644
--- a/configs/mx6qsabresd_defconfig
+++ b/configs/mx6qsabresd_defconfig
@@ -1,3 +1,5 @@
CONFIG_ARM=y
CONFIG_TARGET_MX6SABRESD=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6sabresd/mx6q_4x_mt41j128.cfg,MX6Q"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/mx6sabresd_spl_defconfig b/configs/mx6sabresd_spl_defconfig
index 0589c48..a9adcdb 100644
--- a/configs/mx6sabresd_spl_defconfig
+++ b/configs/mx6sabresd_spl_defconfig
@@ -2,3 +2,5 @@
CONFIG_TARGET_MX6SABRESD=y
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/imx-common/spl_sd.cfg,SPL,MX6Q"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/mx6slevk_defconfig b/configs/mx6slevk_defconfig
index ed9f836..dd623dd 100644
--- a/configs/mx6slevk_defconfig
+++ b/configs/mx6slevk_defconfig
@@ -1,5 +1,6 @@
CONFIG_ARM=y
CONFIG_TARGET_MX6SLEVK=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6slevk/imximage.cfg,MX6SL"
+CONFIG_CMD_NET=y
CONFIG_DM=y
CONFIG_DM_THERMAL=y
diff --git a/configs/mx6slevk_spinor_defconfig b/configs/mx6slevk_spinor_defconfig
index d0c993a..237c5b5 100644
--- a/configs/mx6slevk_spinor_defconfig
+++ b/configs/mx6slevk_spinor_defconfig
@@ -1,5 +1,6 @@
CONFIG_ARM=y
CONFIG_TARGET_MX6SLEVK=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6slevk/imximage.cfg,MX6SL,SYS_BOOT_SPINOR"
+CONFIG_CMD_NET=y
CONFIG_DM=y
CONFIG_DM_THERMAL=y
diff --git a/configs/mx6sxsabresd_defconfig b/configs/mx6sxsabresd_defconfig
index 65590bb..058e3f8 100644
--- a/configs/mx6sxsabresd_defconfig
+++ b/configs/mx6sxsabresd_defconfig
@@ -1,3 +1,4 @@
CONFIG_ARM=y
CONFIG_TARGET_MX6SXSABRESD=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6sxsabresd/imximage.cfg,MX6SX"
+CONFIG_CMD_NET=y
diff --git a/configs/mx6sxsabresd_spl_defconfig b/configs/mx6sxsabresd_spl_defconfig
index 3bafa12..0e3159e 100644
--- a/configs/mx6sxsabresd_spl_defconfig
+++ b/configs/mx6sxsabresd_spl_defconfig
@@ -2,3 +2,4 @@
CONFIG_TARGET_MX6SXSABRESD=y
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/imx-common/spl_sd.cfg,MX6SX"
+CONFIG_CMD_NET=y
diff --git a/configs/nas220_defconfig b/configs/nas220_defconfig
index 5a79c51..17a64c7 100644
--- a/configs/nas220_defconfig
+++ b/configs/nas220_defconfig
@@ -1,3 +1,4 @@
CONFIG_ARM=y
CONFIG_KIRKWOOD=y
CONFIG_TARGET_NAS220=y
+CONFIG_CMD_NET=y
diff --git a/configs/neo_defconfig b/configs/neo_defconfig
index bc28353..094a53d 100644
--- a/configs/neo_defconfig
+++ b/configs/neo_defconfig
@@ -1,4 +1,5 @@
CONFIG_PPC=y
CONFIG_4xx=y
CONFIG_TARGET_NEO=y
-CONFIG_REGEX=y
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/net2big_v2_defconfig b/configs/net2big_v2_defconfig
index d27182b..aa4bdd6 100644
--- a/configs/net2big_v2_defconfig
+++ b/configs/net2big_v2_defconfig
@@ -2,3 +2,4 @@
CONFIG_KIRKWOOD=y
CONFIG_TARGET_NET2BIG_V2=y
CONFIG_SYS_EXTRA_OPTIONS="NET2BIG_V2"
+CONFIG_CMD_NET=y
diff --git a/configs/netspace_lite_v2_defconfig b/configs/netspace_lite_v2_defconfig
index 02c82c5..b6f6fa5 100644
--- a/configs/netspace_lite_v2_defconfig
+++ b/configs/netspace_lite_v2_defconfig
@@ -2,3 +2,4 @@
CONFIG_KIRKWOOD=y
CONFIG_TARGET_NETSPACE_V2=y
CONFIG_SYS_EXTRA_OPTIONS="NETSPACE_LITE_V2"
+CONFIG_CMD_NET=y
diff --git a/configs/netspace_max_v2_defconfig b/configs/netspace_max_v2_defconfig
index bdabbf5..dcb8c32 100644
--- a/configs/netspace_max_v2_defconfig
+++ b/configs/netspace_max_v2_defconfig
@@ -2,3 +2,4 @@
CONFIG_KIRKWOOD=y
CONFIG_TARGET_NETSPACE_V2=y
CONFIG_SYS_EXTRA_OPTIONS="NETSPACE_MAX_V2"
+CONFIG_CMD_NET=y
diff --git a/configs/netspace_mini_v2_defconfig b/configs/netspace_mini_v2_defconfig
index a372ddc..50c5f97 100644
--- a/configs/netspace_mini_v2_defconfig
+++ b/configs/netspace_mini_v2_defconfig
@@ -2,3 +2,4 @@
CONFIG_KIRKWOOD=y
CONFIG_TARGET_NETSPACE_V2=y
CONFIG_SYS_EXTRA_OPTIONS="NETSPACE_MINI_V2"
+CONFIG_CMD_NET=y
diff --git a/configs/netspace_v2_defconfig b/configs/netspace_v2_defconfig
index c83d398..a6495e3 100644
--- a/configs/netspace_v2_defconfig
+++ b/configs/netspace_v2_defconfig
@@ -2,3 +2,4 @@
CONFIG_KIRKWOOD=y
CONFIG_TARGET_NETSPACE_V2=y
CONFIG_SYS_EXTRA_OPTIONS="NETSPACE_V2"
+CONFIG_CMD_NET=y
diff --git a/configs/nhk8815_defconfig b/configs/nhk8815_defconfig
index f661226..3d46043 100644
--- a/configs/nhk8815_defconfig
+++ b/configs/nhk8815_defconfig
@@ -1,3 +1,4 @@
CONFIG_ARM=y
CONFIG_ARCH_NOMADIK=y
CONFIG_NOMADIK_NHK8815=y
+CONFIG_CMD_NET=y
diff --git a/configs/nhk8815_onenand_defconfig b/configs/nhk8815_onenand_defconfig
index c334e61..7cc957f 100644
--- a/configs/nhk8815_onenand_defconfig
+++ b/configs/nhk8815_onenand_defconfig
@@ -2,3 +2,4 @@
CONFIG_ARCH_NOMADIK=y
CONFIG_NOMADIK_NHK8815=y
CONFIG_SYS_EXTRA_OPTIONS="BOOT_ONENAND"
+CONFIG_CMD_NET=y
diff --git a/configs/nios2-generic_defconfig b/configs/nios2-generic_defconfig
index f6da884..4ff0611 100644
--- a/configs/nios2-generic_defconfig
+++ b/configs/nios2-generic_defconfig
@@ -1,2 +1,3 @@
CONFIG_NIOS2=y
CONFIG_TARGET_NIOS2_GENERIC=y
+CONFIG_CMD_NET=y
diff --git a/configs/nitrogen6dl2g_defconfig b/configs/nitrogen6dl2g_defconfig
index 04439cd..ec0e346 100644
--- a/configs/nitrogen6dl2g_defconfig
+++ b/configs/nitrogen6dl2g_defconfig
@@ -1,3 +1,5 @@
CONFIG_ARM=y
CONFIG_TARGET_NITROGEN6X=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6dl2g.cfg,MX6DL,DDR_MB=2048"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/nitrogen6dl_defconfig b/configs/nitrogen6dl_defconfig
index d0f3d08..838a43e 100644
--- a/configs/nitrogen6dl_defconfig
+++ b/configs/nitrogen6dl_defconfig
@@ -1,3 +1,5 @@
CONFIG_ARM=y
CONFIG_TARGET_NITROGEN6X=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6dl.cfg,MX6DL,DDR_MB=1024"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/nitrogen6q2g_defconfig b/configs/nitrogen6q2g_defconfig
index b8bf23f..a739e22 100644
--- a/configs/nitrogen6q2g_defconfig
+++ b/configs/nitrogen6q2g_defconfig
@@ -1,3 +1,5 @@
CONFIG_ARM=y
CONFIG_TARGET_NITROGEN6X=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6q2g.cfg,MX6Q,DDR_MB=2048"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/nitrogen6q_defconfig b/configs/nitrogen6q_defconfig
index 525794c..b4b0524 100644
--- a/configs/nitrogen6q_defconfig
+++ b/configs/nitrogen6q_defconfig
@@ -1,3 +1,5 @@
CONFIG_ARM=y
CONFIG_TARGET_NITROGEN6X=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6q.cfg,MX6Q,DDR_MB=1024"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/nitrogen6s1g_defconfig b/configs/nitrogen6s1g_defconfig
index 4d59075..118f605 100644
--- a/configs/nitrogen6s1g_defconfig
+++ b/configs/nitrogen6s1g_defconfig
@@ -1,3 +1,5 @@
CONFIG_ARM=y
CONFIG_TARGET_NITROGEN6X=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6s1g.cfg,MX6S,DDR_MB=1024"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/nitrogen6s_defconfig b/configs/nitrogen6s_defconfig
index efeab49..3e70de9 100644
--- a/configs/nitrogen6s_defconfig
+++ b/configs/nitrogen6s_defconfig
@@ -1,3 +1,5 @@
CONFIG_ARM=y
CONFIG_TARGET_NITROGEN6X=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6s.cfg,MX6S,DDR_MB=512"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/novena_defconfig b/configs/novena_defconfig
index 0baa16d..ccc0055 100644
--- a/configs/novena_defconfig
+++ b/configs/novena_defconfig
@@ -2,4 +2,5 @@
CONFIG_TARGET_KOSAGI_NOVENA=y
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/imx-common/spl_sd.cfg,MX6Q"
-CONFIG_REGEX=y
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/nyan-big_defconfig b/configs/nyan-big_defconfig
index d447ddc..92acab2 100644
--- a/configs/nyan-big_defconfig
+++ b/configs/nyan-big_defconfig
@@ -3,5 +3,6 @@
CONFIG_TEGRA124=y
CONFIG_TARGET_NYAN_BIG=y
CONFIG_DEFAULT_DEVICE_TREE="tegra124-nyan-big"
+CONFIG_CMD_NET=y
CONFIG_DISPLAY_PORT=y
CONFIG_VIDEO_TEGRA124=y
diff --git a/configs/ocotea_defconfig b/configs/ocotea_defconfig
index c0fa6ce..864aefb 100644
--- a/configs/ocotea_defconfig
+++ b/configs/ocotea_defconfig
@@ -1,4 +1,5 @@
CONFIG_PPC=y
CONFIG_4xx=y
CONFIG_TARGET_OCOTEA=y
-CONFIG_REGEX=y
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/odroid-xu3_defconfig b/configs/odroid-xu3_defconfig
index 3f4c2cb..c9c4849 100644
--- a/configs/odroid-xu3_defconfig
+++ b/configs/odroid-xu3_defconfig
@@ -1,5 +1,6 @@
CONFIG_ARM=y
CONFIG_ARCH_EXYNOS=y
CONFIG_TARGET_ODROID_XU3=y
-CONFIG_DEFAULT_DEVICE_TREE="exynos5422-odroidxu3"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
+CONFIG_DEFAULT_DEVICE_TREE="exynos5422-odroidxu3"
+CONFIG_CMD_NET=y
diff --git a/configs/odroid_defconfig b/configs/odroid_defconfig
index a659bfc..5efcdf5 100644
--- a/configs/odroid_defconfig
+++ b/configs/odroid_defconfig
@@ -1,15 +1,17 @@
CONFIG_ARM=y
CONFIG_ARCH_EXYNOS=y
CONFIG_TARGET_ODROID=y
-CONFIG_DEFAULT_DEVICE_TREE="exynos4412-odroid"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
+CONFIG_DEFAULT_DEVICE_TREE="exynos4412-odroid"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
+CONFIG_CMD_PMIC=y
+CONFIG_CMD_REGULATOR=y
CONFIG_OF_CONTROL=y
CONFIG_DM_I2C=y
CONFIG_DM_I2C_COMPAT=y
-CONFIG_ERRNO_STR=y
CONFIG_DM_PMIC=y
-CONFIG_CMD_PMIC=y
CONFIG_DM_PMIC_MAX77686=y
CONFIG_DM_REGULATOR=y
-CONFIG_CMD_REGULATOR=y
CONFIG_DM_REGULATOR_MAX77686=y
+CONFIG_ERRNO_STR=y
diff --git a/configs/omap3_beagle_defconfig b/configs/omap3_beagle_defconfig
index 07cb186..e5b1f3a 100644
--- a/configs/omap3_beagle_defconfig
+++ b/configs/omap3_beagle_defconfig
@@ -3,3 +3,5 @@
CONFIG_TARGET_OMAP3_BEAGLE=y
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="NAND"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/omap3_evm_defconfig b/configs/omap3_evm_defconfig
index b3b1d0e..d48cfc2 100644
--- a/configs/omap3_evm_defconfig
+++ b/configs/omap3_evm_defconfig
@@ -2,3 +2,4 @@
CONFIG_OMAP34XX=y
CONFIG_TARGET_OMAP3_EVM=y
CONFIG_SPL=y
+CONFIG_CMD_NET=y
diff --git a/configs/omap3_evm_quick_mmc_defconfig b/configs/omap3_evm_quick_mmc_defconfig
index a41166f..7d0a973 100644
--- a/configs/omap3_evm_quick_mmc_defconfig
+++ b/configs/omap3_evm_quick_mmc_defconfig
@@ -2,3 +2,4 @@
CONFIG_OMAP34XX=y
CONFIG_TARGET_OMAP3_EVM_QUICK_MMC=y
CONFIG_SPL=y
+CONFIG_CMD_NET=y
diff --git a/configs/omap3_evm_quick_nand_defconfig b/configs/omap3_evm_quick_nand_defconfig
index 3ae768b..6dec5cd 100644
--- a/configs/omap3_evm_quick_nand_defconfig
+++ b/configs/omap3_evm_quick_nand_defconfig
@@ -2,3 +2,4 @@
CONFIG_OMAP34XX=y
CONFIG_TARGET_OMAP3_EVM_QUICK_NAND=y
CONFIG_SPL=y
+CONFIG_CMD_NET=y
diff --git a/configs/omap3_ha_defconfig b/configs/omap3_ha_defconfig
index a48a1e0..3d596a7 100644
--- a/configs/omap3_ha_defconfig
+++ b/configs/omap3_ha_defconfig
@@ -3,3 +3,4 @@
CONFIG_TARGET_TAO3530=y
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_BOARD_OMAP3_HA"
+CONFIG_CMD_NET=y
diff --git a/configs/omap3_logic_defconfig b/configs/omap3_logic_defconfig
index 5f2c063..c9fdda8 100644
--- a/configs/omap3_logic_defconfig
+++ b/configs/omap3_logic_defconfig
@@ -1,3 +1,5 @@
CONFIG_ARM=y
CONFIG_OMAP34XX=y
CONFIG_TARGET_OMAP3_LOGIC=y
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/omap3_mvblx_defconfig b/configs/omap3_mvblx_defconfig
index fb6edc2..ec4924b 100644
--- a/configs/omap3_mvblx_defconfig
+++ b/configs/omap3_mvblx_defconfig
@@ -1,3 +1,4 @@
CONFIG_ARM=y
CONFIG_OMAP34XX=y
CONFIG_TARGET_OMAP3_MVBLX=y
+CONFIG_CMD_NET=y
diff --git a/configs/omap3_overo_defconfig b/configs/omap3_overo_defconfig
index eb431ec..9416bce 100644
--- a/configs/omap3_overo_defconfig
+++ b/configs/omap3_overo_defconfig
@@ -2,3 +2,4 @@
CONFIG_OMAP34XX=y
CONFIG_TARGET_OMAP3_OVERO=y
CONFIG_SPL=y
+CONFIG_CMD_NET=y
diff --git a/configs/omap3_sdp3430_defconfig b/configs/omap3_sdp3430_defconfig
index 1172c2a..846fd1a 100644
--- a/configs/omap3_sdp3430_defconfig
+++ b/configs/omap3_sdp3430_defconfig
@@ -1,3 +1,4 @@
CONFIG_ARM=y
CONFIG_OMAP34XX=y
CONFIG_TARGET_OMAP3_SDP3430=y
+CONFIG_CMD_NET=y
diff --git a/configs/omap3_zoom1_defconfig b/configs/omap3_zoom1_defconfig
index e2d0a8c..ba05d08 100644
--- a/configs/omap3_zoom1_defconfig
+++ b/configs/omap3_zoom1_defconfig
@@ -1,3 +1,4 @@
CONFIG_ARM=y
CONFIG_OMAP34XX=y
CONFIG_TARGET_OMAP3_ZOOM1=y
+CONFIG_CMD_NET=y
diff --git a/configs/omap4_panda_defconfig b/configs/omap4_panda_defconfig
index c8e278b..ec6a63a 100644
--- a/configs/omap4_panda_defconfig
+++ b/configs/omap4_panda_defconfig
@@ -2,3 +2,4 @@
CONFIG_OMAP44XX=y
CONFIG_TARGET_OMAP4_PANDA=y
CONFIG_SPL=y
+CONFIG_CMD_NET=y
diff --git a/configs/omap5_uevm_defconfig b/configs/omap5_uevm_defconfig
index 88411ce..d2ad480 100644
--- a/configs/omap5_uevm_defconfig
+++ b/configs/omap5_uevm_defconfig
@@ -2,3 +2,4 @@
CONFIG_OMAP54XX=y
CONFIG_TARGET_OMAP5_UEVM=y
CONFIG_SPL=y
+CONFIG_CMD_NET=y
diff --git a/configs/omapl138_lcdk_defconfig b/configs/omapl138_lcdk_defconfig
index 148e06a..e4b7e13 100644
--- a/configs/omapl138_lcdk_defconfig
+++ b/configs/omapl138_lcdk_defconfig
@@ -2,3 +2,4 @@
CONFIG_ARCH_DAVINCI=y
CONFIG_TARGET_OMAPL138_LCDK=y
CONFIG_SPL=y
+CONFIG_CMD_NET=y
diff --git a/configs/openrd_base_defconfig b/configs/openrd_base_defconfig
index d7c2aee..a620e61 100644
--- a/configs/openrd_base_defconfig
+++ b/configs/openrd_base_defconfig
@@ -2,3 +2,4 @@
CONFIG_KIRKWOOD=y
CONFIG_TARGET_OPENRD=y
CONFIG_SYS_EXTRA_OPTIONS="BOARD_IS_OPENRD_BASE"
+CONFIG_CMD_NET=y
diff --git a/configs/openrd_client_defconfig b/configs/openrd_client_defconfig
index 2c03cf2..4a49663 100644
--- a/configs/openrd_client_defconfig
+++ b/configs/openrd_client_defconfig
@@ -2,3 +2,4 @@
CONFIG_KIRKWOOD=y
CONFIG_TARGET_OPENRD=y
CONFIG_SYS_EXTRA_OPTIONS="BOARD_IS_OPENRD_CLIENT"
+CONFIG_CMD_NET=y
diff --git a/configs/openrd_ultimate_defconfig b/configs/openrd_ultimate_defconfig
index 4f37a94..a81b382 100644
--- a/configs/openrd_ultimate_defconfig
+++ b/configs/openrd_ultimate_defconfig
@@ -2,3 +2,4 @@
CONFIG_KIRKWOOD=y
CONFIG_TARGET_OPENRD=y
CONFIG_SYS_EXTRA_OPTIONS="BOARD_IS_OPENRD_ULTIMATE"
+CONFIG_CMD_NET=y
diff --git a/configs/openrisc-generic_defconfig b/configs/openrisc-generic_defconfig
index e422974..fb4024a 100644
--- a/configs/openrisc-generic_defconfig
+++ b/configs/openrisc-generic_defconfig
@@ -1,2 +1,3 @@
CONFIG_OPENRISC=y
CONFIG_TARGET_OPENRISC_GENERIC=y
+CONFIG_CMD_NET=y
diff --git a/configs/origen_defconfig b/configs/origen_defconfig
index 53257d6..3c59b9b 100644
--- a/configs/origen_defconfig
+++ b/configs/origen_defconfig
@@ -3,4 +3,5 @@
CONFIG_TARGET_ORIGEN=y
CONFIG_DEFAULT_DEVICE_TREE="exynos4210-origen"
CONFIG_SPL=y
+CONFIG_CMD_SETEXPR=y
CONFIG_OF_CONTROL=y
diff --git a/configs/ot1200_defconfig b/configs/ot1200_defconfig
index fae11ea..20f64bb 100644
--- a/configs/ot1200_defconfig
+++ b/configs/ot1200_defconfig
@@ -1,3 +1,5 @@
CONFIG_ARM=y
CONFIG_TARGET_OT1200=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/bachmann/ot1200/mx6q_4x_mt41j128.cfg,MX6Q"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/ot1200_spl_defconfig b/configs/ot1200_spl_defconfig
index 2d23923..810dff8 100644
--- a/configs/ot1200_spl_defconfig
+++ b/configs/ot1200_spl_defconfig
@@ -2,3 +2,5 @@
CONFIG_TARGET_OT1200=y
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/imx-common/spl_sd.cfg,MX6Q"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/otc570_dataflash_defconfig b/configs/otc570_dataflash_defconfig
index 1c04762..ffa756c 100644
--- a/configs/otc570_dataflash_defconfig
+++ b/configs/otc570_dataflash_defconfig
@@ -2,3 +2,4 @@
CONFIG_ARCH_AT91=y
CONFIG_TARGET_OTC570=y
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9263,SYS_USE_DATAFLASH"
+CONFIG_CMD_NET=y
diff --git a/configs/otc570_defconfig b/configs/otc570_defconfig
index f0358bb..e1f666bd 100644
--- a/configs/otc570_defconfig
+++ b/configs/otc570_defconfig
@@ -2,3 +2,4 @@
CONFIG_ARCH_AT91=y
CONFIG_TARGET_OTC570=y
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9263,SYS_USE_NANDFLASH"
+CONFIG_CMD_NET=y
diff --git a/configs/p3p440_defconfig b/configs/p3p440_defconfig
index 0511b14..2b1a02e 100644
--- a/configs/p3p440_defconfig
+++ b/configs/p3p440_defconfig
@@ -1,3 +1,4 @@
CONFIG_PPC=y
CONFIG_4xx=y
CONFIG_TARGET_P3P440=y
+CONFIG_CMD_NET=y
diff --git a/configs/paz00_defconfig b/configs/paz00_defconfig
index e18017b..3a72b31 100644
--- a/configs/paz00_defconfig
+++ b/configs/paz00_defconfig
@@ -3,3 +3,4 @@
CONFIG_TEGRA20=y
CONFIG_TARGET_PAZ00=y
CONFIG_DEFAULT_DEVICE_TREE="tegra20-paz00"
+CONFIG_CMD_NET=y
diff --git a/configs/pb1000_defconfig b/configs/pb1000_defconfig
index bbffef6..f1fdf7c 100644
--- a/configs/pb1000_defconfig
+++ b/configs/pb1000_defconfig
@@ -1,3 +1,4 @@
CONFIG_MIPS=y
CONFIG_TARGET_PB1X00=y
CONFIG_SYS_EXTRA_OPTIONS="PB1000"
+CONFIG_CMD_NET=y
diff --git a/configs/pcm030_LOWBOOT_defconfig b/configs/pcm030_LOWBOOT_defconfig
index 601de5f..5ec6370 100644
--- a/configs/pcm030_LOWBOOT_defconfig
+++ b/configs/pcm030_LOWBOOT_defconfig
@@ -2,3 +2,4 @@
CONFIG_MPC5xxx=y
CONFIG_TARGET_PCM030=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_TEXT_BASE=0xFF000000"
+CONFIG_CMD_NET=y
diff --git a/configs/pcm030_defconfig b/configs/pcm030_defconfig
index 3283517..da0cb5f 100644
--- a/configs/pcm030_defconfig
+++ b/configs/pcm030_defconfig
@@ -1,3 +1,4 @@
CONFIG_PPC=y
CONFIG_MPC5xxx=y
CONFIG_TARGET_PCM030=y
+CONFIG_CMD_NET=y
diff --git a/configs/pcm051_rev1_defconfig b/configs/pcm051_rev1_defconfig
index af02b2f..1ea9333 100644
--- a/configs/pcm051_rev1_defconfig
+++ b/configs/pcm051_rev1_defconfig
@@ -2,3 +2,4 @@
CONFIG_TARGET_PCM051=y
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="REV1"
+CONFIG_CMD_NET=y
diff --git a/configs/pcm051_rev3_defconfig b/configs/pcm051_rev3_defconfig
index 2a907d7..a0a32f6 100644
--- a/configs/pcm051_rev3_defconfig
+++ b/configs/pcm051_rev3_defconfig
@@ -2,3 +2,4 @@
CONFIG_TARGET_PCM051=y
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="REV3"
+CONFIG_CMD_NET=y
diff --git a/configs/pcs440ep_defconfig b/configs/pcs440ep_defconfig
index 299bf8a..593766e 100644
--- a/configs/pcs440ep_defconfig
+++ b/configs/pcs440ep_defconfig
@@ -1,3 +1,4 @@
CONFIG_PPC=y
CONFIG_4xx=y
CONFIG_TARGET_PCS440EP=y
+CONFIG_CMD_NET=y
diff --git a/configs/pdm360ng_defconfig b/configs/pdm360ng_defconfig
index 4e3d704..ca83cc0 100644
--- a/configs/pdm360ng_defconfig
+++ b/configs/pdm360ng_defconfig
@@ -1,3 +1,4 @@
CONFIG_PPC=y
CONFIG_MPC512X=y
CONFIG_TARGET_PDM360NG=y
+CONFIG_CMD_NET=y
diff --git a/configs/peach-pi_defconfig b/configs/peach-pi_defconfig
index 865f52c..88f5e97 100644
--- a/configs/peach-pi_defconfig
+++ b/configs/peach-pi_defconfig
@@ -3,6 +3,7 @@
CONFIG_TARGET_PEACH_PI=y
CONFIG_DEFAULT_DEVICE_TREE="exynos5800-peach-pi"
CONFIG_SPL=y
+CONFIG_CMD_NET=y
CONFIG_CMD_CROS_EC=y
CONFIG_CROS_EC=y
CONFIG_CROS_EC_SPI=y
diff --git a/configs/peach-pit_defconfig b/configs/peach-pit_defconfig
index b850092..e6b5bce 100644
--- a/configs/peach-pit_defconfig
+++ b/configs/peach-pit_defconfig
@@ -3,6 +3,7 @@
CONFIG_TARGET_PEACH_PIT=y
CONFIG_DEFAULT_DEVICE_TREE="exynos5420-peach-pit"
CONFIG_SPL=y
+CONFIG_CMD_NET=y
CONFIG_CMD_CROS_EC=y
CONFIG_CROS_EC=y
CONFIG_CROS_EC_SPI=y
diff --git a/configs/pengwyn_defconfig b/configs/pengwyn_defconfig
index 502c4f0..72ccb3e 100644
--- a/configs/pengwyn_defconfig
+++ b/configs/pengwyn_defconfig
@@ -1,3 +1,4 @@
CONFIG_ARM=y
CONFIG_TARGET_PENGWYN=y
CONFIG_SPL=y
+CONFIG_CMD_NET=y
diff --git a/configs/pepper_defconfig b/configs/pepper_defconfig
index 9c7bf58..c4c6257 100644
--- a/configs/pepper_defconfig
+++ b/configs/pepper_defconfig
@@ -1,3 +1,4 @@
CONFIG_ARM=y
CONFIG_TARGET_PEPPER=y
CONFIG_SPL=y
+CONFIG_CMD_NET=y
diff --git a/configs/ph1_ld4_defconfig b/configs/ph1_ld4_defconfig
index 036e2d1..82ce8c7 100644
--- a/configs/ph1_ld4_defconfig
+++ b/configs/ph1_ld4_defconfig
@@ -3,6 +3,8 @@
CONFIG_SPL_DM=y
CONFIG_MACH_PH1_LD4=y
CONFIG_PFC_MICRO_SUPPORT_CARD=y
+CONFIG_NET=y
+CONFIG_SYS_TEXT_BASE=0x84000000
CONFIG_DEFAULT_DEVICE_TREE="uniphier-ph1-ld4-ref"
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
@@ -30,6 +32,7 @@
CONFIG_CMD_NFS=y
CONFIG_CMD_PING=y
CONFIG_CMD_TIME=y
+CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_NAND_DENALI=y
CONFIG_SYS_NAND_DENALI_64BIT=y
CONFIG_NAND_DENALI_SPARE_AREA_SKIP_BYTES=8
diff --git a/configs/ph1_pro4_defconfig b/configs/ph1_pro4_defconfig
index 9a010ee..671d9cc 100644
--- a/configs/ph1_pro4_defconfig
+++ b/configs/ph1_pro4_defconfig
@@ -1,8 +1,9 @@
CONFIG_ARM=y
CONFIG_ARCH_UNIPHIER=y
CONFIG_SPL_DM=y
-CONFIG_MACH_PH1_PRO4=y
CONFIG_PFC_MICRO_SUPPORT_CARD=y
+CONFIG_NET=y
+CONFIG_SYS_TEXT_BASE=0x84000000
CONFIG_DEFAULT_DEVICE_TREE="uniphier-ph1-pro4-ref"
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
@@ -30,6 +31,7 @@
CONFIG_CMD_NFS=y
CONFIG_CMD_PING=y
CONFIG_CMD_TIME=y
+CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_NAND_DENALI=y
CONFIG_SYS_NAND_DENALI_64BIT=y
CONFIG_NAND_DENALI_SPARE_AREA_SKIP_BYTES=8
diff --git a/configs/ph1_sld8_defconfig b/configs/ph1_sld8_defconfig
index 29fe0e8..3e763dc 100644
--- a/configs/ph1_sld8_defconfig
+++ b/configs/ph1_sld8_defconfig
@@ -3,6 +3,8 @@
CONFIG_SPL_DM=y
CONFIG_MACH_PH1_SLD8=y
CONFIG_PFC_MICRO_SUPPORT_CARD=y
+CONFIG_NET=y
+CONFIG_SYS_TEXT_BASE=0x84000000
CONFIG_DEFAULT_DEVICE_TREE="uniphier-ph1-sld8-ref"
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
@@ -30,6 +32,7 @@
CONFIG_CMD_NFS=y
CONFIG_CMD_PING=y
CONFIG_CMD_TIME=y
+CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_NAND_DENALI=y
CONFIG_SYS_NAND_DENALI_64BIT=y
CONFIG_NAND_DENALI_SPARE_AREA_SKIP_BYTES=8
diff --git a/configs/platinum_picon_defconfig b/configs/platinum_picon_defconfig
index c80c3cb..672ea28 100644
--- a/configs/platinum_picon_defconfig
+++ b/configs/platinum_picon_defconfig
@@ -2,3 +2,4 @@
CONFIG_TARGET_PLATINUM_PICON=y
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/imx-common/spl_sd.cfg,MX6DL"
+CONFIG_CMD_NET=y
diff --git a/configs/platinum_titanium_defconfig b/configs/platinum_titanium_defconfig
index 303de5c..39236f1 100644
--- a/configs/platinum_titanium_defconfig
+++ b/configs/platinum_titanium_defconfig
@@ -2,3 +2,4 @@
CONFIG_TARGET_PLATINUM_TITANIUM=y
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/imx-common/spl_sd.cfg,MX6Q"
+CONFIG_CMD_NET=y
diff --git a/configs/plutux_defconfig b/configs/plutux_defconfig
index d5f6a1f..1a9fa47 100644
--- a/configs/plutux_defconfig
+++ b/configs/plutux_defconfig
@@ -3,3 +3,4 @@
CONFIG_TEGRA20=y
CONFIG_TARGET_PLUTUX=y
CONFIG_DEFAULT_DEVICE_TREE="tegra20-plutux"
+CONFIG_CMD_NET=y
diff --git a/configs/pm9261_defconfig b/configs/pm9261_defconfig
index c557e97..3393fba 100644
--- a/configs/pm9261_defconfig
+++ b/configs/pm9261_defconfig
@@ -2,3 +2,4 @@
CONFIG_ARCH_AT91=y
CONFIG_TARGET_PM9261=y
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9261"
+CONFIG_CMD_NET=y
diff --git a/configs/pm9263_defconfig b/configs/pm9263_defconfig
index f14f0a7..c6398f5 100644
--- a/configs/pm9263_defconfig
+++ b/configs/pm9263_defconfig
@@ -2,3 +2,4 @@
CONFIG_ARCH_AT91=y
CONFIG_TARGET_PM9263=y
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9263"
+CONFIG_CMD_NET=y
diff --git a/configs/pm9g45_defconfig b/configs/pm9g45_defconfig
index f188cd5..5227bd2 100644
--- a/configs/pm9g45_defconfig
+++ b/configs/pm9g45_defconfig
@@ -2,3 +2,4 @@
CONFIG_ARCH_AT91=y
CONFIG_TARGET_PM9G45=y
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G45"
+CONFIG_CMD_NET=y
diff --git a/configs/pogo_e02_defconfig b/configs/pogo_e02_defconfig
index 97effef..11af9cf 100644
--- a/configs/pogo_e02_defconfig
+++ b/configs/pogo_e02_defconfig
@@ -1,3 +1,4 @@
CONFIG_ARM=y
CONFIG_KIRKWOOD=y
CONFIG_TARGET_POGO_E02=y
+CONFIG_CMD_NET=y
diff --git a/configs/polaris_defconfig b/configs/polaris_defconfig
index 284a63e..703c48b 100644
--- a/configs/polaris_defconfig
+++ b/configs/polaris_defconfig
@@ -1,3 +1,4 @@
CONFIG_ARM=y
CONFIG_TARGET_TRIZEPSIV=y
CONFIG_SYS_EXTRA_OPTIONS="POLARIS"
+CONFIG_CMD_NET=y
diff --git a/configs/porter_defconfig b/configs/porter_defconfig
index a7b044e..d545b53 100644
--- a/configs/porter_defconfig
+++ b/configs/porter_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
CONFIG_RMOBILE=y
CONFIG_TARGET_PORTER=y
+CONFIG_CMD_NET=y
CONFIG_SH_SDHI=y
diff --git a/configs/portl2_defconfig b/configs/portl2_defconfig
index 52867ff..37ced5a 100644
--- a/configs/portl2_defconfig
+++ b/configs/portl2_defconfig
@@ -2,3 +2,5 @@
CONFIG_KIRKWOOD=y
CONFIG_TARGET_KM_KIRKWOOD=y
CONFIG_SYS_EXTRA_OPTIONS="KM_PORTL2"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/portuxg20_defconfig b/configs/portuxg20_defconfig
index 29184e6..aa44a80 100644
--- a/configs/portuxg20_defconfig
+++ b/configs/portuxg20_defconfig
@@ -2,3 +2,4 @@
CONFIG_ARCH_AT91=y
CONFIG_TARGET_STAMP9G20=y
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G20,PORTUXG20"
+CONFIG_CMD_NET=y
diff --git a/configs/pr1_defconfig b/configs/pr1_defconfig
index 793a4e8..f85cc77 100644
--- a/configs/pr1_defconfig
+++ b/configs/pr1_defconfig
@@ -1,3 +1,4 @@
CONFIG_BLACKFIN=y
CONFIG_TARGET_PR1=y
+CONFIG_CMD_NET=y
CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED=y
diff --git a/configs/pxa255_idp_defconfig b/configs/pxa255_idp_defconfig
index 251d6c4..ad9bd4c 100644
--- a/configs/pxa255_idp_defconfig
+++ b/configs/pxa255_idp_defconfig
@@ -1,2 +1,3 @@
CONFIG_ARM=y
CONFIG_TARGET_PXA255_IDP=y
+CONFIG_CMD_NET=y
diff --git a/configs/pxm2_defconfig b/configs/pxm2_defconfig
index db2b03a..e65dff5 100644
--- a/configs/pxm2_defconfig
+++ b/configs/pxm2_defconfig
@@ -1,3 +1,4 @@
CONFIG_ARM=y
CONFIG_TARGET_PXM2=y
CONFIG_SPL=y
+CONFIG_CMD_NET=y
diff --git a/configs/qemu-ppce500_defconfig b/configs/qemu-ppce500_defconfig
index 2b8f707..3f58564 100644
--- a/configs/qemu-ppce500_defconfig
+++ b/configs/qemu-ppce500_defconfig
@@ -1,3 +1,5 @@
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_QEMU_PPCE500=y
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/qemu-x86_defconfig b/configs/qemu-x86_defconfig
new file mode 100644
index 0000000..901cbd7
--- /dev/null
+++ b/configs/qemu-x86_defconfig
@@ -0,0 +1,10 @@
+CONFIG_X86=y
+CONFIG_VENDOR_EMULATION=y
+CONFIG_DEFAULT_DEVICE_TREE="qemu-x86_i440fx"
+CONFIG_TARGET_QEMU_X86=y
+CONFIG_GENERATE_PIRQ_TABLE=y
+CONFIG_CMD_NET=y
+CONFIG_OF_CONTROL=y
+CONFIG_VIDEO_VESA=y
+CONFIG_FRAMEBUFFER_SET_VESA_MODE=y
+CONFIG_FRAMEBUFFER_VESA_MODE_111=y
diff --git a/configs/qemu_mips64_defconfig b/configs/qemu_mips64_defconfig
index 691c505..a96e3f7 100644
--- a/configs/qemu_mips64_defconfig
+++ b/configs/qemu_mips64_defconfig
@@ -1,3 +1,4 @@
CONFIG_MIPS=y
CONFIG_TARGET_QEMU_MIPS=y
CONFIG_CPU_MIPS64_R1=y
+CONFIG_CMD_NET=y
diff --git a/configs/qemu_mips64el_defconfig b/configs/qemu_mips64el_defconfig
index a9ebd7b..94c0610 100644
--- a/configs/qemu_mips64el_defconfig
+++ b/configs/qemu_mips64el_defconfig
@@ -2,3 +2,4 @@
CONFIG_TARGET_QEMU_MIPS=y
CONFIG_SYS_LITTLE_ENDIAN=y
CONFIG_CPU_MIPS64_R1=y
+CONFIG_CMD_NET=y
diff --git a/configs/qemu_mips_defconfig b/configs/qemu_mips_defconfig
index 2f767d6..446d87d 100644
--- a/configs/qemu_mips_defconfig
+++ b/configs/qemu_mips_defconfig
@@ -1,2 +1,3 @@
CONFIG_MIPS=y
CONFIG_TARGET_QEMU_MIPS=y
+CONFIG_CMD_NET=y
diff --git a/configs/qemu_mipsel_defconfig b/configs/qemu_mipsel_defconfig
index d0acb28..e0b3990 100644
--- a/configs/qemu_mipsel_defconfig
+++ b/configs/qemu_mipsel_defconfig
@@ -1,3 +1,4 @@
CONFIG_MIPS=y
CONFIG_TARGET_QEMU_MIPS=y
CONFIG_SYS_LITTLE_ENDIAN=y
+CONFIG_CMD_NET=y
diff --git a/configs/qong_defconfig b/configs/qong_defconfig
index fddd836..233b046 100644
--- a/configs/qong_defconfig
+++ b/configs/qong_defconfig
@@ -1,2 +1,4 @@
CONFIG_ARM=y
CONFIG_TARGET_QONG=y
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/r0p7734_defconfig b/configs/r0p7734_defconfig
index 2b2d2cd..caf0cb5 100644
--- a/configs/r0p7734_defconfig
+++ b/configs/r0p7734_defconfig
@@ -1,2 +1,3 @@
CONFIG_SH=y
CONFIG_TARGET_R0P7734=y
+CONFIG_CMD_NET=y
diff --git a/configs/r2dplus_defconfig b/configs/r2dplus_defconfig
index 87de323..6d37e26 100644
--- a/configs/r2dplus_defconfig
+++ b/configs/r2dplus_defconfig
@@ -1,2 +1,3 @@
CONFIG_SH=y
CONFIG_TARGET_R2DPLUS=y
+CONFIG_CMD_NET=y
diff --git a/configs/r7780mp_defconfig b/configs/r7780mp_defconfig
index 7e201f5..f32dfcb 100644
--- a/configs/r7780mp_defconfig
+++ b/configs/r7780mp_defconfig
@@ -1,2 +1,3 @@
CONFIG_SH=y
CONFIG_TARGET_R7780MP=y
+CONFIG_CMD_NET=y
diff --git a/configs/rainier_defconfig b/configs/rainier_defconfig
index 1713592..e84b349 100644
--- a/configs/rainier_defconfig
+++ b/configs/rainier_defconfig
@@ -2,3 +2,5 @@
CONFIG_4xx=y
CONFIG_TARGET_SEQUOIA=y
CONFIG_SYS_EXTRA_OPTIONS="RAINIER"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/rainier_ramboot_defconfig b/configs/rainier_ramboot_defconfig
index ba22d9d..cca296e 100644
--- a/configs/rainier_ramboot_defconfig
+++ b/configs/rainier_ramboot_defconfig
@@ -2,3 +2,5 @@
CONFIG_4xx=y
CONFIG_TARGET_SEQUOIA=y
CONFIG_SYS_EXTRA_OPTIONS="RAINIER,SYS_RAMBOOT,SYS_TEXT_BASE=0x01000000,SYS_LDSCRIPT=board/amcc/sequoia/u-boot-ram.lds"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/rd6281a_defconfig b/configs/rd6281a_defconfig
index ed083bf..1a9fcd3 100644
--- a/configs/rd6281a_defconfig
+++ b/configs/rd6281a_defconfig
@@ -1,3 +1,4 @@
CONFIG_ARM=y
CONFIG_KIRKWOOD=y
CONFIG_TARGET_RD6281A=y
+CONFIG_CMD_NET=y
diff --git a/configs/redwood_defconfig b/configs/redwood_defconfig
index 36840dd..97252c4 100644
--- a/configs/redwood_defconfig
+++ b/configs/redwood_defconfig
@@ -1,4 +1,5 @@
CONFIG_PPC=y
CONFIG_4xx=y
CONFIG_TARGET_REDWOOD=y
-CONFIG_REGEX=y
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/riotboard_defconfig b/configs/riotboard_defconfig
index ae0036a..104b3e6 100644
--- a/configs/riotboard_defconfig
+++ b/configs/riotboard_defconfig
@@ -1,5 +1,7 @@
CONFIG_ARM=y
CONFIG_TARGET_EMBESTMX6BOARDS=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6s1g.cfg,MX6S,DDR_MB=1024,ENV_IS_IN_MMC"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
CONFIG_DM=y
CONFIG_DM_THERMAL=y
diff --git a/configs/rpi_2_defconfig b/configs/rpi_2_defconfig
index 965fcae..b72d3a5 100644
--- a/configs/rpi_2_defconfig
+++ b/configs/rpi_2_defconfig
@@ -1,3 +1,4 @@
CONFIG_ARM=y
CONFIG_ARCH_BCM283X=y
CONFIG_TARGET_RPI_2=y
+CONFIG_CMD_NET=y
diff --git a/configs/rpi_defconfig b/configs/rpi_defconfig
index 8de1d9f..fc1aef3 100644
--- a/configs/rpi_defconfig
+++ b/configs/rpi_defconfig
@@ -1,3 +1,4 @@
CONFIG_ARM=y
CONFIG_ARCH_BCM283X=y
CONFIG_TARGET_RPI=y
+CONFIG_CMD_NET=y
diff --git a/configs/rsk7203_defconfig b/configs/rsk7203_defconfig
index 44c0bc8..c85ebba 100644
--- a/configs/rsk7203_defconfig
+++ b/configs/rsk7203_defconfig
@@ -1,2 +1,3 @@
CONFIG_SH=y
CONFIG_TARGET_RSK7203=y
+CONFIG_CMD_NET=y
diff --git a/configs/rsk7264_defconfig b/configs/rsk7264_defconfig
index aedc333..1bf5d06 100644
--- a/configs/rsk7264_defconfig
+++ b/configs/rsk7264_defconfig
@@ -1,2 +1,3 @@
CONFIG_SH=y
CONFIG_TARGET_RSK7264=y
+CONFIG_CMD_NET=y
diff --git a/configs/rsk7269_defconfig b/configs/rsk7269_defconfig
index 25fdf80..6ddd099 100644
--- a/configs/rsk7269_defconfig
+++ b/configs/rsk7269_defconfig
@@ -1,2 +1,3 @@
CONFIG_SH=y
CONFIG_TARGET_RSK7269=y
+CONFIG_CMD_NET=y
diff --git a/configs/rut_defconfig b/configs/rut_defconfig
index fd90d2d..45ed12c 100644
--- a/configs/rut_defconfig
+++ b/configs/rut_defconfig
@@ -1,3 +1,4 @@
CONFIG_ARM=y
CONFIG_TARGET_RUT=y
CONFIG_SPL=y
+CONFIG_CMD_NET=y
diff --git a/configs/s5pc210_universal_defconfig b/configs/s5pc210_universal_defconfig
index 03a28ba..633698e 100644
--- a/configs/s5pc210_universal_defconfig
+++ b/configs/s5pc210_universal_defconfig
@@ -2,4 +2,5 @@
CONFIG_ARCH_EXYNOS=y
CONFIG_TARGET_S5PC210_UNIVERSAL=y
CONFIG_DEFAULT_DEVICE_TREE="exynos4210-universal_c210"
+CONFIG_CMD_SETEXPR=y
CONFIG_OF_CONTROL=y
diff --git a/configs/sama5d3_xplained_mmc_defconfig b/configs/sama5d3_xplained_mmc_defconfig
index 9bcac2c..5a39b2e 100644
--- a/configs/sama5d3_xplained_mmc_defconfig
+++ b/configs/sama5d3_xplained_mmc_defconfig
@@ -3,3 +3,5 @@
CONFIG_TARGET_SAMA5D3_XPLAINED=y
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="SAMA5D3,SYS_USE_MMC"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/sama5d3_xplained_nandflash_defconfig b/configs/sama5d3_xplained_nandflash_defconfig
index 39cc95d..59d9e21 100644
--- a/configs/sama5d3_xplained_nandflash_defconfig
+++ b/configs/sama5d3_xplained_nandflash_defconfig
@@ -3,3 +3,5 @@
CONFIG_TARGET_SAMA5D3_XPLAINED=y
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="SAMA5D3,SYS_USE_NANDFLASH"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/sama5d3xek_mmc_defconfig b/configs/sama5d3xek_mmc_defconfig
index 1aad37e..fd80a64 100644
--- a/configs/sama5d3xek_mmc_defconfig
+++ b/configs/sama5d3xek_mmc_defconfig
@@ -3,3 +3,5 @@
CONFIG_TARGET_SAMA5D3XEK=y
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="SAMA5D3,SYS_USE_MMC"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/sama5d3xek_nandflash_defconfig b/configs/sama5d3xek_nandflash_defconfig
index ada612c..9157ead 100644
--- a/configs/sama5d3xek_nandflash_defconfig
+++ b/configs/sama5d3xek_nandflash_defconfig
@@ -3,3 +3,5 @@
CONFIG_TARGET_SAMA5D3XEK=y
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="SAMA5D3,SYS_USE_NANDFLASH"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/sama5d3xek_spiflash_defconfig b/configs/sama5d3xek_spiflash_defconfig
index 675189d..da1f3c1 100644
--- a/configs/sama5d3xek_spiflash_defconfig
+++ b/configs/sama5d3xek_spiflash_defconfig
@@ -3,3 +3,5 @@
CONFIG_TARGET_SAMA5D3XEK=y
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="SAMA5D3,SYS_USE_SERIALFLASH"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/sama5d4_xplained_mmc_defconfig b/configs/sama5d4_xplained_mmc_defconfig
index 1ea23f7..f5a344c 100644
--- a/configs/sama5d4_xplained_mmc_defconfig
+++ b/configs/sama5d4_xplained_mmc_defconfig
@@ -3,3 +3,5 @@
CONFIG_TARGET_SAMA5D4_XPLAINED=y
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="SAMA5D4,SYS_USE_MMC"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/sama5d4_xplained_nandflash_defconfig b/configs/sama5d4_xplained_nandflash_defconfig
index a358eb0..0e04af9 100644
--- a/configs/sama5d4_xplained_nandflash_defconfig
+++ b/configs/sama5d4_xplained_nandflash_defconfig
@@ -3,3 +3,5 @@
CONFIG_TARGET_SAMA5D4_XPLAINED=y
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="SAMA5D4,SYS_USE_NANDFLASH"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/sama5d4_xplained_spiflash_defconfig b/configs/sama5d4_xplained_spiflash_defconfig
index 06457e7..a8cabb7 100644
--- a/configs/sama5d4_xplained_spiflash_defconfig
+++ b/configs/sama5d4_xplained_spiflash_defconfig
@@ -3,3 +3,5 @@
CONFIG_TARGET_SAMA5D4_XPLAINED=y
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="SAMA5D4,SYS_USE_SERIALFLASH"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/sama5d4ek_mmc_defconfig b/configs/sama5d4ek_mmc_defconfig
index e5dbe92..84c64a9 100644
--- a/configs/sama5d4ek_mmc_defconfig
+++ b/configs/sama5d4ek_mmc_defconfig
@@ -3,3 +3,5 @@
CONFIG_TARGET_SAMA5D4EK=y
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="SAMA5D4,SYS_USE_MMC"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/sama5d4ek_nandflash_defconfig b/configs/sama5d4ek_nandflash_defconfig
index fa6f58b..0782baf 100644
--- a/configs/sama5d4ek_nandflash_defconfig
+++ b/configs/sama5d4ek_nandflash_defconfig
@@ -3,3 +3,5 @@
CONFIG_TARGET_SAMA5D4EK=y
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="SAMA5D4,SYS_USE_NANDFLASH"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/sama5d4ek_spiflash_defconfig b/configs/sama5d4ek_spiflash_defconfig
index 8b03ea8..b5a3eb5 100644
--- a/configs/sama5d4ek_spiflash_defconfig
+++ b/configs/sama5d4ek_spiflash_defconfig
@@ -3,3 +3,5 @@
CONFIG_TARGET_SAMA5D4EK=y
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="SAMA5D4,SYS_USE_SERIALFLASH"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig
index e1d495c..345b701 100644
--- a/configs/sandbox_defconfig
+++ b/configs/sandbox_defconfig
@@ -1,5 +1,4 @@
CONFIG_DM_USB=y
-CONFIG_NET=y
CONFIG_NETDEVICES=y
CONFIG_DM_ETH=y
CONFIG_PCI=y
@@ -10,6 +9,7 @@
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_FIT_SIGNATURE=y
+CONFIG_CMD_NET=y
CONFIG_CMD_SOUND=y
CONFIG_CMD_PMIC=y
CONFIG_CMD_REGULATOR=y
diff --git a/configs/sansa_fuze_plus_defconfig b/configs/sansa_fuze_plus_defconfig
index 3032d26..e1aae9c 100644
--- a/configs/sansa_fuze_plus_defconfig
+++ b/configs/sansa_fuze_plus_defconfig
@@ -1,3 +1,4 @@
CONFIG_ARM=y
CONFIG_TARGET_SANSA_FUZE_PLUS=y
CONFIG_SPL=y
+CONFIG_CMD_NET=y
diff --git a/configs/sbc405_defconfig b/configs/sbc405_defconfig
index b34cbb7..7324f22 100644
--- a/configs/sbc405_defconfig
+++ b/configs/sbc405_defconfig
@@ -1,3 +1,4 @@
CONFIG_PPC=y
CONFIG_4xx=y
CONFIG_TARGET_SBC405=y
+CONFIG_CMD_NET=y
diff --git a/configs/sbc8349_PCI_33_defconfig b/configs/sbc8349_PCI_33_defconfig
index 84ae579..46218f2 100644
--- a/configs/sbc8349_PCI_33_defconfig
+++ b/configs/sbc8349_PCI_33_defconfig
@@ -2,3 +2,4 @@
CONFIG_MPC83xx=y
CONFIG_TARGET_SBC8349=y
CONFIG_SYS_EXTRA_OPTIONS="PCI,PCI_33M"
+CONFIG_CMD_NET=y
diff --git a/configs/sbc8349_PCI_66_defconfig b/configs/sbc8349_PCI_66_defconfig
index f8bdfb6..496b649 100644
--- a/configs/sbc8349_PCI_66_defconfig
+++ b/configs/sbc8349_PCI_66_defconfig
@@ -2,3 +2,4 @@
CONFIG_MPC83xx=y
CONFIG_TARGET_SBC8349=y
CONFIG_SYS_EXTRA_OPTIONS="PCI,PCI_66M"
+CONFIG_CMD_NET=y
diff --git a/configs/sbc8349_defconfig b/configs/sbc8349_defconfig
index f1808e8..fe59219 100644
--- a/configs/sbc8349_defconfig
+++ b/configs/sbc8349_defconfig
@@ -1,3 +1,4 @@
CONFIG_PPC=y
CONFIG_MPC83xx=y
CONFIG_TARGET_SBC8349=y
+CONFIG_CMD_NET=y
diff --git a/configs/sbc8548_PCI_33_PCIE_defconfig b/configs/sbc8548_PCI_33_PCIE_defconfig
index fa4f0c1..a355db8 100644
--- a/configs/sbc8548_PCI_33_PCIE_defconfig
+++ b/configs/sbc8548_PCI_33_PCIE_defconfig
@@ -2,3 +2,4 @@
CONFIG_MPC85xx=y
CONFIG_TARGET_SBC8548=y
CONFIG_SYS_EXTRA_OPTIONS="PCI,33,PCIE"
+CONFIG_CMD_NET=y
diff --git a/configs/sbc8548_PCI_33_defconfig b/configs/sbc8548_PCI_33_defconfig
index 23da2b6..b007ab7 100644
--- a/configs/sbc8548_PCI_33_defconfig
+++ b/configs/sbc8548_PCI_33_defconfig
@@ -2,3 +2,4 @@
CONFIG_MPC85xx=y
CONFIG_TARGET_SBC8548=y
CONFIG_SYS_EXTRA_OPTIONS="PCI,33"
+CONFIG_CMD_NET=y
diff --git a/configs/sbc8548_PCI_66_PCIE_defconfig b/configs/sbc8548_PCI_66_PCIE_defconfig
index a9d8fb5..e9c9cdf 100644
--- a/configs/sbc8548_PCI_66_PCIE_defconfig
+++ b/configs/sbc8548_PCI_66_PCIE_defconfig
@@ -2,3 +2,4 @@
CONFIG_MPC85xx=y
CONFIG_TARGET_SBC8548=y
CONFIG_SYS_EXTRA_OPTIONS="PCI,66,PCIE"
+CONFIG_CMD_NET=y
diff --git a/configs/sbc8548_PCI_66_defconfig b/configs/sbc8548_PCI_66_defconfig
index 8f2cc37..eca365e 100644
--- a/configs/sbc8548_PCI_66_defconfig
+++ b/configs/sbc8548_PCI_66_defconfig
@@ -2,3 +2,4 @@
CONFIG_MPC85xx=y
CONFIG_TARGET_SBC8548=y
CONFIG_SYS_EXTRA_OPTIONS="PCI,66"
+CONFIG_CMD_NET=y
diff --git a/configs/sbc8548_defconfig b/configs/sbc8548_defconfig
index b74f7bc..2c609b4 100644
--- a/configs/sbc8548_defconfig
+++ b/configs/sbc8548_defconfig
@@ -1,3 +1,4 @@
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_SBC8548=y
+CONFIG_CMD_NET=y
diff --git a/configs/sbc8641d_defconfig b/configs/sbc8641d_defconfig
index 6b89473..af43b5b 100644
--- a/configs/sbc8641d_defconfig
+++ b/configs/sbc8641d_defconfig
@@ -1,3 +1,4 @@
CONFIG_PPC=y
CONFIG_MPC86xx=y
CONFIG_TARGET_SBC8641D=y
+CONFIG_CMD_NET=y
diff --git a/configs/sc_sps_1_defconfig b/configs/sc_sps_1_defconfig
index 7148bb7..d4e72f7 100644
--- a/configs/sc_sps_1_defconfig
+++ b/configs/sc_sps_1_defconfig
@@ -1,3 +1,5 @@
CONFIG_ARM=y
CONFIG_TARGET_SC_SPS_1=y
CONFIG_SPL=y
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/scb9328_defconfig b/configs/scb9328_defconfig
index 048caeb..5ae7515 100644
--- a/configs/scb9328_defconfig
+++ b/configs/scb9328_defconfig
@@ -1,2 +1,3 @@
CONFIG_ARM=y
CONFIG_TARGET_SCB9328=y
+CONFIG_CMD_NET=y
diff --git a/configs/seaboard_defconfig b/configs/seaboard_defconfig
index 327a670..9c5f2bc 100644
--- a/configs/seaboard_defconfig
+++ b/configs/seaboard_defconfig
@@ -3,3 +3,4 @@
CONFIG_TEGRA20=y
CONFIG_TARGET_SEABOARD=y
CONFIG_DEFAULT_DEVICE_TREE="tegra20-seaboard"
+CONFIG_CMD_NET=y
diff --git a/configs/secomx6quq7_defconfig b/configs/secomx6quq7_defconfig
index aa5b3bb..f9d7ee9 100644
--- a/configs/secomx6quq7_defconfig
+++ b/configs/secomx6quq7_defconfig
@@ -5,3 +5,5 @@
CONFIG_SECOMX6Q=y
CONFIG_SECOMX6_2GB=y
CONFIG_SYS_EXTRA_OPTIONS="ENV_IS_IN_MMC"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/sequoia_defconfig b/configs/sequoia_defconfig
index 3164728..2ea6c78 100644
--- a/configs/sequoia_defconfig
+++ b/configs/sequoia_defconfig
@@ -2,4 +2,5 @@
CONFIG_4xx=y
CONFIG_TARGET_SEQUOIA=y
CONFIG_SYS_EXTRA_OPTIONS="SEQUOIA"
-CONFIG_REGEX=y
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/sequoia_ramboot_defconfig b/configs/sequoia_ramboot_defconfig
index 5b2c6f4..4522287 100644
--- a/configs/sequoia_ramboot_defconfig
+++ b/configs/sequoia_ramboot_defconfig
@@ -2,3 +2,5 @@
CONFIG_4xx=y
CONFIG_TARGET_SEQUOIA=y
CONFIG_SYS_EXTRA_OPTIONS="SEQUOIA,SYS_RAMBOOT,SYS_TEXT_BASE=0x01000000,SYS_LDSCRIPT=board/amcc/sequoia/u-boot-ram.lds"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/sh7752evb_defconfig b/configs/sh7752evb_defconfig
index 1f7c6d0..bbf806d 100644
--- a/configs/sh7752evb_defconfig
+++ b/configs/sh7752evb_defconfig
@@ -1,3 +1,4 @@
CONFIG_SH=y
CONFIG_SH_32BIT=y
CONFIG_TARGET_SH7752EVB=y
+CONFIG_CMD_NET=y
diff --git a/configs/sh7753evb_defconfig b/configs/sh7753evb_defconfig
index 9ff4121..536cc71 100644
--- a/configs/sh7753evb_defconfig
+++ b/configs/sh7753evb_defconfig
@@ -1,2 +1,3 @@
CONFIG_SH=y
CONFIG_TARGET_SH7753EVB=y
+CONFIG_CMD_NET=y
diff --git a/configs/sh7757lcr_defconfig b/configs/sh7757lcr_defconfig
index ffcf961..138b7b9 100644
--- a/configs/sh7757lcr_defconfig
+++ b/configs/sh7757lcr_defconfig
@@ -1,3 +1,4 @@
CONFIG_SH=y
CONFIG_SH_32BIT=y
CONFIG_TARGET_SH7757LCR=y
+CONFIG_CMD_NET=y
diff --git a/configs/sh7763rdp_defconfig b/configs/sh7763rdp_defconfig
index 8857e8a..0d65b16 100644
--- a/configs/sh7763rdp_defconfig
+++ b/configs/sh7763rdp_defconfig
@@ -1,2 +1,3 @@
CONFIG_SH=y
CONFIG_TARGET_SH7763RDP=y
+CONFIG_CMD_NET=y
diff --git a/configs/sh7785lcr_32bit_defconfig b/configs/sh7785lcr_32bit_defconfig
index 31b84ff..09e85a6 100644
--- a/configs/sh7785lcr_32bit_defconfig
+++ b/configs/sh7785lcr_32bit_defconfig
@@ -1,3 +1,4 @@
CONFIG_SH=y
CONFIG_SH_32BIT=y
CONFIG_TARGET_SH7785LCR=y
+CONFIG_CMD_NET=y
diff --git a/configs/sh7785lcr_defconfig b/configs/sh7785lcr_defconfig
index 31d2c38..a48a871 100644
--- a/configs/sh7785lcr_defconfig
+++ b/configs/sh7785lcr_defconfig
@@ -1,2 +1,3 @@
CONFIG_SH=y
CONFIG_TARGET_SH7785LCR=y
+CONFIG_CMD_NET=y
diff --git a/configs/sheevaplug_defconfig b/configs/sheevaplug_defconfig
index d22b006..7a0fb10 100644
--- a/configs/sheevaplug_defconfig
+++ b/configs/sheevaplug_defconfig
@@ -1,3 +1,4 @@
CONFIG_ARM=y
CONFIG_KIRKWOOD=y
CONFIG_TARGET_SHEEVAPLUG=y
+CONFIG_CMD_NET=y
diff --git a/configs/shmin_defconfig b/configs/shmin_defconfig
index 74c3550..60725fc 100644
--- a/configs/shmin_defconfig
+++ b/configs/shmin_defconfig
@@ -1,2 +1,3 @@
CONFIG_SH=y
CONFIG_TARGET_SHMIN=y
+CONFIG_CMD_NET=y
diff --git a/configs/silk_defconfig b/configs/silk_defconfig
index 3c6f16e..28ca83d 100644
--- a/configs/silk_defconfig
+++ b/configs/silk_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
CONFIG_RMOBILE=y
CONFIG_TARGET_SILK=y
+CONFIG_CMD_NET=y
CONFIG_SH_SDHI=y
diff --git a/configs/smdk2410_defconfig b/configs/smdk2410_defconfig
index fec4ba6..846ac8e 100644
--- a/configs/smdk2410_defconfig
+++ b/configs/smdk2410_defconfig
@@ -1,2 +1,3 @@
CONFIG_ARM=y
CONFIG_TARGET_SMDK2410=y
+CONFIG_CMD_NET=y
diff --git a/configs/smdk5250_defconfig b/configs/smdk5250_defconfig
index fb872de..0602fde 100644
--- a/configs/smdk5250_defconfig
+++ b/configs/smdk5250_defconfig
@@ -3,6 +3,7 @@
CONFIG_TARGET_SMDK5250=y
CONFIG_DEFAULT_DEVICE_TREE="exynos5250-smdk5250"
CONFIG_SPL=y
+CONFIG_CMD_NET=y
CONFIG_CMD_SOUND=y
CONFIG_SOUND=y
CONFIG_I2S=y
diff --git a/configs/smdk5420_defconfig b/configs/smdk5420_defconfig
index b9949d3..8900525 100644
--- a/configs/smdk5420_defconfig
+++ b/configs/smdk5420_defconfig
@@ -3,3 +3,4 @@
CONFIG_TARGET_SMDK5420=y
CONFIG_DEFAULT_DEVICE_TREE="exynos5420-smdk5420"
CONFIG_SPL=y
+CONFIG_CMD_NET=y
diff --git a/configs/smdkc100_defconfig b/configs/smdkc100_defconfig
index ac9bd25..bc17009 100644
--- a/configs/smdkc100_defconfig
+++ b/configs/smdkc100_defconfig
@@ -2,3 +2,4 @@
CONFIG_ARCH_S5PC1XX=y
CONFIG_TARGET_SMDKC100=y
CONFIG_DEFAULT_DEVICE_TREE="s5pc1xx-smdkc100"
+CONFIG_CMD_NET=y
diff --git a/configs/smdkv310_defconfig b/configs/smdkv310_defconfig
index 833906e..1479145 100644
--- a/configs/smdkv310_defconfig
+++ b/configs/smdkv310_defconfig
@@ -3,3 +3,5 @@
CONFIG_TARGET_SMDKV310=y
CONFIG_DEFAULT_DEVICE_TREE="exynos4210-smdkv310"
CONFIG_SPL=y
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/snapper9260_defconfig b/configs/snapper9260_defconfig
index 5d239c9..942a73f 100644
--- a/configs/snapper9260_defconfig
+++ b/configs/snapper9260_defconfig
@@ -2,3 +2,4 @@
CONFIG_ARCH_AT91=y
CONFIG_TARGET_SNAPPER9260=y
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9260"
+CONFIG_CMD_NET=y
diff --git a/configs/snapper9g20_defconfig b/configs/snapper9g20_defconfig
index 382b2ab..9e814e4 100644
--- a/configs/snapper9g20_defconfig
+++ b/configs/snapper9g20_defconfig
@@ -2,3 +2,4 @@
CONFIG_ARCH_AT91=y
CONFIG_TARGET_SNAPPER9260=y
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G20"
+CONFIG_CMD_NET=y
diff --git a/configs/snow_defconfig b/configs/snow_defconfig
index 0ae2b9b..6f838a9 100644
--- a/configs/snow_defconfig
+++ b/configs/snow_defconfig
@@ -3,6 +3,7 @@
CONFIG_TARGET_SNOW=y
CONFIG_DEFAULT_DEVICE_TREE="exynos5250-snow"
CONFIG_SPL=y
+CONFIG_CMD_NET=y
CONFIG_CMD_SOUND=y
CONFIG_CMD_CROS_EC=y
CONFIG_CROS_EC=y
diff --git a/configs/socfpga_arria5_defconfig b/configs/socfpga_arria5_defconfig
index f682492..473e6d3 100644
--- a/configs/socfpga_arria5_defconfig
+++ b/configs/socfpga_arria5_defconfig
@@ -3,5 +3,6 @@
CONFIG_TARGET_SOCFPGA_ARRIA5=y
CONFIG_DEFAULT_DEVICE_TREE="socfpga_arria5_socdk"
CONFIG_SPL=y
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
CONFIG_OF_CONTROL=y
-CONFIG_REGEX=y
diff --git a/configs/socfpga_cyclone5_defconfig b/configs/socfpga_cyclone5_defconfig
index 256952e..b674721 100644
--- a/configs/socfpga_cyclone5_defconfig
+++ b/configs/socfpga_cyclone5_defconfig
@@ -1,10 +1,10 @@
CONFIG_ARM=y
CONFIG_ARCH_SOCFPGA=y
CONFIG_TARGET_SOCFPGA_CYCLONE5=y
-CONFIG_NET=y
CONFIG_NETDEVICES=y
CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_socdk"
CONFIG_SPL=y
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
CONFIG_OF_CONTROL=y
CONFIG_ETH_DESIGNWARE=y
-CONFIG_REGEX=y
diff --git a/configs/socfpga_socrates_defconfig b/configs/socfpga_socrates_defconfig
index 8b3cccc..bbe4e80 100644
--- a/configs/socfpga_socrates_defconfig
+++ b/configs/socfpga_socrates_defconfig
@@ -1,9 +1,10 @@
CONFIG_ARM=y
CONFIG_ARCH_SOCFPGA=y
CONFIG_TARGET_SOCFPGA_CYCLONE5=y
-CONFIG_NET=y
CONFIG_NETDEVICES=y
CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_socrates"
CONFIG_SPL=y
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
CONFIG_OF_CONTROL=y
CONFIG_ETH_DESIGNWARE=y
diff --git a/configs/socrates_defconfig b/configs/socrates_defconfig
index d7ed82b..cabce0f 100644
--- a/configs/socrates_defconfig
+++ b/configs/socrates_defconfig
@@ -1,3 +1,4 @@
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_SOCRATES=y
+CONFIG_CMD_NET=y
diff --git a/configs/spear300_defconfig b/configs/spear300_defconfig
index 52dd4da..ccd5e56 100644
--- a/configs/spear300_defconfig
+++ b/configs/spear300_defconfig
@@ -1,6 +1,6 @@
CONFIG_ARM=y
CONFIG_TARGET_SPEAR300=y
-CONFIG_NET=y
CONFIG_NETDEVICES=y
CONFIG_SYS_EXTRA_OPTIONS="spear300"
+CONFIG_CMD_NET=y
CONFIG_ETH_DESIGNWARE=y
diff --git a/configs/spear300_nand_defconfig b/configs/spear300_nand_defconfig
index 2910c07..47a3893 100644
--- a/configs/spear300_nand_defconfig
+++ b/configs/spear300_nand_defconfig
@@ -1,6 +1,6 @@
CONFIG_ARM=y
CONFIG_TARGET_SPEAR300=y
-CONFIG_NET=y
CONFIG_NETDEVICES=y
CONFIG_SYS_EXTRA_OPTIONS="spear300,nand"
+CONFIG_CMD_NET=y
CONFIG_ETH_DESIGNWARE=y
diff --git a/configs/spear300_usbtty_defconfig b/configs/spear300_usbtty_defconfig
index 12d197e..16799e0 100644
--- a/configs/spear300_usbtty_defconfig
+++ b/configs/spear300_usbtty_defconfig
@@ -1,6 +1,6 @@
CONFIG_ARM=y
CONFIG_TARGET_SPEAR300=y
-CONFIG_NET=y
CONFIG_NETDEVICES=y
CONFIG_SYS_EXTRA_OPTIONS="spear300,usbtty"
+CONFIG_CMD_NET=y
CONFIG_ETH_DESIGNWARE=y
diff --git a/configs/spear300_usbtty_nand_defconfig b/configs/spear300_usbtty_nand_defconfig
index e303cad..6d74951 100644
--- a/configs/spear300_usbtty_nand_defconfig
+++ b/configs/spear300_usbtty_nand_defconfig
@@ -1,6 +1,6 @@
CONFIG_ARM=y
CONFIG_TARGET_SPEAR300=y
-CONFIG_NET=y
CONFIG_NETDEVICES=y
CONFIG_SYS_EXTRA_OPTIONS="spear300,usbtty,nand"
+CONFIG_CMD_NET=y
CONFIG_ETH_DESIGNWARE=y
diff --git a/configs/spear310_defconfig b/configs/spear310_defconfig
index 5e0beb6..456d3d1 100644
--- a/configs/spear310_defconfig
+++ b/configs/spear310_defconfig
@@ -1,6 +1,6 @@
CONFIG_ARM=y
CONFIG_TARGET_SPEAR310=y
-CONFIG_NET=y
CONFIG_NETDEVICES=y
CONFIG_SYS_EXTRA_OPTIONS="spear310"
+CONFIG_CMD_NET=y
CONFIG_ETH_DESIGNWARE=y
diff --git a/configs/spear310_nand_defconfig b/configs/spear310_nand_defconfig
index 3772d40..d5d5376 100644
--- a/configs/spear310_nand_defconfig
+++ b/configs/spear310_nand_defconfig
@@ -1,6 +1,6 @@
CONFIG_ARM=y
CONFIG_TARGET_SPEAR310=y
-CONFIG_NET=y
CONFIG_NETDEVICES=y
CONFIG_SYS_EXTRA_OPTIONS="spear310,nand"
+CONFIG_CMD_NET=y
CONFIG_ETH_DESIGNWARE=y
diff --git a/configs/spear310_pnor_defconfig b/configs/spear310_pnor_defconfig
index 137161e..27a7994 100644
--- a/configs/spear310_pnor_defconfig
+++ b/configs/spear310_pnor_defconfig
@@ -1,6 +1,6 @@
CONFIG_ARM=y
CONFIG_TARGET_SPEAR310=y
-CONFIG_NET=y
CONFIG_NETDEVICES=y
CONFIG_SYS_EXTRA_OPTIONS="spear310,FLASH_PNOR"
+CONFIG_CMD_NET=y
CONFIG_ETH_DESIGNWARE=y
diff --git a/configs/spear310_usbtty_defconfig b/configs/spear310_usbtty_defconfig
index df8bb52..ce3cfca 100644
--- a/configs/spear310_usbtty_defconfig
+++ b/configs/spear310_usbtty_defconfig
@@ -1,6 +1,6 @@
CONFIG_ARM=y
CONFIG_TARGET_SPEAR310=y
-CONFIG_NET=y
CONFIG_NETDEVICES=y
CONFIG_SYS_EXTRA_OPTIONS="spear310,usbtty"
+CONFIG_CMD_NET=y
CONFIG_ETH_DESIGNWARE=y
diff --git a/configs/spear310_usbtty_nand_defconfig b/configs/spear310_usbtty_nand_defconfig
index 71cabff..601321e 100644
--- a/configs/spear310_usbtty_nand_defconfig
+++ b/configs/spear310_usbtty_nand_defconfig
@@ -1,6 +1,6 @@
CONFIG_ARM=y
CONFIG_TARGET_SPEAR310=y
-CONFIG_NET=y
CONFIG_NETDEVICES=y
CONFIG_SYS_EXTRA_OPTIONS="spear310,usbtty,nand"
+CONFIG_CMD_NET=y
CONFIG_ETH_DESIGNWARE=y
diff --git a/configs/spear310_usbtty_pnor_defconfig b/configs/spear310_usbtty_pnor_defconfig
index b5418e5..31f3420 100644
--- a/configs/spear310_usbtty_pnor_defconfig
+++ b/configs/spear310_usbtty_pnor_defconfig
@@ -1,6 +1,6 @@
CONFIG_ARM=y
CONFIG_TARGET_SPEAR310=y
-CONFIG_NET=y
CONFIG_NETDEVICES=y
CONFIG_SYS_EXTRA_OPTIONS="spear310,usbtty,FLASH_PNOR"
+CONFIG_CMD_NET=y
CONFIG_ETH_DESIGNWARE=y
diff --git a/configs/spear320_defconfig b/configs/spear320_defconfig
index 0172c15..cfa7dce 100644
--- a/configs/spear320_defconfig
+++ b/configs/spear320_defconfig
@@ -1,6 +1,6 @@
CONFIG_ARM=y
CONFIG_TARGET_SPEAR320=y
-CONFIG_NET=y
CONFIG_NETDEVICES=y
CONFIG_SYS_EXTRA_OPTIONS="spear320"
+CONFIG_CMD_NET=y
CONFIG_ETH_DESIGNWARE=y
diff --git a/configs/spear320_nand_defconfig b/configs/spear320_nand_defconfig
index 347b3de..1023111 100644
--- a/configs/spear320_nand_defconfig
+++ b/configs/spear320_nand_defconfig
@@ -1,6 +1,6 @@
CONFIG_ARM=y
CONFIG_TARGET_SPEAR320=y
-CONFIG_NET=y
CONFIG_NETDEVICES=y
CONFIG_SYS_EXTRA_OPTIONS="spear320,nand"
+CONFIG_CMD_NET=y
CONFIG_ETH_DESIGNWARE=y
diff --git a/configs/spear320_pnor_defconfig b/configs/spear320_pnor_defconfig
index 7b1b8e1..c8e3b4d 100644
--- a/configs/spear320_pnor_defconfig
+++ b/configs/spear320_pnor_defconfig
@@ -1,6 +1,6 @@
CONFIG_ARM=y
CONFIG_TARGET_SPEAR320=y
-CONFIG_NET=y
CONFIG_NETDEVICES=y
CONFIG_SYS_EXTRA_OPTIONS="spear320,FLASH_PNOR"
+CONFIG_CMD_NET=y
CONFIG_ETH_DESIGNWARE=y
diff --git a/configs/spear320_usbtty_defconfig b/configs/spear320_usbtty_defconfig
index 907ba89..3d3dc11 100644
--- a/configs/spear320_usbtty_defconfig
+++ b/configs/spear320_usbtty_defconfig
@@ -1,6 +1,6 @@
CONFIG_ARM=y
CONFIG_TARGET_SPEAR320=y
-CONFIG_NET=y
CONFIG_NETDEVICES=y
CONFIG_SYS_EXTRA_OPTIONS="spear320,usbtty"
+CONFIG_CMD_NET=y
CONFIG_ETH_DESIGNWARE=y
diff --git a/configs/spear320_usbtty_nand_defconfig b/configs/spear320_usbtty_nand_defconfig
index 1350134..91bd029 100644
--- a/configs/spear320_usbtty_nand_defconfig
+++ b/configs/spear320_usbtty_nand_defconfig
@@ -1,6 +1,6 @@
CONFIG_ARM=y
CONFIG_TARGET_SPEAR320=y
-CONFIG_NET=y
CONFIG_NETDEVICES=y
CONFIG_SYS_EXTRA_OPTIONS="spear320,usbtty,nand"
+CONFIG_CMD_NET=y
CONFIG_ETH_DESIGNWARE=y
diff --git a/configs/spear320_usbtty_pnor_defconfig b/configs/spear320_usbtty_pnor_defconfig
index 0b31b9a..6e887a6 100644
--- a/configs/spear320_usbtty_pnor_defconfig
+++ b/configs/spear320_usbtty_pnor_defconfig
@@ -1,6 +1,6 @@
CONFIG_ARM=y
CONFIG_TARGET_SPEAR320=y
-CONFIG_NET=y
CONFIG_NETDEVICES=y
CONFIG_SYS_EXTRA_OPTIONS="spear320,usbtty,FLASH_PNOR"
+CONFIG_CMD_NET=y
CONFIG_ETH_DESIGNWARE=y
diff --git a/configs/spear600_defconfig b/configs/spear600_defconfig
index e573ecc..2790ffc 100644
--- a/configs/spear600_defconfig
+++ b/configs/spear600_defconfig
@@ -1,6 +1,6 @@
CONFIG_ARM=y
CONFIG_TARGET_SPEAR600=y
-CONFIG_NET=y
CONFIG_NETDEVICES=y
CONFIG_SYS_EXTRA_OPTIONS="spear600"
+CONFIG_CMD_NET=y
CONFIG_ETH_DESIGNWARE=y
diff --git a/configs/spear600_nand_defconfig b/configs/spear600_nand_defconfig
index a1e9c02..2590edf 100644
--- a/configs/spear600_nand_defconfig
+++ b/configs/spear600_nand_defconfig
@@ -1,6 +1,6 @@
CONFIG_ARM=y
CONFIG_TARGET_SPEAR600=y
-CONFIG_NET=y
CONFIG_NETDEVICES=y
CONFIG_SYS_EXTRA_OPTIONS="spear600,nand"
+CONFIG_CMD_NET=y
CONFIG_ETH_DESIGNWARE=y
diff --git a/configs/spear600_usbtty_defconfig b/configs/spear600_usbtty_defconfig
index 7673960..fcf1ed2 100644
--- a/configs/spear600_usbtty_defconfig
+++ b/configs/spear600_usbtty_defconfig
@@ -1,6 +1,6 @@
CONFIG_ARM=y
CONFIG_TARGET_SPEAR600=y
-CONFIG_NET=y
CONFIG_NETDEVICES=y
CONFIG_SYS_EXTRA_OPTIONS="spear600,usbtty"
+CONFIG_CMD_NET=y
CONFIG_ETH_DESIGNWARE=y
diff --git a/configs/spear600_usbtty_nand_defconfig b/configs/spear600_usbtty_nand_defconfig
index 1cdb780..d9eaa5c 100644
--- a/configs/spear600_usbtty_nand_defconfig
+++ b/configs/spear600_usbtty_nand_defconfig
@@ -1,6 +1,6 @@
CONFIG_ARM=y
CONFIG_TARGET_SPEAR600=y
-CONFIG_NET=y
CONFIG_NETDEVICES=y
CONFIG_SYS_EXTRA_OPTIONS="spear600,usbtty,nand"
+CONFIG_CMD_NET=y
CONFIG_ETH_DESIGNWARE=y
diff --git a/configs/stamp9g20_defconfig b/configs/stamp9g20_defconfig
index e765329..592203f 100644
--- a/configs/stamp9g20_defconfig
+++ b/configs/stamp9g20_defconfig
@@ -2,3 +2,4 @@
CONFIG_ARCH_AT91=y
CONFIG_TARGET_STAMP9G20=y
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G20"
+CONFIG_CMD_NET=y
diff --git a/configs/stm32f429-discovery_defconfig b/configs/stm32f429-discovery_defconfig
index 6d74d73..3c868ff 100644
--- a/configs/stm32f429-discovery_defconfig
+++ b/configs/stm32f429-discovery_defconfig
@@ -1,2 +1,3 @@
CONFIG_ARM=y
CONFIG_TARGET_STM32F429_DISCOVERY=y
+CONFIG_CMD_NET=y
diff --git a/configs/stv0991_defconfig b/configs/stv0991_defconfig
index 2be3f82..6c27666 100644
--- a/configs/stv0991_defconfig
+++ b/configs/stv0991_defconfig
@@ -1,8 +1,8 @@
CONFIG_ARM=y
CONFIG_TARGET_STV0991=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
-CONFIG_NET=y
CONFIG_NETDEVICES=y
CONFIG_DEFAULT_DEVICE_TREE="stv0991"
CONFIG_SYS_EXTRA_OPTIONS="stv0991"
+CONFIG_CMD_NET=y
CONFIG_ETH_DESIGNWARE=y
diff --git a/configs/stxgp3_defconfig b/configs/stxgp3_defconfig
index b7537df..63d97cc 100644
--- a/configs/stxgp3_defconfig
+++ b/configs/stxgp3_defconfig
@@ -1,3 +1,4 @@
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_STXGP3=y
+CONFIG_CMD_NET=y
diff --git a/configs/stxssa_4M_defconfig b/configs/stxssa_4M_defconfig
index e6df158..4e81488 100644
--- a/configs/stxssa_4M_defconfig
+++ b/configs/stxssa_4M_defconfig
@@ -2,3 +2,4 @@
CONFIG_MPC85xx=y
CONFIG_TARGET_STXSSA=y
CONFIG_SYS_EXTRA_OPTIONS="STXSSA_4M"
+CONFIG_CMD_NET=y
diff --git a/configs/stxssa_defconfig b/configs/stxssa_defconfig
index f1701f2..e46febe 100644
--- a/configs/stxssa_defconfig
+++ b/configs/stxssa_defconfig
@@ -1,3 +1,4 @@
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_STXSSA=y
+CONFIG_CMD_NET=y
diff --git a/configs/suvd3_defconfig b/configs/suvd3_defconfig
index e477b0e..174ed9e 100644
--- a/configs/suvd3_defconfig
+++ b/configs/suvd3_defconfig
@@ -2,3 +2,5 @@
CONFIG_MPC83xx=y
CONFIG_TARGET_SUVD3=y
CONFIG_SYS_EXTRA_OPTIONS="SUVD3"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/sycamore_defconfig b/configs/sycamore_defconfig
index 844e67f..f49007b 100644
--- a/configs/sycamore_defconfig
+++ b/configs/sycamore_defconfig
@@ -1,3 +1,5 @@
CONFIG_PPC=y
CONFIG_4xx=y
CONFIG_TARGET_WALNUT=y
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/t3corp_defconfig b/configs/t3corp_defconfig
index beac623..fc80d1f 100644
--- a/configs/t3corp_defconfig
+++ b/configs/t3corp_defconfig
@@ -1,4 +1,5 @@
CONFIG_PPC=y
CONFIG_4xx=y
CONFIG_TARGET_T3CORP=y
-CONFIG_REGEX=y
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/taihu_defconfig b/configs/taihu_defconfig
index 42126f5..3581648 100644
--- a/configs/taihu_defconfig
+++ b/configs/taihu_defconfig
@@ -1,4 +1,5 @@
CONFIG_PPC=y
CONFIG_4xx=y
CONFIG_TARGET_TAIHU=y
-CONFIG_REGEX=y
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/taishan_defconfig b/configs/taishan_defconfig
index 81fe19d..eddb981 100644
--- a/configs/taishan_defconfig
+++ b/configs/taishan_defconfig
@@ -1,4 +1,5 @@
CONFIG_PPC=y
CONFIG_4xx=y
CONFIG_TARGET_TAISHAN=y
-CONFIG_REGEX=y
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/tao3530_defconfig b/configs/tao3530_defconfig
index ad4517d..ce45fba 100644
--- a/configs/tao3530_defconfig
+++ b/configs/tao3530_defconfig
@@ -2,3 +2,4 @@
CONFIG_OMAP34XX=y
CONFIG_TARGET_TAO3530=y
CONFIG_SPL=y
+CONFIG_CMD_NET=y
diff --git a/configs/taurus_defconfig b/configs/taurus_defconfig
index 336ca41..b94f486 100644
--- a/configs/taurus_defconfig
+++ b/configs/taurus_defconfig
@@ -3,3 +3,4 @@
CONFIG_TARGET_TAURUS=y
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G20,MACH_TYPE=2067,BOARD_TAURUS"
+CONFIG_CMD_NET=y
diff --git a/configs/tb100_defconfig b/configs/tb100_defconfig
index c8a71bf..c753197 100644
--- a/configs/tb100_defconfig
+++ b/configs/tb100_defconfig
@@ -2,11 +2,11 @@
CONFIG_ARC_CACHE_LINE_SHIFT=5
CONFIG_TARGET_TB100=y
CONFIG_SYS_CLK_FREQ=500000000
-CONFIG_NET=y
CONFIG_NETDEVICES=y
CONFIG_DM_SERIAL=y
CONFIG_SYS_TEXT_BASE=0x84000000
CONFIG_DEFAULT_DEVICE_TREE="abilis_tb100"
+CONFIG_CMD_NET=y
CONFIG_OF_CONTROL=y
CONFIG_OF_EMBED=y
CONFIG_DM=y
diff --git a/configs/tbs2910_defconfig b/configs/tbs2910_defconfig
index cace345..3e720a7 100644
--- a/configs/tbs2910_defconfig
+++ b/configs/tbs2910_defconfig
@@ -1,3 +1,5 @@
CONFIG_ARM=y
CONFIG_TARGET_TBS2910=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6q2g.cfg,MX6Q"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/tcm-bf518_defconfig b/configs/tcm-bf518_defconfig
index f16d863..c362868 100644
--- a/configs/tcm-bf518_defconfig
+++ b/configs/tcm-bf518_defconfig
@@ -1,5 +1,5 @@
CONFIG_BLACKFIN=y
-CONFIG_NET=y
CONFIG_TARGET_TCM_BF518=y
+CONFIG_CMD_NET=y
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED=y
diff --git a/configs/tcm-bf537_defconfig b/configs/tcm-bf537_defconfig
index 7f3a3a6..5267faf 100644
--- a/configs/tcm-bf537_defconfig
+++ b/configs/tcm-bf537_defconfig
@@ -1,5 +1,5 @@
CONFIG_BLACKFIN=y
-CONFIG_NET=y
CONFIG_TARGET_TCM_BF537=y
+CONFIG_CMD_NET=y
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED=y
diff --git a/configs/tec-ng_defconfig b/configs/tec-ng_defconfig
index 8f953bff..317a959 100644
--- a/configs/tec-ng_defconfig
+++ b/configs/tec-ng_defconfig
@@ -3,3 +3,4 @@
CONFIG_TEGRA30=y
CONFIG_TARGET_TEC_NG=y
CONFIG_DEFAULT_DEVICE_TREE="tegra30-tec-ng"
+CONFIG_CMD_NET=y
diff --git a/configs/tec_defconfig b/configs/tec_defconfig
index cc52fec..e831b5c 100644
--- a/configs/tec_defconfig
+++ b/configs/tec_defconfig
@@ -3,3 +3,4 @@
CONFIG_TEGRA20=y
CONFIG_TARGET_TEC=y
CONFIG_DEFAULT_DEVICE_TREE="tegra20-tec"
+CONFIG_CMD_NET=y
diff --git a/configs/ti814x_evm_defconfig b/configs/ti814x_evm_defconfig
index f48f921..4928cba 100644
--- a/configs/ti814x_evm_defconfig
+++ b/configs/ti814x_evm_defconfig
@@ -1,3 +1,4 @@
CONFIG_ARM=y
CONFIG_TARGET_TI814X_EVM=y
CONFIG_SPL=y
+CONFIG_CMD_NET=y
diff --git a/configs/ti816x_evm_defconfig b/configs/ti816x_evm_defconfig
index c08e422..57fcf52 100644
--- a/configs/ti816x_evm_defconfig
+++ b/configs/ti816x_evm_defconfig
@@ -1,3 +1,4 @@
CONFIG_ARM=y
CONFIG_TARGET_TI816X_EVM=y
CONFIG_SPL=y
+CONFIG_CMD_NET=y
diff --git a/configs/titanium_defconfig b/configs/titanium_defconfig
index 62af244..554daac 100644
--- a/configs/titanium_defconfig
+++ b/configs/titanium_defconfig
@@ -1,3 +1,4 @@
CONFIG_ARM=y
CONFIG_TARGET_TITANIUM=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/barco/titanium/imximage.cfg"
+CONFIG_CMD_NET=y
diff --git a/configs/tk71_defconfig b/configs/tk71_defconfig
index 411e3c1..195bdcc 100644
--- a/configs/tk71_defconfig
+++ b/configs/tk71_defconfig
@@ -1,3 +1,4 @@
CONFIG_ARM=y
CONFIG_KIRKWOOD=y
CONFIG_TARGET_TK71=y
+CONFIG_CMD_NET=y
diff --git a/configs/tqma6q_mba6_mmc_defconfig b/configs/tqma6q_mba6_mmc_defconfig
index 627883a..01355b6 100644
--- a/configs/tqma6q_mba6_mmc_defconfig
+++ b/configs/tqma6q_mba6_mmc_defconfig
@@ -1,3 +1,5 @@
CONFIG_ARM=y
CONFIG_TARGET_TQMA6=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/tqc/tqma6/tqma6q.cfg,MX6Q,MBA6,TQMA6X_MMC_BOOT"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/tqma6q_mba6_spi_defconfig b/configs/tqma6q_mba6_spi_defconfig
index a56a802..ba24663 100644
--- a/configs/tqma6q_mba6_spi_defconfig
+++ b/configs/tqma6q_mba6_spi_defconfig
@@ -1,3 +1,5 @@
CONFIG_ARM=y
CONFIG_TARGET_TQMA6=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/tqc/tqma6/tqma6q.cfg,MX6Q,MBA6,TQMA6X_SPI_BOOT"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/tqma6s_mba6_mmc_defconfig b/configs/tqma6s_mba6_mmc_defconfig
index 51958e2..cbb4500 100644
--- a/configs/tqma6s_mba6_mmc_defconfig
+++ b/configs/tqma6s_mba6_mmc_defconfig
@@ -1,3 +1,5 @@
CONFIG_ARM=y
CONFIG_TARGET_TQMA6=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/tqc/tqma6/tqma6s.cfg,MX6S,MBA6,TQMA6X_MMC_BOOT"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/tqma6s_mba6_spi_defconfig b/configs/tqma6s_mba6_spi_defconfig
index f94f704..805d8ab 100644
--- a/configs/tqma6s_mba6_spi_defconfig
+++ b/configs/tqma6s_mba6_spi_defconfig
@@ -1,3 +1,5 @@
CONFIG_ARM=y
CONFIG_TARGET_TQMA6=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/tqc/tqma6/tqma6s.cfg,MX6S,MBA6,TQMA6X_SPI_BOOT"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/trats2_defconfig b/configs/trats2_defconfig
index 8326d69..75a8aec 100644
--- a/configs/trats2_defconfig
+++ b/configs/trats2_defconfig
@@ -1,6 +1,7 @@
CONFIG_ARM=y
CONFIG_ARCH_EXYNOS=y
CONFIG_TARGET_TRATS2=y
-CONFIG_DEFAULT_DEVICE_TREE="exynos4412-trats2"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
+CONFIG_DEFAULT_DEVICE_TREE="exynos4412-trats2"
+CONFIG_CMD_SETEXPR=y
CONFIG_OF_CONTROL=y
diff --git a/configs/trats_defconfig b/configs/trats_defconfig
index b6f4ebe..a1aa892 100644
--- a/configs/trats_defconfig
+++ b/configs/trats_defconfig
@@ -2,4 +2,5 @@
CONFIG_ARCH_EXYNOS=y
CONFIG_TARGET_TRATS=y
CONFIG_DEFAULT_DEVICE_TREE="exynos4210-trats"
+CONFIG_CMD_SETEXPR=y
CONFIG_OF_CONTROL=y
diff --git a/configs/trimslice_defconfig b/configs/trimslice_defconfig
index 0ce8f81..d58dc10 100644
--- a/configs/trimslice_defconfig
+++ b/configs/trimslice_defconfig
@@ -3,3 +3,4 @@
CONFIG_TEGRA20=y
CONFIG_TARGET_TRIMSLICE=y
CONFIG_DEFAULT_DEVICE_TREE="tegra20-trimslice"
+CONFIG_CMD_NET=y
diff --git a/configs/trizepsiv_defconfig b/configs/trizepsiv_defconfig
index 444d3bb..327677e 100644
--- a/configs/trizepsiv_defconfig
+++ b/configs/trizepsiv_defconfig
@@ -1,2 +1,3 @@
CONFIG_ARM=y
CONFIG_TARGET_TRIZEPSIV=y
+CONFIG_CMD_NET=y
diff --git a/configs/tseries_mmc_defconfig b/configs/tseries_mmc_defconfig
index cdcdb99..a5c8511 100644
--- a/configs/tseries_mmc_defconfig
+++ b/configs/tseries_mmc_defconfig
@@ -3,3 +3,4 @@
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="SERIAL1,CONS_INDEX=1,EMMC_BOOT"
# CONFIG_CMD_CRC32 is not set
+CONFIG_CMD_NET=y
diff --git a/configs/tseries_nand_defconfig b/configs/tseries_nand_defconfig
index 2139f4d..9b738db 100644
--- a/configs/tseries_nand_defconfig
+++ b/configs/tseries_nand_defconfig
@@ -3,3 +3,4 @@
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="SERIAL1,CONS_INDEX=1,NAND"
# CONFIG_CMD_CRC32 is not set
+CONFIG_CMD_NET=y
diff --git a/configs/tseries_spi_defconfig b/configs/tseries_spi_defconfig
index 5e01789..06a296a 100644
--- a/configs/tseries_spi_defconfig
+++ b/configs/tseries_spi_defconfig
@@ -3,3 +3,4 @@
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="SERIAL1,CONS_INDEX=1,SPI_BOOT,EMMC_BOOT"
# CONFIG_CMD_CRC32 is not set
+CONFIG_CMD_NET=y
diff --git a/configs/tt01_defconfig b/configs/tt01_defconfig
index a0e6664..58cd9f9 100644
--- a/configs/tt01_defconfig
+++ b/configs/tt01_defconfig
@@ -1,2 +1,3 @@
CONFIG_ARM=y
CONFIG_TARGET_TT01=y
+CONFIG_CMD_NET=y
diff --git a/configs/tuge1_defconfig b/configs/tuge1_defconfig
index d4a422c..92fd767 100644
--- a/configs/tuge1_defconfig
+++ b/configs/tuge1_defconfig
@@ -2,3 +2,5 @@
CONFIG_MPC83xx=y
CONFIG_TARGET_TUXX1=y
CONFIG_SYS_EXTRA_OPTIONS="TUGE1"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/tuxx1_defconfig b/configs/tuxx1_defconfig
index c8db21a..a08412e 100644
--- a/configs/tuxx1_defconfig
+++ b/configs/tuxx1_defconfig
@@ -2,3 +2,5 @@
CONFIG_MPC83xx=y
CONFIG_TARGET_TUXX1=y
CONFIG_SYS_EXTRA_OPTIONS="TUXX1"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/twister_defconfig b/configs/twister_defconfig
index 710ab43..495ec3a 100644
--- a/configs/twister_defconfig
+++ b/configs/twister_defconfig
@@ -2,3 +2,4 @@
CONFIG_OMAP34XX=y
CONFIG_TARGET_TWISTER=y
CONFIG_SPL=y
+CONFIG_CMD_NET=y
diff --git a/configs/tx25_defconfig b/configs/tx25_defconfig
index 8f7e303..9257361 100644
--- a/configs/tx25_defconfig
+++ b/configs/tx25_defconfig
@@ -1,3 +1,4 @@
CONFIG_ARM=y
CONFIG_TARGET_TX25=y
CONFIG_SPL=y
+CONFIG_CMD_NET=y
diff --git a/configs/udoo_quad_defconfig b/configs/udoo_quad_defconfig
index 9687475..17f48c8 100644
--- a/configs/udoo_quad_defconfig
+++ b/configs/udoo_quad_defconfig
@@ -1,3 +1,5 @@
CONFIG_ARM=y
CONFIG_TARGET_UDOO=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/udoo/udoo.cfg,MX6Q,DDR_MB=1024"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/usb_a9263_dataflash_defconfig b/configs/usb_a9263_dataflash_defconfig
index 7ce920a..12fc468 100644
--- a/configs/usb_a9263_dataflash_defconfig
+++ b/configs/usb_a9263_dataflash_defconfig
@@ -2,3 +2,4 @@
CONFIG_ARCH_AT91=y
CONFIG_TARGET_USB_A9263=y
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9263,SYS_USE_DATAFLASH"
+CONFIG_CMD_NET=y
diff --git a/configs/usbarmory_defconfig b/configs/usbarmory_defconfig
index 10bdd9e..75781ed 100644
--- a/configs/usbarmory_defconfig
+++ b/configs/usbarmory_defconfig
@@ -1,3 +1,4 @@
CONFIG_ARM=y
CONFIG_ARCH_MX5=y
CONFIG_TARGET_USBARMORY=y
+CONFIG_CMD_NET=y
diff --git a/configs/v38b_defconfig b/configs/v38b_defconfig
index 811354c..d0f3ae6 100644
--- a/configs/v38b_defconfig
+++ b/configs/v38b_defconfig
@@ -1,3 +1,4 @@
CONFIG_PPC=y
CONFIG_MPC5xxx=y
CONFIG_TARGET_V38B=y
+CONFIG_CMD_NET=y
diff --git a/configs/vct_platinum_defconfig b/configs/vct_platinum_defconfig
index 7514857..217b1c1 100644
--- a/configs/vct_platinum_defconfig
+++ b/configs/vct_platinum_defconfig
@@ -1,3 +1,4 @@
CONFIG_MIPS=y
CONFIG_TARGET_VCT=y
CONFIG_VCT_PLATINUM=y
+CONFIG_CMD_NET=y
diff --git a/configs/vct_platinum_onenand_defconfig b/configs/vct_platinum_onenand_defconfig
index 7fb75f0..8b40d58 100644
--- a/configs/vct_platinum_onenand_defconfig
+++ b/configs/vct_platinum_onenand_defconfig
@@ -2,3 +2,4 @@
CONFIG_TARGET_VCT=y
CONFIG_VCT_PLATINUM=y
CONFIG_VCT_ONENAND=y
+CONFIG_CMD_NET=y
diff --git a/configs/vct_premium_defconfig b/configs/vct_premium_defconfig
index 80c468b..8cd8331 100644
--- a/configs/vct_premium_defconfig
+++ b/configs/vct_premium_defconfig
@@ -1,3 +1,4 @@
CONFIG_MIPS=y
CONFIG_TARGET_VCT=y
CONFIG_VCT_PREMIUM=y
+CONFIG_CMD_NET=y
diff --git a/configs/vct_premium_onenand_defconfig b/configs/vct_premium_onenand_defconfig
index eb61ef6..5a269c6 100644
--- a/configs/vct_premium_onenand_defconfig
+++ b/configs/vct_premium_onenand_defconfig
@@ -2,3 +2,4 @@
CONFIG_TARGET_VCT=y
CONFIG_VCT_PREMIUM=y
CONFIG_VCT_ONENAND=y
+CONFIG_CMD_NET=y
diff --git a/configs/ve8313_defconfig b/configs/ve8313_defconfig
index 462c482..9bfd4bb 100644
--- a/configs/ve8313_defconfig
+++ b/configs/ve8313_defconfig
@@ -1,3 +1,4 @@
CONFIG_PPC=y
CONFIG_MPC83xx=y
CONFIG_TARGET_VE8313=y
+CONFIG_CMD_NET=y
diff --git a/configs/venice2_defconfig b/configs/venice2_defconfig
index 7375cd5..31a0ce3 100644
--- a/configs/venice2_defconfig
+++ b/configs/venice2_defconfig
@@ -3,3 +3,4 @@
CONFIG_TEGRA124=y
CONFIG_TARGET_VENICE2=y
CONFIG_DEFAULT_DEVICE_TREE="tegra124-venice2"
+CONFIG_CMD_NET=y
diff --git a/configs/ventana_defconfig b/configs/ventana_defconfig
index b268ec7..46dca48 100644
--- a/configs/ventana_defconfig
+++ b/configs/ventana_defconfig
@@ -3,3 +3,4 @@
CONFIG_TEGRA20=y
CONFIG_TARGET_VENTANA=y
CONFIG_DEFAULT_DEVICE_TREE="tegra20-ventana"
+CONFIG_CMD_NET=y
diff --git a/configs/versatileab_defconfig b/configs/versatileab_defconfig
index 058f8cd..f4ff591 100644
--- a/configs/versatileab_defconfig
+++ b/configs/versatileab_defconfig
@@ -1,3 +1,4 @@
CONFIG_ARM=y
CONFIG_ARCH_VERSATILE=y
CONFIG_SYS_EXTRA_OPTIONS="ARCH_VERSATILE_AB"
+CONFIG_CMD_NET=y
diff --git a/configs/versatilepb_defconfig b/configs/versatilepb_defconfig
index ae8224f..54b5129 100644
--- a/configs/versatilepb_defconfig
+++ b/configs/versatilepb_defconfig
@@ -1,3 +1,4 @@
CONFIG_ARM=y
CONFIG_ARCH_VERSATILE=y
CONFIG_SYS_EXTRA_OPTIONS="ARCH_VERSATILE_PB"
+CONFIG_CMD_NET=y
diff --git a/configs/versatileqemu_defconfig b/configs/versatileqemu_defconfig
index dd71501..7d6c4e1 100644
--- a/configs/versatileqemu_defconfig
+++ b/configs/versatileqemu_defconfig
@@ -1,3 +1,4 @@
CONFIG_ARM=y
CONFIG_ARCH_VERSATILE=y
CONFIG_SYS_EXTRA_OPTIONS="ARCH_VERSATILE_QEMU,ARCH_VERSATILE_PB"
+CONFIG_CMD_NET=y
diff --git a/configs/vexpress_aemv8a_juno_defconfig b/configs/vexpress_aemv8a_juno_defconfig
index 49052f1..79a1291 100644
--- a/configs/vexpress_aemv8a_juno_defconfig
+++ b/configs/vexpress_aemv8a_juno_defconfig
@@ -1,3 +1,4 @@
CONFIG_ARM=y
CONFIG_TARGET_VEXPRESS64_JUNO=y
CONFIG_DEFAULT_DEVICE_TREE="vexpress64"
+CONFIG_CMD_NET=y
diff --git a/configs/vexpress_aemv8a_semi_defconfig b/configs/vexpress_aemv8a_semi_defconfig
index d05c848..21bfb4a 100644
--- a/configs/vexpress_aemv8a_semi_defconfig
+++ b/configs/vexpress_aemv8a_semi_defconfig
@@ -1,3 +1,4 @@
CONFIG_ARM=y
CONFIG_TARGET_VEXPRESS64_BASE_FVP=y
CONFIG_DEFAULT_DEVICE_TREE="vexpress64"
+CONFIG_CMD_NET=y
diff --git a/configs/vexpress_ca15_tc2_defconfig b/configs/vexpress_ca15_tc2_defconfig
index ee5b351..401317f 100644
--- a/configs/vexpress_ca15_tc2_defconfig
+++ b/configs/vexpress_ca15_tc2_defconfig
@@ -1,2 +1,3 @@
CONFIG_ARM=y
CONFIG_TARGET_VEXPRESS_CA15_TC2=y
+CONFIG_CMD_NET=y
diff --git a/configs/vexpress_ca5x2_defconfig b/configs/vexpress_ca5x2_defconfig
index fafed03..d6286af 100644
--- a/configs/vexpress_ca5x2_defconfig
+++ b/configs/vexpress_ca5x2_defconfig
@@ -1,2 +1,3 @@
CONFIG_ARM=y
CONFIG_TARGET_VEXPRESS_CA5X2=y
+CONFIG_CMD_NET=y
diff --git a/configs/vexpress_ca9x4_defconfig b/configs/vexpress_ca9x4_defconfig
index 1ff2ebf..b8e938c 100644
--- a/configs/vexpress_ca9x4_defconfig
+++ b/configs/vexpress_ca9x4_defconfig
@@ -1,2 +1,3 @@
CONFIG_ARM=y
CONFIG_TARGET_VEXPRESS_CA9X4=y
+CONFIG_CMD_NET=y
diff --git a/configs/vf610twr_defconfig b/configs/vf610twr_defconfig
index 85c7c3d..b5d97c2 100644
--- a/configs/vf610twr_defconfig
+++ b/configs/vf610twr_defconfig
@@ -1,5 +1,6 @@
CONFIG_ARM=y
CONFIG_TARGET_VF610TWR=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/vf610twr/imximage.cfg,ENV_IS_IN_MMC"
+CONFIG_CMD_NET=y
CONFIG_NAND_VF610_NFC=y
CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
diff --git a/configs/vf610twr_nand_defconfig b/configs/vf610twr_nand_defconfig
index ebc915c..b054644 100644
--- a/configs/vf610twr_nand_defconfig
+++ b/configs/vf610twr_nand_defconfig
@@ -1,5 +1,6 @@
CONFIG_ARM=y
CONFIG_TARGET_VF610TWR=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/vf610twr/imximage.cfg,ENV_IS_IN_NAND"
+CONFIG_CMD_NET=y
CONFIG_NAND_VF610_NFC=y
CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
diff --git a/configs/vision2_defconfig b/configs/vision2_defconfig
index ae2b487..7bdfc8c 100644
--- a/configs/vision2_defconfig
+++ b/configs/vision2_defconfig
@@ -1,3 +1,4 @@
CONFIG_ARM=y
CONFIG_TARGET_VISION2=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/ttcontrol/vision2/imximage_hynix.cfg"
+CONFIG_CMD_NET=y
diff --git a/configs/vl_ma2sc_defconfig b/configs/vl_ma2sc_defconfig
index e6478a7..eab4019 100644
--- a/configs/vl_ma2sc_defconfig
+++ b/configs/vl_ma2sc_defconfig
@@ -1,3 +1,4 @@
CONFIG_ARM=y
CONFIG_ARCH_AT91=y
CONFIG_TARGET_VL_MA2SC=y
+CONFIG_CMD_NET=y
diff --git a/configs/vl_ma2sc_ram_defconfig b/configs/vl_ma2sc_ram_defconfig
index c1f4947..6ffbf88 100644
--- a/configs/vl_ma2sc_ram_defconfig
+++ b/configs/vl_ma2sc_ram_defconfig
@@ -2,3 +2,4 @@
CONFIG_ARCH_AT91=y
CONFIG_TARGET_VL_MA2SC=y
CONFIG_SYS_EXTRA_OPTIONS="RAMLOAD"
+CONFIG_CMD_NET=y
diff --git a/configs/vme8349_defconfig b/configs/vme8349_defconfig
index 8df2cfd..1f9a469 100644
--- a/configs/vme8349_defconfig
+++ b/configs/vme8349_defconfig
@@ -1,3 +1,4 @@
CONFIG_PPC=y
CONFIG_MPC83xx=y
CONFIG_TARGET_VME8349=y
+CONFIG_CMD_NET=y
diff --git a/configs/vpac270_nor_128_defconfig b/configs/vpac270_nor_128_defconfig
index 0f2ff7c..6c40f1e 100644
--- a/configs/vpac270_nor_128_defconfig
+++ b/configs/vpac270_nor_128_defconfig
@@ -1,3 +1,4 @@
CONFIG_ARM=y
CONFIG_TARGET_VPAC270=y
CONFIG_SYS_EXTRA_OPTIONS="NOR,RAM_128M"
+CONFIG_CMD_NET=y
diff --git a/configs/vpac270_nor_256_defconfig b/configs/vpac270_nor_256_defconfig
index dfff8b4..74b9473 100644
--- a/configs/vpac270_nor_256_defconfig
+++ b/configs/vpac270_nor_256_defconfig
@@ -1,3 +1,4 @@
CONFIG_ARM=y
CONFIG_TARGET_VPAC270=y
CONFIG_SYS_EXTRA_OPTIONS="NOR,RAM_256M"
+CONFIG_CMD_NET=y
diff --git a/configs/vpac270_ond_256_defconfig b/configs/vpac270_ond_256_defconfig
index ea61a76..c8a3158 100644
--- a/configs/vpac270_ond_256_defconfig
+++ b/configs/vpac270_ond_256_defconfig
@@ -2,3 +2,4 @@
CONFIG_TARGET_VPAC270=y
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="ONENAND,RAM_256M"
+CONFIG_CMD_NET=y
diff --git a/configs/walnut_defconfig b/configs/walnut_defconfig
index c5b302e..f49007b 100644
--- a/configs/walnut_defconfig
+++ b/configs/walnut_defconfig
@@ -1,4 +1,5 @@
CONFIG_PPC=y
CONFIG_4xx=y
CONFIG_TARGET_WALNUT=y
-CONFIG_REGEX=y
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/wandboard_defconfig b/configs/wandboard_defconfig
index 1ccac5a..eaa5962 100644
--- a/configs/wandboard_defconfig
+++ b/configs/wandboard_defconfig
@@ -1,6 +1,8 @@
-CONFIG_SPL=y
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/imx-common/spl_sd.cfg,MX6QDL"
CONFIG_ARM=y
CONFIG_TARGET_WANDBOARD=y
+CONFIG_SPL=y
+CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/imx-common/spl_sd.cfg,MX6QDL"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
CONFIG_DM=y
CONFIG_DM_THERMAL=y
diff --git a/configs/whistler_defconfig b/configs/whistler_defconfig
index f235a03..7446a42 100644
--- a/configs/whistler_defconfig
+++ b/configs/whistler_defconfig
@@ -3,3 +3,4 @@
CONFIG_TEGRA20=y
CONFIG_TARGET_WHISTLER=y
CONFIG_DEFAULT_DEVICE_TREE="tegra20-whistler"
+CONFIG_CMD_NET=y
diff --git a/configs/wireless_space_defconfig b/configs/wireless_space_defconfig
index 580e5ce..766552c 100644
--- a/configs/wireless_space_defconfig
+++ b/configs/wireless_space_defconfig
@@ -1,3 +1,4 @@
CONFIG_ARM=y
CONFIG_KIRKWOOD=y
CONFIG_TARGET_WIRELESS_SPACE=y
+CONFIG_CMD_NET=y
diff --git a/configs/woodburn_defconfig b/configs/woodburn_defconfig
index 9f96bd9..80aa753 100644
--- a/configs/woodburn_defconfig
+++ b/configs/woodburn_defconfig
@@ -1,2 +1,3 @@
CONFIG_ARM=y
CONFIG_TARGET_WOODBURN=y
+CONFIG_CMD_NET=y
diff --git a/configs/woodburn_sd_defconfig b/configs/woodburn_sd_defconfig
index 29e87f5..26502fd 100644
--- a/configs/woodburn_sd_defconfig
+++ b/configs/woodburn_sd_defconfig
@@ -2,3 +2,4 @@
CONFIG_TARGET_WOODBURN_SD=y
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/woodburn/imximage.cfg"
+CONFIG_CMD_NET=y
diff --git a/configs/work_92105_defconfig b/configs/work_92105_defconfig
index 09cd3ba..e71db29 100644
--- a/configs/work_92105_defconfig
+++ b/configs/work_92105_defconfig
@@ -1,5 +1,6 @@
CONFIG_ARM=y
CONFIG_TARGET_WORK_92105=y
CONFIG_SPL=y
+CONFIG_CMD_NET=y
CONFIG_DM=y
CONFIG_DM_GPIO=y
diff --git a/configs/wtk_defconfig b/configs/wtk_defconfig
index 838190b..a52db30 100644
--- a/configs/wtk_defconfig
+++ b/configs/wtk_defconfig
@@ -2,3 +2,4 @@
CONFIG_8xx=y
CONFIG_TARGET_TQM823L=y
CONFIG_SYS_EXTRA_OPTIONS="LCD,SHARP_LQ065T9DR51U"
+CONFIG_CMD_NET=y
diff --git a/configs/x600_defconfig b/configs/x600_defconfig
index ad990df..3122a2b 100644
--- a/configs/x600_defconfig
+++ b/configs/x600_defconfig
@@ -1,6 +1,6 @@
CONFIG_ARM=y
CONFIG_TARGET_X600=y
-CONFIG_NET=y
CONFIG_NETDEVICES=y
CONFIG_SPL=y
+CONFIG_CMD_NET=y
CONFIG_ETH_DESIGNWARE=y
diff --git a/configs/xaeniax_defconfig b/configs/xaeniax_defconfig
index 52e301c..ada03f4 100644
--- a/configs/xaeniax_defconfig
+++ b/configs/xaeniax_defconfig
@@ -1,2 +1,3 @@
CONFIG_ARM=y
CONFIG_TARGET_XAENIAX=y
+CONFIG_CMD_NET=y
diff --git a/configs/xfi3_defconfig b/configs/xfi3_defconfig
index 7cd97e6..ec79cc6 100644
--- a/configs/xfi3_defconfig
+++ b/configs/xfi3_defconfig
@@ -1,3 +1,4 @@
CONFIG_ARM=y
CONFIG_TARGET_XFI3=y
CONFIG_SPL=y
+CONFIG_CMD_NET=y
diff --git a/configs/xpedite1000_defconfig b/configs/xpedite1000_defconfig
index 635da26..af198b7 100644
--- a/configs/xpedite1000_defconfig
+++ b/configs/xpedite1000_defconfig
@@ -1,3 +1,4 @@
CONFIG_PPC=y
CONFIG_4xx=y
CONFIG_TARGET_XPEDITE1000=y
+CONFIG_CMD_NET=y
diff --git a/configs/xpedite517x_defconfig b/configs/xpedite517x_defconfig
index b8513c1..3648745 100644
--- a/configs/xpedite517x_defconfig
+++ b/configs/xpedite517x_defconfig
@@ -1,3 +1,4 @@
CONFIG_PPC=y
CONFIG_MPC86xx=y
CONFIG_TARGET_XPEDITE517X=y
+CONFIG_CMD_NET=y
diff --git a/configs/xpedite520x_defconfig b/configs/xpedite520x_defconfig
index d5f526d..0dc106f 100644
--- a/configs/xpedite520x_defconfig
+++ b/configs/xpedite520x_defconfig
@@ -1,3 +1,4 @@
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_XPEDITE520X=y
+CONFIG_CMD_NET=y
diff --git a/configs/xpedite537x_defconfig b/configs/xpedite537x_defconfig
index 8001dd1..797df9f 100644
--- a/configs/xpedite537x_defconfig
+++ b/configs/xpedite537x_defconfig
@@ -1,3 +1,4 @@
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_XPEDITE537X=y
+CONFIG_CMD_NET=y
diff --git a/configs/xpedite550x_defconfig b/configs/xpedite550x_defconfig
index dc33ca9..712b285 100644
--- a/configs/xpedite550x_defconfig
+++ b/configs/xpedite550x_defconfig
@@ -1,3 +1,4 @@
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_XPEDITE550X=y
+CONFIG_CMD_NET=y
diff --git a/configs/yellowstone_defconfig b/configs/yellowstone_defconfig
index 7b1a630..816636f 100644
--- a/configs/yellowstone_defconfig
+++ b/configs/yellowstone_defconfig
@@ -2,3 +2,5 @@
CONFIG_4xx=y
CONFIG_TARGET_YOSEMITE=y
CONFIG_SYS_EXTRA_OPTIONS="YELLOWSTONE"
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/yosemite_defconfig b/configs/yosemite_defconfig
index 430f25e..3456748 100644
--- a/configs/yosemite_defconfig
+++ b/configs/yosemite_defconfig
@@ -2,4 +2,5 @@
CONFIG_4xx=y
CONFIG_TARGET_YOSEMITE=y
CONFIG_SYS_EXTRA_OPTIONS="YOSEMITE"
-CONFIG_REGEX=y
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/yucca_defconfig b/configs/yucca_defconfig
index ed42523..c0d0f45 100644
--- a/configs/yucca_defconfig
+++ b/configs/yucca_defconfig
@@ -1,4 +1,5 @@
CONFIG_PPC=y
CONFIG_4xx=y
CONFIG_TARGET_YUCCA=y
-CONFIG_REGEX=y
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_NET=y
diff --git a/configs/zeus_defconfig b/configs/zeus_defconfig
index 546f10a..7524ca9 100644
--- a/configs/zeus_defconfig
+++ b/configs/zeus_defconfig
@@ -1,3 +1,4 @@
CONFIG_PPC=y
CONFIG_4xx=y
CONFIG_TARGET_ZEUS=y
+CONFIG_CMD_NET=y
diff --git a/configs/zmx25_defconfig b/configs/zmx25_defconfig
index 80a66d0..84c789a 100644
--- a/configs/zmx25_defconfig
+++ b/configs/zmx25_defconfig
@@ -1,2 +1,3 @@
CONFIG_ARM=y
CONFIG_TARGET_ZMX25=y
+CONFIG_CMD_NET=y
diff --git a/configs/zynq_microzed_defconfig b/configs/zynq_microzed_defconfig
index 9a7d26c..9215ac5 100644
--- a/configs/zynq_microzed_defconfig
+++ b/configs/zynq_microzed_defconfig
@@ -7,4 +7,5 @@
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_FIT_SIGNATURE=y
+CONFIG_CMD_NET=y
CONFIG_OF_CONTROL=y
diff --git a/configs/zynq_picozed_defconfig b/configs/zynq_picozed_defconfig
index f86ef5d..ff023e6 100644
--- a/configs/zynq_picozed_defconfig
+++ b/configs/zynq_picozed_defconfig
@@ -3,3 +3,4 @@
CONFIG_TARGET_ZYNQ_PICOZED=y
CONFIG_DEFAULT_DEVICE_TREE="zynq-picozed"
CONFIG_SPL=y
+CONFIG_CMD_NET=y
diff --git a/configs/zynq_zc702_defconfig b/configs/zynq_zc702_defconfig
index 7ea8aa6..23850c8 100644
--- a/configs/zynq_zc702_defconfig
+++ b/configs/zynq_zc702_defconfig
@@ -7,4 +7,5 @@
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_FIT_SIGNATURE=y
+CONFIG_CMD_NET=y
CONFIG_OF_CONTROL=y
diff --git a/configs/zynq_zc706_defconfig b/configs/zynq_zc706_defconfig
index 4e79713..4d2e59c 100644
--- a/configs/zynq_zc706_defconfig
+++ b/configs/zynq_zc706_defconfig
@@ -7,4 +7,5 @@
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_FIT_SIGNATURE=y
+CONFIG_CMD_NET=y
CONFIG_OF_CONTROL=y
diff --git a/configs/zynq_zc70x_defconfig b/configs/zynq_zc70x_defconfig
index 01b9fab..a018b6e 100644
--- a/configs/zynq_zc70x_defconfig
+++ b/configs/zynq_zc70x_defconfig
@@ -7,4 +7,5 @@
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_FIT_SIGNATURE=y
+CONFIG_CMD_NET=y
CONFIG_OF_CONTROL=y
diff --git a/configs/zynq_zc770_xm010_defconfig b/configs/zynq_zc770_xm010_defconfig
index 6565276..7c83e8b 100644
--- a/configs/zynq_zc770_xm010_defconfig
+++ b/configs/zynq_zc770_xm010_defconfig
@@ -8,4 +8,5 @@
CONFIG_FIT_VERBOSE=y
CONFIG_FIT_SIGNATURE=y
CONFIG_SYS_EXTRA_OPTIONS="ZC770_XM010"
+CONFIG_CMD_NET=y
CONFIG_OF_CONTROL=y
diff --git a/configs/zynq_zc770_xm012_defconfig b/configs/zynq_zc770_xm012_defconfig
index adc0d7f..2659d0a 100644
--- a/configs/zynq_zc770_xm012_defconfig
+++ b/configs/zynq_zc770_xm012_defconfig
@@ -8,4 +8,5 @@
CONFIG_FIT_VERBOSE=y
CONFIG_FIT_SIGNATURE=y
CONFIG_SYS_EXTRA_OPTIONS="ZC770_XM012"
+CONFIG_CMD_NET=y
CONFIG_OF_CONTROL=y
diff --git a/configs/zynq_zc770_xm013_defconfig b/configs/zynq_zc770_xm013_defconfig
index 0066ca0..64624ea 100644
--- a/configs/zynq_zc770_xm013_defconfig
+++ b/configs/zynq_zc770_xm013_defconfig
@@ -8,4 +8,5 @@
CONFIG_FIT_VERBOSE=y
CONFIG_FIT_SIGNATURE=y
CONFIG_SYS_EXTRA_OPTIONS="ZC770_XM013"
+CONFIG_CMD_NET=y
CONFIG_OF_CONTROL=y
diff --git a/configs/zynq_zed_defconfig b/configs/zynq_zed_defconfig
index 4900b7c..55d58a7 100644
--- a/configs/zynq_zed_defconfig
+++ b/configs/zynq_zed_defconfig
@@ -7,4 +7,5 @@
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_FIT_SIGNATURE=y
+CONFIG_CMD_NET=y
CONFIG_OF_CONTROL=y
diff --git a/configs/zynq_zybo_defconfig b/configs/zynq_zybo_defconfig
index 37bfa64..f119532 100644
--- a/configs/zynq_zybo_defconfig
+++ b/configs/zynq_zybo_defconfig
@@ -7,4 +7,5 @@
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_FIT_SIGNATURE=y
+CONFIG_CMD_NET=y
CONFIG_OF_CONTROL=y
diff --git a/doc/README.generic-board b/doc/README.generic-board
index bd8eae1..734f1aa 100644
--- a/doc/README.generic-board
+++ b/doc/README.generic-board
@@ -36,7 +36,7 @@
have been moved to separate structures.
-Supported Arcthitectures
+Supported Architectures
------------------------
If you are unlucky then your architecture may not support generic board.
@@ -105,12 +105,12 @@
initialisation is painful since it must be independently added in 10
places.
-3. As time goes by the architectures naturely diverge since there is limited
-pressure to compare features or even CONFIG options against simiilar things
+3. As time goes by the architectures naturally diverge since there is limited
+pressure to compare features or even CONFIG options against similar things
in other board.c files.
4. New architectures must implement all the features all over again, and
-sometimes in subtley different ways. This places an unfair burden on getting
+sometimes in subtle different ways. This places an unfair burden on getting
a new architecture fully functional and running with U-Boot.
5. While it is a bit of a tricky change, I believe it is worthwhile and
diff --git a/doc/README.x86 b/doc/README.x86
index ef13fb4..c19f4a0 100644
--- a/doc/README.x86
+++ b/doc/README.x86
@@ -14,12 +14,13 @@
Status
------
U-Boot supports running as a coreboot [1] payload on x86. So far only Link
-(Chromebook Pixel) has been tested, but it should work with minimal adjustments
-on other x86 boards since coreboot deals with most of the low-level details.
+(Chromebook Pixel) and QEMU [2] x86 targets have been tested, but it should
+work with minimal adjustments on other x86 boards since coreboot deals with
+most of the low-level details.
U-Boot also supports booting directly from x86 reset vector without coreboot,
-aka raw support or bare support. Currently Link, Intel Crown Bay, Intel
-Minnowboard Max and Intel Galileo support running U-Boot 'bare metal'.
+aka raw support or bare support. Currently Link, QEMU x86 targets and all
+Intel boards support running U-Boot 'bare metal'.
As for loading an OS, U-Boot supports directly booting a 32-bit or 64-bit
Linux kernel as part of a FIT image. It also supports a compressed zImage.
@@ -32,15 +33,15 @@
$ make coreboot-x86_defconfig
$ make all
-Note this default configuration will build a U-Boot payload for the Link board.
+Note this default configuration will build a U-Boot payload for the QEMU board.
To build a coreboot payload against another board, you can change the build
configuration during the 'make menuconfig' process.
x86 architecture --->
...
- (chromebook_link) Board configuration file
- (chromebook_link) Board Device Tree Source (dts) file
- (0x19200000) Board specific Cache-As-RAM (CAR) address
+ (qemu-x86) Board configuration file
+ (qemu-x86_i440fx) Board Device Tree Source (dts) file
+ (0x01920000) Board specific Cache-As-RAM (CAR) address
(0x4000) Board specific Cache-As-RAM (CAR) size
Change the 'Board configuration file' and 'Board Device Tree Source (dts) file'
@@ -78,7 +79,7 @@
* ./northbridge/intel/sandybridge/systemagent-r6.bin
The 3rd one should be renamed to mrc.bin.
-As for the video ROM, you can get it here [2].
+As for the video ROM, you can get it here [3].
Make sure all these binary blobs are put in the board directory.
Now you can build U-Boot and obtain u-boot.rom:
@@ -88,8 +89,8 @@
Intel Crown Bay specific instructions:
-U-Boot support of Intel Crown Bay board [3] relies on a binary blob called
-Firmware Support Package [4] to perform all the necessary initialization steps
+U-Boot support of Intel Crown Bay board [4] relies on a binary blob called
+Firmware Support Package [5] to perform all the necessary initialization steps
as documented in the BIOS Writer Guide, including initialization of the CPU,
memory controller, chipset and certain bus interfaces.
@@ -178,6 +179,21 @@
$ make galileo_defconfig
$ make all
+QEMU x86 target instructions:
+
+To build u-boot.rom for QEMU x86 targets, just simply run
+
+$ make qemu-x86_defconfig
+$ make all
+
+Note this default configuration will build a U-Boot for the QEMU x86 i440FX
+board. To build a U-Boot against QEMU x86 Q35 board, you can change the build
+configuration during the 'make menuconfig' process like below:
+
+Device Tree Control --->
+ ...
+ (qemu-x86_q35) Default Device Tree for DT control
+
Test with coreboot
------------------
For testing U-Boot as the coreboot payload, there are things that need be paid
@@ -207,10 +223,38 @@
the video information correctly (it always says the resolution is 0x0). This
works correctly for link though.
+Test with QEMU
+--------------
+QEMU is a fancy emulator that can enable us to test U-Boot without access to
+a real x86 board. Please make sure your QEMU version is 2.3.0 or above test
+U-Boot. To launch QEMU with u-boot.rom, call QEMU as follows:
+
+$ qemu-system-i386 -nographic -bios path/to/u-boot.rom
+
+This will instantiate an emulated x86 board with i440FX and PIIX chipset. QEMU
+also supports emulating an x86 board with Q35 and ICH9 based chipset, which is
+also supported by U-Boot. To instantiate such a machine, call QEMU with:
+
+$ qemu-system-i386 -nographic -bios path/to/u-boot.rom -M q35
+
+Note by default QEMU instantiated boards only have 128 MiB system memory. But
+it is enough to have U-Boot boot and function correctly. You can increase the
+system memory by pass '-m' parameter to QEMU if you want more memory:
+
+$ qemu-system-i386 -nographic -bios path/to/u-boot.rom -m 1024
+
+This creates a board with 1 GiB system memory. Currently U-Boot for QEMU only
+supports 3 GiB maximum system memory and reserves the last 1 GiB address space
+for PCI device memory-mapped I/O and other stuff, so the maximum value of '-m'
+would be 3072.
+
+QEMU emulates a graphic card which U-Boot supports. Removing '-nographic' will
+show QEMU's VGA console window. Note this will disable QEMU's serial output.
+If you want to check both consoles, use '-serial stdio'.
CPU Microcode
-------------
-Modern CPUs usually require a special bit stream called microcode [5] to be
+Modern CPUs usually require a special bit stream called microcode [6] to be
loaded on the processor after power up in order to function properly. U-Boot
has already integrated these as hex dumps in the source tree.
@@ -227,7 +271,6 @@
Useful Commands
---------------
-
In keeping with the U-Boot philosophy of providing functions to check and
adjust internal settings, there are several x86-specific commands that may be
useful:
@@ -314,7 +357,8 @@
References
----------
[1] http://www.coreboot.org
-[2] http://www.coreboot.org/~stepan/pci8086,0166.rom
-[3] http://www.intel.com/content/www/us/en/embedded/design-tools/evaluation-platforms/atom-e660-eg20t-development-kit.html
-[4] http://www.intel.com/fsp
-[5] http://en.wikipedia.org/wiki/Microcode
+[2] http://www.qemu.org
+[3] http://www.coreboot.org/~stepan/pci8086,0166.rom
+[4] http://www.intel.com/content/www/us/en/embedded/design-tools/evaluation-platforms/atom-e660-eg20t-development-kit.html
+[5] http://www.intel.com/fsp
+[6] http://en.wikipedia.org/wiki/Microcode
diff --git a/doc/device-tree-bindings/gpio/intel,x86-pinctrl.txt b/doc/device-tree-bindings/gpio/intel,x86-pinctrl.txt
new file mode 100644
index 0000000..45ab1af
--- /dev/null
+++ b/doc/device-tree-bindings/gpio/intel,x86-pinctrl.txt
@@ -0,0 +1,31 @@
+Intel x86 PINCTRL/GPIO controller
+
+Pin-muxing on x86 can be described with a node for the PINCTRL master
+node and a set of child nodes for each pin on the SoC.
+
+The PINCTRL master node requires the following properties:
+- compatible : "intel,x86-pinctrl"
+
+Pin nodes must be children of the pinctrl master node and can
+contain the following properties:
+- pad-offset - (required) offset in the IOBASE for the pin to configured.
+- gpio-offset - (required) offset in the GPIOBASE for the pin to configured and
+ also the bit shift in this register.
+- mode-gpio - (optional) standalone property to force the pin into GPIO mode.
+- mode-func - (optional) function number to assign to the pin. if 'mode-gpio'
+ is set, this property will be ignored.
+in case of 'mode-gpio' property set:
+- output-value - (optional) this set the default output value of the GPIO.
+- direction - (optional) this set the direction of the gpio.
+- pull-str - (optional) this set the pull strength of the pin.
+- pull-assign - (optional) this set the pull assignement (up/down) of the pin.
+
+Example:
+
+pin_usb_host_en0@0 {
+ gpio-offset = <0x80 8>;
+ pad-offset = <0x260>;
+ mode-gpio;
+ output-value = <1>;
+ direction = <PIN_OUTPUT>;
+};
diff --git a/doc/device-tree-bindings/misc/intel,irq-router.txt b/doc/device-tree-bindings/misc/intel,irq-router.txt
new file mode 100644
index 0000000..598b4b1
--- /dev/null
+++ b/doc/device-tree-bindings/misc/intel,irq-router.txt
@@ -0,0 +1,50 @@
+Intel Interrupt Router Device Binding
+=====================================
+
+The device tree node which describes the operation of the Intel Interrupt Router
+device is as follows:
+
+Required properties :
+- reg : Specifies the interrupt router's PCI configuration space address as
+ defined by the Open Firmware spec.
+- compatible = "intel,irq-router"
+- intel,pirq-config : Specifies the IRQ routing register programming mechanism.
+ Valid values are:
+ "pci": IRQ routing is controlled by PCI configuration registers
+ "ibase": IRQ routing is in the memory-mapped IBASE register block
+- intel,ibase-offset : IBASE register offset in the interrupt router's PCI
+ configuration space, required only if intel,pirq-config = "ibase".
+- intel,pirq-link : Specifies the PIRQ link information with two cells. The
+ first cell is the register offset that controls the first PIRQ link routing.
+ The second cell is the total number of PIRQ links the router supports.
+- intel,pirq-mask : Specifies the IRQ mask reprenting the 16 IRQs in 8259 PIC.
+ Bit N is 1 means IRQ N is available to be routed.
+- intel,pirq-routing : Specifies all PCI devices' IRQ routing information,
+ encoded as 3 cells a group for a device. The first cell is the device's PCI
+ bus number, device number and function number encoding with PCI_BDF() macro.
+ The second cell is the PCI interrupt pin used by this device. The last cell
+ is which PIRQ line the PCI interrupt pin is routed to.
+
+
+Example
+-------
+
+#include <dt-bindings/interrupt-router/intel-irq.h>
+
+ irq-router@1f,0 {
+ reg = <0x0000f800 0 0 0 0>;
+ compatible = "intel,irq-router";
+ intel,pirq-config = "pci";
+ intel,pirq-link = <0x60 8>;
+ intel,pirq-mask = <0xdef8>;
+ intel,pirq-routing = <
+ PCI_BDF(0, 2, 0) INTA PIRQA
+ PCI_BDF(0, 3, 0) INTA PIRQB
+ PCI_BDF(0, 8, 0) INTA PIRQC
+ PCI_BDF(0, 8, 1) INTB PIRQD
+ PCI_BDF(1, 6, 0) INTA PIRQE
+ PCI_BDF(1, 6, 1) INTB PIRQF
+ PCI_BDF(1, 6, 2) INTC PIRQG
+ PCI_BDF(1, 6, 3) INTD PIRQH
+ >;
+ };
diff --git a/doc/device-tree-bindings/root.txt b/doc/device-tree-bindings/root.txt
new file mode 100644
index 0000000..001ccf3
--- /dev/null
+++ b/doc/device-tree-bindings/root.txt
@@ -0,0 +1,4 @@
+The root node
+
+Optional properties:
+ - serial-number : a string representing the device's serial number
diff --git a/doc/uImage.FIT/multi-with-loadables.its b/doc/uImage.FIT/multi-with-loadables.its
new file mode 100644
index 0000000..a8545d2
--- /dev/null
+++ b/doc/uImage.FIT/multi-with-loadables.its
@@ -0,0 +1,89 @@
+/*
+ * U-Boot uImage source file with multiple kernels, ramdisks and FDT blobs
+ * This example makes use of the 'loadables' field
+ */
+
+/dts-v1/;
+
+/ {
+ description = "Configuration to load a Xen Kernel";
+ #address-cells = <1>;
+
+ images {
+ xen_kernel@1 {
+ description = "xen binary";
+ data = /incbin/("./xen");
+ type = "kernel";
+ arch = "arm";
+ os = "linux";
+ compression = "none";
+ load = <0xa0000000>;
+ entry = <0xa0000000>;
+ hash@1 {
+ algo = "md5";
+ };
+ };
+
+ fdt@1 {
+ description = "xexpress-ca15 tree blob";
+ data = /incbin/("./vexpress-v2p-ca15-tc1.dtb");
+ type = "flat_dt";
+ arch = "arm";
+ compression = "none";
+ load = <0xb0000000>;
+ hash@1 {
+ algo = "md5";
+ };
+ };
+
+ fdt@2 {
+ description = "xexpress-ca15 tree blob";
+ data = /incbin/("./vexpress-v2p-ca15-tc1.dtb");
+ type = "flat_dt";
+ arch = "arm";
+ compression = "none";
+ load = <0xb0400000>;
+ hash@1 {
+ algo = "md5";
+ };
+ };
+
+ linux_kernel@1 {
+ description = "Linux Image";
+ data = /incbin/("./Image");
+ type = "kernel";
+ arch = "arm";
+ os = "linux";
+ compression = "none";
+ load = <0xa0000000>;
+ entry = <0xa0000000>;
+ hash@1 {
+ algo = "md5";
+ };
+ };
+ };
+
+ configurations {
+ default = "config@2";
+
+ config@1 {
+ description = "Just plain Linux";
+ kernel = "linux_kernel@1";
+ fdt = "fdt@1";
+ };
+
+ config@2 {
+ description = "Xen one loadable";
+ kernel = "xen_kernel@1";
+ fdt = "fdt@1";
+ loadables = "linux_kernel@1";
+ };
+
+ config@3 {
+ description = "Xen two loadables";
+ kernel = "xen_kernel@1";
+ fdt = "fdt@1";
+ loadables = "linux_kernel@1", "fdt@2";
+ };
+ };
+};
diff --git a/doc/uImage.FIT/source_file_format.txt b/doc/uImage.FIT/source_file_format.txt
index 427ea49..029f481 100644
--- a/doc/uImage.FIT/source_file_format.txt
+++ b/doc/uImage.FIT/source_file_format.txt
@@ -235,6 +235,7 @@
|- kernel = "kernel sub-node unit name"
|- ramdisk = "ramdisk sub-node unit name"
|- fdt = "fdt sub-node unit-name"
+ |- loadables = "loadables sub-node unit-name"
Mandatory properties:
@@ -249,6 +250,9 @@
"fdt type").
- setup : Unit name of the corresponding setup binary (used for booting
an x86 kernel). This contains the setup.bin file built by the kernel.
+ - loadables : Unit name containing a list of additional binaries to be
+ loaded at their given locations. "loadables" is a comma-separated list
+ of strings. U-Boot will load each binary at its given start-address.
The FDT blob is required to properly boot FDT based kernel, so the minimal
configuration for 2.6 FDT kernel is (kernel, fdt) pair.
diff --git a/drivers/block/fsl_sata.c b/drivers/block/fsl_sata.c
index 71d7cec..735708a 100644
--- a/drivers/block/fsl_sata.c
+++ b/drivers/block/fsl_sata.c
@@ -113,7 +113,7 @@
/* Save the private struct to block device struct */
sata_dev_desc[dev].priv = (void *)sata;
- sprintf(sata->name, "SATA%d", dev);
+ snprintf(sata->name, 12, "SATA%d", dev);
/* Set the controller register base address to device struct */
reg = (fsl_sata_reg_t *)(fsl_sata_info[dev].sata_reg_base);
diff --git a/drivers/gpio/intel_ich6_gpio.c b/drivers/gpio/intel_ich6_gpio.c
index 7e679a0..8a108f3 100644
--- a/drivers/gpio/intel_ich6_gpio.c
+++ b/drivers/gpio/intel_ich6_gpio.c
@@ -44,21 +44,28 @@
uint16_t lvl;
};
+#define GPIO_USESEL_OFFSET(x) (x)
+#define GPIO_IOSEL_OFFSET(x) (x + 4)
+#define GPIO_LVL_OFFSET(x) (x + 8)
+
+#define IOPAD_MODE_MASK 0x7
+#define IOPAD_PULL_ASSIGN_SHIFT 7
+#define IOPAD_PULL_ASSIGN_MASK (0x3 << IOPAD_PULL_ASSIGN_SHIFT)
+#define IOPAD_PULL_STRENGTH_SHIFT 9
+#define IOPAD_PULL_STRENGTH_MASK (0x3 << IOPAD_PULL_STRENGTH_SHIFT)
+
/* TODO: Move this to device tree, or platform data */
void ich_gpio_set_gpio_map(const struct pch_gpio_map *map)
{
gd->arch.gpio_map = map;
}
-static int gpio_ich6_ofdata_to_platdata(struct udevice *dev)
+static int gpio_ich6_get_base(unsigned long base)
{
- struct ich6_bank_platdata *plat = dev_get_platdata(dev);
pci_dev_t pci_dev; /* handle for 0:1f:0 */
u8 tmpbyte;
u16 tmpword;
u32 tmplong;
- u16 gpiobase;
- int offset;
/* Where should it be? */
pci_dev = PCI_BDF(0, 0x1f, 0);
@@ -123,9 +130,9 @@
* while on the Ivybridge the bit0 is used to indicate it is an
* I/O space.
*/
- tmplong = x86_pci_read_config32(pci_dev, PCI_CFG_GPIOBASE);
+ tmplong = x86_pci_read_config32(pci_dev, base);
if (tmplong == 0x00000000 || tmplong == 0xffffffff) {
- debug("%s: unexpected GPIOBASE value\n", __func__);
+ debug("%s: unexpected BASE value\n", __func__);
return -ENODEV;
}
@@ -135,7 +142,215 @@
* at the offset that we just read. Bit 0 indicates that it's
* an I/O address, not a memory address, so mask that off.
*/
- gpiobase = tmplong & 0xfffe;
+ return tmplong & 0xfffc;
+}
+
+static int _ich6_gpio_set_value(uint16_t base, unsigned offset, int value)
+{
+ u32 val;
+
+ val = inl(base);
+ if (value)
+ val |= (1UL << offset);
+ else
+ val &= ~(1UL << offset);
+ outl(val, base);
+
+ return 0;
+}
+
+static int _ich6_gpio_set_function(uint16_t base, unsigned offset, int func)
+{
+ u32 val;
+
+ if (func) {
+ val = inl(base);
+ val |= (1UL << offset);
+ outl(val, base);
+ } else {
+ val = inl(base);
+ val &= ~(1UL << offset);
+ outl(val, base);
+ }
+
+ return 0;
+}
+
+static int _ich6_gpio_set_direction(uint16_t base, unsigned offset, int dir)
+{
+ u32 val;
+
+ if (!dir) {
+ val = inl(base);
+ val |= (1UL << offset);
+ outl(val, base);
+ } else {
+ val = inl(base);
+ val &= ~(1UL << offset);
+ outl(val, base);
+ }
+
+ return 0;
+}
+
+static int _gpio_ich6_pinctrl_cfg_pin(s32 gpiobase, s32 iobase, int pin_node)
+{
+ u32 gpio_offset[2];
+ int pad_offset;
+ int val;
+ int ret;
+ const void *prop;
+
+ /*
+ * GPIO node is not mandatory, so we only do the
+ * pinmuxing if the node exist.
+ */
+ ret = fdtdec_get_int_array(gd->fdt_blob, pin_node, "gpio-offset",
+ gpio_offset, 2);
+ if (!ret) {
+ /* Do we want to force the GPIO mode? */
+ prop = fdt_getprop(gd->fdt_blob, pin_node, "mode-gpio",
+ NULL);
+ if (prop)
+ _ich6_gpio_set_function(GPIO_USESEL_OFFSET
+ (gpiobase) +
+ gpio_offset[0],
+ gpio_offset[1], 1);
+
+ val =
+ fdtdec_get_int(gd->fdt_blob, pin_node, "direction", -1);
+ if (val != -1)
+ _ich6_gpio_set_direction(GPIO_IOSEL_OFFSET
+ (gpiobase) +
+ gpio_offset[0],
+ gpio_offset[1], val);
+
+ val =
+ fdtdec_get_int(gd->fdt_blob, pin_node, "output-value", -1);
+ if (val != -1)
+ _ich6_gpio_set_value(GPIO_LVL_OFFSET(gpiobase)
+ + gpio_offset[0],
+ gpio_offset[1], val);
+ }
+
+ /* if iobase is present, let's configure the pad */
+ if (iobase != -1) {
+ int iobase_addr;
+
+ /*
+ * The offset for the same pin for the IOBASE and GPIOBASE are
+ * different, so instead of maintaining a lookup table,
+ * the device tree should provide directly the correct
+ * value for both mapping.
+ */
+ pad_offset =
+ fdtdec_get_int(gd->fdt_blob, pin_node, "pad-offset", -1);
+ if (pad_offset == -1) {
+ debug("%s: Invalid register io offset %d\n",
+ __func__, pad_offset);
+ return -EINVAL;
+ }
+
+ /* compute the absolute pad address */
+ iobase_addr = iobase + pad_offset;
+
+ /*
+ * Do we need to set a specific function mode?
+ * If someone put also 'mode-gpio', this option will
+ * be just ignored by the controller
+ */
+ val = fdtdec_get_int(gd->fdt_blob, pin_node, "mode-func", -1);
+ if (val != -1)
+ clrsetbits_le32(iobase_addr, IOPAD_MODE_MASK, val);
+
+ /* Configure the pull-up/down if needed */
+ val = fdtdec_get_int(gd->fdt_blob, pin_node, "pull-assign", -1);
+ if (val != -1)
+ clrsetbits_le32(iobase_addr,
+ IOPAD_PULL_ASSIGN_MASK,
+ val << IOPAD_PULL_ASSIGN_SHIFT);
+
+ val =
+ fdtdec_get_int(gd->fdt_blob, pin_node, "pull-strength", -1);
+ if (val != -1)
+ clrsetbits_le32(iobase_addr,
+ IOPAD_PULL_STRENGTH_MASK,
+ val << IOPAD_PULL_STRENGTH_SHIFT);
+
+ debug("%s: pad cfg [0x%x]: %08x\n", __func__, pad_offset,
+ readl(iobase_addr));
+ }
+
+ return 0;
+}
+
+int gpio_ich6_pinctrl_init(void)
+{
+ int pin_node;
+ int node;
+ int ret;
+ int gpiobase;
+ int iobase_offset;
+ int iobase = -1;
+
+ /*
+ * Get the memory/io base address to configure every pins.
+ * IOBASE is used to configure the mode/pads
+ * GPIOBASE is used to configure the direction and default value
+ */
+ gpiobase = gpio_ich6_get_base(PCI_CFG_GPIOBASE);
+ if (gpiobase < 0) {
+ debug("%s: invalid GPIOBASE address (%08x)\n", __func__,
+ gpiobase);
+ return -EINVAL;
+ }
+
+ /* This is not an error to not have a pinctrl node */
+ node =
+ fdtdec_next_compatible(gd->fdt_blob, 0, COMPAT_INTEL_X86_PINCTRL);
+ if (node <= 0) {
+ debug("%s: no pinctrl node\n", __func__);
+ return 0;
+ }
+
+ /*
+ * Get the IOBASE, this is not mandatory as this is not
+ * supported by all the CPU
+ */
+ iobase_offset = fdtdec_get_int(gd->fdt_blob, node, "io-base", -1);
+ if (iobase_offset == -1) {
+ debug("%s: io-base offset not present\n", __func__);
+ } else {
+ iobase = gpio_ich6_get_base(iobase_offset);
+ if (iobase < 0) {
+ debug("%s: invalid IOBASE address (%08x)\n", __func__,
+ iobase);
+ return -EINVAL;
+ }
+ }
+
+ for (pin_node = fdt_first_subnode(gd->fdt_blob, node);
+ pin_node > 0;
+ pin_node = fdt_next_subnode(gd->fdt_blob, pin_node)) {
+ /* Configure the pin */
+ ret = _gpio_ich6_pinctrl_cfg_pin(gpiobase, iobase, pin_node);
+ if (ret != 0) {
+ debug("%s: invalid configuration for the pin %d\n",
+ __func__, pin_node);
+ return ret;
+ }
+ }
+
+ return 0;
+}
+
+static int gpio_ich6_ofdata_to_platdata(struct udevice *dev)
+{
+ struct ich6_bank_platdata *plat = dev_get_platdata(dev);
+ u16 gpiobase;
+ int offset;
+
+ gpiobase = gpio_ich6_get_base(PCI_CFG_GPIOBASE);
offset = fdtdec_get_int(gd->fdt_blob, dev->of_offset, "reg", -1);
if (offset == -1) {
debug("%s: Invalid register offset %d\n", __func__, offset);
@@ -192,30 +407,24 @@
static int ich6_gpio_direction_input(struct udevice *dev, unsigned offset)
{
struct ich6_bank_priv *bank = dev_get_priv(dev);
- u32 tmplong;
- tmplong = inl(bank->io_sel);
- tmplong |= (1UL << offset);
- outl(bank->io_sel, tmplong);
- return 0;
+ return _ich6_gpio_set_direction(inl(bank->io_sel), offset, 0);
}
static int ich6_gpio_direction_output(struct udevice *dev, unsigned offset,
int value)
{
+ int ret;
struct ich6_bank_priv *bank = dev_get_priv(dev);
- u32 tmplong;
- gpio_set_value(offset, value);
+ ret = _ich6_gpio_set_direction(inl(bank->io_sel), offset, 1);
+ if (ret)
+ return ret;
- tmplong = inl(bank->io_sel);
- tmplong &= ~(1UL << offset);
- outl(bank->io_sel, tmplong);
- return 0;
+ return _ich6_gpio_set_value(bank->lvl, offset, value);
}
static int ich6_gpio_get_value(struct udevice *dev, unsigned offset)
-
{
struct ich6_bank_priv *bank = dev_get_priv(dev);
u32 tmplong;
@@ -230,15 +439,7 @@
int value)
{
struct ich6_bank_priv *bank = dev_get_priv(dev);
- u32 tmplong;
-
- tmplong = inl(bank->lvl);
- if (value)
- tmplong |= (1UL << offset);
- else
- tmplong &= ~(1UL << offset);
- outl(bank->lvl, tmplong);
- return 0;
+ return _ich6_gpio_set_value(bank->lvl, offset, value);
}
static int ich6_gpio_get_function(struct udevice *dev, unsigned offset)
diff --git a/drivers/gpio/stm32_gpio.c b/drivers/gpio/stm32_gpio.c
index 6d6fdb0..d7a194e 100644
--- a/drivers/gpio/stm32_gpio.c
+++ b/drivers/gpio/stm32_gpio.c
@@ -5,6 +5,9 @@
* (C) Copyright 2015
* Kamil Lulko, <rev13@wp.pl>
*
+ * Copyright 2015 ATS Advanced Telematics Systems GmbH
+ * Copyright 2015 Konsulko Group, Matt Porter <mporter@konsulko.com>
+ *
* SPDX-License-Identifier: GPL-2.0+
*/
@@ -16,6 +19,7 @@
DECLARE_GLOBAL_DATA_PTR;
+#if defined(CONFIG_STM32F4)
#define STM32_GPIOA_BASE (STM32_AHB1PERIPH_BASE + 0x0000)
#define STM32_GPIOB_BASE (STM32_AHB1PERIPH_BASE + 0x0400)
#define STM32_GPIOC_BASE (STM32_AHB1PERIPH_BASE + 0x0800)
@@ -82,6 +86,92 @@
out:
return rv;
}
+#elif defined(CONFIG_STM32F1)
+#define STM32_GPIOA_BASE (STM32_APB2PERIPH_BASE + 0x0800)
+#define STM32_GPIOB_BASE (STM32_APB2PERIPH_BASE + 0x0C00)
+#define STM32_GPIOC_BASE (STM32_APB2PERIPH_BASE + 0x1000)
+#define STM32_GPIOD_BASE (STM32_APB2PERIPH_BASE + 0x1400)
+#define STM32_GPIOE_BASE (STM32_APB2PERIPH_BASE + 0x1800)
+#define STM32_GPIOF_BASE (STM32_APB2PERIPH_BASE + 0x1C00)
+#define STM32_GPIOG_BASE (STM32_APB2PERIPH_BASE + 0x2000)
+
+static const unsigned long io_base[] = {
+ STM32_GPIOA_BASE, STM32_GPIOB_BASE, STM32_GPIOC_BASE,
+ STM32_GPIOD_BASE, STM32_GPIOE_BASE, STM32_GPIOF_BASE,
+ STM32_GPIOG_BASE
+};
+
+#define STM32_GPIO_CR_MODE_MASK 0x3
+#define STM32_GPIO_CR_MODE_SHIFT(p) (p * 4)
+#define STM32_GPIO_CR_CNF_MASK 0x3
+#define STM32_GPIO_CR_CNF_SHIFT(p) (p * 4 + 2)
+
+struct stm32_gpio_regs {
+ u32 crl; /* GPIO port configuration low */
+ u32 crh; /* GPIO port configuration high */
+ u32 idr; /* GPIO port input data */
+ u32 odr; /* GPIO port output data */
+ u32 bsrr; /* GPIO port bit set/reset */
+ u32 brr; /* GPIO port bit reset */
+ u32 lckr; /* GPIO port configuration lock */
+};
+
+#define CHECK_DSC(x) (!x || x->port > 6 || x->pin > 15)
+#define CHECK_CTL(x) (!x || x->mode > 3 || x->icnf > 3 || x->ocnf > 3 || \
+ x->pupd > 1)
+
+int stm32_gpio_config(const struct stm32_gpio_dsc *dsc,
+ const struct stm32_gpio_ctl *ctl)
+{
+ struct stm32_gpio_regs *gpio_regs;
+ u32 *cr;
+ int p, crp;
+ int rv;
+
+ if (CHECK_DSC(dsc)) {
+ rv = -EINVAL;
+ goto out;
+ }
+ if (CHECK_CTL(ctl)) {
+ rv = -EINVAL;
+ goto out;
+ }
+
+ p = dsc->pin;
+
+ gpio_regs = (struct stm32_gpio_regs *)io_base[dsc->port];
+
+ /* Enable clock for GPIO port */
+ setbits_le32(&STM32_RCC->apb2enr, 0x04 << dsc->port);
+
+ if (p < 8) {
+ cr = &gpio_regs->crl;
+ crp = p;
+ } else {
+ cr = &gpio_regs->crh;
+ crp = p - 8;
+ }
+
+ clrbits_le32(cr, 0x3 << STM32_GPIO_CR_MODE_SHIFT(crp));
+ setbits_le32(cr, ctl->mode << STM32_GPIO_CR_MODE_SHIFT(crp));
+
+ clrbits_le32(cr, 0x3 << STM32_GPIO_CR_CNF_SHIFT(crp));
+ /* Inputs set the optional pull up / pull down */
+ if (ctl->mode == STM32_GPIO_MODE_IN) {
+ setbits_le32(cr, ctl->icnf << STM32_GPIO_CR_CNF_SHIFT(crp));
+ clrbits_le32(&gpio_regs->odr, 0x1 << p);
+ setbits_le32(&gpio_regs->odr, ctl->pupd << p);
+ } else {
+ setbits_le32(cr, ctl->ocnf << STM32_GPIO_CR_CNF_SHIFT(crp));
+ }
+
+ rv = 0;
+out:
+ return rv;
+}
+#else
+#error STM32 family not supported
+#endif
int stm32_gpout_set(const struct stm32_gpio_dsc *dsc, int state)
{
@@ -140,10 +230,20 @@
dsc.port = stm32_gpio_to_port(gpio);
dsc.pin = stm32_gpio_to_pin(gpio);
+#if defined(CONFIG_STM32F4)
ctl.af = STM32_GPIO_AF0;
ctl.mode = STM32_GPIO_MODE_IN;
+ ctl.otype = STM32_GPIO_OTYPE_PP;
ctl.pupd = STM32_GPIO_PUPD_NO;
ctl.speed = STM32_GPIO_SPEED_50M;
+#elif defined(CONFIG_STM32F1)
+ ctl.mode = STM32_GPIO_MODE_IN;
+ ctl.icnf = STM32_GPIO_ICNF_IN_FLT;
+ ctl.ocnf = STM32_GPIO_OCNF_GP_PP; /* ignored for input */
+ ctl.pupd = STM32_GPIO_PUPD_UP; /* ignored for floating */
+#else
+#error STM32 family not supported
+#endif
return stm32_gpio_config(&dsc, &ctl);
}
@@ -156,11 +256,19 @@
dsc.port = stm32_gpio_to_port(gpio);
dsc.pin = stm32_gpio_to_pin(gpio);
+#if defined(CONFIG_STM32F4)
ctl.af = STM32_GPIO_AF0;
ctl.mode = STM32_GPIO_MODE_OUT;
- ctl.otype = STM32_GPIO_OTYPE_PP;
ctl.pupd = STM32_GPIO_PUPD_NO;
ctl.speed = STM32_GPIO_SPEED_50M;
+#elif defined(CONFIG_STM32F1)
+ ctl.mode = STM32_GPIO_MODE_OUT_50M;
+ ctl.ocnf = STM32_GPIO_OCNF_GP_PP;
+ ctl.icnf = STM32_GPIO_ICNF_IN_FLT; /* ignored for output */
+ ctl.pupd = STM32_GPIO_PUPD_UP; /* ignored for output */
+#else
+#error STM32 family not supported
+#endif
res = stm32_gpio_config(&dsc, &ctl);
if (res < 0)
diff --git a/drivers/gpio/sunxi_gpio.c b/drivers/gpio/sunxi_gpio.c
index f988130..afa165a 100644
--- a/drivers/gpio/sunxi_gpio.c
+++ b/drivers/gpio/sunxi_gpio.c
@@ -304,6 +304,7 @@
{ .compatible = "allwinner,sun6i-a31s-pinctrl" },
{ .compatible = "allwinner,sun7i-a20-pinctrl" },
{ .compatible = "allwinner,sun8i-a23-pinctrl" },
+ { .compatible = "allwinner,sun8i-a33-pinctrl" },
{ .compatible = "allwinner,sun9i-a80-pinctrl" },
{ }
};
diff --git a/drivers/i2c/Kconfig b/drivers/i2c/Kconfig
index ba43019..86fb36b 100644
--- a/drivers/i2c/Kconfig
+++ b/drivers/i2c/Kconfig
@@ -63,13 +63,13 @@
depends on ARCH_UNIPHIER && DM_I2C
default y
help
- Support for Panasonic UniPhier I2C controller driver. This I2C
- controller is used on PH1-LD4, PH1-sLD8 or older UniPhier SoCs.
+ Support for UniPhier I2C controller driver. This I2C controller
+ is used on PH1-LD4, PH1-sLD8 or older UniPhier SoCs.
config SYS_I2C_UNIPHIER_F
bool "UniPhier FIFO-builtin I2C driver"
depends on ARCH_UNIPHIER && DM_I2C
default y
help
- Support for Panasonic UniPhier FIFO-builtin I2C controller driver.
+ Support for UniPhier FIFO-builtin I2C controller driver.
This I2C controller is used on PH1-Pro4 or newer UniPhier SoCs.
diff --git a/drivers/i2c/i2c-uniphier-f.c b/drivers/i2c/i2c-uniphier-f.c
index d29dd45..b3349af 100644
--- a/drivers/i2c/i2c-uniphier-f.c
+++ b/drivers/i2c/i2c-uniphier-f.c
@@ -1,14 +1,12 @@
/*
- * Copyright (C) 2014 Panasonic Corporation
- * Copyright (C) 2015 Socionext Inc.
- * Author: Masahiro Yamada <yamada.masahiro@socionext.com>
+ * Copyright (C) 2014-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include <linux/types.h>
-#include <asm/io.h>
+#include <linux/io.h>
#include <asm/errno.h>
#include <dm/device.h>
#include <dm/root.h>
diff --git a/drivers/i2c/i2c-uniphier.c b/drivers/i2c/i2c-uniphier.c
index c4972ff..85b9eff 100644
--- a/drivers/i2c/i2c-uniphier.c
+++ b/drivers/i2c/i2c-uniphier.c
@@ -1,14 +1,12 @@
/*
- * Copyright (C) 2014 Panasonic Corporation
- * Copyright (C) 2015 Socionext Inc.
- * Author: Masahiro Yamada <yamada.masahiro@socionext.com>
+ * Copyright (C) 2014-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include <linux/types.h>
-#include <asm/io.h>
+#include <linux/io.h>
#include <asm/errno.h>
#include <dm/device.h>
#include <dm/root.h>
diff --git a/drivers/i2c/omap24xx_i2c.c b/drivers/i2c/omap24xx_i2c.c
index 0f1e35c..79a5c94 100644
--- a/drivers/i2c/omap24xx_i2c.c
+++ b/drivers/i2c/omap24xx_i2c.c
@@ -33,7 +33,7 @@
* (except for OMAP243X and OMAP34XX).
* - Driver now supports up to I2C5 (OMAP5).
*
- * Copyright (c) 2014 Hannes Petermaier <oe5hpm@oevsv.at>, B&R
+ * Copyright (c) 2014 Hannes Schmelzer <oe5hpm@oevsv.at>, B&R
* - Added support for set_speed
*
*/
diff --git a/drivers/mmc/sunxi_mmc.c b/drivers/mmc/sunxi_mmc.c
index bb08147..e7ab828 100644
--- a/drivers/mmc/sunxi_mmc.c
+++ b/drivers/mmc/sunxi_mmc.c
@@ -75,8 +75,10 @@
cd_pin = sunxi_mmc_getcd_gpio(sdc_no);
if (cd_pin >= 0) {
ret = gpio_request(cd_pin, "mmc_cd");
- if (!ret)
+ if (!ret) {
+ sunxi_gpio_set_pull(cd_pin, SUNXI_GPIO_PULL_UP);
ret = gpio_direction_input(cd_pin);
+ }
}
return ret;
diff --git a/drivers/mtd/nand/Makefile b/drivers/mtd/nand/Makefile
index 347ea62..a0cf4d5 100644
--- a/drivers/mtd/nand/Makefile
+++ b/drivers/mtd/nand/Makefile
@@ -73,5 +73,6 @@
obj-$(CONFIG_NAND_FSL_IFC) += fsl_ifc_spl.o
obj-$(CONFIG_NAND_MXC) += mxc_nand_spl.o
obj-$(CONFIG_NAND_MXS) += mxs_nand_spl.o mxs_nand.o
+obj-$(CONFIG_NAND_SUNXI) += sunxi_nand_spl.o
endif # drivers
diff --git a/drivers/mtd/nand/sunxi_nand_spl.c b/drivers/mtd/nand/sunxi_nand_spl.c
new file mode 100644
index 0000000..75982f5
--- /dev/null
+++ b/drivers/mtd/nand/sunxi_nand_spl.c
@@ -0,0 +1,273 @@
+/*
+ * Copyright (c) 2014, Antmicro Ltd <www.antmicro.com>
+ * Copyright (c) 2015, Turtle Solutions <www.turtle-solutions.eu>
+ * Copyright (c) 2015, Roy Spliet <rspliet@ultimaker.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ *
+ * \todo Detect chip parameters (page size, ECC mode, randomisation...)
+ */
+
+#include <common.h>
+#include <config.h>
+#include <asm/io.h>
+#include <nand.h>
+#include <asm/arch/cpu.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/dma.h>
+#include <asm/arch/nand.h>
+
+void
+nand_init(void)
+{
+ struct sunxi_ccm_reg * const ccm =
+ (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
+ struct sunxi_nand * const nand = (struct sunxi_nand *)SUNXI_NFC_BASE;
+ u32 val;
+
+ board_nand_init();
+
+ /* "un-gate" NAND clock and clock source
+ * This assumes that the clock was already correctly configured by
+ * BootROM */
+ setbits_le32(&ccm->ahb_gate0, (1 << AHB_GATE_OFFSET_NAND0));
+#ifdef CONFIG_MACH_SUN9I
+ setbits_le32(&ccm->ahb_gate1, (1 << AHB_GATE_OFFSET_DMA));
+#else
+ setbits_le32(&ccm->ahb_gate0, (1 << AHB_GATE_OFFSET_DMA));
+#endif
+ setbits_le32(&ccm->nand0_clk_cfg, 0x80000000);
+
+ val = readl(&nand->ctl);
+ val |= SUNXI_NAND_CTL_RST;
+ writel(val, &nand->ctl);
+
+ /* Wait until reset pin is deasserted */
+ do {
+ val = readl(&nand->ctl);
+ if (!(val & SUNXI_NAND_CTL_RST))
+ break;
+ } while (1);
+
+ /** \todo Chip select, currently kind of static */
+ val = readl(&nand->ctl);
+ val &= 0xf0fff0f2;
+ val |= SUNXI_NAND_CTL_EN;
+ val |= SUNXI_NAND_CTL_PAGE_SIZE(CONFIG_NAND_SUNXI_PAGE_SIZE);
+ writel(val, &nand->ctl);
+
+ writel(0x100, &nand->timing_ctl);
+ writel(0x7ff, &nand->timing_cfg);
+
+ /* reset CMD */
+ val = SUNXI_NAND_CMD_SEND_CMD1 | SUNXI_NAND_CMD_WAIT_FLAG |
+ NAND_CMD_RESET;
+ writel(val, &nand->cmd);
+ do {
+ val = readl(&nand->st);
+ if (val & (1<<1))
+ break;
+ udelay(1000);
+ } while (1);
+
+ printf("Nand initialised\n");
+}
+
+int
+nand_wait_timeout(u32 *reg, u32 mask, u32 val)
+{
+ unsigned long tmo = timer_get_us() + 1000000; /* 1s */
+
+ while ((readl(reg) & mask) != val) {
+ if (timer_get_us() > tmo)
+ return -ETIMEDOUT;
+ }
+
+ return 0;
+}
+
+/* random seed */
+static const uint16_t random_seed[128] = {
+ 0x2b75, 0x0bd0, 0x5ca3, 0x62d1, 0x1c93, 0x07e9, 0x2162, 0x3a72,
+ 0x0d67, 0x67f9, 0x1be7, 0x077d, 0x032f, 0x0dac, 0x2716, 0x2436,
+ 0x7922, 0x1510, 0x3860, 0x5287, 0x480f, 0x4252, 0x1789, 0x5a2d,
+ 0x2a49, 0x5e10, 0x437f, 0x4b4e, 0x2f45, 0x216e, 0x5cb7, 0x7130,
+ 0x2a3f, 0x60e4, 0x4dc9, 0x0ef0, 0x0f52, 0x1bb9, 0x6211, 0x7a56,
+ 0x226d, 0x4ea7, 0x6f36, 0x3692, 0x38bf, 0x0c62, 0x05eb, 0x4c55,
+ 0x60f4, 0x728c, 0x3b6f, 0x2037, 0x7f69, 0x0936, 0x651a, 0x4ceb,
+ 0x6218, 0x79f3, 0x383f, 0x18d9, 0x4f05, 0x5c82, 0x2912, 0x6f17,
+ 0x6856, 0x5938, 0x1007, 0x61ab, 0x3e7f, 0x57c2, 0x542f, 0x4f62,
+ 0x7454, 0x2eac, 0x7739, 0x42d4, 0x2f90, 0x435a, 0x2e52, 0x2064,
+ 0x637c, 0x66ad, 0x2c90, 0x0bad, 0x759c, 0x0029, 0x0986, 0x7126,
+ 0x1ca7, 0x1605, 0x386a, 0x27f5, 0x1380, 0x6d75, 0x24c3, 0x0f8e,
+ 0x2b7a, 0x1418, 0x1fd1, 0x7dc1, 0x2d8e, 0x43af, 0x2267, 0x7da3,
+ 0x4e3d, 0x1338, 0x50db, 0x454d, 0x764d, 0x40a3, 0x42e6, 0x262b,
+ 0x2d2e, 0x1aea, 0x2e17, 0x173d, 0x3a6e, 0x71bf, 0x25f9, 0x0a5d,
+ 0x7c57, 0x0fbe, 0x46ce, 0x4939, 0x6b17, 0x37bb, 0x3e91, 0x76db,
+};
+
+uint32_t ecc_errors = 0;
+
+static void
+nand_config_ecc(struct sunxi_nand *nand, uint32_t page, int syndrome)
+{
+ static u8 strength[] = {16, 24, 28, 32, 40, 48, 56, 60, 64};
+ int i;
+ uint32_t ecc_mode;
+ u32 ecc;
+ u16 seed = 0;
+
+ for (i = 0; i < ARRAY_SIZE(strength); i++) {
+ if (CONFIG_NAND_SUNXI_ECC_STRENGTH == strength[i]) {
+ ecc_mode = i;
+ break;
+ }
+ }
+
+ if (i == ARRAY_SIZE(strength)) {
+ printf("ECC strength unsupported\n");
+ return;
+ }
+
+ ecc = SUNXI_NAND_ECC_CTL_ECC_EN |
+ SUNXI_NAND_ECC_CTL_PIPELINE |
+ SUNXI_NAND_ECC_CTL_RND_EN |
+ SUNXI_NAND_ECC_CTL_MODE(ecc_mode);
+
+ if (CONFIG_NAND_SUNXI_ECC_STEP == 512)
+ ecc |= SUNXI_NAND_ECC_CTL_BS_512B;
+
+ if (syndrome)
+ seed = 0x4A80;
+ else
+ seed = random_seed[page % ARRAY_SIZE(random_seed)];
+
+ ecc |= SUNXI_NAND_ECC_CTL_RND_SEED(seed);
+
+ writel(ecc, &nand->ecc_ctl);
+}
+
+/* read CONFIG_NAND_SUNXI_ECC_STEP bytes from real_addr to temp_buf */
+void
+nand_read_block(struct sunxi_nand *nand, phys_addr_t src, dma_addr_t dst,
+ int syndrome)
+{
+ struct sunxi_dma * const dma = (struct sunxi_dma *)SUNXI_DMA_BASE;
+ struct sunxi_dma_cfg * const dma_cfg = &dma->ddma[0];
+
+ uint32_t shift;
+ uint32_t page;
+ uint32_t addr;
+ uint32_t oob_offset;
+ uint32_t ecc_bytes;
+ u32 val;
+ u32 cmd;
+
+ page = src / CONFIG_NAND_SUNXI_PAGE_SIZE;
+ if (page > 0xFFFF) {
+ /* TODO: currently this is not supported */
+ printf("Reading from address >= %08X is not allowed.\n",
+ 0xFFFF * CONFIG_NAND_SUNXI_PAGE_SIZE);
+ return;
+ }
+
+ shift = src % CONFIG_NAND_SUNXI_PAGE_SIZE;
+ writel(0, &nand->ecc_st);
+
+ /* ECC_CTL, randomization */
+ ecc_bytes = CONFIG_NAND_SUNXI_ECC_STRENGTH *
+ fls(CONFIG_NAND_SUNXI_ECC_STEP * 8);
+ ecc_bytes = DIV_ROUND_UP(ecc_bytes, 8);
+ ecc_bytes += (ecc_bytes & 1); /* Align to 2-bytes */
+ ecc_bytes += 4;
+
+ nand_config_ecc(nand, page, syndrome);
+ if (syndrome) {
+ /* shift every 1kB in syndrome */
+ shift += (shift / CONFIG_NAND_SUNXI_ECC_STEP) * ecc_bytes;
+ oob_offset = CONFIG_NAND_SUNXI_ECC_STEP + shift;
+ } else {
+ oob_offset = CONFIG_NAND_SUNXI_PAGE_SIZE +
+ (shift / CONFIG_NAND_SUNXI_ECC_STEP) * ecc_bytes;
+ }
+
+ addr = (page << 16) | shift;
+
+ /* DMA */
+ val = readl(&nand->ctl);
+ writel(val | SUNXI_NAND_CTL_RAM_METHOD_DMA, &nand->ctl);
+
+ writel(oob_offset, &nand->spare_area);
+
+ /* DMAC
+ * \todo Separate this into a tidy driver */
+ writel(0x0, &dma->irq_en); /* clear dma interrupts */
+ writel((uint32_t) &nand->io_data , &dma_cfg->src_addr);
+ writel(dst , &dma_cfg->dst_addr);
+ writel(0x00007F0F , &dma_cfg->ddma_para);
+ writel(CONFIG_NAND_SUNXI_ECC_STEP, &dma_cfg->bc);
+
+ val = SUNXI_DMA_CTL_SRC_DRQ(DDMA_SRC_DRQ_NAND) |
+ SUNXI_DMA_CTL_MODE_IO |
+ SUNXI_DMA_CTL_SRC_DATA_WIDTH_32 |
+ SUNXI_DMA_CTL_DST_DRQ(DDMA_DST_DRQ_SDRAM) |
+ SUNXI_DMA_CTL_DST_DATA_WIDTH_32 |
+ SUNXI_DMA_CTL_TRIGGER;
+ writel(val, &dma_cfg->ctl);
+
+ writel(0x00E00530, &nand->rcmd_set);
+ nand_wait_timeout(&nand->st, SUNXI_NAND_ST_FIFO_FULL, 0);
+
+ writel(1 , &nand->block_num);
+ writel(addr, &nand->addr_low);
+ writel(0 , &nand->addr_high);
+
+ /* CMD (PAGE READ) */
+ cmd = 0x85E80000;
+ cmd |= SUNXI_NAND_CMD_ADDR_CYCLES(CONFIG_NAND_SUNXI_ADDR_CYCLES);
+ cmd |= (syndrome ? SUNXI_NAND_CMD_ORDER_SEQ :
+ SUNXI_NAND_CMD_ORDER_INTERLEAVE);
+ writel(cmd, &nand->cmd);
+
+ if(nand_wait_timeout(&nand->st, SUNXI_NAND_ST_DMA_INT,
+ SUNXI_NAND_ST_DMA_INT)) {
+ printf("NAND timeout reading data\n");
+ return;
+ }
+
+ if(nand_wait_timeout(&dma_cfg->ctl, SUNXI_DMA_CTL_TRIGGER, 0)) {
+ printf("NAND timeout reading data\n");
+ return;
+ }
+
+ if (readl(&nand->ecc_st))
+ ecc_errors++;
+}
+
+int
+nand_spl_load_image(uint32_t offs, unsigned int size, void *dest)
+{
+ struct sunxi_nand * const nand = (struct sunxi_nand *)SUNXI_NFC_BASE;
+ dma_addr_t dst_block;
+ dma_addr_t dst_end;
+ phys_addr_t addr = offs;
+
+ dst_end = ((dma_addr_t) dest) + size;
+
+ memset((void *)dest, 0x0, size);
+ ecc_errors = 0;
+ for (dst_block = (dma_addr_t) dest; dst_block < dst_end;
+ dst_block += CONFIG_NAND_SUNXI_ECC_STEP,
+ addr += CONFIG_NAND_SUNXI_ECC_STEP) {
+ /* syndrome read first 4MiB to match Allwinner BootROM */
+ nand_read_block(nand, addr, dst_block, addr < 0x400000);
+ }
+
+ if (ecc_errors)
+ printf("Error: %d ECC failures detected\n", ecc_errors);
+ return ecc_errors == 0;
+}
+
+void
+nand_deselect(void)
+{}
diff --git a/drivers/pci/pci-uclass.c b/drivers/pci/pci-uclass.c
index d48d865..de87505 100644
--- a/drivers/pci/pci-uclass.c
+++ b/drivers/pci/pci-uclass.c
@@ -596,6 +596,7 @@
UCLASS_DRIVER(pci) = {
.id = UCLASS_PCI,
.name = "pci",
+ .flags = DM_UC_FLAG_SEQ_ALIAS,
.post_bind = pci_uclass_post_bind,
.pre_probe = pci_uclass_pre_probe,
.post_probe = pci_uclass_post_probe,
diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
index 3babd94..157491c 100644
--- a/drivers/pci/pci.c
+++ b/drivers/pci/pci.c
@@ -186,72 +186,6 @@
return -1;
}
-/*
- *
- */
-
-int __pci_hose_phys_to_bus(struct pci_controller *hose,
- phys_addr_t phys_addr,
- unsigned long flags,
- unsigned long skip_mask,
- pci_addr_t *ba)
-{
- struct pci_region *res;
- pci_addr_t bus_addr;
- int i;
-
- for (i = 0; i < hose->region_count; i++) {
- res = &hose->regions[i];
-
- if (((res->flags ^ flags) & PCI_REGION_TYPE) != 0)
- continue;
-
- if (res->flags & skip_mask)
- continue;
-
- bus_addr = phys_addr - res->phys_start + res->bus_start;
-
- if (bus_addr >= res->bus_start &&
- bus_addr < res->bus_start + res->size) {
- *ba = bus_addr;
- return 0;
- }
- }
-
- return 1;
-}
-
-pci_addr_t pci_hose_phys_to_bus (struct pci_controller *hose,
- phys_addr_t phys_addr,
- unsigned long flags)
-{
- pci_addr_t bus_addr = 0;
- int ret;
-
- if (!hose) {
- puts("pci_hose_phys_to_bus: invalid hose\n");
- return bus_addr;
- }
-
- /*
- * if PCI_REGION_MEM is set we do a two pass search with preference
- * on matches that don't have PCI_REGION_SYS_MEMORY set
- */
- if ((flags & PCI_REGION_MEM) == PCI_REGION_MEM) {
- ret = __pci_hose_phys_to_bus(hose, phys_addr,
- flags, PCI_REGION_SYS_MEMORY, &bus_addr);
- if (!ret)
- return bus_addr;
- }
-
- ret = __pci_hose_phys_to_bus(hose, phys_addr, flags, 0, &bus_addr);
-
- if (ret)
- puts("pci_hose_phys_to_bus: invalid physical address\n");
-
- return bus_addr;
-}
-
int pci_hose_config_device(struct pci_controller *hose,
pci_dev_t dev,
unsigned long io,
@@ -503,6 +437,10 @@
}
#endif /* CONFIG_PCI_BOOTDELAY */
+#ifdef CONFIG_PCI_SCAN_SHOW
+ puts("PCI:\n");
+#endif
+
/*
* Start scan at current_busno.
* PCIe will start scan at first_busno+1.
diff --git a/drivers/pci/pci_auto.c b/drivers/pci/pci_auto.c
index e8da977..7c10983 100644
--- a/drivers/pci/pci_auto.c
+++ b/drivers/pci/pci_auto.c
@@ -14,15 +14,12 @@
#include <errno.h>
#include <pci.h>
-#undef DEBUG
#ifdef DEBUG
#define DEBUGF(x...) printf(x)
#else
#define DEBUGF(x...)
#endif /* DEBUG */
-#define PCIAUTO_IDE_MODE_MASK 0x05
-
/* the user can define CONFIG_SYS_PCI_CACHE_LINE_SIZE to avoid problems */
#ifndef CONFIG_SYS_PCI_CACHE_LINE_SIZE
#define CONFIG_SYS_PCI_CACHE_LINE_SIZE 8
@@ -425,7 +422,6 @@
{
unsigned int sub_bus = PCI_BUS(dev);
unsigned short class;
- unsigned char prg_iface;
int n;
pci_hose_read_config_word(hose, dev, PCI_CLASS_DEVICE, &class);
@@ -461,17 +457,6 @@
#endif
break;
- case PCI_CLASS_STORAGE_IDE:
- pci_hose_read_config_byte(hose, dev, PCI_CLASS_PROG, &prg_iface);
- if (!(prg_iface & PCIAUTO_IDE_MODE_MASK)) {
- DEBUGF("PCI Autoconfig: Skipping legacy mode IDE controller\n");
- return sub_bus;
- }
-
- pciauto_setup_device(hose, dev, 6, hose->pci_mem,
- hose->pci_prefetch, hose->pci_io);
- break;
-
case PCI_CLASS_BRIDGE_CARDBUS:
/*
* just do a minimal setup of the bridge,
diff --git a/drivers/pci/pci_common.c b/drivers/pci/pci_common.c
index 24c66bb..b9ff23f 100644
--- a/drivers/pci/pci_common.c
+++ b/drivers/pci/pci_common.c
@@ -182,10 +182,10 @@
}
int __pci_hose_bus_to_phys(struct pci_controller *hose,
- pci_addr_t bus_addr,
- unsigned long flags,
- unsigned long skip_mask,
- phys_addr_t *pa)
+ pci_addr_t bus_addr,
+ unsigned long flags,
+ unsigned long skip_mask,
+ phys_addr_t *pa)
{
struct pci_region *res;
int i;
@@ -240,6 +240,68 @@
return phys_addr;
}
+int __pci_hose_phys_to_bus(struct pci_controller *hose,
+ phys_addr_t phys_addr,
+ unsigned long flags,
+ unsigned long skip_mask,
+ pci_addr_t *ba)
+{
+ struct pci_region *res;
+ pci_addr_t bus_addr;
+ int i;
+
+ for (i = 0; i < hose->region_count; i++) {
+ res = &hose->regions[i];
+
+ if (((res->flags ^ flags) & PCI_REGION_TYPE) != 0)
+ continue;
+
+ if (res->flags & skip_mask)
+ continue;
+
+ bus_addr = phys_addr - res->phys_start + res->bus_start;
+
+ if (bus_addr >= res->bus_start &&
+ bus_addr < res->bus_start + res->size) {
+ *ba = bus_addr;
+ return 0;
+ }
+ }
+
+ return 1;
+}
+
+pci_addr_t pci_hose_phys_to_bus(struct pci_controller *hose,
+ phys_addr_t phys_addr,
+ unsigned long flags)
+{
+ pci_addr_t bus_addr = 0;
+ int ret;
+
+ if (!hose) {
+ puts("pci_hose_phys_to_bus: invalid hose\n");
+ return bus_addr;
+ }
+
+ /*
+ * if PCI_REGION_MEM is set we do a two pass search with preference
+ * on matches that don't have PCI_REGION_SYS_MEMORY set
+ */
+ if ((flags & PCI_REGION_MEM) == PCI_REGION_MEM) {
+ ret = __pci_hose_phys_to_bus(hose, phys_addr,
+ flags, PCI_REGION_SYS_MEMORY, &bus_addr);
+ if (!ret)
+ return bus_addr;
+ }
+
+ ret = __pci_hose_phys_to_bus(hose, phys_addr, flags, 0, &bus_addr);
+
+ if (ret)
+ puts("pci_hose_phys_to_bus: invalid physical address\n");
+
+ return bus_addr;
+}
+
pci_dev_t pci_find_device(unsigned int vendor, unsigned int device, int index)
{
struct pci_device_id ids[2] = { {}, {0, 0} };
diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
index 54e6f26..5611fac 100644
--- a/drivers/serial/Kconfig
+++ b/drivers/serial/Kconfig
@@ -77,7 +77,8 @@
registers, 2=32-bit word registers, etc.
config UNIPHIER_SERIAL
- bool "UniPhier on-chip UART support"
+ bool "Support for UniPhier on-chip UART"
depends on ARCH_UNIPHIER && DM_SERIAL
help
- Support for the on-chip UARTs on the Panasonic UniPhier platform.
+ If you have a UniPhier based board and want to use the on-chip
+ serial ports, say Y to this option. If unsure, say N.
diff --git a/drivers/serial/serial_stm32.c b/drivers/serial/serial_stm32.c
index 1b22c69..8b2830b 100644
--- a/drivers/serial/serial_stm32.c
+++ b/drivers/serial/serial_stm32.c
@@ -128,6 +128,9 @@
struct stm32_serial *usart =
(struct stm32_serial *)usart_base[USART_PORT];
+ if (c == '\n')
+ stm32_serial_putc('\r');
+
while ((readl(&usart->sr) & USART_SR_FLAG_TXE) == 0)
;
writel(c, &usart->dr);
diff --git a/drivers/serial/serial_uniphier.c b/drivers/serial/serial_uniphier.c
index 74547eb..f210986 100644
--- a/drivers/serial/serial_uniphier.c
+++ b/drivers/serial/serial_uniphier.c
@@ -1,13 +1,11 @@
/*
- * Copyright (C) 2012-2015 Panasonic Corporation
- * Copyright (C) 2015 Socionext Inc.
- * Author: Masahiro Yamada <yamada.masahiro@socionext.com>
+ * Copyright (C) 2012-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
+#include <linux/io.h>
#include <linux/serial_reg.h>
-#include <asm/io.h>
#include <asm/errno.h>
#include <dm/device.h>
#include <dm/platform_data/serial-uniphier.h>
diff --git a/drivers/usb/gadget/ci_udc.c b/drivers/usb/gadget/ci_udc.c
index 22d288c..aadff42 100644
--- a/drivers/usb/gadget/ci_udc.c
+++ b/drivers/usb/gadget/ci_udc.c
@@ -50,6 +50,8 @@
/* For each endpoint, we need 2 QTDs, one for each of IN and OUT */
#define ILIST_SZ (NUM_ENDPOINTS * 2 * ILIST_ENT_SZ)
+#define EP_MAX_LENGTH_TRANSFER 0x4000
+
#ifndef DEBUG
#define DBG(x...) do {} while (0)
#else
@@ -102,13 +104,28 @@
};
/* Init values for USB endpoints. */
-static const struct usb_ep ci_ep_init[2] = {
+static const struct usb_ep ci_ep_init[5] = {
[0] = { /* EP 0 */
.maxpacket = 64,
.name = "ep0",
.ops = &ci_ep_ops,
},
- [1] = { /* EP 1..n */
+ [1] = {
+ .maxpacket = 512,
+ .name = "ep1in-bulk",
+ .ops = &ci_ep_ops,
+ },
+ [2] = {
+ .maxpacket = 512,
+ .name = "ep2out-bulk",
+ .ops = &ci_ep_ops,
+ },
+ [3] = {
+ .maxpacket = 512,
+ .name = "ep3in-int",
+ .ops = &ci_ep_ops,
+ },
+ [4] = {
.maxpacket = 512,
.name = "ep-",
.ops = &ci_ep_ops,
@@ -197,6 +214,19 @@
}
/**
+ * ci_flush_td - flush cache over queue item
+ * @td: td pointer
+ *
+ * This function flushes cache for particular transfer descriptor.
+ */
+static void ci_flush_td(struct ept_queue_item *td)
+{
+ const uint32_t start = (uint32_t)td;
+ const uint32_t end = (uint32_t) td + ILIST_ENT_SZ;
+ flush_dcache_range(start, end);
+}
+
+/**
* ci_invalidate_qtd - invalidate cache over queue item
* @ep_num: Endpoint number
*
@@ -211,6 +241,19 @@
invalidate_dcache_range(start, end);
}
+/**
+ * ci_invalidate_td - invalidate cache over queue item
+ * @td: td pointer
+ *
+ * This function invalidates cache for particular transfer descriptor.
+ */
+static void ci_invalidate_td(struct ept_queue_item *td)
+{
+ const uint32_t start = (uint32_t)td;
+ const uint32_t end = start + ILIST_ENT_SZ;
+ invalidate_dcache_range(start, end);
+}
+
static struct usb_request *
ci_ep_alloc_request(struct usb_ep *ep, unsigned int gfp_flags)
{
@@ -376,6 +419,9 @@
struct ept_queue_head *head;
int bit, num, len, in;
struct ci_req *ci_req;
+ u8 *buf;
+ uint32_t length, actlen;
+ struct ept_queue_item *dtd, *qtd;
ci_ep->req_primed = true;
@@ -387,16 +433,41 @@
ci_req = list_first_entry(&ci_ep->queue, struct ci_req, queue);
len = ci_req->req.length;
- item->info = INFO_BYTES(len) | INFO_ACTIVE;
- item->page0 = (unsigned long)ci_req->hw_buf;
- item->page1 = ((unsigned long)ci_req->hw_buf & 0xfffff000) + 0x1000;
- item->page2 = ((unsigned long)ci_req->hw_buf & 0xfffff000) + 0x2000;
- item->page3 = ((unsigned long)ci_req->hw_buf & 0xfffff000) + 0x3000;
- item->page4 = ((unsigned long)ci_req->hw_buf & 0xfffff000) + 0x4000;
-
head->next = (unsigned long)item;
head->info = 0;
+ ci_req->dtd_count = 0;
+ buf = ci_req->hw_buf;
+ actlen = 0;
+ dtd = item;
+
+ do {
+ length = min(ci_req->req.length - actlen,
+ (unsigned)EP_MAX_LENGTH_TRANSFER);
+
+ dtd->info = INFO_BYTES(length) | INFO_ACTIVE;
+ dtd->page0 = (unsigned long)buf;
+ dtd->page1 = ((unsigned long)buf & 0xfffff000) + 0x1000;
+ dtd->page2 = ((unsigned long)buf & 0xfffff000) + 0x2000;
+ dtd->page3 = ((unsigned long)buf & 0xfffff000) + 0x3000;
+ dtd->page4 = ((unsigned long)buf & 0xfffff000) + 0x4000;
+
+ len -= length;
+ actlen += length;
+ buf += length;
+
+ if (len) {
+ qtd = (struct ept_queue_item *)
+ memalign(ILIST_ALIGN, ILIST_ENT_SZ);
+ dtd->next = (uint32_t)qtd;
+ dtd = qtd;
+ memset(dtd, 0, ILIST_ENT_SZ);
+ }
+
+ ci_req->dtd_count++;
+ } while (len);
+
+ item = dtd;
/*
* When sending the data for an IN transaction, the attached host
* knows that all data for the IN is sent when one of the following
@@ -432,6 +503,12 @@
ci_flush_qtd(num);
+ item = (struct ept_queue_item *)head->next;
+ while (item->next != TERMINATE) {
+ ci_flush_td((struct ept_queue_item *)item->next);
+ item = (struct ept_queue_item *)item->next;
+ }
+
DBG("ept%d %s queue len %x, req %p, buffer %p\n",
num, in ? "in" : "out", len, ci_req, ci_req->hw_buf);
ci_flush_qh(num);
@@ -497,21 +574,31 @@
static void handle_ep_complete(struct ci_ep *ci_ep)
{
- struct ept_queue_item *item;
- int num, in, len;
+ struct ept_queue_item *item, *next_td;
+ int num, in, len, j;
struct ci_req *ci_req;
num = ci_ep->desc->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK;
in = (ci_ep->desc->bEndpointAddress & USB_DIR_IN) != 0;
item = ci_get_qtd(num, in);
ci_invalidate_qtd(num);
-
- len = (item->info >> 16) & 0x7fff;
- if (item->info & 0xff)
- printf("EP%d/%s FAIL info=%x pg0=%x\n",
- num, in ? "in" : "out", item->info, item->page0);
-
ci_req = list_first_entry(&ci_ep->queue, struct ci_req, queue);
+
+ next_td = item;
+ len = 0;
+ for (j = 0; j < ci_req->dtd_count; j++) {
+ ci_invalidate_td(next_td);
+ item = next_td;
+ len += (item->info >> 16) & 0x7fff;
+ if (item->info & 0xff)
+ printf("EP%d/%s FAIL info=%x pg0=%x\n",
+ num, in ? "in" : "out", item->info, item->page0);
+ if (j != ci_req->dtd_count - 1)
+ next_td = (struct ept_queue_item *)item->next;
+ if (j != 0)
+ free(item);
+ }
+
list_del_init(&ci_req->queue);
ci_ep->req_primed = false;
@@ -852,9 +939,19 @@
controller.gadget.ep0 = &controller.ep[0].ep;
INIT_LIST_HEAD(&controller.gadget.ep0->ep_list);
- /* Init EP 1..n */
- for (i = 1; i < NUM_ENDPOINTS; i++) {
- memcpy(&controller.ep[i].ep, &ci_ep_init[1],
+ /* Init EP 1..3 */
+ for (i = 1; i < 4; i++) {
+ memcpy(&controller.ep[i].ep, &ci_ep_init[i],
+ sizeof(*ci_ep_init));
+ INIT_LIST_HEAD(&controller.ep[i].queue);
+ controller.ep[i].req_primed = false;
+ list_add_tail(&controller.ep[i].ep.ep_list,
+ &controller.gadget.ep_list);
+ }
+
+ /* Init EP 4..n */
+ for (i = 4; i < NUM_ENDPOINTS; i++) {
+ memcpy(&controller.ep[i].ep, &ci_ep_init[4],
sizeof(*ci_ep_init));
INIT_LIST_HEAD(&controller.ep[i].queue);
controller.ep[i].req_primed = false;
diff --git a/drivers/usb/gadget/ci_udc.h b/drivers/usb/gadget/ci_udc.h
index 346164a..95cc079 100644
--- a/drivers/usb/gadget/ci_udc.h
+++ b/drivers/usb/gadget/ci_udc.h
@@ -86,6 +86,7 @@
/* Buffer for the current transfer. Either req.buf/len or b_buf/len */
uint8_t *hw_buf;
uint32_t hw_len;
+ uint32_t dtd_count;
};
struct ci_ep {
diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig
index 24a595f..8705c7c 100644
--- a/drivers/usb/host/Kconfig
+++ b/drivers/usb/host/Kconfig
@@ -18,12 +18,11 @@
if USB_XHCI_HCD
config USB_XHCI_UNIPHIER
- bool "Support for Panasonic UniPhier on-chip xHCI USB controller"
+ bool "Support for UniPhier on-chip xHCI USB controller"
depends on ARCH_UNIPHIER
default y
---help---
- Enables support for the on-chip xHCI controller on Panasonic
- UniPhier SoCs.
+ Enables support for the on-chip xHCI controller on UniPhier SoCs.
endif
@@ -54,11 +53,10 @@
if USB_EHCI_HCD
config USB_EHCI_UNIPHIER
- bool "Support for Panasonic UniPhier on-chip EHCI USB controller"
+ bool "Support for UniPhier on-chip EHCI USB controller"
depends on ARCH_UNIPHIER && OF_CONTROL
default y
---help---
- Enables support for the on-chip EHCI controller on Panasonic
- UniPhier SoCs.
+ Enables support for the on-chip EHCI controller on UniPhier SoCs.
endif
diff --git a/drivers/usb/host/dwc2.c b/drivers/usb/host/dwc2.c
index 2ac0017..eee60a2 100644
--- a/drivers/usb/host/dwc2.c
+++ b/drivers/usb/host/dwc2.c
@@ -932,7 +932,8 @@
snpsid = readl(®s->gsnpsid);
printf("Core Release: %x.%03x\n", snpsid >> 12 & 0xf, snpsid & 0xfff);
- if ((snpsid & DWC2_SNPSID_DEVID_MASK) != DWC2_SNPSID_DEVID_VER_2xx) {
+ if ((snpsid & DWC2_SNPSID_DEVID_MASK) != DWC2_SNPSID_DEVID_VER_2xx &&
+ (snpsid & DWC2_SNPSID_DEVID_MASK) != DWC2_SNPSID_DEVID_VER_3xx) {
printf("SNPSID invalid (not DWC2 OTG device): %08x\n", snpsid);
return -ENODEV;
}
diff --git a/drivers/usb/host/dwc2.h b/drivers/usb/host/dwc2.h
index 45408c6..f69372e 100644
--- a/drivers/usb/host/dwc2.h
+++ b/drivers/usb/host/dwc2.h
@@ -732,6 +732,7 @@
#define DWC2_PCGCCTL_DEEP_SLEEP (1 << 7)
#define DWC2_PCGCCTL_DEEP_SLEEP_OFFSET 7
#define DWC2_SNPSID_DEVID_VER_2xx (0x4f542 << 12)
+#define DWC2_SNPSID_DEVID_VER_3xx (0x4f543 << 12)
#define DWC2_SNPSID_DEVID_MASK (0xfffff << 12)
#define DWC2_SNPSID_DEVID_OFFSET 12
diff --git a/drivers/usb/host/ehci-uniphier.c b/drivers/usb/host/ehci-uniphier.c
index 846bf50..c3f827c 100644
--- a/drivers/usb/host/ehci-uniphier.c
+++ b/drivers/usb/host/ehci-uniphier.c
@@ -1,14 +1,12 @@
/*
- * Copyright (C) 2014 Panasonic Corporation
- * Copyright (C) 2015 Socionext Inc.
- * Author: Masahiro Yamada <yamada.masahiro@socionext.com>
+ * Copyright (C) 2014-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include <linux/err.h>
-#include <asm/io.h>
+#include <linux/io.h>
#include <usb.h>
#include <mach/mio-regs.h>
#include <fdtdec.h>
diff --git a/drivers/usb/host/xhci-uniphier.c b/drivers/usb/host/xhci-uniphier.c
index e0ef322..1b3f3d2 100644
--- a/drivers/usb/host/xhci-uniphier.c
+++ b/drivers/usb/host/xhci-uniphier.c
@@ -1,13 +1,12 @@
/*
- * Copyright (C) 2015 Panasonic Corporation
- * Copyright (C) 2015 Socionext Inc.
- * Author: Masahiro Yamada <yamada.masahiro@socionext.com>
+ * Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include <linux/err.h>
+#include <linux/io.h>
#include <usb.h>
#include <fdtdec.h>
#include "xhci.h"
diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig
index 2544301..9ae23e8 100644
--- a/drivers/video/Kconfig
+++ b/drivers/video/Kconfig
@@ -1,6 +1,5 @@
config VIDEO_VESA
bool "Enable VESA video driver support"
- depends on X86
default n
help
Turn on this option to enable a very simple driver which uses vesa
@@ -8,6 +7,144 @@
by U-Boot. This can in principle be used with any platform that
supports PCI and video cards that support VESA BIOS Extension (VBE).
+config FRAMEBUFFER_SET_VESA_MODE
+ bool "Set framebuffer graphics resolution"
+ depends on VIDEO_VESA
+ help
+ Set VESA/native framebuffer mode (needed for bootsplash and graphical
+ framebuffer console)
+
+choice
+ prompt "framebuffer graphics resolution"
+ default FRAMEBUFFER_VESA_MODE_117
+ depends on FRAMEBUFFER_SET_VESA_MODE
+ help
+ This option sets the resolution used for the U-Boot framebuffer (and
+ bootsplash screen).
+
+config FRAMEBUFFER_VESA_MODE_100
+ bool "640x400 256-color"
+
+config FRAMEBUFFER_VESA_MODE_101
+ bool "640x480 256-color"
+
+config FRAMEBUFFER_VESA_MODE_102
+ bool "800x600 16-color"
+
+config FRAMEBUFFER_VESA_MODE_103
+ bool "800x600 256-color"
+
+config FRAMEBUFFER_VESA_MODE_104
+ bool "1024x768 16-color"
+
+config FRAMEBUFFER_VESA_MODE_105
+ bool "1024x7686 256-color"
+
+config FRAMEBUFFER_VESA_MODE_106
+ bool "1280x1024 16-color"
+
+config FRAMEBUFFER_VESA_MODE_107
+ bool "1280x1024 256-color"
+
+config FRAMEBUFFER_VESA_MODE_108
+ bool "80x60 text"
+
+config FRAMEBUFFER_VESA_MODE_109
+ bool "132x25 text"
+
+config FRAMEBUFFER_VESA_MODE_10A
+ bool "132x43 text"
+
+config FRAMEBUFFER_VESA_MODE_10B
+ bool "132x50 text"
+
+config FRAMEBUFFER_VESA_MODE_10C
+ bool "132x60 text"
+
+config FRAMEBUFFER_VESA_MODE_10D
+ bool "320x200 32k-color (1:5:5:5)"
+
+config FRAMEBUFFER_VESA_MODE_10E
+ bool "320x200 64k-color (5:6:5)"
+
+config FRAMEBUFFER_VESA_MODE_10F
+ bool "320x200 16.8M-color (8:8:8)"
+
+config FRAMEBUFFER_VESA_MODE_110
+ bool "640x480 32k-color (1:5:5:5)"
+
+config FRAMEBUFFER_VESA_MODE_111
+ bool "640x480 64k-color (5:6:5)"
+
+config FRAMEBUFFER_VESA_MODE_112
+ bool "640x480 16.8M-color (8:8:8)"
+
+config FRAMEBUFFER_VESA_MODE_113
+ bool "800x600 32k-color (1:5:5:5)"
+
+config FRAMEBUFFER_VESA_MODE_114
+ bool "800x600 64k-color (5:6:5)"
+
+config FRAMEBUFFER_VESA_MODE_115
+ bool "800x600 16.8M-color (8:8:8)"
+
+config FRAMEBUFFER_VESA_MODE_116
+ bool "1024x768 32k-color (1:5:5:5)"
+
+config FRAMEBUFFER_VESA_MODE_117
+ bool "1024x768 64k-color (5:6:5)"
+
+config FRAMEBUFFER_VESA_MODE_118
+ bool "1024x768 16.8M-color (8:8:8)"
+
+config FRAMEBUFFER_VESA_MODE_119
+ bool "1280x1024 32k-color (1:5:5:5)"
+
+config FRAMEBUFFER_VESA_MODE_11A
+ bool "1280x1024 64k-color (5:6:5)"
+
+config FRAMEBUFFER_VESA_MODE_11B
+ bool "1280x1024 16.8M-color (8:8:8)"
+
+config FRAMEBUFFER_VESA_MODE_USER
+ bool "Manually select VESA mode"
+
+endchoice
+
+# Map the config names to an integer (KB).
+config FRAMEBUFFER_VESA_MODE
+ prompt "VESA mode" if FRAMEBUFFER_VESA_MODE_USER
+ hex
+ default 0x100 if FRAMEBUFFER_VESA_MODE_100
+ default 0x101 if FRAMEBUFFER_VESA_MODE_101
+ default 0x102 if FRAMEBUFFER_VESA_MODE_102
+ default 0x103 if FRAMEBUFFER_VESA_MODE_103
+ default 0x104 if FRAMEBUFFER_VESA_MODE_104
+ default 0x105 if FRAMEBUFFER_VESA_MODE_105
+ default 0x106 if FRAMEBUFFER_VESA_MODE_106
+ default 0x107 if FRAMEBUFFER_VESA_MODE_107
+ default 0x108 if FRAMEBUFFER_VESA_MODE_108
+ default 0x109 if FRAMEBUFFER_VESA_MODE_109
+ default 0x10A if FRAMEBUFFER_VESA_MODE_10A
+ default 0x10B if FRAMEBUFFER_VESA_MODE_10B
+ default 0x10C if FRAMEBUFFER_VESA_MODE_10C
+ default 0x10D if FRAMEBUFFER_VESA_MODE_10D
+ default 0x10E if FRAMEBUFFER_VESA_MODE_10E
+ default 0x10F if FRAMEBUFFER_VESA_MODE_10F
+ default 0x110 if FRAMEBUFFER_VESA_MODE_110
+ default 0x111 if FRAMEBUFFER_VESA_MODE_111
+ default 0x112 if FRAMEBUFFER_VESA_MODE_112
+ default 0x113 if FRAMEBUFFER_VESA_MODE_113
+ default 0x114 if FRAMEBUFFER_VESA_MODE_114
+ default 0x115 if FRAMEBUFFER_VESA_MODE_115
+ default 0x116 if FRAMEBUFFER_VESA_MODE_116
+ default 0x117 if FRAMEBUFFER_VESA_MODE_117
+ default 0x118 if FRAMEBUFFER_VESA_MODE_118
+ default 0x119 if FRAMEBUFFER_VESA_MODE_119
+ default 0x11A if FRAMEBUFFER_VESA_MODE_11A
+ default 0x11B if FRAMEBUFFER_VESA_MODE_11B
+ default 0x117 if FRAMEBUFFER_VESA_MODE_USER
+
config VIDEO_LCD_SSD2828
bool "SSD2828 bridge chip"
default n
diff --git a/drivers/video/am335x-fb.c b/drivers/video/am335x-fb.c
index 6f95649..e23d172 100644
--- a/drivers/video/am335x-fb.c
+++ b/drivers/video/am335x-fb.c
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2013 Hannes Petermaier <oe5hpm@oevsv.at>
+ * Copyright (C) 2013 Hannes Schmelzer <oe5hpm@oevsv.at>
* Bernecker & Rainer Industrieelektronik GmbH - http://www.br-automation.com
*
* minimal framebuffer driver for TI's AM335x SoC to be compatible with
diff --git a/drivers/video/am335x-fb.h b/drivers/video/am335x-fb.h
index 7f799d1..3f4b567 100644
--- a/drivers/video/am335x-fb.h
+++ b/drivers/video/am335x-fb.h
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2013 Hannes Petermaier <oe5hpm@oevsv.at> -
+ * Copyright (C) 2013 Hannes Schmelzer <oe5hpm@oevsv.at> -
* Bernecker & Rainer Industrieelektronik GmbH - http://www.br-automation.com
*
* SPDX-License-Identifier: GPL-2.0+
diff --git a/include/asm-generic/gpio.h b/include/asm-generic/gpio.h
index 519bb0b..de91e57 100644
--- a/include/asm-generic/gpio.h
+++ b/include/asm-generic/gpio.h
@@ -42,7 +42,7 @@
* Note: With driver model, the label is allocated so there is no need for
* the caller to preserve it.
*
- * @param gp GPIO number
+ * @param gpio GPIO number
* @param label User label for this GPIO
* @return 0 if ok, -1 on error
*/
@@ -127,7 +127,7 @@
};
/**
- * dm_gpio_is_valid() - Check if a GPIO is gpio_is_valie
+ * dm_gpio_is_valid() - Check if a GPIO is valid
*
* @desc: GPIO description containing device, offset and flags,
* previously returned by gpio_request_by_name()
@@ -167,7 +167,7 @@
*
* @dev: Device to check
* @offset: Offset of device GPIO to check
- * @namep: If non-NULL, this is set to the nane given when the GPIO
+ * @namep: If non-NULL, this is set to the name given when the GPIO
* was requested, or -1 if it has not been requested
* @return -ENODATA if the driver returned an unknown function,
* -ENODEV if the device is not active, -EINVAL if the offset is invalid.
@@ -186,7 +186,7 @@
*
* @dev: Device to check
* @offset: Offset of device GPIO to check
- * @namep: If non-NULL, this is set to the nane given when the GPIO
+ * @namep: If non-NULL, this is set to the name given when the GPIO
* was requested, or -1 if it has not been requested
* @return -ENODATA if the driver returned an unknown function,
* -ENODEV if the device is not active, -EINVAL if the offset is invalid.
@@ -219,7 +219,7 @@
* Also it would be useful to standardise additional functions like
* pullup, slew rate and drive strength.
*
- * gpio_request)( and gpio_free() are optional - if NULL then they will
+ * gpio_request() and gpio_free() are optional - if NULL then they will
* not be called.
*
* Note that @offset is the offset from the base GPIO of the device. So
@@ -271,7 +271,7 @@
*
* @dev: GPIO device
* @desc: Place to put GPIO description
- * @args: Arguments provided in descripion
+ * @args: Arguments provided in description
* @return 0 if OK, -ve on error
*/
int (*xlate)(struct udevice *dev, struct gpio_desc *desc,
@@ -398,7 +398,7 @@
/**
* gpio_request_list_by_name() - Request a list of GPIOs
*
- * Reads all the GPIOs from a list and requetss them. See
+ * Reads all the GPIOs from a list and requests them. See
* gpio_request_by_name() for additional details. Lists should not be
* misused to hold unrelated or optional GPIOs. They should only be used
* for things like parallel data lines. A zero phandle terminates the list
@@ -533,7 +533,7 @@
/**
* gpio_get_number() - Get the global GPIO number of a GPIO
*
- * This should only be used for debugging or interest. It returns the nummber
+ * This should only be used for debugging or interest. It returns the number
* that should be used for gpio_get_value() etc. to access this GPIO.
*
* @desc: GPIO description containing device, offset and flags,
diff --git a/include/bootm.h b/include/bootm.h
index 6181488..4981377 100644
--- a/include/bootm.h
+++ b/include/bootm.h
@@ -49,7 +49,7 @@
ulong bootm_disable_interrupts(void);
/* This is a special function used by booti/bootz */
-int bootm_find_ramdisk_fdt(int flag, int argc, char * const argv[]);
+int bootm_find_images(int flag, int argc, char * const argv[]);
int do_bootm_states(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[],
int states, bootm_headers_t *images, int boot_progress);
diff --git a/include/bootstage.h b/include/bootstage.h
index fe30ab6..9765360 100644
--- a/include/bootstage.h
+++ b/include/bootstage.h
@@ -168,6 +168,7 @@
BOOTSTAGE_ID_NAND_FIT_READ = 150,
BOOTSTAGE_ID_NAND_FIT_READ_OK,
+ BOOTSTAGE_ID_FIT_LOADABLE_START = 160, /* for Loadable Images */
/*
* These boot stages are new, higher level, and not directly related
* to the old boot progress numbers. They are useful for recording
diff --git a/include/common.h b/include/common.h
index d4d704a..ea5aeb0 100644
--- a/include/common.h
+++ b/include/common.h
@@ -274,7 +274,7 @@
*
* @param size Size of DRAM (which should be displayed along with other info)
*/
-void board_show_dram(ulong size);
+void board_show_dram(phys_size_t size);
/**
* arch_fixup_fdt() - Write arch-specific information to fdt
diff --git a/include/config_cmd_all.h b/include/config_cmd_all.h
index 2c2a05b..4d9f63d 100644
--- a/include/config_cmd_all.h
+++ b/include/config_cmd_all.h
@@ -66,7 +66,6 @@
#define CONFIG_CMD_MMC /* MMC support */
#define CONFIG_CMD_MTDPARTS /* mtd parts support */
#define CONFIG_CMD_NAND /* NAND support */
-#define CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */
#define CONFIG_CMD_NFS /* NFS support */
#define CONFIG_CMD_ONENAND /* OneNAND support */
#define CONFIG_CMD_PCI /* pciinfo */
@@ -83,7 +82,6 @@
#define CONFIG_CMD_SAVES /* save S record dump */
#define CONFIG_CMD_SCSI /* SCSI Support */
#define CONFIG_CMD_SDRAM /* SDRAM DIMM SPD info printout */
-#define CONFIG_CMD_SETEXPR /* setexpr support */
#define CONFIG_CMD_SETGETDCR /* DCR support on 4xx */
#define CONFIG_CMD_SNTP /* SNTP support */
#define CONFIG_CMD_SOURCE /* "source" command support */
diff --git a/include/config_cmd_default.h b/include/config_cmd_default.h
index e79a13b..b915c2f 100644
--- a/include/config_cmd_default.h
+++ b/include/config_cmd_default.h
@@ -33,7 +33,6 @@
#define CONFIG_CMD_LOADS /* loads */
#define CONFIG_CMD_MEMORY /* md mm nm mw cp cmp crc base loop */
#define CONFIG_CMD_MISC /* Misc functions like sleep etc*/
-#define CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */
#define CONFIG_CMD_NFS /* NFS support */
#define CONFIG_CMD_RUN /* run command in env variable */
#define CONFIG_CMD_SAVEENV /* saveenv */
diff --git a/include/config_distro_defaults.h b/include/config_distro_defaults.h
index 5eea5cf..bd8fbca 100644
--- a/include/config_distro_defaults.h
+++ b/include/config_distro_defaults.h
@@ -49,7 +49,6 @@
#define CONFIG_CMD_FAT
#define CONFIG_CMD_FS_GENERIC
#define CONFIG_CMD_MII
-#define CONFIG_CMD_NET
#define CONFIG_CMD_PING
#define CONFIG_CMD_PXE
diff --git a/include/configs/B4860QDS.h b/include/configs/B4860QDS.h
index dca1ca5..6b5aa1b 100644
--- a/include/configs/B4860QDS.h
+++ b/include/configs/B4860QDS.h
@@ -719,7 +719,6 @@
#ifdef CONFIG_PCI
#define CONFIG_PCI_INDIRECT_BRIDGE
-#define CONFIG_NET_MULTI
#define CONFIG_PCI_PNP /* do pci plug-and-play */
#define CONFIG_E1000
@@ -770,11 +769,9 @@
#define CONFIG_CMD_MII
#define CONFIG_CMD_PING
#define CONFIG_CMD_REGINFO
-#define CONFIG_CMD_SETEXPR
#ifdef CONFIG_PCI
#define CONFIG_CMD_PCI
-#define CONFIG_CMD_NET
#endif
/* Hash command with SHA acceleration supported in hardware */
diff --git a/include/configs/BSC9131RDB.h b/include/configs/BSC9131RDB.h
index 047ed8b..ec49796 100644
--- a/include/configs/BSC9131RDB.h
+++ b/include/configs/BSC9131RDB.h
@@ -353,7 +353,6 @@
#define CONFIG_DOS_PARTITION
#define CONFIG_CMD_PING
#define CONFIG_CMD_REGINFO
-#define CONFIG_CMD_SETEXPR
/*
* Miscellaneous configurable options
diff --git a/include/configs/BSC9132QDS.h b/include/configs/BSC9132QDS.h
index ceee0e4..65a7067 100644
--- a/include/configs/BSC9132QDS.h
+++ b/include/configs/BSC9132QDS.h
@@ -92,7 +92,6 @@
#define CONFIG_FSL_PCIE_RESET /* need PCIe reset errata */
#define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */
-#define CONFIG_CMD_NET
#define CONFIG_CMD_PCI
#define CONFIG_E1000 /* E1000 pci Ethernet card*/
@@ -592,7 +591,6 @@
#define CONFIG_CMD_IRQ
#define CONFIG_CMD_MII
#define CONFIG_CMD_PING
-#define CONFIG_CMD_SETEXPR
#define CONFIG_CMD_REGINFO
#if defined(CONFIG_MMC) || defined(CONFIG_USB_EHCI)
diff --git a/include/configs/C29XPCIE.h b/include/configs/C29XPCIE.h
index 7c45c36..e737960 100644
--- a/include/configs/C29XPCIE.h
+++ b/include/configs/C29XPCIE.h
@@ -99,7 +99,6 @@
#define CONFIG_FSL_PCIE_RESET /* need PCIe reset errata */
#define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */
-#define CONFIG_CMD_NET
#define CONFIG_CMD_PCI
#define CONFIG_E1000
@@ -441,7 +440,6 @@
#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
#ifdef CONFIG_TSEC_ENET
-#define CONFIG_NET_MULTI
#define CONFIG_MII /* MII PHY management */
#define CONFIG_MII_DEFAULT_TSEC 1 /* Allow unregistered phys */
#define CONFIG_TSEC1 1
@@ -505,7 +503,6 @@
#define CONFIG_CMD_IRQ
#define CONFIG_CMD_MII
#define CONFIG_CMD_PING
-#define CONFIG_CMD_SETEXPR
#define CONFIG_CMD_REGINFO
/* Hash command with SHA acceleration supported in hardware */
diff --git a/include/configs/CPCI2DP.h b/include/configs/CPCI2DP.h
index 845ed81..3ccb9a7 100644
--- a/include/configs/CPCI2DP.h
+++ b/include/configs/CPCI2DP.h
@@ -62,7 +62,6 @@
#define CONFIG_CMD_BSP
#define CONFIG_CMD_EEPROM
-#undef CONFIG_CMD_NET
#undef CONFIG_CMD_NFS
#undef CONFIG_WATCHDOG /* watchdog disabled */
diff --git a/include/configs/M5208EVBE.h b/include/configs/M5208EVBE.h
index d0f4d75..03fa5e6 100644
--- a/include/configs/M5208EVBE.h
+++ b/include/configs/M5208EVBE.h
@@ -31,7 +31,6 @@
#define CONFIG_CMD_MEMORY
#define CONFIG_CMD_MISC
#define CONFIG_CMD_MII
-#define CONFIG_CMD_NET
#define CONFIG_CMD_PING
#define CONFIG_CMD_REGINFO
diff --git a/include/configs/M52277EVB.h b/include/configs/M52277EVB.h
index ce33ba4..04e52f2 100644
--- a/include/configs/M52277EVB.h
+++ b/include/configs/M52277EVB.h
@@ -49,7 +49,6 @@
#define CONFIG_CMD_LOADS
#define CONFIG_CMD_MEMORY
#define CONFIG_CMD_MISC
-#undef CONFIG_CMD_NET
#undef CONFIG_CMD_NFS
#define CONFIG_CMD_REGINFO
#undef CONFIG_CMD_USB
diff --git a/include/configs/M5235EVB.h b/include/configs/M5235EVB.h
index a766324..8bf4e53 100644
--- a/include/configs/M5235EVB.h
+++ b/include/configs/M5235EVB.h
@@ -46,7 +46,6 @@
#define CONFIG_CMD_MEMORY
#define CONFIG_CMD_MISC
#define CONFIG_CMD_MII
-#define CONFIG_CMD_NET
#define CONFIG_CMD_PCI
#define CONFIG_CMD_PING
#define CONFIG_CMD_REGINFO
diff --git a/include/configs/M5249EVB.h b/include/configs/M5249EVB.h
index 6167ea1..b4fa5af 100644
--- a/include/configs/M5249EVB.h
+++ b/include/configs/M5249EVB.h
@@ -41,7 +41,6 @@
*/
#include <config_cmd_default.h>
#define CONFIG_CMD_CACHE
-#undef CONFIG_CMD_NET
#define CONFIG_SYS_LONGHELP /* undef to save memory */
diff --git a/include/configs/M5253EVBE.h b/include/configs/M5253EVBE.h
index 64dc64d..0bfa946 100644
--- a/include/configs/M5253EVBE.h
+++ b/include/configs/M5253EVBE.h
@@ -51,7 +51,6 @@
*/
#include <config_cmd_default.h>
#define CONFIG_CMD_CACHE
-#undef CONFIG_CMD_NET
#define CONFIG_CMD_LOADB
#define CONFIG_CMD_LOADS
#define CONFIG_CMD_EXT2
diff --git a/include/configs/M5272C3.h b/include/configs/M5272C3.h
index 9946108..f5cd0a0 100644
--- a/include/configs/M5272C3.h
+++ b/include/configs/M5272C3.h
@@ -60,7 +60,6 @@
#define CONFIG_CMD_CACHE
#define CONFIG_CMD_MII
-#define CONFIG_CMD_NET
#define CONFIG_CMD_PING
#define CONFIG_CMD_MISC
#define CONFIG_CMD_ELF
diff --git a/include/configs/M5275EVB.h b/include/configs/M5275EVB.h
index 14ccddb..3660dda 100644
--- a/include/configs/M5275EVB.h
+++ b/include/configs/M5275EVB.h
@@ -60,7 +60,6 @@
#define CONFIG_CMD_CACHE
#define CONFIG_CMD_PING
#define CONFIG_CMD_MII
-#define CONFIG_CMD_NET
#define CONFIG_CMD_ELF
#define CONFIG_CMD_FLASH
#define CONFIG_CMD_I2C
diff --git a/include/configs/M5282EVB.h b/include/configs/M5282EVB.h
index 4d3390b..aeba9c0 100644
--- a/include/configs/M5282EVB.h
+++ b/include/configs/M5282EVB.h
@@ -49,7 +49,6 @@
*/
#include <config_cmd_default.h>
#define CONFIG_CMD_CACHE
-#define CONFIG_CMD_NET
#define CONFIG_CMD_PING
#define CONFIG_CMD_MII
diff --git a/include/configs/M53017EVB.h b/include/configs/M53017EVB.h
index e2dd8e5..65adadc 100644
--- a/include/configs/M53017EVB.h
+++ b/include/configs/M53017EVB.h
@@ -37,7 +37,6 @@
#define CONFIG_CMD_MEMORY
#define CONFIG_CMD_MISC
#define CONFIG_CMD_MII
-#define CONFIG_CMD_NET
#define CONFIG_CMD_PING
#define CONFIG_CMD_REGINFO
diff --git a/include/configs/M5329EVB.h b/include/configs/M5329EVB.h
index 5a7597c..16ef80b 100644
--- a/include/configs/M5329EVB.h
+++ b/include/configs/M5329EVB.h
@@ -37,7 +37,6 @@
#define CONFIG_CMD_MEMORY
#define CONFIG_CMD_MISC
#define CONFIG_CMD_MII
-#define CONFIG_CMD_NET
#define CONFIG_CMD_PING
#define CONFIG_CMD_REGINFO
diff --git a/include/configs/M5373EVB.h b/include/configs/M5373EVB.h
index 7550c57..e3c36a6 100644
--- a/include/configs/M5373EVB.h
+++ b/include/configs/M5373EVB.h
@@ -37,7 +37,6 @@
#define CONFIG_CMD_MEMORY
#define CONFIG_CMD_MISC
#define CONFIG_CMD_MII
-#define CONFIG_CMD_NET
#define CONFIG_CMD_PING
#define CONFIG_CMD_REGINFO
diff --git a/include/configs/M54418TWR.h b/include/configs/M54418TWR.h
index 25b3cda..e40bbfd 100644
--- a/include/configs/M54418TWR.h
+++ b/include/configs/M54418TWR.h
@@ -53,7 +53,6 @@
#define CONFIG_CMD_MISC
#define CONFIG_CMD_MII
#undef CONFIG_CMD_NAND
-#define CONFIG_CMD_NET
#define CONFIG_CMD_NFS
#define CONFIG_CMD_PING
#define CONFIG_CMD_REGINFO
@@ -79,7 +78,6 @@
/* Network configuration */
#define CONFIG_MCFFEC
#ifdef CONFIG_MCFFEC
-#define CONFIG_NET_MULTI 1
#define CONFIG_MII 1
#define CONFIG_MII_INIT 1
#define CONFIG_SYS_DISCOVER_PHY
diff --git a/include/configs/M54451EVB.h b/include/configs/M54451EVB.h
index f3cade3..d26ad91 100644
--- a/include/configs/M54451EVB.h
+++ b/include/configs/M54451EVB.h
@@ -52,7 +52,6 @@
#define CONFIG_CMD_MEMORY
#define CONFIG_CMD_MISC
#define CONFIG_CMD_MII
-#define CONFIG_CMD_NET
#define CONFIG_CMD_NFS
#define CONFIG_CMD_PING
#define CONFIG_CMD_REGINFO
diff --git a/include/configs/M54455EVB.h b/include/configs/M54455EVB.h
index b708001..b735a26 100644
--- a/include/configs/M54455EVB.h
+++ b/include/configs/M54455EVB.h
@@ -55,7 +55,6 @@
#define CONFIG_CMD_MEMORY
#define CONFIG_CMD_MISC
#define CONFIG_CMD_MII
-#define CONFIG_CMD_NET
#undef CONFIG_CMD_PCI
#define CONFIG_CMD_PING
#define CONFIG_CMD_REGINFO
diff --git a/include/configs/M5475EVB.h b/include/configs/M5475EVB.h
index 658c170..427ccf0 100644
--- a/include/configs/M5475EVB.h
+++ b/include/configs/M5475EVB.h
@@ -39,7 +39,6 @@
#define CONFIG_CMD_MEMORY
#define CONFIG_CMD_MISC
#define CONFIG_CMD_MII
-#define CONFIG_CMD_NET
#define CONFIG_CMD_PCI
#define CONFIG_CMD_PING
#define CONFIG_CMD_REGINFO
diff --git a/include/configs/M5485EVB.h b/include/configs/M5485EVB.h
index efb64a1..26a16ec 100644
--- a/include/configs/M5485EVB.h
+++ b/include/configs/M5485EVB.h
@@ -39,7 +39,6 @@
#define CONFIG_CMD_MEMORY
#define CONFIG_CMD_MISC
#define CONFIG_CMD_MII
-#define CONFIG_CMD_NET
#define CONFIG_CMD_PCI
#define CONFIG_CMD_PING
#define CONFIG_CMD_REGINFO
diff --git a/include/configs/MPC8308RDB.h b/include/configs/MPC8308RDB.h
index 1ab2379..9b196ad 100644
--- a/include/configs/MPC8308RDB.h
+++ b/include/configs/MPC8308RDB.h
@@ -453,7 +453,6 @@
#define CONFIG_CMD_DHCP
#define CONFIG_CMD_I2C
#define CONFIG_CMD_MII
-#define CONFIG_CMD_NET
#define CONFIG_CMD_PCI
#define CONFIG_CMD_PING
diff --git a/include/configs/MPC8349ITX.h b/include/configs/MPC8349ITX.h
index 2457125..7204068 100644
--- a/include/configs/MPC8349ITX.h
+++ b/include/configs/MPC8349ITX.h
@@ -501,7 +501,6 @@
#define CONFIG_CMD_CACHE
#define CONFIG_CMD_DATE
#define CONFIG_CMD_IRQ
-#define CONFIG_CMD_NET
#define CONFIG_CMD_PING
#define CONFIG_CMD_DHCP
#define CONFIG_CMD_SDRAM
diff --git a/include/configs/MPC8536DS.h b/include/configs/MPC8536DS.h
index d41eeb5..f57afff 100644
--- a/include/configs/MPC8536DS.h
+++ b/include/configs/MPC8536DS.h
@@ -644,12 +644,10 @@
#define CONFIG_CMD_MII
#define CONFIG_CMD_ELF
#define CONFIG_CMD_IRQ
-#define CONFIG_CMD_SETEXPR
#define CONFIG_CMD_REGINFO
#if defined(CONFIG_PCI)
#define CONFIG_CMD_PCI
-#define CONFIG_CMD_NET
#endif
#undef CONFIG_WATCHDOG /* watchdog disabled */
diff --git a/include/configs/MPC8540ADS.h b/include/configs/MPC8540ADS.h
index b388168..ff9a67d 100644
--- a/include/configs/MPC8540ADS.h
+++ b/include/configs/MPC8540ADS.h
@@ -354,7 +354,6 @@
#define CONFIG_CMD_I2C
#define CONFIG_CMD_ELF
#define CONFIG_CMD_IRQ
-#define CONFIG_CMD_SETEXPR
#if defined(CONFIG_PCI)
#define CONFIG_CMD_PCI
diff --git a/include/configs/MPC8541CDS.h b/include/configs/MPC8541CDS.h
index 609c5bb..6b7f784 100644
--- a/include/configs/MPC8541CDS.h
+++ b/include/configs/MPC8541CDS.h
@@ -373,7 +373,6 @@
#define CONFIG_CMD_MII
#define CONFIG_CMD_ELF
#define CONFIG_CMD_IRQ
-#define CONFIG_CMD_SETEXPR
#define CONFIG_CMD_REGINFO
#if defined(CONFIG_PCI)
diff --git a/include/configs/MPC8544DS.h b/include/configs/MPC8544DS.h
index 479589e..ad2c52c 100644
--- a/include/configs/MPC8544DS.h
+++ b/include/configs/MPC8544DS.h
@@ -389,12 +389,10 @@
#define CONFIG_CMD_MII
#define CONFIG_CMD_ELF
#define CONFIG_CMD_IRQ
-#define CONFIG_CMD_SETEXPR
#define CONFIG_CMD_REGINFO
#if defined(CONFIG_PCI)
#define CONFIG_CMD_PCI
- #define CONFIG_CMD_NET
#define CONFIG_CMD_SCSI
#define CONFIG_CMD_EXT2
#endif
diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h
index fb28512..f49b1e5 100644
--- a/include/configs/MPC8548CDS.h
+++ b/include/configs/MPC8548CDS.h
@@ -498,7 +498,6 @@
#define CONFIG_CMD_MII
#define CONFIG_CMD_ELF
#define CONFIG_CMD_IRQ
-#define CONFIG_CMD_SETEXPR
#define CONFIG_CMD_REGINFO
#if defined(CONFIG_PCI)
diff --git a/include/configs/MPC8555CDS.h b/include/configs/MPC8555CDS.h
index 48b55b5..15b6e6c 100644
--- a/include/configs/MPC8555CDS.h
+++ b/include/configs/MPC8555CDS.h
@@ -371,7 +371,6 @@
#define CONFIG_CMD_MII
#define CONFIG_CMD_ELF
#define CONFIG_CMD_IRQ
-#define CONFIG_CMD_SETEXPR
#define CONFIG_CMD_REGINFO
#if defined(CONFIG_PCI)
diff --git a/include/configs/MPC8560ADS.h b/include/configs/MPC8560ADS.h
index 92f0b7f..2250c2f 100644
--- a/include/configs/MPC8560ADS.h
+++ b/include/configs/MPC8560ADS.h
@@ -390,7 +390,6 @@
#define CONFIG_CMD_I2C
#define CONFIG_CMD_ELF
#define CONFIG_CMD_IRQ
-#define CONFIG_CMD_SETEXPR
#define CONFIG_CMD_REGINFO
#if defined(CONFIG_PCI)
diff --git a/include/configs/MPC8568MDS.h b/include/configs/MPC8568MDS.h
index 57fc37b..91bf267 100644
--- a/include/configs/MPC8568MDS.h
+++ b/include/configs/MPC8568MDS.h
@@ -393,7 +393,6 @@
#define CONFIG_CMD_MII
#define CONFIG_CMD_ELF
#define CONFIG_CMD_IRQ
-#define CONFIG_CMD_SETEXPR
#define CONFIG_CMD_REGINFO
#if defined(CONFIG_PCI)
diff --git a/include/configs/MPC8569MDS.h b/include/configs/MPC8569MDS.h
index e624c71..4cb586d 100644
--- a/include/configs/MPC8569MDS.h
+++ b/include/configs/MPC8569MDS.h
@@ -484,7 +484,6 @@
#define CONFIG_CMD_MII
#define CONFIG_CMD_ELF
#define CONFIG_CMD_IRQ
-#define CONFIG_CMD_SETEXPR
#define CONFIG_CMD_REGINFO
#if defined(CONFIG_PCI)
diff --git a/include/configs/MPC8572DS.h b/include/configs/MPC8572DS.h
index 7b3ddba..943c575 100644
--- a/include/configs/MPC8572DS.h
+++ b/include/configs/MPC8572DS.h
@@ -601,12 +601,10 @@
#define CONFIG_CMD_I2C
#define CONFIG_CMD_MII
#define CONFIG_CMD_ELF
-#define CONFIG_CMD_SETEXPR
#define CONFIG_CMD_REGINFO
#if defined(CONFIG_PCI)
#define CONFIG_CMD_PCI
-#define CONFIG_CMD_NET
#define CONFIG_CMD_SCSI
#define CONFIG_CMD_EXT2
#endif
diff --git a/include/configs/MPC8610HPCD.h b/include/configs/MPC8610HPCD.h
index cae133b..4b99fc3 100644
--- a/include/configs/MPC8610HPCD.h
+++ b/include/configs/MPC8610HPCD.h
@@ -294,7 +294,6 @@
#define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */
-#define CONFIG_CMD_NET
#define CONFIG_PCI_PNP /* do pci plug-and-play */
#define CONFIG_CMD_REGINFO
diff --git a/include/configs/MigoR.h b/include/configs/MigoR.h
index 88df94f..d10bd2a 100644
--- a/include/configs/MigoR.h
+++ b/include/configs/MigoR.h
@@ -17,7 +17,6 @@
#define CONFIG_CMD_LOADS
#define CONFIG_CMD_FLASH
#define CONFIG_CMD_MEMORY
-#define CONFIG_CMD_NET
#define CONFIG_CMD_PING
#define CONFIG_CMD_NFS
#define CONFIG_CMD_SDRAM
diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h
index ccf3ce3..37bb42b 100644
--- a/include/configs/P1010RDB.h
+++ b/include/configs/P1010RDB.h
@@ -184,7 +184,6 @@
#define CONFIG_FSL_PCIE_RESET /* need PCIe reset errata */
#define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */
-#define CONFIG_CMD_NET
#define CONFIG_CMD_PCI
#define CONFIG_E1000 /* E1000 pci Ethernet card*/
@@ -822,7 +821,6 @@
#define CONFIG_CMD_IRQ
#define CONFIG_CMD_MII
#define CONFIG_CMD_PING
-#define CONFIG_CMD_SETEXPR
#define CONFIG_CMD_REGINFO
#undef CONFIG_WATCHDOG /* watchdog disabled */
diff --git a/include/configs/P1022DS.h b/include/configs/P1022DS.h
index 795e3b5..0f5915d 100644
--- a/include/configs/P1022DS.h
+++ b/include/configs/P1022DS.h
@@ -688,12 +688,10 @@
#define CONFIG_CMD_I2C
#define CONFIG_CMD_MII
#define CONFIG_CMD_PING
-#define CONFIG_CMD_SETEXPR
#define CONFIG_CMD_REGINFO
#ifdef CONFIG_PCI
#define CONFIG_CMD_PCI
-#define CONFIG_CMD_NET
#endif
/*
diff --git a/include/configs/P1023RDB.h b/include/configs/P1023RDB.h
index d65c461..233995c 100644
--- a/include/configs/P1023RDB.h
+++ b/include/configs/P1023RDB.h
@@ -276,12 +276,10 @@
#define CONFIG_CMD_IRQ
#define CONFIG_CMD_PING
#define CONFIG_CMD_MII
-#define CONFIG_CMD_SETEXPR
#define CONFIG_CMD_REGINFO
#if defined(CONFIG_PCI)
#define CONFIG_CMD_PCI
-#define CONFIG_CMD_NET
#endif
/*
diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h
index f99da65..c78a421 100644
--- a/include/configs/P2041RDB.h
+++ b/include/configs/P2041RDB.h
@@ -629,11 +629,9 @@
#define CONFIG_CMD_I2C
#define CONFIG_CMD_MII
#define CONFIG_CMD_PING
-#define CONFIG_CMD_SETEXPR
#ifdef CONFIG_PCI
#define CONFIG_CMD_PCI
-#define CONFIG_CMD_NET
#endif
/*
diff --git a/include/configs/PMC440.h b/include/configs/PMC440.h
index c29429d..b8d4dc5 100644
--- a/include/configs/PMC440.h
+++ b/include/configs/PMC440.h
@@ -283,7 +283,6 @@
#define CONFIG_CMD_I2C
#define CONFIG_CMD_MII
#define CONFIG_CMD_NAND
-#define CONFIG_CMD_NET
#define CONFIG_CMD_NFS
#define CONFIG_CMD_PCI
#define CONFIG_CMD_PING
diff --git a/include/configs/T102xQDS.h b/include/configs/T102xQDS.h
index 2927043..0f8b614 100644
--- a/include/configs/T102xQDS.h
+++ b/include/configs/T102xQDS.h
@@ -862,11 +862,9 @@
#define CONFIG_CMD_MII
#define CONFIG_CMD_PING
#define CONFIG_CMD_REGINFO
-#define CONFIG_CMD_SETEXPR
#ifdef CONFIG_PCI
#define CONFIG_CMD_PCI
-#define CONFIG_CMD_NET
#endif
/*
diff --git a/include/configs/T102xRDB.h b/include/configs/T102xRDB.h
index deff617..5ada99f 100644
--- a/include/configs/T102xRDB.h
+++ b/include/configs/T102xRDB.h
@@ -868,12 +868,10 @@
#define CONFIG_CMD_PING
#define CONFIG_CMD_ECHO
#define CONFIG_CMD_REGINFO
-#define CONFIG_CMD_SETEXPR
#define CONFIG_CMD_BDI
#ifdef CONFIG_PCI
#define CONFIG_CMD_PCI
-#define CONFIG_CMD_NET
#endif
/*
diff --git a/include/configs/T1040QDS.h b/include/configs/T1040QDS.h
index faf8c9d..6cc4cdb 100644
--- a/include/configs/T1040QDS.h
+++ b/include/configs/T1040QDS.h
@@ -736,11 +736,9 @@
#define CONFIG_CMD_MII
#define CONFIG_CMD_PING
#define CONFIG_CMD_REGINFO
-#define CONFIG_CMD_SETEXPR
#ifdef CONFIG_PCI
#define CONFIG_CMD_PCI
-#define CONFIG_CMD_NET
#endif
/* Hash command with SHA acceleration supported in hardware */
diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h
index 6cc95ef..262aeaf 100644
--- a/include/configs/T104xRDB.h
+++ b/include/configs/T104xRDB.h
@@ -760,11 +760,9 @@
#define CONFIG_CMD_MII
#define CONFIG_CMD_PING
#define CONFIG_CMD_REGINFO
-#define CONFIG_CMD_SETEXPR
#ifdef CONFIG_PCI
#define CONFIG_CMD_PCI
-#define CONFIG_CMD_NET
#endif
/* Hash command with SHA acceleration supported in hardware */
diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h
index bad3613..e80b0b5 100644
--- a/include/configs/T208xQDS.h
+++ b/include/configs/T208xQDS.h
@@ -620,7 +620,6 @@
#ifdef CONFIG_PCI
#define CONFIG_PCI_INDIRECT_BRIDGE
#define CONFIG_FSL_PCIE_RESET /* need PCIe reset errata */
-#define CONFIG_NET_MULTI
#define CONFIG_E1000
#define CONFIG_PCI_PNP /* do pci plug-and-play */
#define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */
@@ -804,13 +803,11 @@
#define CONFIG_CMD_I2C
#define CONFIG_CMD_MII
#define CONFIG_CMD_PING
-#define CONFIG_CMD_SETEXPR
#define CONFIG_CMD_REGINFO
#define CONFIG_CMD_BDI
#ifdef CONFIG_PCI
#define CONFIG_CMD_PCI
-#define CONFIG_CMD_NET
#endif
/* Hash command with SHA acceleration supported in hardware */
diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h
index 107efdc..c5db4f3 100644
--- a/include/configs/T208xRDB.h
+++ b/include/configs/T208xRDB.h
@@ -568,7 +568,6 @@
#ifdef CONFIG_PCI
#define CONFIG_PCI_INDIRECT_BRIDGE
#define CONFIG_FSL_PCIE_RESET /* need PCIe reset errata LSZ ADD */
-#define CONFIG_NET_MULTI
#define CONFIG_E1000
#define CONFIG_PCI_PNP /* do pci plug-and-play */
#define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */
@@ -759,13 +758,11 @@
#define CONFIG_CMD_I2C
#define CONFIG_CMD_PING
#define CONFIG_CMD_ECHO
-#define CONFIG_CMD_SETEXPR
#define CONFIG_CMD_REGINFO
#define CONFIG_CMD_BDI
#ifdef CONFIG_PCI
#define CONFIG_CMD_PCI
-#define CONFIG_CMD_NET
#endif
/* Hash command with SHA acceleration supported in hardware */
diff --git a/include/configs/T4240RDB.h b/include/configs/T4240RDB.h
index 2a22249..e38a6f7 100644
--- a/include/configs/T4240RDB.h
+++ b/include/configs/T4240RDB.h
@@ -277,7 +277,6 @@
#ifdef CONFIG_PCI
#define CONFIG_PCI_INDIRECT_BRIDGE
-#define CONFIG_NET_MULTI
#define CONFIG_PCI_PNP /* do pci plug-and-play */
#define CONFIG_E1000
@@ -329,11 +328,9 @@
#define CONFIG_CMD_I2C
#define CONFIG_CMD_MII
#define CONFIG_CMD_PING
-#define CONFIG_CMD_SETEXPR
#ifdef CONFIG_PCI
#define CONFIG_CMD_PCI
-#define CONFIG_CMD_NET
#endif
/*
diff --git a/include/configs/UCP1020.h b/include/configs/UCP1020.h
index 57e0c6c..ec52d6a 100644
--- a/include/configs/UCP1020.h
+++ b/include/configs/UCP1020.h
@@ -424,7 +424,6 @@
#define CONFIG_PCI_PNP /* do pci plug-and-play */
#define CONFIG_E1000 /* Defind e1000 pci Ethernet card*/
#define CONFIG_CMD_PCI
-#define CONFIG_CMD_NET
#define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */
#define CONFIG_DOS_PARTITION
@@ -505,7 +504,6 @@
#define CONFIG_CMD_IRQ
#define CONFIG_CMD_MII
#define CONFIG_CMD_PING
-#define CONFIG_CMD_SETEXPR
#define CONFIG_CMD_REGINFO
#define CONFIG_CMD_ERRATA
#define CONFIG_CMD_CRAMFS
diff --git a/include/configs/a3m071.h b/include/configs/a3m071.h
index d23d2c4..f8cea62 100644
--- a/include/configs/a3m071.h
+++ b/include/configs/a3m071.h
@@ -60,7 +60,6 @@
#define CONFIG_BOOTP_SERVERIP
#define CONFIG_NET_RETRY_COUNT 3
#define CONFIG_CMD_LINK_LOCAL
-#define CONFIG_LIB_RAND
#define CONFIG_NETCONSOLE
#define CONFIG_SYS_CONSOLE_IS_IN_ENV
#define CONFIG_CMD_PING
diff --git a/include/configs/ac14xx.h b/include/configs/ac14xx.h
index 54b7028..28f4de2 100644
--- a/include/configs/ac14xx.h
+++ b/include/configs/ac14xx.h
@@ -372,7 +372,6 @@
* Ethernet configuration
*/
#define CONFIG_MPC512x_FEC 1
-#define CONFIG_NET_MULTI
#define CONFIG_PHY_ADDR 0x1F
#define CONFIG_MII 1 /* MII PHY management */
#define CONFIG_FEC_AN_TIMEOUT 1
diff --git a/include/configs/adp-ag102.h b/include/configs/adp-ag102.h
index 39f7a3c..c46eed9 100644
--- a/include/configs/adp-ag102.h
+++ b/include/configs/adp-ag102.h
@@ -81,7 +81,6 @@
/*
* Ethernet
*/
-#define CONFIG_NET_MULTI
#define CONFIG_PHY_MAX_ADDR 32 /* this comes from <linux/phy.h> */
#define CONFIG_SYS_DISCOVER_PHY
#define CONFIG_FTGMAC100
diff --git a/include/configs/alpr.h b/include/configs/alpr.h
index 2782e55..0f125dc 100644
--- a/include/configs/alpr.h
+++ b/include/configs/alpr.h
@@ -228,7 +228,6 @@
#undef CONFIG_CMD_LOADS
#define CONFIG_CMD_MII
#define CONFIG_CMD_NAND
-#define CONFIG_CMD_NET
#undef CONFIG_CMD_NFS
#define CONFIG_CMD_PCI
diff --git a/include/configs/alt.h b/include/configs/alt.h
index e9ffa48..646cb61 100644
--- a/include/configs/alt.h
+++ b/include/configs/alt.h
@@ -49,7 +49,6 @@
#define CONFIG_SYS_NO_FLASH
/* SH Ether */
-#define CONFIG_NET_MULTI
#define CONFIG_SH_ETHER
#define CONFIG_SH_ETHER_USE_PORT 0
#define CONFIG_SH_ETHER_PHY_ADDR 0x1
diff --git a/include/configs/am3517_crane.h b/include/configs/am3517_crane.h
index c3c9169..9b31b9c 100644
--- a/include/configs/am3517_crane.h
+++ b/include/configs/am3517_crane.h
@@ -150,7 +150,6 @@
#define CONFIG_SYS_OMAP24_I2C_SLAVE 1
#define CONFIG_SYS_I2C_OMAP34XX
-#undef CONFIG_CMD_NET
#undef CONFIG_CMD_NFS
/*
* Board NAND Info.
diff --git a/include/configs/am43xx_evm.h b/include/configs/am43xx_evm.h
index 331fdac..d4f4c23 100644
--- a/include/configs/am43xx_evm.h
+++ b/include/configs/am43xx_evm.h
@@ -306,7 +306,6 @@
#endif
/* CPSW Ethernet */
-#define CONFIG_CMD_NET
#define CONFIG_CMD_DHCP
#define CONFIG_CMD_PING
#define CONFIG_CMD_MII
@@ -319,7 +318,6 @@
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_SUBNETMASK
#define CONFIG_NET_RETRY_COUNT 10
-#define CONFIG_NET_MULTI
#define CONFIG_PHY_GIGE
#define CONFIG_PHYLIB
diff --git a/include/configs/amcc-common.h b/include/configs/amcc-common.h
index 9e7f37d..9d6146a 100644
--- a/include/configs/amcc-common.h
+++ b/include/configs/amcc-common.h
@@ -67,11 +67,9 @@
#define CONFIG_CMD_I2C
#define CONFIG_CMD_IRQ
#define CONFIG_CMD_MII
-#define CONFIG_CMD_NET
#define CONFIG_CMD_NFS
#define CONFIG_CMD_PING
#define CONFIG_CMD_REGINFO
-#define CONFIG_CMD_SETEXPR
/*
* Miscellaneous configurable options
diff --git a/include/configs/amcore.h b/include/configs/amcore.h
index 5a06311..5e197be 100644
--- a/include/configs/amcore.h
+++ b/include/configs/amcore.h
@@ -24,7 +24,6 @@
#include <config_cmd_default.h>
#undef CONFIG_CMD_AES
#undef CONFIG_CMD_BOOTD
-#undef CONFIG_CMD_NET
#undef CONFIG_CMD_NFS
#undef CONFIG_CMD_FPGA
#undef CONFIG_CMD_XIMG
diff --git a/include/configs/ap325rxa.h b/include/configs/ap325rxa.h
index 462b2e2..573c98f 100644
--- a/include/configs/ap325rxa.h
+++ b/include/configs/ap325rxa.h
@@ -18,7 +18,6 @@
#define CONFIG_CMD_LOADS
#define CONFIG_CMD_FLASH
#define CONFIG_CMD_MEMORY
-#define CONFIG_CMD_NET
#define CONFIG_CMD_PING
#define CONFIG_CMD_NFS
#define CONFIG_CMD_SDRAM
diff --git a/include/configs/ap_sh4a_4a.h b/include/configs/ap_sh4a_4a.h
index 4282d70..5b95dd3 100644
--- a/include/configs/ap_sh4a_4a.h
+++ b/include/configs/ap_sh4a_4a.h
@@ -20,7 +20,6 @@
#define CONFIG_CMD_FLASH
#define CONFIG_CMD_MEMORY
-#define CONFIG_CMD_NET
#define CONFIG_CMD_PING
#define CONFIG_CMD_MII
#define CONFIG_CMD_NFS
diff --git a/include/configs/apalis_t30.h b/include/configs/apalis_t30.h
index 6d38853..aba9ba6 100644
--- a/include/configs/apalis_t30.h
+++ b/include/configs/apalis_t30.h
@@ -57,11 +57,9 @@
#define CONFIG_E1000_NO_NVM
/* General networking support */
-#define CONFIG_CMD_NET
#define CONFIG_CMD_DHCP
/* Miscellaneous commands */
-#define CONFIG_CMD_SETEXPR
#define CONFIG_FAT_WRITE
/* Increase console I/O buffer size */
diff --git a/include/configs/apf27.h b/include/configs/apf27.h
index 403692d..7554023 100644
--- a/include/configs/apf27.h
+++ b/include/configs/apf27.h
@@ -86,7 +86,6 @@
#define CONFIG_CMD_NAND_TRIMFFS
#define CONFIG_CMD_NFS /* NFS support */
#define CONFIG_CMD_PING /* ping support */
-#define CONFIG_CMD_SETEXPR /* setexpr support */
#define CONFIG_CMD_UBI
#define CONFIG_CMD_UBIFS
diff --git a/include/configs/apx4devkit.h b/include/configs/apx4devkit.h
index d1f18bc..445cb19 100644
--- a/include/configs/apx4devkit.h
+++ b/include/configs/apx4devkit.h
@@ -34,7 +34,6 @@
#define CONFIG_CMD_MII
#define CONFIG_CMD_MMC
#define CONFIG_CMD_NAND
-#define CONFIG_CMD_NET
#define CONFIG_CMD_NFS
#define CONFIG_CMD_PING
#define CONFIG_CMD_SAVEENV
@@ -88,7 +87,6 @@
/* FEC Ethernet on SoC */
#ifdef CONFIG_CMD_NET
#define CONFIG_FEC_MXC
-#define CONFIG_NET_MULTI
#define CONFIG_ETHPRIME "FEC"
#define CONFIG_FEC_MXC_PHYADDR 0
#define IMX_FEC_BASE MXS_ENET0_BASE
diff --git a/include/configs/aristainetos-common.h b/include/configs/aristainetos-common.h
index 1abaabf..eb50639 100644
--- a/include/configs/aristainetos-common.h
+++ b/include/configs/aristainetos-common.h
@@ -35,7 +35,6 @@
#define CONFIG_CMD_PING
#define CONFIG_CMD_DHCP
#define CONFIG_CMD_MII
-#define CONFIG_CMD_NET
#define CONFIG_FEC_MXC
#define CONFIG_MII
#define IMX_FEC_BASE ENET_BASE_ADDR
@@ -57,7 +56,6 @@
/* Command definition */
#define CONFIG_CMD_BMODE
-#define CONFIG_CMD_SETEXPR
#define CONFIG_EXTRA_ENV_SETTINGS \
"script=u-boot.scr\0" \
diff --git a/include/configs/armadillo-800eva.h b/include/configs/armadillo-800eva.h
index 72469f3..e540e3f 100644
--- a/include/configs/armadillo-800eva.h
+++ b/include/configs/armadillo-800eva.h
@@ -21,7 +21,6 @@
#define CONFIG_CMD_SDRAM
#define CONFIG_CMD_RUN
#define CONFIG_CMD_LOADS
-#define CONFIG_CMD_NET
#define CONFIG_CMD_MII
#define CONFIG_CMD_PING
#define CONFIG_CMD_DHCP
@@ -121,7 +120,6 @@
#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SECT_SIZE)
/* SH Ether */
-#define CONFIG_NET_MULTI
#define CONFIG_SH_ETHER
#define CONFIG_SH_ETHER_USE_PORT 0
#define CONFIG_SH_ETHER_PHY_ADDR 0x0
diff --git a/include/configs/aspenite.h b/include/configs/aspenite.h
index 47760ef..f4cf1c0 100644
--- a/include/configs/aspenite.h
+++ b/include/configs/aspenite.h
@@ -42,7 +42,6 @@
#define CONFIG_SYS_NO_FLASH /* Declare no flash (NOR/SPI) */
#include <config_cmd_default.h>
#define CONFIG_CMD_I2C
-#undef CONFIG_CMD_NET
#undef CONFIG_CMD_NFS
/*
* mv-common.h should be defined after CMD configs since it used them
diff --git a/include/configs/astro_mcf5373l.h b/include/configs/astro_mcf5373l.h
index 7b9ff8f..bd0919e 100644
--- a/include/configs/astro_mcf5373l.h
+++ b/include/configs/astro_mcf5373l.h
@@ -69,7 +69,6 @@
#define CONFIG_CMD_MEMORY
#define CONFIG_CMD_MISC
#define CONFIG_CMD_XIMG
-#undef CONFIG_CMD_NET
#undef CONFIG_CMD_NFS
#if ENABLE_JFFS
#define CONFIG_CMD_JFFS2
diff --git a/include/configs/at91-sama5_common.h b/include/configs/at91-sama5_common.h
index 94981e7..9289964 100644
--- a/include/configs/at91-sama5_common.h
+++ b/include/configs/at91-sama5_common.h
@@ -54,7 +54,6 @@
#undef CONFIG_CMD_LOADS
#define CONFIG_CMD_PING
#define CONFIG_CMD_DHCP
-#define CONFIG_CMD_SETEXPR
#ifdef CONFIG_SYS_USE_MMC
#define CONFIG_BOOTARGS \
diff --git a/include/configs/at91sam9rlek.h b/include/configs/at91sam9rlek.h
index e43795b..637d150 100644
--- a/include/configs/at91sam9rlek.h
+++ b/include/configs/at91sam9rlek.h
@@ -82,7 +82,6 @@
#undef CONFIG_CMD_IMI
#undef CONFIG_CMD_IMLS
#undef CONFIG_CMD_LOADS
-#undef CONFIG_CMD_NET
#undef CONFIG_CMD_NFS
#undef CONFIG_CMD_SOURCE
#undef CONFIG_CMD_USB
diff --git a/include/configs/atngw100mkii.h b/include/configs/atngw100mkii.h
index eaed7ea..8374733 100644
--- a/include/configs/atngw100mkii.h
+++ b/include/configs/atngw100mkii.h
@@ -100,7 +100,6 @@
* "ethaddr" and "eth1addr". This is normally done during production.
*/
#define CONFIG_OVERWRITE_ETHADDR_ONCE
-#define CONFIG_NET_MULTI
/*
* BOOTP/DHCP options
diff --git a/include/configs/atstk1003.h b/include/configs/atstk1003.h
index 63704b1..b2ad30e 100644
--- a/include/configs/atstk1003.h
+++ b/include/configs/atstk1003.h
@@ -103,7 +103,6 @@
#define CONFIG_CMD_MMC
#undef CONFIG_CMD_FPGA
-#undef CONFIG_CMD_NET
#undef CONFIG_CMD_NFS
#undef CONFIG_CMD_SETGETDCR
#undef CONFIG_CMD_XIMG
diff --git a/include/configs/atstk1004.h b/include/configs/atstk1004.h
index 331a60d..19f049a 100644
--- a/include/configs/atstk1004.h
+++ b/include/configs/atstk1004.h
@@ -103,7 +103,6 @@
#define CONFIG_CMD_MMC
#undef CONFIG_CMD_FPGA
-#undef CONFIG_CMD_NET
#undef CONFIG_CMD_NFS
#undef CONFIG_CMD_SETGETDCR
#undef CONFIG_CMD_XIMG
diff --git a/include/configs/axs101.h b/include/configs/axs101.h
index 389f75b..5e8c14d 100644
--- a/include/configs/axs101.h
+++ b/include/configs/axs101.h
@@ -117,7 +117,6 @@
* Ethernet configuration
*/
#define CONFIG_DW_AUTONEG
-#define CONFIG_NET_MULTI
/*
* Command line configuration
diff --git a/include/configs/balloon3.h b/include/configs/balloon3.h
index 848a158..60981f9 100644
--- a/include/configs/balloon3.h
+++ b/include/configs/balloon3.h
@@ -48,7 +48,6 @@
*/
#include <config_cmd_default.h>
-#undef CONFIG_CMD_NET
#undef CONFIG_CMD_NFS
#undef CONFIG_CMD_ENV
#undef CONFIG_CMD_IMLS
diff --git a/include/configs/bcm28155_ap.h b/include/configs/bcm28155_ap.h
index 1045779..900dc42 100644
--- a/include/configs/bcm28155_ap.h
+++ b/include/configs/bcm28155_ap.h
@@ -134,7 +134,6 @@
#define CONFIG_CMD_BOOTZ
#define CONFIG_FAT_WRITE
-#undef CONFIG_CMD_NET
#undef CONFIG_CMD_NFS
#endif /* __BCM28155_AP_H */
diff --git a/include/configs/bct-brettl2.h b/include/configs/bct-brettl2.h
index 0d9fe57..36637ae 100644
--- a/include/configs/bct-brettl2.h
+++ b/include/configs/bct-brettl2.h
@@ -73,7 +73,6 @@
#define CONFIG_GATEWAYIP 192.168.233.1
#define CONFIG_SERVERIP 192.168.233.53
#define CONFIG_ROOTPATH "/romfs/brettl2"
-#define CONFIG_LIB_RAND
#endif
diff --git a/include/configs/beagle_x15.h b/include/configs/beagle_x15.h
index 4aa8550..369f7b8 100644
--- a/include/configs/beagle_x15.h
+++ b/include/configs/beagle_x15.h
@@ -45,7 +45,6 @@
/* CPSW Ethernet */
#define CONFIG_CMD_NFS
-#define CONFIG_CMD_NET /* 'bootp' and 'tftp' */
#define CONFIG_CMD_DHCP
#define CONFIG_BOOTP_DNS /* Configurable parts of CMD_DHCP */
#define CONFIG_BOOTP_DNS2
diff --git a/include/configs/beaver.h b/include/configs/beaver.h
index 58013c6..84541b9 100644
--- a/include/configs/beaver.h
+++ b/include/configs/beaver.h
@@ -85,7 +85,6 @@
#define CONFIG_RTL8169
/* General networking support */
-#define CONFIG_CMD_NET
#define CONFIG_CMD_DHCP
#include "tegra-common-usb-gadget.h"
diff --git a/include/configs/bf518f-ezbrd.h b/include/configs/bf518f-ezbrd.h
index dcd19e4..0df463f 100644
--- a/include/configs/bf518f-ezbrd.h
+++ b/include/configs/bf518f-ezbrd.h
@@ -87,7 +87,6 @@
#endif
#define CONFIG_HOSTNAME bf518f-ezbrd
#define CONFIG_PHY_ADDR 3
-#define CONFIG_LIB_RAND
/*
* Flash Settings
diff --git a/include/configs/bf525-ucr2.h b/include/configs/bf525-ucr2.h
index 008f4b5..0ac3a09 100644
--- a/include/configs/bf525-ucr2.h
+++ b/include/configs/bf525-ucr2.h
@@ -96,7 +96,6 @@
/* this sets up the default list of enabled commands */
#include <config_cmd_default.h>
-#undef CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */
#undef CONFIG_CMD_NFS
#undef CONFIG_CMD_IMLS
diff --git a/include/configs/bf526-ezbrd.h b/include/configs/bf526-ezbrd.h
index ad5fa53..83f57cd 100644
--- a/include/configs/bf526-ezbrd.h
+++ b/include/configs/bf526-ezbrd.h
@@ -85,7 +85,6 @@
#define CONFIG_NETCONSOLE 1
#endif
#define CONFIG_HOSTNAME bf526-ezbrd
-#define CONFIG_LIB_RAND
/*
* Flash Settings
diff --git a/include/configs/bf527-ezkit.h b/include/configs/bf527-ezkit.h
index b23a250..32ac961 100644
--- a/include/configs/bf527-ezkit.h
+++ b/include/configs/bf527-ezkit.h
@@ -83,7 +83,6 @@
#define CONFIG_NETCONSOLE 1
#endif
#define CONFIG_HOSTNAME bf527-ezkit
-#define CONFIG_LIB_RAND
/*
* Flash Settings
diff --git a/include/configs/bf537-minotaur.h b/include/configs/bf537-minotaur.h
index e705d08..53b7ab5 100644
--- a/include/configs/bf537-minotaur.h
+++ b/include/configs/bf537-minotaur.h
@@ -87,7 +87,6 @@
#define CONFIG_SYS_AUTOLOAD "no"
#define CONFIG_ROOTPATH "/romfs"
-#define CONFIG_LIB_RAND
/*
* Flash Settings
@@ -153,7 +152,6 @@
# define CONFIG_CMD_DHCP
# define CONFIG_CMD_PING
#else
-# undef CONFIG_CMD_NET
# undef CONFIG_CMD_NFS
#endif
diff --git a/include/configs/bf537-pnav.h b/include/configs/bf537-pnav.h
index be11a85..850c516 100644
--- a/include/configs/bf537-pnav.h
+++ b/include/configs/bf537-pnav.h
@@ -65,7 +65,6 @@
#define CONFIG_RMII
#endif
#define CONFIG_HOSTNAME bf537-pnav
-#define CONFIG_LIB_RAND
/*
* Flash Settings
diff --git a/include/configs/bf537-srv1.h b/include/configs/bf537-srv1.h
index 9a7edf3..2da5d29 100644
--- a/include/configs/bf537-srv1.h
+++ b/include/configs/bf537-srv1.h
@@ -86,7 +86,6 @@
#define CONFIG_SYS_AUTOLOAD "no"
#define CONFIG_ROOTPATH "/romfs"
-#define CONFIG_LIB_RAND
/*
* Flash Settings
@@ -152,7 +151,6 @@
# define CONFIG_CMD_DHCP
# define CONFIG_CMD_PING
#else
-# undef CONFIG_CMD_NET
# undef CONFIG_CMD_NFS
#endif
diff --git a/include/configs/bf537-stamp.h b/include/configs/bf537-stamp.h
index 41f1b1f..84ef4ed 100644
--- a/include/configs/bf537-stamp.h
+++ b/include/configs/bf537-stamp.h
@@ -65,7 +65,6 @@
#define CONFIG_NETCONSOLE 1
#endif
#define CONFIG_HOSTNAME bf537-stamp
-#define CONFIG_LIB_RAND
/*
* Flash Settings
diff --git a/include/configs/bf561-acvilon.h b/include/configs/bf561-acvilon.h
index 03f3cec..299c4c2 100644
--- a/include/configs/bf561-acvilon.h
+++ b/include/configs/bf561-acvilon.h
@@ -76,7 +76,6 @@
* Network Settings
*/
#define ADI_CMDS_NETWORK 1
-#define CONFIG_CMD_NET
#define CONFIG_CMD_MII
#define CONFIG_CMD_DATE
#define CONFIG_CMD_DTT
diff --git a/include/configs/bf609-ezkit.h b/include/configs/bf609-ezkit.h
index 7507d57..73f3bfe 100644
--- a/include/configs/bf609-ezkit.h
+++ b/include/configs/bf609-ezkit.h
@@ -69,12 +69,10 @@
*/
#define ADI_CMDS_NETWORK
#define CONFIG_NETCONSOLE
-#define CONFIG_NET_MULTI
#define CONFIG_HOSTNAME "bf609-ezkit"
#define CONFIG_PHY_ADDR 1
#define CONFIG_DW_PORTS 1
#define CONFIG_DW_ALTDESCRIPTOR
-#define CONFIG_CMD_NET
#define CONFIG_CMD_MII
#define CONFIG_MII
#define CONFIG_PHYLIB
diff --git a/include/configs/bfin_adi_common.h b/include/configs/bfin_adi_common.h
index 143d3dd..1c9d584 100644
--- a/include/configs/bfin_adi_common.h
+++ b/include/configs/bfin_adi_common.h
@@ -17,7 +17,6 @@
# define CONFIG_BOOTP_DNS
# define CONFIG_BOOTP_NTPSERVER
# define CONFIG_BOOTP_RANDOM_DELAY
-# define CONFIG_LIB_RAND
# define CONFIG_KEEP_SERVERADDR
# define CONFIG_CMD_DNS
# define CONFIG_CMD_PING
@@ -26,7 +25,6 @@
# endif
# else
# undef CONFIG_CMD_BOOTD
-# undef CONFIG_CMD_NET
# undef CONFIG_CMD_NFS
# endif
# ifdef CONFIG_LIBATA
diff --git a/include/configs/bg0900.h b/include/configs/bg0900.h
index 507d972..7f364cd 100644
--- a/include/configs/bg0900.h
+++ b/include/configs/bg0900.h
@@ -22,11 +22,9 @@
#define CONFIG_CMD_MII
#define CONFIG_CMD_NAND
#define CONFIG_CMD_NAND_TRIMFFS
-#define CONFIG_CMD_NET
#define CONFIG_CMD_NFS
#define CONFIG_CMD_PING
#define CONFIG_CMD_SAVEENV
-#define CONFIG_CMD_SETEXPR
#define CONFIG_CMD_SF
#define CONFIG_CMD_SPI
@@ -44,7 +42,6 @@
/* FEC Ethernet on SoC */
#ifdef CONFIG_CMD_NET
#define CONFIG_FEC_MXC
-#define CONFIG_NET_MULTI
#endif
/* SPI */
diff --git a/include/configs/blackstamp.h b/include/configs/blackstamp.h
index 28bc653..ee526af 100644
--- a/include/configs/blackstamp.h
+++ b/include/configs/blackstamp.h
@@ -108,7 +108,6 @@
# define CONFIG_CMD_DHCP
# define CONFIG_CMD_PING
#else
-# undef CONFIG_CMD_NET
#endif
#ifdef CONFIG_SYS_I2C_SOFT
diff --git a/include/configs/bur_am335x_common.h b/include/configs/bur_am335x_common.h
index b441fa0..e28e5ad 100644
--- a/include/configs/bur_am335x_common.h
+++ b/include/configs/bur_am335x_common.h
@@ -3,7 +3,7 @@
*
* common parts used by B&R AM335x based boards
*
- * Copyright (C) 2013 Hannes Petermaier <oe5hpm@oevsv.at> -
+ * Copyright (C) 2013 Hannes Schmelzer <oe5hpm@oevsv.at> -
* Bernecker & Rainer Industrieelektronik GmbH - http://www.br-automation.com
*
* SPDX-License-Identifier: GPL-2.0+
@@ -17,17 +17,13 @@
"defaultip=192.168.60.253\0" \
"defaultsip=192.168.60.254\0" \
"netconsole=echo switching to network console ...; " \
-"if dhcp; then " \
-"setenv ncip ${serverip}; else " \
-"setenv ncip 192.168.60.254; " \
-"setenv serverip 192.168.60.254; " \
-"setenv gatewayip 192.168.60.254; " \
-"setenv ipaddr 192.168.60.1; " \
-"fi;" \
-"setenv netdisplay0 '" \
-"setcurs 1 9; puts myip; setcurs 10 9; puts ${ipaddr};" \
-"setcurs 1 10;puts serverip; setcurs 10 10; puts ${serverip};" \
-"run netdisplay0; " \
+"if dhcp; then setenv ncip ${serverip}; " \
+"else " \
+"setenv ncip 192.168.60.254; setenv serverip 192.168.60.254; " \
+"setenv gatewayip 192.168.60.254; setenv ipaddr 192.168.60.1; " \
+"fi; " \
+"setcurs 1 9; lcdputs myip; setcurs 10 9; lcdputs ${ipaddr};" \
+"setcurs 1 10;lcdputs serverip; setcurs 10 10; lcdputs ${serverip};" \
"setenv stdout nc;setenv stdin nc;setenv stderr nc\0"
#define CONFIG_CMD_TIME
@@ -61,7 +57,6 @@
#define CONFIG_BAUDRATE 115200
/* Network defines */
-#define CONFIG_CMD_NET /* 'bootp' and 'tftp' */
#define CONFIG_CMD_DHCP
#define CONFIG_BOOTP_DNS /* Configurable parts of CMD_DHCP */
#define CONFIG_BOOTP_SEND_HOSTNAME
diff --git a/include/configs/calimain.h b/include/configs/calimain.h
index 44c947f..5169b41 100644
--- a/include/configs/calimain.h
+++ b/include/configs/calimain.h
@@ -325,7 +325,6 @@
#define CONFIG_CMD_GPIO
#ifndef CONFIG_DRIVER_TI_EMAC
-#undef CONFIG_CMD_NET
#undef CONFIG_CMD_DHCP
#undef CONFIG_CMD_MII
#undef CONFIG_CMD_PING
diff --git a/include/configs/cardhu.h b/include/configs/cardhu.h
index 55de464..c76a426 100644
--- a/include/configs/cardhu.h
+++ b/include/configs/cardhu.h
@@ -87,7 +87,6 @@
#define CONFIG_RTL8169
/* General networking support */
-#define CONFIG_CMD_NET
#define CONFIG_CMD_DHCP
#include "tegra-common-post.h"
diff --git a/include/configs/cm-bf527.h b/include/configs/cm-bf527.h
index 387f1cb..e9e4e14 100644
--- a/include/configs/cm-bf527.h
+++ b/include/configs/cm-bf527.h
@@ -83,7 +83,6 @@
#define CONFIG_NETCONSOLE 1
#endif
#define CONFIG_HOSTNAME cm-bf527
-#define CONFIG_LIB_RAND
/*
* Flash Settings
diff --git a/include/configs/cm-bf537e.h b/include/configs/cm-bf537e.h
index 95afd51..0eebe56 100644
--- a/include/configs/cm-bf537e.h
+++ b/include/configs/cm-bf537e.h
@@ -71,7 +71,6 @@
#define CONFIG_NETCONSOLE 1
#endif
#define CONFIG_HOSTNAME cm-bf537e
-#define CONFIG_LIB_RAND
/*
* Flash Settings
diff --git a/include/configs/cm-bf537u.h b/include/configs/cm-bf537u.h
index 4df4a05..3a2d726 100644
--- a/include/configs/cm-bf537u.h
+++ b/include/configs/cm-bf537u.h
@@ -69,7 +69,6 @@
#define CONFIG_NETCONSOLE 1
#endif
#define CONFIG_HOSTNAME cm-bf537u
-#define CONFIG_LIB_RAND
/*
* Flash Settings
diff --git a/include/configs/cm_t54.h b/include/configs/cm_t54.h
index 0cd4aec..a129f68 100644
--- a/include/configs/cm_t54.h
+++ b/include/configs/cm_t54.h
@@ -90,7 +90,6 @@
/* Enabled commands */
#define CONFIG_CMD_DHCP /* DHCP Support */
-#define CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */
#define CONFIG_CMD_PING
/* USB Networking options */
diff --git a/include/configs/cmi_mpc5xx.h b/include/configs/cmi_mpc5xx.h
index 32cecbd..9bc3795 100644
--- a/include/configs/cmi_mpc5xx.h
+++ b/include/configs/cmi_mpc5xx.h
@@ -46,7 +46,6 @@
*/
#include <config_cmd_default.h>
-#undef CONFIG_CMD_NET /* disabeled - causes compile errors */
#undef CONFIG_CMD_NFS
#define CONFIG_CMD_MEMORY
diff --git a/include/configs/colibri_pxa270.h b/include/configs/colibri_pxa270.h
index 7fc364e..6f25fdb 100644
--- a/include/configs/colibri_pxa270.h
+++ b/include/configs/colibri_pxa270.h
@@ -56,7 +56,6 @@
#undef CONFIG_CMD_LOADB /* Both together */
#undef CONFIG_CMD_LOADS /* saves 10 KB */
-#define CONFIG_CMD_NET
#define CONFIG_CMD_ENV
#undef CONFIG_CMD_IMLS
#define CONFIG_CMD_MMC
diff --git a/include/configs/colibri_t20.h b/include/configs/colibri_t20.h
index c17f245..a3f27e3 100644
--- a/include/configs/colibri_t20.h
+++ b/include/configs/colibri_t20.h
@@ -41,7 +41,6 @@
#define CONFIG_USB_ETHER_ASIX
/* General networking support */
-#define CONFIG_CMD_NET
#define CONFIG_CMD_DHCP
/* NAND support */
@@ -60,7 +59,6 @@
#define CONFIG_CMD_CACHE
/* Miscellaneous commands */
-#define CONFIG_CMD_SETEXPR
#define CONFIG_FAT_WRITE
/* Increase console I/O buffer size */
diff --git a/include/configs/colibri_t30.h b/include/configs/colibri_t30.h
index ee6fa1c..4655668 100644
--- a/include/configs/colibri_t30.h
+++ b/include/configs/colibri_t30.h
@@ -50,11 +50,9 @@
#define CONFIG_USB_ETHER_ASIX
/* General networking support */
-#define CONFIG_CMD_NET
#define CONFIG_CMD_DHCP
/* Miscellaneous commands */
-#define CONFIG_CMD_SETEXPR
#define CONFIG_FAT_WRITE
/* Increase console I/O buffer size */
diff --git a/include/configs/colibri_vf.h b/include/configs/colibri_vf.h
index 56e6d97..f26aad4 100644
--- a/include/configs/colibri_vf.h
+++ b/include/configs/colibri_vf.h
@@ -97,7 +97,6 @@
#define CONFIG_CMD_PING
#define CONFIG_CMD_DHCP
#define CONFIG_CMD_MII
-#define CONFIG_CMD_NET
#define CONFIG_FEC_MXC
#define CONFIG_MII
#define IMX_FEC_BASE ENET1_BASE_ADDR
diff --git a/include/configs/controlcenterd.h b/include/configs/controlcenterd.h
index bfcfa0c..9cab9fb 100644
--- a/include/configs/controlcenterd.h
+++ b/include/configs/controlcenterd.h
@@ -405,9 +405,7 @@
#define CONFIG_CMD_FAT
#define CONFIG_CMD_IRQ
#define CONFIG_CMD_MII
-#define CONFIG_CMD_NET
#define CONFIG_CMD_PING
-#define CONFIG_CMD_SETEXPR
#define CONFIG_CMD_REGINFO
/*
diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h
index 8e27ae4..bf765af 100644
--- a/include/configs/corenet_ds.h
+++ b/include/configs/corenet_ds.h
@@ -630,12 +630,10 @@
#define CONFIG_CMD_I2C
#define CONFIG_CMD_MII
#define CONFIG_CMD_PING
-#define CONFIG_CMD_SETEXPR
#define CONFIG_CMD_REGINFO
#ifdef CONFIG_PCI
#define CONFIG_CMD_PCI
-#define CONFIG_CMD_NET
#endif
/*
diff --git a/include/configs/crownbay.h b/include/configs/crownbay.h
index 4fef433..0e1f046 100644
--- a/include/configs/crownbay.h
+++ b/include/configs/crownbay.h
@@ -17,8 +17,6 @@
#define CONFIG_BOARD_EARLY_INIT_F
#define CONFIG_ARCH_MISC_INIT
-#define CONFIG_NR_DRAM_BANKS 1
-
#define CONFIG_X86_SERIAL
#define CONFIG_SMSC_LPC47M
diff --git a/include/configs/da830evm.h b/include/configs/da830evm.h
index 0bdcef7..ab5226b 100644
--- a/include/configs/da830evm.h
+++ b/include/configs/da830evm.h
@@ -188,7 +188,6 @@
#endif
#ifndef CONFIG_DRIVER_TI_EMAC
-#undef CONFIG_CMD_NET
#undef CONFIG_CMD_DHCP
#undef CONFIG_CMD_MII
#undef CONFIG_CMD_PING
diff --git a/include/configs/da850evm.h b/include/configs/da850evm.h
index e5a612c..37a485b 100644
--- a/include/configs/da850evm.h
+++ b/include/configs/da850evm.h
@@ -309,7 +309,6 @@
#endif
#ifndef CONFIG_DRIVER_TI_EMAC
-#undef CONFIG_CMD_NET
#undef CONFIG_CMD_DHCP
#undef CONFIG_CMD_MII
#undef CONFIG_CMD_PING
diff --git a/include/configs/dalmore.h b/include/configs/dalmore.h
index 5f5eb3b..e702a50 100644
--- a/include/configs/dalmore.h
+++ b/include/configs/dalmore.h
@@ -72,7 +72,6 @@
#define CONFIG_USB_ETHER_ASIX
/* General networking support */
-#define CONFIG_CMD_NET
#define CONFIG_CMD_DHCP
#include "tegra-common-post.h"
diff --git a/include/configs/davinci_dm6467evm.h b/include/configs/davinci_dm6467evm.h
index 2c5a837..b02e73c 100644
--- a/include/configs/davinci_dm6467evm.h
+++ b/include/configs/davinci_dm6467evm.h
@@ -71,7 +71,6 @@
#define CONFIG_BOOTP_DNS2
#define CONFIG_BOOTP_SEND_HOSTNAME
#define CONFIG_NET_RETRY_COUNT 10
-#define CONFIG_CMD_NET
/* Flash & Environment */
#define CONFIG_SYS_NO_FLASH
diff --git a/include/configs/dbau1x00.h b/include/configs/dbau1x00.h
index 70aa699..ea55084 100644
--- a/include/configs/dbau1x00.h
+++ b/include/configs/dbau1x00.h
@@ -90,7 +90,6 @@
#define CONFIG_CMD_FLASH
#define CONFIG_CMD_LOADB
-#define CONFIG_CMD_NET
#undef CONFIG_CMD_I2C
#undef CONFIG_CMD_IDE
diff --git a/include/configs/dig297.h b/include/configs/dig297.h
index 9326401..5ec3c99 100644
--- a/include/configs/dig297.h
+++ b/include/configs/dig297.h
@@ -122,7 +122,6 @@
#undef CONFIG_CMD_FPGA /* FPGA configuration Support */
#undef CONFIG_CMD_IMI /* iminfo */
#undef CONFIG_CMD_IMLS /* List all found images */
-#define CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */
#undef CONFIG_CMD_NFS /* NFS support */
#define CONFIG_SYS_NO_FLASH
diff --git a/include/configs/dnp5370.h b/include/configs/dnp5370.h
index 3f1f9f3..3cbd67f 100644
--- a/include/configs/dnp5370.h
+++ b/include/configs/dnp5370.h
@@ -56,7 +56,6 @@
#define CONFIG_CMD_MII
#define CONFIG_CMD_PING
-#define CONFIG_LIB_RAND
#endif
/*
@@ -123,7 +122,6 @@
#include <config_cmd_default.h>
#ifndef CONFIG_BFIN_MAC
-# undef CONFIG_CMD_NET
# undef CONFIG_CMD_NFS
#endif
diff --git a/include/configs/dra7xx_evm.h b/include/configs/dra7xx_evm.h
index d79612b..77edc21 100644
--- a/include/configs/dra7xx_evm.h
+++ b/include/configs/dra7xx_evm.h
@@ -100,7 +100,6 @@
#define CONFIG_HSMMC2_8BIT
/* CPSW Ethernet */
-#define CONFIG_CMD_NET /* 'bootp' and 'tftp' */
#define CONFIG_CMD_DHCP
#define CONFIG_BOOTP_DNS /* Configurable parts of CMD_DHCP */
#define CONFIG_BOOTP_DNS2
diff --git a/include/configs/duovero.h b/include/configs/duovero.h
index e68f415..6e53da5 100644
--- a/include/configs/duovero.h
+++ b/include/configs/duovero.h
@@ -45,7 +45,6 @@
#define CONFIG_CMD_PING
#define CONFIG_CMD_DHCP
-#define CONFIG_CMD_NET
#define CONFIG_SMC911X
#define CONFIG_SMC911X_32_BIT
diff --git a/include/configs/ea20.h b/include/configs/ea20.h
index fc02b30..1e522c3 100644
--- a/include/configs/ea20.h
+++ b/include/configs/ea20.h
@@ -165,7 +165,6 @@
#endif
#ifndef CONFIG_DRIVER_TI_EMAC
-#undef CONFIG_CMD_NET
#undef CONFIG_CMD_DHCP
#undef CONFIG_CMD_MII
#undef CONFIG_CMD_PING
diff --git a/include/configs/eb_cpu5282.h b/include/configs/eb_cpu5282.h
index e2b9326..5f6148e 100644
--- a/include/configs/eb_cpu5282.h
+++ b/include/configs/eb_cpu5282.h
@@ -72,7 +72,6 @@
#define CONFIG_CMD_I2C
#define CONFIG_CMD_LED
#define CONFIG_CMD_MII
-#define CONFIG_CMD_NET
#define CONFIG_MCFTMR
diff --git a/include/configs/ecovec.h b/include/configs/ecovec.h
index e26591c..358314c 100644
--- a/include/configs/ecovec.h
+++ b/include/configs/ecovec.h
@@ -32,7 +32,6 @@
#define CONFIG_CMD_FLASH
#define CONFIG_CMD_MEMORY
-#define CONFIG_CMD_NET
#define CONFIG_CMD_PING
#define CONFIG_CMD_MII
#define CONFIG_CMD_NFS
diff --git a/include/configs/edb93xx.h b/include/configs/edb93xx.h
index a82e8bc..70f1226 100644
--- a/include/configs/edb93xx.h
+++ b/include/configs/edb93xx.h
@@ -142,7 +142,6 @@
#define CONFIG_MII_SUPPRESS_PREAMBLE
#define CONFIG_MII
#define CONFIG_PHY_ADDR 1
-#define CONFIG_NET_MULTI
#undef CONFIG_NETCONSOLE
/* SDRAM configuration */
diff --git a/include/configs/embestmx6boards.h b/include/configs/embestmx6boards.h
index 56950e0..5dfd56c 100644
--- a/include/configs/embestmx6boards.h
+++ b/include/configs/embestmx6boards.h
@@ -81,7 +81,6 @@
#undef CONFIG_CMD_FPGA
#define CONFIG_CMD_BMODE
-#define CONFIG_CMD_SETEXPR
#define CONFIG_ARP_TIMEOUT 200UL
diff --git a/include/configs/enbw_cmc.h b/include/configs/enbw_cmc.h
index cdea4a8..3be17f1 100644
--- a/include/configs/enbw_cmc.h
+++ b/include/configs/enbw_cmc.h
@@ -262,7 +262,6 @@
#endif
#ifndef CONFIG_DRIVER_TI_EMAC
-#undef CONFIG_CMD_NET
#undef CONFIG_CMD_DHCP
#undef CONFIG_CMD_MII
#undef CONFIG_CMD_PING
diff --git a/include/configs/espt.h b/include/configs/espt.h
index de16be7..f717954 100644
--- a/include/configs/espt.h
+++ b/include/configs/espt.h
@@ -20,7 +20,6 @@
#define CONFIG_CMD_SDRAM
#define CONFIG_CMD_FLASH
#define CONFIG_CMD_MEMORY
-#define CONFIG_CMD_NET
#define CONFIG_CMD_MII
#define CONFIG_CMD_PING
#define CONFIG_CMD_ENV
diff --git a/include/configs/ethernut5.h b/include/configs/ethernut5.h
index b79000e..2b638bf 100644
--- a/include/configs/ethernut5.h
+++ b/include/configs/ethernut5.h
@@ -129,7 +129,6 @@
#define CONFIG_CMD_RARP
#define CONFIG_CMD_REISER
#define CONFIG_CMD_SAVES
-#define CONFIG_CMD_SETEXPR
#define CONFIG_CMD_SF
#define CONFIG_CMD_SNTP
#define CONFIG_CMD_UBI
diff --git a/include/configs/exynos4-common.h b/include/configs/exynos4-common.h
index dbe05e4..f6b0a6f 100644
--- a/include/configs/exynos4-common.h
+++ b/include/configs/exynos4-common.h
@@ -24,14 +24,12 @@
#undef CONFIG_CMD_FPGA
#undef CONFIG_CMD_MISC
-#undef CONFIG_CMD_NET
#undef CONFIG_CMD_NFS
#undef CONFIG_CMD_XIMG
#undef CONFIG_CMD_ONENAND
#undef CONFIG_CMD_MTDPARTS
#define CONFIG_CMD_DFU
#define CONFIG_CMD_GPT
-#define CONFIG_CMD_SETEXPR
/* USB Composite download gadget - g_dnl */
#define CONFIG_USBDOWNLOAD_GADGET
diff --git a/include/configs/flea3.h b/include/configs/flea3.h
index 5f7cad8..846b868 100644
--- a/include/configs/flea3.h
+++ b/include/configs/flea3.h
@@ -87,7 +87,6 @@
#define CONFIG_CMD_I2C
#define CONFIG_CMD_SPI
#define CONFIG_CMD_MII
-#define CONFIG_CMD_NET
#define CONFIG_NET_RETRY_COUNT 100
#define CONFIG_BOOTDELAY 3
diff --git a/include/configs/fx12mm.h b/include/configs/fx12mm.h
index d0083fd..f1cbc8e 100644
--- a/include/configs/fx12mm.h
+++ b/include/configs/fx12mm.h
@@ -24,7 +24,6 @@
#define CONFIG_CMD_MTDPARTS
#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
#define CONFIG_FLASH_CFI_MTD
-#undef CONFIG_CMD_NET
/* sdram */
#define CONFIG_SYS_SDRAM_SIZE_MB 64
diff --git a/include/configs/galileo.h b/include/configs/galileo.h
index f780b8f..fd89bf3 100644
--- a/include/configs/galileo.h
+++ b/include/configs/galileo.h
@@ -15,8 +15,7 @@
#define CONFIG_SYS_MONITOR_LEN (1 << 20)
#define CONFIG_BOARD_EARLY_INIT_F
-
-#define CONFIG_NR_DRAM_BANKS 1
+#define CONFIG_ARCH_MISC_INIT
#define CONFIG_X86_SERIAL
diff --git a/include/configs/gose.h b/include/configs/gose.h
index 0dc28c7..04f0383 100644
--- a/include/configs/gose.h
+++ b/include/configs/gose.h
@@ -49,7 +49,6 @@
#define CONFIG_SPI_FLASH_SPANSION
/* SH Ether */
-#define CONFIG_NET_MULTI
#define CONFIG_SH_ETHER
#define CONFIG_SH_ETHER_USE_PORT 0
#define CONFIG_SH_ETHER_PHY_ADDR 0x1
diff --git a/include/configs/gr_ep2s60.h b/include/configs/gr_ep2s60.h
index 7c320ee..dd8653a 100644
--- a/include/configs/gr_ep2s60.h
+++ b/include/configs/gr_ep2s60.h
@@ -259,6 +259,7 @@
/* USE GRETH Ethernet Driver */
#define CONFIG_GRETH 1
+#endif
#define CONFIG_PHY_ADDR 0x00
diff --git a/include/configs/grsim.h b/include/configs/grsim.h
index 21b4f5e..6c52a17 100644
--- a/include/configs/grsim.h
+++ b/include/configs/grsim.h
@@ -59,7 +59,6 @@
#define CONFIG_CMD_LOADB /* loadb */
#define CONFIG_CMD_LOADS /* loads */
#define CONFIG_CMD_MISC /* Misc functions like sleep etc */
-#define CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */
#define CONFIG_CMD_REGINFO
#define CONFIG_CMD_RUN /* run command in env variable */
#define CONFIG_CMD_SETGETDCR /* DCR support on 4xx */
diff --git a/include/configs/gw_ventana.h b/include/configs/gw_ventana.h
index 406bf2e..6b8c82d 100644
--- a/include/configs/gw_ventana.h
+++ b/include/configs/gw_ventana.h
@@ -162,10 +162,8 @@
#define CONFIG_CMD_PING
#define CONFIG_CMD_DHCP
#define CONFIG_CMD_MII
-#define CONFIG_CMD_NET
#define CONFIG_CMD_BMODE /* set eFUSE shadow for a boot dev and reset */
#define CONFIG_CMD_HDMIDETECT /* detect HDMI output device */
-#define CONFIG_CMD_SETEXPR
#define CONFIG_CMD_GSC
#define CONFIG_CMD_EECONFIG /* Gateworks EEPROM config cmd */
#define CONFIG_CMD_UBI
diff --git a/include/configs/h2200.h b/include/configs/h2200.h
index 109cee9..c00b951 100644
--- a/include/configs/h2200.h
+++ b/include/configs/h2200.h
@@ -145,7 +145,6 @@
#define CONFIG_USB_DEV_PULLUP_GPIO 33
/* USB VBUS GPIO 3 */
-#define CONFIG_CMD_NET
#define CONFIG_CMD_PING
#define CONFIG_BOOTDELAY 2
diff --git a/include/configs/harmony.h b/include/configs/harmony.h
index ad3dcdb..99a63d6 100644
--- a/include/configs/harmony.h
+++ b/include/configs/harmony.h
@@ -58,7 +58,6 @@
#define CONFIG_USB_ETHER_SMSC95XX
/* General networking support */
-#define CONFIG_CMD_NET
#define CONFIG_CMD_DHCP
/* LCD support */
diff --git a/include/configs/hrcon.h b/include/configs/hrcon.h
index e7df9ad..2916987 100644
--- a/include/configs/hrcon.h
+++ b/include/configs/hrcon.h
@@ -475,7 +475,6 @@
#define CONFIG_CMD_I2C
#define CONFIG_CMD_MII
-#define CONFIG_CMD_NET
#define CONFIG_CMD_PCI
#define CONFIG_CMD_PING
diff --git a/include/configs/ids8313.h b/include/configs/ids8313.h
index c1ca56c..8b4278d 100644
--- a/include/configs/ids8313.h
+++ b/include/configs/ids8313.h
@@ -171,7 +171,6 @@
#define CONFIG_TSEC1
#define CONFIG_TSEC2
#define CONFIG_TSEC_ENET
-#define CONFIG_NET_MULTI
#define CONFIG_HARD_SPI
#define CONFIG_HARD_I2C
diff --git a/include/configs/ima3-mx53.h b/include/configs/ima3-mx53.h
index ad1614a..71ca77a 100644
--- a/include/configs/ima3-mx53.h
+++ b/include/configs/ima3-mx53.h
@@ -46,7 +46,6 @@
#define CONFIG_DOS_PARTITION
/* Ethernet on FEC */
-#define CONFIG_NET_MULTI
#define CONFIG_MII
#define CONFIG_FEC_MXC
diff --git a/include/configs/integratorap.h b/include/configs/integratorap.h
index 8439db7..12eb172 100644
--- a/include/configs/integratorap.h
+++ b/include/configs/integratorap.h
@@ -68,7 +68,6 @@
#define CONFIG_CMD_PCI
#define CONFIG_PCI_PNP
-#define CONFIG_NET_MULTI
#define CONFIG_TULIP
#define CONFIG_EEPRO100
#define CONFIG_SYS_RX_ETH_BUFFER 8 /* use 8 rx buffer on eepro100 */
diff --git a/include/configs/ip04.h b/include/configs/ip04.h
index 2bd81fc..73bbcb6 100644
--- a/include/configs/ip04.h
+++ b/include/configs/ip04.h
@@ -77,7 +77,6 @@
#define DM9000_IO CONFIG_DM9000_BASE
#define DM9000_DATA (CONFIG_DM9000_BASE + 2)
-#define CONFIG_LIB_RAND
/*
* Flash Settings
diff --git a/include/configs/ipam390.h b/include/configs/ipam390.h
index 664a2b2..16bc373 100644
--- a/include/configs/ipam390.h
+++ b/include/configs/ipam390.h
@@ -270,7 +270,6 @@
#endif
#ifndef CONFIG_DRIVER_TI_EMAC
-#undef CONFIG_CMD_NET
#undef CONFIG_CMD_DHCP
#undef CONFIG_CMD_MII
#undef CONFIG_CMD_PING
diff --git a/include/configs/jetson-tk1.h b/include/configs/jetson-tk1.h
index aeafbd5..606e6b4 100644
--- a/include/configs/jetson-tk1.h
+++ b/include/configs/jetson-tk1.h
@@ -73,7 +73,6 @@
#define CONFIG_RTL8169
/* General networking support */
-#define CONFIG_CMD_NET
#define CONFIG_CMD_DHCP
#include "tegra-common-usb-gadget.h"
diff --git a/include/configs/jornada.h b/include/configs/jornada.h
index 7e18d8e..dd30ba2 100644
--- a/include/configs/jornada.h
+++ b/include/configs/jornada.h
@@ -46,7 +46,6 @@
#include <config_cmd_default.h>
#define CONFIG_CMD_FLASH
#define CONFIG_CMD_JFFS2
-#undef CONFIG_CMD_NET
#undef CONFIG_CMD_NFS
#undef CONFIG_CMD_FPGA
#undef CONFIG_CMD_MISC
diff --git a/include/configs/km/keymile-common.h b/include/configs/km/keymile-common.h
index 517f46a..5649901 100644
--- a/include/configs/km/keymile-common.h
+++ b/include/configs/km/keymile-common.h
@@ -27,7 +27,6 @@
#define CONFIG_CMD_I2C
#define CONFIG_CMD_JFFS2
#define CONFIG_CMD_MTDPARTS
-#define CONFIG_CMD_SETEXPR
#undef CONFIG_WATCHDOG /* disable platform specific watchdog */
diff --git a/include/configs/km/kmp204x-common.h b/include/configs/km/kmp204x-common.h
index b70b5b1..686d2f3 100644
--- a/include/configs/km/kmp204x-common.h
+++ b/include/configs/km/kmp204x-common.h
@@ -406,7 +406,6 @@
* additionnal command line configuration.
*/
#define CONFIG_CMD_PCI
-#define CONFIG_CMD_NET
#define CONFIG_CMD_ERRATA
/* we don't need flash support */
diff --git a/include/configs/koelsch.h b/include/configs/koelsch.h
index 1dffab1..61c015f 100644
--- a/include/configs/koelsch.h
+++ b/include/configs/koelsch.h
@@ -49,7 +49,6 @@
#define CONFIG_SPI_FLASH_SPANSION
/* SH Ether */
-#define CONFIG_NET_MULTI
#define CONFIG_SH_ETHER
#define CONFIG_SH_ETHER_USE_PORT 0
#define CONFIG_SH_ETHER_PHY_ADDR 0x1
diff --git a/include/configs/ks2_evm.h b/include/configs/ks2_evm.h
index 42280ca..036f2cb 100644
--- a/include/configs/ks2_evm.h
+++ b/include/configs/ks2_evm.h
@@ -98,7 +98,6 @@
#define CONFIG_BOOTP_DNS2
#define CONFIG_BOOTP_SEND_HOSTNAME
#define CONFIG_NET_RETRY_COUNT 32
-#define CONFIG_NET_MULTI
#define CONFIG_SYS_SGMII_REFCLK_MHZ 312
#define CONFIG_SYS_SGMII_LINERATE_MHZ 1250
#define CONFIG_SYS_SGMII_RATESCALE 2
diff --git a/include/configs/kwb.h b/include/configs/kwb.h
index d1c745e..acff5b9 100644
--- a/include/configs/kwb.h
+++ b/include/configs/kwb.h
@@ -3,7 +3,7 @@
*
* specific parts for B&R KWB Motherboard
*
- * Copyright (C) 2013 Hannes Petermaier <oe5hpm@oevsv.at> -
+ * Copyright (C) 2013 Hannes Schmelzer <oe5hpm@oevsv.at> -
* Bernecker & Rainer Industrieelektronik GmbH - http://www.br-automation.com
*
* SPDX-License-Identifier: GPL-2.0+
diff --git a/include/configs/kzm9g.h b/include/configs/kzm9g.h
index ac74ae7..7111b08 100644
--- a/include/configs/kzm9g.h
+++ b/include/configs/kzm9g.h
@@ -127,7 +127,6 @@
#define TMU_CLK_DIVIDER (4) /* 4 (default), 16, 64, 256 or 1024 */
/* Ether */
-#define CONFIG_NET_MULTI
#define CONFIG_CMD_PING
#define CONFIG_CMD_DHCP
#define CONFIG_SMC911X
diff --git a/include/configs/lager.h b/include/configs/lager.h
index e830c6d..f121b9c 100644
--- a/include/configs/lager.h
+++ b/include/configs/lager.h
@@ -49,7 +49,6 @@
#define CONFIG_SYS_NO_FLASH
/* SH Ether */
-#define CONFIG_NET_MULTI
#define CONFIG_SH_ETHER
#define CONFIG_SH_ETHER_USE_PORT 0
#define CONFIG_SH_ETHER_PHY_ADDR 0x1
diff --git a/include/configs/lp8x4x.h b/include/configs/lp8x4x.h
index a269372..e3dd5e0 100644
--- a/include/configs/lp8x4x.h
+++ b/include/configs/lp8x4x.h
@@ -46,7 +46,6 @@
*/
#include <config_cmd_default.h>
-#define CONFIG_CMD_NET
#define CONFIG_CMD_ENV
#undef CONFIG_CMD_IMLS
#define CONFIG_CMD_MMC
diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h
index 1a41a2f..ca913b0 100644
--- a/include/configs/ls1021aqds.h
+++ b/include/configs/ls1021aqds.h
@@ -526,18 +526,15 @@
#define CONFIG_SYS_PCIE_MEM_SIZE 0x08000000 /* 128M */
#ifdef CONFIG_PCI
-#define CONFIG_NET_MULTI
#define CONFIG_PCI_PNP
#define CONFIG_E1000
#define CONFIG_PCI_SCAN_SHOW
#define CONFIG_CMD_PCI
-#define CONFIG_CMD_NET
#endif
#define CONFIG_CMD_PING
#define CONFIG_CMD_DHCP
#define CONFIG_CMD_MII
-#define CONFIG_CMD_NET
#define CONFIG_CMDLINE_TAG
#define CONFIG_CMDLINE_EDITING
diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h
index 8ea428e..6b6f2ba 100644
--- a/include/configs/ls1021atwr.h
+++ b/include/configs/ls1021atwr.h
@@ -343,18 +343,15 @@
#define CONFIG_SYS_PCIE_MEM_SIZE 0x08000000 /* 128M */
#ifdef CONFIG_PCI
-#define CONFIG_NET_MULTI
#define CONFIG_PCI_PNP
#define CONFIG_E1000
#define CONFIG_PCI_SCAN_SHOW
#define CONFIG_CMD_PCI
-#define CONFIG_CMD_NET
#endif
#define CONFIG_CMD_PING
#define CONFIG_CMD_DHCP
#define CONFIG_CMD_MII
-#define CONFIG_CMD_NET
#define CONFIG_CMDLINE_TAG
#define CONFIG_CMDLINE_EDITING
diff --git a/include/configs/ls2085a_common.h b/include/configs/ls2085a_common.h
index e270fc8..547026e 100644
--- a/include/configs/ls2085a_common.h
+++ b/include/configs/ls2085a_common.h
@@ -213,7 +213,6 @@
#define CONFIG_CMD_LOADB
#define CONFIG_CMD_MEMORY
#define CONFIG_CMD_MII
-#define CONFIG_CMD_NET
#define CONFIG_CMD_PING
#define CONFIG_CMD_SAVEENV
#define CONFIG_CMD_RUN
diff --git a/include/configs/ls2085aqds.h b/include/configs/ls2085aqds.h
index 711d529..cd2b080 100644
--- a/include/configs/ls2085aqds.h
+++ b/include/configs/ls2085aqds.h
@@ -304,12 +304,10 @@
#define CONFIG_PCIE_LAYERSCAPE /* Use common FSL Layerscape PCIe code */
#ifdef CONFIG_PCI
-#define CONFIG_NET_MULTI
#define CONFIG_PCI_PNP
#define CONFIG_E1000
#define CONFIG_PCI_SCAN_SHOW
#define CONFIG_CMD_PCI
-#define CONFIG_CMD_NET
#endif
/* MMC */
diff --git a/include/configs/ls2085ardb.h b/include/configs/ls2085ardb.h
index d1c2548..0837fcd 100644
--- a/include/configs/ls2085ardb.h
+++ b/include/configs/ls2085ardb.h
@@ -269,12 +269,10 @@
#define CONFIG_PCIE_LAYERSCAPE /* Use common FSL Layerscape PCIe code */
#ifdef CONFIG_PCI
-#define CONFIG_NET_MULTI
#define CONFIG_PCI_PNP
#define CONFIG_E1000
#define CONFIG_PCI_SCAN_SHOW
#define CONFIG_CMD_PCI
-#define CONFIG_CMD_NET
#endif
/* MMC */
diff --git a/include/configs/lsxl.h b/include/configs/lsxl.h
index 490f84e..7d22173 100644
--- a/include/configs/lsxl.h
+++ b/include/configs/lsxl.h
@@ -37,7 +37,6 @@
#define CONFIG_MISC_INIT_R
#define CONFIG_SHOW_BOOT_PROGRESS
-#define CONFIG_LIB_RAND
#define CONFIG_KIRKWOOD_GPIO
#define CONFIG_OF_LIBFDT
diff --git a/include/configs/lwmon5.h b/include/configs/lwmon5.h
index d43db52..799850a 100644
--- a/include/configs/lwmon5.h
+++ b/include/configs/lwmon5.h
@@ -440,7 +440,6 @@
#define CONFIG_CMD_I2C
#define CONFIG_CMD_IRQ
#define CONFIG_CMD_MII
-#define CONFIG_CMD_NET
#define CONFIG_CMD_NFS
#define CONFIG_CMD_PING
#define CONFIG_CMD_REGINFO
diff --git a/include/configs/m28evk.h b/include/configs/m28evk.h
index dbc00ce..eba1b2f 100644
--- a/include/configs/m28evk.h
+++ b/include/configs/m28evk.h
@@ -40,10 +40,8 @@
#define CONFIG_CMD_MMC
#define CONFIG_CMD_NAND
#define CONFIG_CMD_NAND_TRIMFFS
-#define CONFIG_CMD_NET
#define CONFIG_CMD_NFS
#define CONFIG_CMD_PING
-#define CONFIG_CMD_SETEXPR
#define CONFIG_CMD_SF
#define CONFIG_CMD_SPI
#define CONFIG_CMD_USB
diff --git a/include/configs/m53evk.h b/include/configs/m53evk.h
index 0cc1282..2d2b226 100644
--- a/include/configs/m53evk.h
+++ b/include/configs/m53evk.h
@@ -44,10 +44,8 @@
#define CONFIG_CMD_MII
#define CONFIG_CMD_MMC
#define CONFIG_CMD_NAND
-#define CONFIG_CMD_NET
#define CONFIG_CMD_PING
#define CONFIG_CMD_SATA
-#define CONFIG_CMD_SETEXPR
#define CONFIG_CMD_USB
#define CONFIG_VIDEO
diff --git a/include/configs/mcx.h b/include/configs/mcx.h
index de7792a..3405c83 100644
--- a/include/configs/mcx.h
+++ b/include/configs/mcx.h
@@ -152,7 +152,6 @@
#define CONFIG_RTC_DS1337
#define CONFIG_SYS_I2C_RTC_ADDR 0x68
-#define CONFIG_CMD_NET
#define CONFIG_CMD_MII
#define CONFIG_CMD_NFS
/*
diff --git a/include/configs/medcom-wide.h b/include/configs/medcom-wide.h
index f721a4d..b5d72e3 100644
--- a/include/configs/medcom-wide.h
+++ b/include/configs/medcom-wide.h
@@ -46,7 +46,6 @@
#define CONFIG_USB_ETHER_SMSC95XX
/* General networking support */
-#define CONFIG_CMD_NET
#define CONFIG_CMD_DHCP
/* LCD support */
diff --git a/include/configs/microblaze-generic.h b/include/configs/microblaze-generic.h
index b84eead..db463c0 100644
--- a/include/configs/microblaze-generic.h
+++ b/include/configs/microblaze-generic.h
@@ -260,7 +260,6 @@
#endif
#ifndef CONFIG_SYS_ENET
-# undef CONFIG_CMD_NET
# undef CONFIG_CMD_NFS
#else
# define CONFIG_CMD_PING
diff --git a/include/configs/mimc200.h b/include/configs/mimc200.h
index 2fd3add..e8e5ae7 100644
--- a/include/configs/mimc200.h
+++ b/include/configs/mimc200.h
@@ -102,7 +102,6 @@
#define CONFIG_CMD_FAT
#define CONFIG_CMD_JFFS2
#define CONFIG_CMD_MMC
-#define CONFIG_CMD_NET
#define CONFIG_ATMEL_USART
#define CONFIG_MACB
diff --git a/include/configs/minnowmax.h b/include/configs/minnowmax.h
index 2a1915d..547765d 100644
--- a/include/configs/minnowmax.h
+++ b/include/configs/minnowmax.h
@@ -15,8 +15,7 @@
#define CONFIG_SYS_MONITOR_LEN (1 << 20)
#define CONFIG_BOARD_EARLY_INIT_F
-
-#define CONFIG_NR_DRAM_BANKS 1
+#define CONFIG_ARCH_EARLY_INIT_R
#define CONFIG_X86_SERIAL
#define CONFIG_SMSC_LPC47M
@@ -56,9 +55,6 @@
#define CONFIG_X86_OPTION_ROM_FILE vga.bin
#define CONFIG_X86_OPTION_ROM_ADDR 0xfff90000
-#ifndef CONFIG_SYS_COREBOOT
-#define CONFIG_VIDEO_VESA
-#endif
#define VIDEO_IO_OFFSET 0
#define CONFIG_X86EMU_RAW_IO
#define CONFIG_VGA_AS_SINGLE_DEVICE
diff --git a/include/configs/motionpro.h b/include/configs/motionpro.h
index 4d648c8..96a6b89 100644
--- a/include/configs/motionpro.h
+++ b/include/configs/motionpro.h
@@ -48,7 +48,6 @@
#define CONFIG_CMD_IMMAP
#define CONFIG_CMD_JFFS2
#define CONFIG_CMD_MII
-#define CONFIG_CMD_NET
#define CONFIG_CMD_PING
#define CONFIG_CMD_REGINFO
diff --git a/include/configs/mpc8308_p1m.h b/include/configs/mpc8308_p1m.h
index d2ef1af..195bc18 100644
--- a/include/configs/mpc8308_p1m.h
+++ b/include/configs/mpc8308_p1m.h
@@ -403,7 +403,6 @@
#define CONFIG_CMD_DHCP
#define CONFIG_CMD_I2C
#define CONFIG_CMD_MII
-#define CONFIG_CMD_NET
#define CONFIG_CMD_PCI
#define CONFIG_CMD_PING
diff --git a/include/configs/ms7722se.h b/include/configs/ms7722se.h
index 1c8ada6..fb5fcc6 100644
--- a/include/configs/ms7722se.h
+++ b/include/configs/ms7722se.h
@@ -14,7 +14,6 @@
#define CONFIG_CMD_FLASH
#define CONFIG_CMD_JFFS2
-#define CONFIG_CMD_NET
#define CONFIG_CMD_NFS
#define CONFIG_CMD_PING
#define CONFIG_CMD_SDRAM
diff --git a/include/configs/munices.h b/include/configs/munices.h
index e65a14a..535bf2a 100644
--- a/include/configs/munices.h
+++ b/include/configs/munices.h
@@ -31,7 +31,6 @@
#define CONFIG_CMD_ASKENV
#define CONFIG_CMD_ELF
#define CONFIG_CMD_IMMAP
-#define CONFIG_CMD_NET
#define CONFIG_CMD_PING
#define CONFIG_CMD_REGINFO
diff --git a/include/configs/mx23_olinuxino.h b/include/configs/mx23_olinuxino.h
index e377fea..65203a0 100644
--- a/include/configs/mx23_olinuxino.h
+++ b/include/configs/mx23_olinuxino.h
@@ -23,7 +23,6 @@
#define CONFIG_CMD_GPIO
#define CONFIG_CMD_LED
#define CONFIG_CMD_MMC
-#define CONFIG_CMD_NET
#define CONFIG_CMD_USB
/* Memory configuration */
diff --git a/include/configs/mx23evk.h b/include/configs/mx23evk.h
index b496892..273b7d3 100644
--- a/include/configs/mx23evk.h
+++ b/include/configs/mx23evk.h
@@ -16,7 +16,6 @@
/* U-Boot Commands */
#define CONFIG_SYS_NO_FLASH
#include <config_cmd_default.h>
-#undef CONFIG_CMD_NET
#undef CONFIG_CMD_NFS
#define CONFIG_DISPLAY_CPUINFO
diff --git a/include/configs/mx25pdk.h b/include/configs/mx25pdk.h
index bfbfc68..5f61eb1 100644
--- a/include/configs/mx25pdk.h
+++ b/include/configs/mx25pdk.h
@@ -94,7 +94,6 @@
#define CONFIG_FEC_MXC
#define CONFIG_FEC_MXC_PHYADDR 0x1f
#define CONFIG_MII
-#define CONFIG_CMD_NET
#define CONFIG_ENV_OVERWRITE
/* ESDHC driver */
@@ -127,7 +126,6 @@
#define CONFIG_CMD_PING
#define CONFIG_CMD_DHCP
#define CONFIG_CMD_MII
-#define CONFIG_CMD_NET
#define CONFIG_BOOTDELAY 1
diff --git a/include/configs/mx28evk.h b/include/configs/mx28evk.h
index 9daa0bf..bc0ae28 100644
--- a/include/configs/mx28evk.h
+++ b/include/configs/mx28evk.h
@@ -28,11 +28,9 @@
#define CONFIG_CMD_GPIO
#define CONFIG_CMD_MII
#define CONFIG_CMD_MMC
-#define CONFIG_CMD_NET
#define CONFIG_CMD_NFS
#define CONFIG_CMD_PING
#define CONFIG_CMD_SAVEENV
-#define CONFIG_CMD_SETEXPR
#define CONFIG_CMD_SF
#define CONFIG_CMD_SPI
#define CONFIG_CMD_USB
@@ -107,7 +105,6 @@
/* FEC Ethernet on SoC */
#ifdef CONFIG_CMD_NET
#define CONFIG_FEC_MXC
-#define CONFIG_NET_MULTI
#define CONFIG_MX28_FEC_MAC_IN_OCOTP
#endif
diff --git a/include/configs/mx35pdk.h b/include/configs/mx35pdk.h
index 244a9ab..4c71360 100644
--- a/include/configs/mx35pdk.h
+++ b/include/configs/mx35pdk.h
@@ -94,7 +94,6 @@
#define CONFIG_CMD_I2C
#define CONFIG_CMD_SPI
#define CONFIG_CMD_MII
-#define CONFIG_CMD_NET
#define CONFIG_NET_RETRY_COUNT 100
#define CONFIG_CMD_DATE
diff --git a/include/configs/mx51_efikamx.h b/include/configs/mx51_efikamx.h
index fce7ead..e3386ac 100644
--- a/include/configs/mx51_efikamx.h
+++ b/include/configs/mx51_efikamx.h
@@ -41,7 +41,6 @@
#define CONFIG_CMD_FAT
#define CONFIG_CMD_EXT2
#define CONFIG_CMD_IDE
-#define CONFIG_CMD_NET
#define CONFIG_CMD_DATE
#undef CONFIG_CMD_IMLS
diff --git a/include/configs/mx51evk.h b/include/configs/mx51evk.h
index b0c9717..61e8a98 100644
--- a/include/configs/mx51evk.h
+++ b/include/configs/mx51evk.h
@@ -92,7 +92,6 @@
#define CONFIG_CMD_PING
#define CONFIG_CMD_DHCP
#define CONFIG_CMD_MII
-#define CONFIG_CMD_NET
/* USB Configs */
#define CONFIG_CMD_USB
diff --git a/include/configs/mx53ard.h b/include/configs/mx53ard.h
index 7c3dc20..220d4b8 100644
--- a/include/configs/mx53ard.h
+++ b/include/configs/mx53ard.h
@@ -68,7 +68,6 @@
#define CONFIG_CMD_PING
#define CONFIG_CMD_DHCP
#define CONFIG_CMD_MII
-#define CONFIG_CMD_NET
/* allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE
@@ -79,7 +78,6 @@
#include <config_cmd_default.h>
#undef CONFIG_CMD_IMLS
-#define CONFIG_CMD_SETEXPR
#define CONFIG_BOOTDELAY 3
diff --git a/include/configs/mx53evk.h b/include/configs/mx53evk.h
index 22a9fc4..4af9f7e 100644
--- a/include/configs/mx53evk.h
+++ b/include/configs/mx53evk.h
@@ -72,7 +72,6 @@
#define CONFIG_CMD_PING
#define CONFIG_CMD_DHCP
#define CONFIG_CMD_MII
-#define CONFIG_CMD_NET
#define CONFIG_CMD_DATE
/* Miscellaneous commands */
diff --git a/include/configs/mx53loco.h b/include/configs/mx53loco.h
index a56e72e..db551a9 100644
--- a/include/configs/mx53loco.h
+++ b/include/configs/mx53loco.h
@@ -57,7 +57,6 @@
#define CONFIG_CMD_PING
#define CONFIG_CMD_DHCP
#define CONFIG_CMD_MII
-#define CONFIG_CMD_NET
/* USB Configs */
#define CONFIG_CMD_USB
diff --git a/include/configs/mx53smd.h b/include/configs/mx53smd.h
index 0785491..dcc86b4 100644
--- a/include/configs/mx53smd.h
+++ b/include/configs/mx53smd.h
@@ -62,7 +62,6 @@
#define CONFIG_CMD_PING
#define CONFIG_CMD_DHCP
#define CONFIG_CMD_MII
-#define CONFIG_CMD_NET
/* allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE
diff --git a/include/configs/mx6cuboxi.h b/include/configs/mx6cuboxi.h
index 21c3f96..3f99512 100644
--- a/include/configs/mx6cuboxi.h
+++ b/include/configs/mx6cuboxi.h
@@ -31,7 +31,6 @@
#define CONFIG_CMD_PING
#define CONFIG_CMD_DHCP
#define CONFIG_CMD_MII
-#define CONFIG_CMD_NET
#define CONFIG_MII
#define IMX_FEC_BASE ENET_BASE_ADDR
#define CONFIG_FEC_XCV_TYPE RGMII
@@ -81,7 +80,6 @@
"fi;"
/* Command definition */
-#define CONFIG_CMD_SETEXPR
#define CONFIG_MXC_UART_BASE UART1_BASE
#define CONFIG_CONSOLE_DEV "ttymxc0"
diff --git a/include/configs/mx6qarm2.h b/include/configs/mx6qarm2.h
index 20b1f9c..86a0316 100644
--- a/include/configs/mx6qarm2.h
+++ b/include/configs/mx6qarm2.h
@@ -26,7 +26,6 @@
#define CONFIG_CMD_PING
#define CONFIG_CMD_DHCP
#define CONFIG_CMD_MII
-#define CONFIG_CMD_NET
#define CONFIG_FEC_MXC
#define CONFIG_MII
#define IMX_FEC_BASE ENET_BASE_ADDR
diff --git a/include/configs/mx6sabre_common.h b/include/configs/mx6sabre_common.h
index 6a37ae7..c8c9f81 100644
--- a/include/configs/mx6sabre_common.h
+++ b/include/configs/mx6sabre_common.h
@@ -32,7 +32,6 @@
#define CONFIG_CMD_PING
#define CONFIG_CMD_DHCP
#define CONFIG_CMD_MII
-#define CONFIG_CMD_NET
#define CONFIG_FEC_MXC
#define CONFIG_MII
#define IMX_FEC_BASE ENET_BASE_ADDR
@@ -56,7 +55,6 @@
/* Command definition */
#define CONFIG_CMD_BMODE
-#define CONFIG_CMD_SETEXPR
#ifdef CONFIG_SUPPORT_EMMC_BOOT
#define EMMC_ENV \
diff --git a/include/configs/mx6slevk.h b/include/configs/mx6slevk.h
index 2b8bb2a..4b5c637 100644
--- a/include/configs/mx6slevk.h
+++ b/include/configs/mx6slevk.h
@@ -41,7 +41,6 @@
#define CONFIG_CMD_PING
#define CONFIG_CMD_DHCP
#define CONFIG_CMD_MII
-#define CONFIG_CMD_NET
#define CONFIG_FEC_MXC
#define CONFIG_MII
#define IMX_FEC_BASE ENET_BASE_ADDR
diff --git a/include/configs/mx6sxsabresd.h b/include/configs/mx6sxsabresd.h
index 46e1262..63ec7c6 100644
--- a/include/configs/mx6sxsabresd.h
+++ b/include/configs/mx6sxsabresd.h
@@ -140,7 +140,6 @@
#define CONFIG_CMD_PING
#define CONFIG_CMD_DHCP
#define CONFIG_CMD_MII
-#define CONFIG_CMD_NET
#define CONFIG_FEC_MXC
#define CONFIG_MII
diff --git a/include/configs/nhk8815.h b/include/configs/nhk8815.h
index 52cde41..8a6d256 100644
--- a/include/configs/nhk8815.h
+++ b/include/configs/nhk8815.h
@@ -19,7 +19,6 @@
/* commands */
#include <config_cmd_default.h>
-#define CONFIG_CMD_NET
#define CONFIG_CMD_PING
#define CONFIG_CMD_DHCP
#define CONFIG_CMD_NFS
diff --git a/include/configs/nitrogen6x.h b/include/configs/nitrogen6x.h
index 9313b9f..beaa119 100644
--- a/include/configs/nitrogen6x.h
+++ b/include/configs/nitrogen6x.h
@@ -76,7 +76,6 @@
#define CONFIG_CMD_PING
#define CONFIG_CMD_DHCP
#define CONFIG_CMD_MII
-#define CONFIG_CMD_NET
#define CONFIG_FEC_MXC
#define CONFIG_MII
#define IMX_FEC_BASE ENET_BASE_ADDR
@@ -105,7 +104,6 @@
/* Miscellaneous commands */
#define CONFIG_CMD_BMODE
-#define CONFIG_CMD_SETEXPR
/* Framebuffer and LCD */
#define CONFIG_VIDEO
diff --git a/include/configs/nokia_rx51.h b/include/configs/nokia_rx51.h
index 152a6e5..d1bb1a1 100644
--- a/include/configs/nokia_rx51.h
+++ b/include/configs/nokia_rx51.h
@@ -155,7 +155,6 @@
/* commands not needed from config_cmd_default.h */
#undef CONFIG_CMD_FPGA /* FPGA configuration Support */
#undef CONFIG_CMD_IMI /* iminfo */
-#undef CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */
#undef CONFIG_CMD_NFS /* NFS support */
#undef CONFIG_CMD_SAVEENV /* saveenv */
#undef CONFIG_CMD_SETGETDCR /* DCR support on 4xx */
diff --git a/include/configs/novena.h b/include/configs/novena.h
index 1f93269..1dc9d83 100644
--- a/include/configs/novena.h
+++ b/include/configs/novena.h
@@ -26,11 +26,9 @@
#define CONFIG_CMD_I2C
#define CONFIG_CMD_FUSE
#define CONFIG_CMD_MII
-#define CONFIG_CMD_NET
#define CONFIG_CMD_PCI
#define CONFIG_CMD_PING
#define CONFIG_CMD_SATA
-#define CONFIG_CMD_SETEXPR
#define CONFIG_CMD_TIME
#define CONFIG_CMD_USB
#define CONFIG_VIDEO
diff --git a/include/configs/nyan-big.h b/include/configs/nyan-big.h
index caca98b..a92112f 100644
--- a/include/configs/nyan-big.h
+++ b/include/configs/nyan-big.h
@@ -74,7 +74,6 @@
#define CONFIG_USB_ETHER_ASIX
/* General networking support */
-#define CONFIG_CMD_NET
#define CONFIG_CMD_DHCP
#define CONFIG_FIT
diff --git a/include/configs/odroid.h b/include/configs/odroid.h
index 3874baa..69be496 100644
--- a/include/configs/odroid.h
+++ b/include/configs/odroid.h
@@ -198,7 +198,6 @@
#define CONFIG_USB_STORAGE
#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
-#define CONFIG_CMD_NET
#define CONFIG_CMD_PING
#define CONFIG_CMD_DHCP
#define CONFIG_USB_HOST_ETHER
diff --git a/include/configs/omap3_beagle.h b/include/configs/omap3_beagle.h
index f25a940..709528b 100644
--- a/include/configs/omap3_beagle.h
+++ b/include/configs/omap3_beagle.h
@@ -109,7 +109,6 @@
#define CONFIG_USB_STORAGE /* USB storage support */
#define CONFIG_CMD_NAND /* NAND support */
#define CONFIG_CMD_LED /* LED support */
-#define CONFIG_CMD_SETEXPR /* Evaluate expressions */
#define CONFIG_CMD_GPIO /* Enable gpio command */
#define CONFIG_CMD_DHCP
diff --git a/include/configs/omap3_cairo.h b/include/configs/omap3_cairo.h
index 2082679..ed79566 100644
--- a/include/configs/omap3_cairo.h
+++ b/include/configs/omap3_cairo.h
@@ -62,13 +62,11 @@
/* commands to include */
#include <config_cmd_default.h>
-#define CONFIG_CMD_SETEXPR /* Evaluate expressions */
#define CONFIG_CMD_NAND_LOCK_UNLOCK
/* Disable some commands */
#undef CONFIG_CMD_FPGA /* FPGA configuration Support */
#undef CONFIG_CMD_IMI /* iminfo */
-#undef CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */
/*
* TWL4030
diff --git a/include/configs/omap3_evm_quick_mmc.h b/include/configs/omap3_evm_quick_mmc.h
index a7acc1b..27cd9be 100644
--- a/include/configs/omap3_evm_quick_mmc.h
+++ b/include/configs/omap3_evm_quick_mmc.h
@@ -28,7 +28,6 @@
* When revision is statically configured via CONFIG_STATIC_BOARD_REV,
* this option can be removed. Generated binary is leaner by ~16Kbytes.
*/
-#define CONFIG_CMD_NET
/* ----------------------------------------------------------------------------
* Supported U-boot features
diff --git a/include/configs/omap3_evm_quick_nand.h b/include/configs/omap3_evm_quick_nand.h
index c6cad93..124e8c6 100644
--- a/include/configs/omap3_evm_quick_nand.h
+++ b/include/configs/omap3_evm_quick_nand.h
@@ -27,7 +27,6 @@
* When revision is statically configured via CONFIG_STATIC_BOARD_REV,
* this option can be removed. Generated binary is leaner by ~16Kbytes.
*/
-#define CONFIG_CMD_NET
/* ----------------------------------------------------------------------------
* Supported U-boot features
diff --git a/include/configs/omap3_igep00x0.h b/include/configs/omap3_igep00x0.h
index a5e7d8f..8aecb57 100644
--- a/include/configs/omap3_igep00x0.h
+++ b/include/configs/omap3_igep00x0.h
@@ -75,7 +75,6 @@
#endif
#if (CONFIG_MACH_TYPE == MACH_TYPE_IGEP0020) || \
(CONFIG_MACH_TYPE == MACH_TYPE_IGEP0032)
-#define CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */
#endif
#define CONFIG_CMD_DHCP
#define CONFIG_CMD_PING
diff --git a/include/configs/omap3_logic.h b/include/configs/omap3_logic.h
index 13cd35b..6783f68 100644
--- a/include/configs/omap3_logic.h
+++ b/include/configs/omap3_logic.h
@@ -106,10 +106,8 @@
#define CONFIG_CMD_MMC /* MMC support */
#define CONFIG_CMD_NAND /* NAND support */
#define CONFIG_CMD_NAND_LOCK_UNLOCK /* nand (un)lock commands */
-#define CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */
#define CONFIG_CMD_PING
#define CONFIG_CMD_DHCP
-#define CONFIG_CMD_SETEXPR /* Evaluate expressions */
#undef CONFIG_CMD_FLASH /* flinfo, erase, protect */
#undef CONFIG_CMD_FPGA /* FPGA configuration Support */
diff --git a/include/configs/omap3_mvblx.h b/include/configs/omap3_mvblx.h
index b61297f..10d1f77 100644
--- a/include/configs/omap3_mvblx.h
+++ b/include/configs/omap3_mvblx.h
@@ -124,7 +124,6 @@
#define CONFIG_CMD_EEPROM
#define CONFIG_CMD_IMI /* iminfo */
#undef CONFIG_CMD_IMLS /* List all found images */
-#define CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */
#define CONFIG_CMD_NFS /* NFS support */
#define CONFIG_CMD_DHCP
#define CONFIG_CMD_PING
diff --git a/include/configs/omap3_pandora.h b/include/configs/omap3_pandora.h
index 8d3531c..a8af1c5 100644
--- a/include/configs/omap3_pandora.h
+++ b/include/configs/omap3_pandora.h
@@ -64,7 +64,6 @@
#undef CONFIG_CMD_FPGA /* FPGA configuration Support */
#undef CONFIG_CMD_IMI /* iminfo */
#undef CONFIG_CMD_IMLS /* List all found images */
-#undef CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */
#undef CONFIG_CMD_NFS /* NFS support */
/*
diff --git a/include/configs/omap3_sdp3430.h b/include/configs/omap3_sdp3430.h
index 1ca79d4..d97e4d4 100644
--- a/include/configs/omap3_sdp3430.h
+++ b/include/configs/omap3_sdp3430.h
@@ -158,7 +158,6 @@
#define CONFIG_CMD_I2C /* I2C serial bus support */
#define CONFIG_CMD_JFFS2 /* JFFS2 Support */
#define CONFIG_CMD_MMC /* MMC support */
-#define CONFIG_CMD_NET
/* Disabled commands */
#undef CONFIG_CMD_FPGA /* FPGA configuration Support */
diff --git a/include/configs/omap3_zoom1.h b/include/configs/omap3_zoom1.h
index 611cd5e..36a52a9 100644
--- a/include/configs/omap3_zoom1.h
+++ b/include/configs/omap3_zoom1.h
@@ -82,7 +82,6 @@
#undef CONFIG_CMD_FPGA /* FPGA configuration Support */
#undef CONFIG_CMD_IMI /* iminfo */
#undef CONFIG_CMD_IMLS /* List all found images */
-#define CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */
#define CONFIG_CMD_NFS /* NFS support */
#define CONFIG_CMD_PING
#define CONFIG_CMD_DHCP
diff --git a/include/configs/omap4_panda.h b/include/configs/omap4_panda.h
index e97c5e3..3313f96 100644
--- a/include/configs/omap4_panda.h
+++ b/include/configs/omap4_panda.h
@@ -37,7 +37,6 @@
#define CONFIG_CMD_DHCP
#include <configs/ti_omap4_common.h>
-#define CONFIG_CMD_NET
/* GPIO */
#define CONFIG_CMD_GPIO
diff --git a/include/configs/omap5_uevm.h b/include/configs/omap5_uevm.h
index 0ca4e82..4215156 100644
--- a/include/configs/omap5_uevm.h
+++ b/include/configs/omap5_uevm.h
@@ -59,7 +59,6 @@
/* Enabled commands */
#define CONFIG_CMD_DHCP /* DHCP Support */
-#define CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */
#define CONFIG_CMD_NFS /* NFS support */
/* USB Networking options */
diff --git a/include/configs/omapl138_lcdk.h b/include/configs/omapl138_lcdk.h
index 68b4010..91a7413 100644
--- a/include/configs/omapl138_lcdk.h
+++ b/include/configs/omapl138_lcdk.h
@@ -191,7 +191,6 @@
#define CONFIG_BOOTP_DNS2
#define CONFIG_BOOTP_SEND_HOSTNAME
#define CONFIG_NET_RETRY_COUNT 10
-#define CONFIG_NET_MULTI
#endif
/*
@@ -245,7 +244,6 @@
#endif
#ifndef CONFIG_DRIVER_TI_EMAC
-#undef CONFIG_CMD_NET
#undef CONFIG_CMD_DHCP
#undef CONFIG_CMD_MII
#undef CONFIG_CMD_PING
diff --git a/include/configs/origen.h b/include/configs/origen.h
index 8f1e256..5d43229 100644
--- a/include/configs/origen.h
+++ b/include/configs/origen.h
@@ -60,7 +60,6 @@
#define CONFIG_CMD_FS_GENERIC
#define CONFIG_CMD_BOOTZ
#define CONFIG_SUPPORT_RAW_INITRD
-#undef CONFIG_CMD_NET
#undef CONFIG_CMD_NFS
/* MMC SPL */
diff --git a/include/configs/ot1200.h b/include/configs/ot1200.h
index 699b037..2bbf2b9 100644
--- a/include/configs/ot1200.h
+++ b/include/configs/ot1200.h
@@ -102,7 +102,6 @@
#define CONFIG_CMD_PING
#define CONFIG_CMD_DHCP
#define CONFIG_CMD_MII
-#define CONFIG_CMD_NET
#define CONFIG_FEC_MXC
#define CONFIG_MII
#define IMX_FEC_BASE ENET_BASE_ADDR
@@ -124,7 +123,6 @@
/* Miscellaneous commands */
#define CONFIG_CMD_BMODE
-#define CONFIG_CMD_SETEXPR
#define CONFIG_PREBOOT ""
diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h
index a5f9717..b51379e 100644
--- a/include/configs/p1_p2_rdb_pc.h
+++ b/include/configs/p1_p2_rdb_pc.h
@@ -775,7 +775,6 @@
#define CONFIG_PCI_PNP /* do pci plug-and-play */
#define CONFIG_E1000 /* Defind e1000 pci Ethernet card*/
#define CONFIG_CMD_PCI
-#define CONFIG_CMD_NET
#define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */
#define CONFIG_DOS_PARTITION
@@ -906,7 +905,6 @@
#define CONFIG_CMD_MII
#define CONFIG_CMD_DATE
#define CONFIG_CMD_ELF
-#define CONFIG_CMD_SETEXPR
#define CONFIG_CMD_REGINFO
/*
diff --git a/include/configs/p1_twr.h b/include/configs/p1_twr.h
index 9864c15..58dc98a 100644
--- a/include/configs/p1_twr.h
+++ b/include/configs/p1_twr.h
@@ -302,11 +302,9 @@
#define CONFIG_SYS_PCIE1_IO_PHYS 0xffc00000
#define CONFIG_SYS_PCIE1_IO_SIZE 0x00010000 /* 64k */
-#define CONFIG_NET_MULTI
#define CONFIG_PCI_PNP /* do pci plug-and-play */
#define CONFIG_E1000 /* Defind e1000 pci Ethernet card*/
#define CONFIG_CMD_PCI
-#define CONFIG_CMD_NET
#define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */
#define CONFIG_DOS_PARTITION
@@ -314,10 +312,6 @@
#if defined(CONFIG_TSEC_ENET)
-#ifndef CONFIG_NET_MULTI
-#define CONFIG_NET_MULTI
-#endif
-
#define CONFIG_MII /* MII PHY management */
#define CONFIG_TSEC1
#define CONFIG_TSEC1_NAME "eTSEC1"
@@ -435,7 +429,6 @@
#define CONFIG_CMD_I2C
#define CONFIG_CMD_MII
#define CONFIG_CMD_ELF
-#define CONFIG_CMD_SETEXPR
#define CONFIG_CMD_REGINFO
/*
diff --git a/include/configs/p3p440.h b/include/configs/p3p440.h
index 225567b..4433c7c 100644
--- a/include/configs/p3p440.h
+++ b/include/configs/p3p440.h
@@ -181,7 +181,6 @@
#define CONFIG_CMD_I2C
#define CONFIG_CMD_IRQ
#define CONFIG_CMD_MII
-#define CONFIG_CMD_NET
#define CONFIG_CMD_NFS
#define CONFIG_CMD_PCI
#define CONFIG_CMD_PING
diff --git a/include/configs/palmld.h b/include/configs/palmld.h
index 7dbc9ae..b54c016 100644
--- a/include/configs/palmld.h
+++ b/include/configs/palmld.h
@@ -52,7 +52,6 @@
*/
#include <config_cmd_default.h>
-#undef CONFIG_CMD_NET
#undef CONFIG_CMD_NFS
#define CONFIG_CMD_ENV
#undef CONFIG_CMD_IMLS
diff --git a/include/configs/palmtc.h b/include/configs/palmtc.h
index 75506b2..965200a 100644
--- a/include/configs/palmtc.h
+++ b/include/configs/palmtc.h
@@ -56,7 +56,6 @@
*/
#include <config_cmd_default.h>
-#undef CONFIG_CMD_NET
#undef CONFIG_CMD_NFS
#define CONFIG_CMD_ENV
#define CONFIG_CMD_MMC
diff --git a/include/configs/palmtreo680.h b/include/configs/palmtreo680.h
index bd0f44b..3817815 100644
--- a/include/configs/palmtreo680.h
+++ b/include/configs/palmtreo680.h
@@ -43,7 +43,6 @@
#include <config_cmd_default.h>
#undef CONFIG_CMD_FPGA
#undef CONFIG_CMD_LOADS
-#undef CONFIG_CMD_NET
#undef CONFIG_CMD_NFS
#undef CONFIG_CMD_IMLS
#undef CONFIG_CMD_FLASH
diff --git a/include/configs/paz00.h b/include/configs/paz00.h
index 284419f..0bdeccc 100644
--- a/include/configs/paz00.h
+++ b/include/configs/paz00.h
@@ -53,7 +53,6 @@
#define CONFIG_USB_ETHER_ASIX
/* General networking support */
-#define CONFIG_CMD_NET
#define CONFIG_CMD_DHCP
/* LCD support */
diff --git a/include/configs/pcm051.h b/include/configs/pcm051.h
index c0bb227..45c2df6 100644
--- a/include/configs/pcm051.h
+++ b/include/configs/pcm051.h
@@ -163,10 +163,6 @@
#define CONFIG_USB_ETH_RNDIS
#endif /* CONFIG_MUSB_GADGET */
-/* Unsupported features */
-#undef CONFIG_USE_IRQ
-
-#define CONFIG_NET_MULTI
#define CONFIG_PHY_GIGE
#define CONFIG_PHYLIB
#define CONFIG_PHY_SMSC
diff --git a/include/configs/pcs440ep.h b/include/configs/pcs440ep.h
index e6e06f2..3cadf34 100644
--- a/include/configs/pcs440ep.h
+++ b/include/configs/pcs440ep.h
@@ -260,7 +260,6 @@
#define CONFIG_CMD_IDE
#define CONFIG_CMD_IRQ
#define CONFIG_CMD_MII
-#define CONFIG_CMD_NET
#define CONFIG_CMD_NFS
#define CONFIG_CMD_PCI
#define CONFIG_CMD_PING
diff --git a/include/configs/platinum.h b/include/configs/platinum.h
index 5ab22e7..fd19461 100644
--- a/include/configs/platinum.h
+++ b/include/configs/platinum.h
@@ -29,7 +29,6 @@
#define CONFIG_CMD_MTDPARTS
#define CONFIG_CMD_NAND
#define CONFIG_CMD_NAND_TRIMFFS
-#define CONFIG_CMD_NET
#define CONFIG_CMD_PING
#define CONFIG_CMD_TIME
#define CONFIG_CMD_UBI
diff --git a/include/configs/plutux.h b/include/configs/plutux.h
index 6878ed7..7f7ea97 100644
--- a/include/configs/plutux.h
+++ b/include/configs/plutux.h
@@ -46,7 +46,6 @@
#define CONFIG_USB_ETHER_SMSC95XX
/* General networking support */
-#define CONFIG_CMD_NET
#define CONFIG_CMD_DHCP
/* support the new (FDT-based) image format */
diff --git a/include/configs/porter.h b/include/configs/porter.h
index 9703c84..f85d39c 100644
--- a/include/configs/porter.h
+++ b/include/configs/porter.h
@@ -50,7 +50,6 @@
#define CONFIG_SYS_NO_FLASH
/* SH Ether */
-#define CONFIG_NET_MULTI
#define CONFIG_SH_ETHER
#define CONFIG_SH_ETHER_USE_PORT 0
#define CONFIG_SH_ETHER_PHY_ADDR 0x1
diff --git a/include/configs/qemu-ppce500.h b/include/configs/qemu-ppce500.h
index 7071849..cf9e2ff 100644
--- a/include/configs/qemu-ppce500.h
+++ b/include/configs/qemu-ppce500.h
@@ -135,7 +135,6 @@
#ifdef CONFIG_PCI
#define CONFIG_PCI_INDIRECT_BRIDGE
-#define CONFIG_NET_MULTI
#define CONFIG_PCI_PNP /* do pci plug-and-play */
#define CONFIG_E1000
@@ -167,11 +166,9 @@
#define CONFIG_CMD_GREPENV
#define CONFIG_CMD_IRQ
#define CONFIG_CMD_PING
-#define CONFIG_CMD_SETEXPR
#ifdef CONFIG_PCI
#define CONFIG_CMD_PCI
-#define CONFIG_CMD_NET
#endif
/*
diff --git a/include/configs/qemu-x86.h b/include/configs/qemu-x86.h
new file mode 100644
index 0000000..78c296f
--- /dev/null
+++ b/include/configs/qemu-x86.h
@@ -0,0 +1,77 @@
+/*
+ * Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+/*
+ * board/config.h - configuration options, board specific
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+#include <configs/x86-common.h>
+
+#define CONFIG_SYS_MONITOR_LEN (1 << 20)
+#define CONFIG_ARCH_MISC_INIT
+
+#define CONFIG_X86_SERIAL
+
+#define CONFIG_PCI_MEM_BUS 0xc0000000
+#define CONFIG_PCI_MEM_PHYS CONFIG_PCI_MEM_BUS
+#define CONFIG_PCI_MEM_SIZE 0x10000000
+
+#define CONFIG_PCI_PREF_BUS 0xd0000000
+#define CONFIG_PCI_PREF_PHYS CONFIG_PCI_PREF_BUS
+#define CONFIG_PCI_PREF_SIZE 0x10000000
+
+#define CONFIG_PCI_IO_BUS 0x2000
+#define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS
+#define CONFIG_PCI_IO_SIZE 0xe000
+
+#define CONFIG_PCI_CONFIG_HOST_BRIDGE
+#define CONFIG_PCI_PNP
+#define CONFIG_E1000
+
+#define CONFIG_STD_DEVICES_SETTINGS "stdin=serial,vga\0" \
+ "stdout=serial,vga\0" \
+ "stderr=serial,vga\0"
+
+/*
+ * ATA/SATA support for QEMU x86 targets
+ * - Only legacy IDE controller is supported for QEMU '-M pc' target
+ * - AHCI controller is supported for QEMU '-M q35' target
+ *
+ * Default configuraion is to support the QEMU default x86 target
+ * Undefine CONFIG_CMD_IDE to support q35 target
+ */
+#define CONFIG_CMD_IDE
+#ifdef CONFIG_CMD_IDE
+#define CONFIG_SYS_IDE_MAXBUS 2
+#define CONFIG_SYS_IDE_MAXDEVICE 4
+#define CONFIG_SYS_ATA_BASE_ADDR 0
+#define CONFIG_SYS_ATA_DATA_OFFSET 0
+#define CONFIG_SYS_ATA_REG_OFFSET 0
+#define CONFIG_SYS_ATA_ALT_OFFSET 0
+#define CONFIG_SYS_ATA_IDE0_OFFSET 0x1f0
+#define CONFIG_SYS_ATA_IDE1_OFFSET 0x170
+#define CONFIG_ATAPI
+
+#undef CONFIG_SCSI_AHCI
+#undef CONFIG_CMD_SCSI
+#else
+#define CONFIG_SCSI_DEV_LIST \
+ {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH9_AHCI}
+#endif
+
+/* GPIO is not supported */
+#undef CONFIG_INTEL_ICH6_GPIO
+#undef CONFIG_CMD_GPIO
+
+/* SPI is not supported */
+#undef CONFIG_ICH_SPI
+#undef CONFIG_ENV_IS_IN_SPI_FLASH
+#define CONFIG_ENV_IS_NOWHERE
+
+#endif /* __CONFIG_H */
diff --git a/include/configs/qong.h b/include/configs/qong.h
index d383fe8..8a9847e 100644
--- a/include/configs/qong.h
+++ b/include/configs/qong.h
@@ -119,9 +119,7 @@
#define CONFIG_CMD_DHCP
#define CONFIG_CMD_MII
#define CONFIG_CMD_NAND
-#define CONFIG_CMD_NET
#define CONFIG_CMD_PING
-#define CONFIG_CMD_SETEXPR
#define CONFIG_CMD_SPI
#define CONFIG_CMD_UNZIP
diff --git a/include/configs/r0p7734.h b/include/configs/r0p7734.h
index a71709b..708647e 100644
--- a/include/configs/r0p7734.h
+++ b/include/configs/r0p7734.h
@@ -20,7 +20,6 @@
#define CONFIG_CMD_FLASH
#define CONFIG_CMD_MEMORY
-#define CONFIG_CMD_NET
#define CONFIG_CMD_PING
#define CONFIG_CMD_MII
#define CONFIG_CMD_NFS
diff --git a/include/configs/r2dplus.h b/include/configs/r2dplus.h
index 24d0c34..5371a65 100644
--- a/include/configs/r2dplus.h
+++ b/include/configs/r2dplus.h
@@ -16,7 +16,6 @@
#define CONFIG_CMD_CACHE
#define CONFIG_CMD_FLASH
#define CONFIG_CMD_PCI
-#define CONFIG_CMD_NET
#define CONFIG_CMD_PING
#define CONFIG_CMD_IDE
#define CONFIG_CMD_EXT2
diff --git a/include/configs/r7780mp.h b/include/configs/r7780mp.h
index 8156724..9c62a04 100644
--- a/include/configs/r7780mp.h
+++ b/include/configs/r7780mp.h
@@ -23,7 +23,6 @@
#define CONFIG_CMD_FLASH
#define CONFIG_CMD_MEMORY
#define CONFIG_CMD_PCI
-#define CONFIG_CMD_NET
#define CONFIG_CMD_PING
#define CONFIG_CMD_SAVEENV
#define CONFIG_CMD_NFS
diff --git a/include/configs/rcar-gen2-common.h b/include/configs/rcar-gen2-common.h
index c33f1cb..3845e60 100644
--- a/include/configs/rcar-gen2-common.h
+++ b/include/configs/rcar-gen2-common.h
@@ -18,7 +18,6 @@
#define CONFIG_CMD_SDRAM
#define CONFIG_CMD_RUN
#define CONFIG_CMD_LOADS
-#define CONFIG_CMD_NET
#define CONFIG_CMD_MII
#define CONFIG_CMD_PING
#define CONFIG_CMD_DHCP
diff --git a/include/configs/rpi-common.h b/include/configs/rpi-common.h
index 3121ac9..b54cf8b 100644
--- a/include/configs/rpi-common.h
+++ b/include/configs/rpi-common.h
@@ -8,12 +8,18 @@
#define _RPI_COMMON_H_
#include <linux/sizes.h>
+#include <asm/arch/timer.h>
/* Architecture, CPU, etc.*/
#define CONFIG_SYS_GENERIC_BOARD
#define CONFIG_BCM2835
#define CONFIG_ARCH_CPU_INIT
#define CONFIG_SYS_DCACHE_OFF
+
+#define CONFIG_SYS_TIMER_RATE 1000000
+#define CONFIG_SYS_TIMER_COUNTER \
+ (&((struct bcm2835_timer_regs *)BCM2835_TIMER_PHYSADDR)->clo)
+
/*
* 2835 is a SKU in a series for which the 2708 is the first or primary SoC,
* so 2708 has historically been used rather than a dedicated 2835 ID.
diff --git a/include/configs/rsk7203.h b/include/configs/rsk7203.h
index e7f7387..fc8e967 100644
--- a/include/configs/rsk7203.h
+++ b/include/configs/rsk7203.h
@@ -15,7 +15,6 @@
#define CONFIG_RSK7203 1
#define CONFIG_CMD_FLASH
-#define CONFIG_CMD_NET
#define CONFIG_CMD_NFS
#define CONFIG_CMD_PING
#define CONFIG_CMD_SAVEENV
diff --git a/include/configs/s5p_goni.h b/include/configs/s5p_goni.h
index 8fadc68..16770f0 100644
--- a/include/configs/s5p_goni.h
+++ b/include/configs/s5p_goni.h
@@ -66,7 +66,6 @@
#undef CONFIG_CMD_FPGA
#undef CONFIG_CMD_MISC
-#undef CONFIG_CMD_NET
#undef CONFIG_CMD_NFS
#undef CONFIG_CMD_XIMG
#define CONFIG_CMD_CACHE
diff --git a/include/configs/sama5d3_xplained.h b/include/configs/sama5d3_xplained.h
index bfd8aa7..c4141a0 100644
--- a/include/configs/sama5d3_xplained.h
+++ b/include/configs/sama5d3_xplained.h
@@ -74,7 +74,6 @@
/* Ethernet Hardware */
#define CONFIG_MACB
#define CONFIG_RMII
-#define CONFIG_NET_MULTI
#define CONFIG_NET_RETRY_COUNT 20
#define CONFIG_MACB_SEARCH_PHY
#define CONFIG_RGMII
diff --git a/include/configs/sc_sps_1.h b/include/configs/sc_sps_1.h
index 16d2e2d..0c4ca21 100644
--- a/include/configs/sc_sps_1.h
+++ b/include/configs/sc_sps_1.h
@@ -27,10 +27,8 @@
#define CONFIG_CMD_GPIO
#define CONFIG_CMD_MII
#define CONFIG_CMD_MMC
-#define CONFIG_CMD_NET
#define CONFIG_CMD_NFS
#define CONFIG_CMD_PING
-#define CONFIG_CMD_SETEXPR
#define CONFIG_CMD_USB
/* Memory configuration */
diff --git a/include/configs/scb9328.h b/include/configs/scb9328.h
index 6cac99e..ecb372f 100644
--- a/include/configs/scb9328.h
+++ b/include/configs/scb9328.h
@@ -32,7 +32,6 @@
*/
#include <config_cmd_default.h>
-#define CONFIG_CMD_NET
#define CONFIG_CMD_PING
#define CONFIG_CMD_DHCP
diff --git a/include/configs/seaboard.h b/include/configs/seaboard.h
index 78ff651..fdeffb5 100644
--- a/include/configs/seaboard.h
+++ b/include/configs/seaboard.h
@@ -57,7 +57,6 @@
#define CONFIG_USB_ETHER_ASIX
/* General networking support */
-#define CONFIG_CMD_NET
#define CONFIG_CMD_DHCP
/* Enable keyboard */
diff --git a/include/configs/secomx6quq7.h b/include/configs/secomx6quq7.h
index 72b13a6..114d1fd 100644
--- a/include/configs/secomx6quq7.h
+++ b/include/configs/secomx6quq7.h
@@ -23,7 +23,6 @@
/* Command definition */
#define CONFIG_CMD_BMODE
-#define CONFIG_CMD_SETEXPR
#define CONFIG_SYS_MEMTEST_START 0x10000000
#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 500 * SZ_1M)
@@ -36,7 +35,6 @@
#define CONFIG_CMD_PING
#define CONFIG_CMD_DHCP
#define CONFIG_CMD_MII
-#define CONFIG_CMD_NET
#define CONFIG_FEC_MXC
#define CONFIG_MII
#define IMX_FEC_BASE ENET_BASE_ADDR
diff --git a/include/configs/sh7752evb.h b/include/configs/sh7752evb.h
index 2d509a9..d7bc751 100644
--- a/include/configs/sh7752evb.h
+++ b/include/configs/sh7752evb.h
@@ -17,7 +17,6 @@
#define CONFIG_SYS_LDSCRIPT "board/renesas/sh7752evb/u-boot.lds"
#define CONFIG_CMD_MEMORY
-#define CONFIG_CMD_NET
#define CONFIG_CMD_MII
#define CONFIG_CMD_PING
#define CONFIG_CMD_NFS
diff --git a/include/configs/sh7753evb.h b/include/configs/sh7753evb.h
index c31dd7a..2124e0f 100644
--- a/include/configs/sh7753evb.h
+++ b/include/configs/sh7753evb.h
@@ -17,7 +17,6 @@
#define CONFIG_SYS_LDSCRIPT "board/renesas/sh7753evb/u-boot.lds"
#define CONFIG_CMD_MEMORY
-#define CONFIG_CMD_NET
#define CONFIG_CMD_MII
#define CONFIG_CMD_PING
#define CONFIG_CMD_NFS
diff --git a/include/configs/sh7757lcr.h b/include/configs/sh7757lcr.h
index 36afd5f..fd6a1df 100644
--- a/include/configs/sh7757lcr.h
+++ b/include/configs/sh7757lcr.h
@@ -18,7 +18,6 @@
#define CONFIG_SYS_LDSCRIPT "board/renesas/sh7757lcr/u-boot.lds"
#define CONFIG_CMD_MEMORY
-#define CONFIG_CMD_NET
#define CONFIG_CMD_MII
#define CONFIG_CMD_PING
#define CONFIG_CMD_NFS
diff --git a/include/configs/sh7763rdp.h b/include/configs/sh7763rdp.h
index 2438318..27ad96e 100644
--- a/include/configs/sh7763rdp.h
+++ b/include/configs/sh7763rdp.h
@@ -20,7 +20,6 @@
#define CONFIG_CMD_SDRAM
#define CONFIG_CMD_FLASH
#define CONFIG_CMD_MEMORY
-#define CONFIG_CMD_NET
#define CONFIG_CMD_MII
#define CONFIG_CMD_PING
#define CONFIG_CMD_SAVEENV
diff --git a/include/configs/sh7785lcr.h b/include/configs/sh7785lcr.h
index 2723eaf..9f42ae1 100644
--- a/include/configs/sh7785lcr.h
+++ b/include/configs/sh7785lcr.h
@@ -16,7 +16,6 @@
#define CONFIG_CMD_FLASH
#define CONFIG_CMD_MEMORY
#define CONFIG_CMD_PCI
-#define CONFIG_CMD_NET
#define CONFIG_CMD_PING
#define CONFIG_CMD_NFS
#define CONFIG_CMD_SDRAM
diff --git a/include/configs/shmin.h b/include/configs/shmin.h
index 4d38f6c..8c02afe 100644
--- a/include/configs/shmin.h
+++ b/include/configs/shmin.h
@@ -18,7 +18,6 @@
#define CONFIG_CMD_FLASH
#define CONFIG_CMD_MEMORY
#define CONFIG_CMD_SDRAM
-#define CONFIG_CMD_NET
#define CONFIG_CMD_PING
#define CONFIG_CMD_NFS
#define CONFIG_CMD_ENV
diff --git a/include/configs/siemens-am33x-common.h b/include/configs/siemens-am33x-common.h
index c7affd6..f086e73 100644
--- a/include/configs/siemens-am33x-common.h
+++ b/include/configs/siemens-am33x-common.h
@@ -290,7 +290,6 @@
/* Unsupported features */
#undef CONFIG_USE_IRQ
-#define CONFIG_CMD_NET
#define CONFIG_CMD_DHCP
#define CONFIG_CMD_PING
#define CONFIG_DRIVER_TI_CPSW
@@ -305,7 +304,6 @@
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_SUBNETMASK
#define CONFIG_NET_RETRY_COUNT 10
-#define CONFIG_NET_MULTI
#define CONFIG_NAND
/* NAND support */
diff --git a/include/configs/silk.h b/include/configs/silk.h
index 161e0a5..ccfcede 100644
--- a/include/configs/silk.h
+++ b/include/configs/silk.h
@@ -50,7 +50,6 @@
#define CONFIG_SYS_NO_FLASH
/* SH Ether */
-#define CONFIG_NET_MULTI
#define CONFIG_SH_ETHER
#define CONFIG_SH_ETHER_USE_PORT 0
#define CONFIG_SH_ETHER_PHY_ADDR 0x1
diff --git a/include/configs/smdkv310.h b/include/configs/smdkv310.h
index 655025c..d26e5ec 100644
--- a/include/configs/smdkv310.h
+++ b/include/configs/smdkv310.h
@@ -45,7 +45,6 @@
#define CONFIG_CMD_PING
#define CONFIG_CMD_ELF
#define CONFIG_CMD_DHCP
-#define CONFIG_CMD_NET
/* MMC SPL */
#define CONFIG_SKIP_LOWLEVEL_INIT
diff --git a/include/configs/socfpga_arria5.h b/include/configs/socfpga_arria5.h
index b8e1c47..70ee4c9 100644
--- a/include/configs/socfpga_arria5.h
+++ b/include/configs/socfpga_arria5.h
@@ -31,9 +31,7 @@
#define CONFIG_CMD_GREPENV
#define CONFIG_CMD_MII
#define CONFIG_CMD_MMC
-#define CONFIG_CMD_NET
#define CONFIG_CMD_PING
-#define CONFIG_CMD_SETEXPR
#define CONFIG_CMD_USB
#define CONFIG_CMD_USB_MASS_STORAGE
diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h
index e742acf..5ba2f6a 100644
--- a/include/configs/socfpga_common.h
+++ b/include/configs/socfpga_common.h
@@ -97,7 +97,6 @@
* Ethernet on SoC (EMAC)
*/
#if defined(CONFIG_CMD_NET) && !defined(CONFIG_SOCFPGA_VIRTUAL_TARGET)
-#define CONFIG_NET_MULTI
#define CONFIG_DW_ALTDESCRIPTOR
#define CONFIG_MII
#define CONFIG_AUTONEG_TIMEOUT (15 * CONFIG_SYS_HZ)
diff --git a/include/configs/socfpga_cyclone5.h b/include/configs/socfpga_cyclone5.h
index 1227711..e321381 100644
--- a/include/configs/socfpga_cyclone5.h
+++ b/include/configs/socfpga_cyclone5.h
@@ -31,9 +31,7 @@
#define CONFIG_CMD_GREPENV
#define CONFIG_CMD_MII
#define CONFIG_CMD_MMC
-#define CONFIG_CMD_NET
#define CONFIG_CMD_PING
-#define CONFIG_CMD_SETEXPR
#define CONFIG_CMD_USB
#define CONFIG_CMD_USB_MASS_STORAGE
diff --git a/include/configs/spear-common.h b/include/configs/spear-common.h
index 409cf54..30a3f50 100644
--- a/include/configs/spear-common.h
+++ b/include/configs/spear-common.h
@@ -18,7 +18,6 @@
/* Ethernet driver configuration */
#define CONFIG_MII
-#define CONFIG_NET_MULTI
#define CONFIG_PHYLIB
#define CONFIG_PHY_RESET_DELAY 10000 /* in usec */
#define CONFIG_PHY_GIGE /* Include GbE speed/duplex detection */
@@ -109,7 +108,6 @@
#define CONFIG_CMD_MEMORY
#define CONFIG_CMD_RUN
#define CONFIG_CMD_SAVES
-#define CONFIG_CMD_NET
#define CONFIG_CMD_MII
#define CONFIG_CMD_PING
#define CONFIG_CMD_DHCP
diff --git a/include/configs/stamp9g20.h b/include/configs/stamp9g20.h
index 01085dc..5d51abf 100644
--- a/include/configs/stamp9g20.h
+++ b/include/configs/stamp9g20.h
@@ -248,7 +248,6 @@
# define CONFIG_CMD_DHCP
#else
# undef CONFIG_CMD_BOOTD
-# undef CONFIG_CMD_NET
# undef CONFIG_CMD_NFS
#endif /* CONFIG_MACB */
diff --git a/include/configs/stv0991.h b/include/configs/stv0991.h
index e75e661..888d29c 100644
--- a/include/configs/stv0991.h
+++ b/include/configs/stv0991.h
@@ -54,7 +54,6 @@
#define CONFIG_MII
#define CONFIG_PHYLIB
-#define CONFIG_CMD_NET
#define CONFIG_DW_ALTDESCRIPTOR
#define CONFIG_PHY_MICREL
diff --git a/include/configs/sun4i.h b/include/configs/sun4i.h
index ea079eb..a3c9408 100644
--- a/include/configs/sun4i.h
+++ b/include/configs/sun4i.h
@@ -18,6 +18,7 @@
#endif
#define CONFIG_SUNXI_USB_PHYS 3
+#define CONFIG_NAND_SUNXI_GPC_PORTS {16, 17, 18, 19, 20, 21, 22, 24}
/*
* Include common sunxi configuration where most the settings are
diff --git a/include/configs/sun5i.h b/include/configs/sun5i.h
index d257659..8e13df5 100644
--- a/include/configs/sun5i.h
+++ b/include/configs/sun5i.h
@@ -19,6 +19,9 @@
#define CONFIG_SUNXI_USB_PHYS 2
+/* \todo A13 only defines port 19, whereas A10s requires each of these */
+#define CONFIG_NAND_SUNXI_GPC_PORTS {16, 17, 18, 19}
+
/*
* Include common sunxi configuration where most the settings are
*/
diff --git a/include/configs/sun6i.h b/include/configs/sun6i.h
index 2c24bd2..a0ebc7e 100644
--- a/include/configs/sun6i.h
+++ b/include/configs/sun6i.h
@@ -22,6 +22,13 @@
#define CONFIG_SUNXI_USB_PHYS 3
+#define CONFIG_ARMV7_PSCI 1
+#define CONFIG_ARMV7_PSCI_NR_CPUS 4
+#define CONFIG_ARMV7_SECURE_BASE SUNXI_SRAM_B_BASE
+#define CONFIG_TIMER_CLK_FREQ 24000000
+
+#define CONFIG_NAND_SUNXI_GPC_PORTS {24, 25, 26}
+
/*
* Include common sunxi configuration where most the settings are
*/
diff --git a/include/configs/sun7i.h b/include/configs/sun7i.h
index 56101a9..3d26ce8 100644
--- a/include/configs/sun7i.h
+++ b/include/configs/sun7i.h
@@ -24,6 +24,8 @@
#define CONFIG_ARMV7_SECURE_BASE SUNXI_SRAM_B_BASE
#define CONFIG_TIMER_CLK_FREQ 24000000
+#define CONFIG_NAND_SUNXI_GPC_PORTS {16, 17, 18, 19, 20, 21, 22, 24}
+
/*
* Include common sunxi configuration where most the settings are
*/
diff --git a/include/configs/sun8i.h b/include/configs/sun8i.h
index 7111c63..fe8c511 100644
--- a/include/configs/sun8i.h
+++ b/include/configs/sun8i.h
@@ -20,6 +20,18 @@
#define CONFIG_SUNXI_USB_PHYS 2
+#define CONFIG_ARMV7_PSCI 1
+#if defined(CONFIG_MACH_SUN8I_A23)
+#define CONFIG_ARMV7_PSCI_NR_CPUS 2
+#define CONFIG_NAND_SUNXI_GPC_PORTS {16, 17, 18}
+#elif defined(CONFIG_MACH_SUN8I_A33)
+#define CONFIG_ARMV7_PSCI_NR_CPUS 4
+#define CONFIG_NAND_SUNXI_GPC_PORTS {16}
+#else
+#error Unsupported sun8i variant
+#endif
+#define CONFIG_TIMER_CLK_FREQ 24000000
+
/*
* Include common sunxi configuration where most the settings are
*/
diff --git a/include/configs/sun9i.h b/include/configs/sun9i.h
new file mode 100644
index 0000000..cd9e08d
--- /dev/null
+++ b/include/configs/sun9i.h
@@ -0,0 +1,21 @@
+/*
+ * (C) Copyright 2015 Hans de Goede <hdegoede@redhat.com>
+ *
+ * Configuration settings for the Allwinner A80 (sun9i) CPU
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+/*
+ * A80 specific configuration
+ */
+
+/*
+ * Include common sunxi configuration where most the settings are
+ */
+#include <configs/sunxi-common.h>
+
+#endif /* __CONFIG_H */
diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h
index d829899..07db736 100644
--- a/include/configs/sunxi-common.h
+++ b/include/configs/sunxi-common.h
@@ -13,6 +13,8 @@
#ifndef _SUNXI_COMMON_CONFIG_H
#define _SUNXI_COMMON_CONFIG_H
+#include <linux/stringify.h>
+
#ifdef CONFIG_OLD_SUNXI_KERNEL_COMPAT
/*
* The U-Boot workarounds bugs in the outdated buggy sunxi-3.4 kernels at the
@@ -39,8 +41,6 @@
#include <asm/arch/cpu.h> /* get chip and board defs */
-#define CONFIG_SYS_TEXT_BASE 0x4a000000
-
#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_DM_SERIAL)
# define CONFIG_DW_SERIAL
#endif
@@ -69,10 +69,48 @@
/* CPU */
#define CONFIG_SYS_CACHELINE_SIZE 64
-/* DRAM Base */
+/*
+ * The DRAM Base differs between some models. We cannot use macros for the
+ * CONFIG_FOO defines which contain the DRAM base address since they end
+ * up unexpanded in include/autoconf.mk .
+ *
+ * So we have to have this #ifdef #else #endif block for these.
+ */
+#ifdef CONFIG_MACH_SUN9I
+#define SDRAM_OFFSET(x) 0x2##x
+#define CONFIG_SYS_SDRAM_BASE 0x20000000
+#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* default load address */
+#define CONFIG_SYS_TEXT_BASE 0x2a000000
+#define CONFIG_PRE_CON_BUF_ADDR 0x2f000000
+#define CONFIG_SYS_SPL_MALLOC_START 0x2ff00000
+#define CONFIG_SPL_BSS_START_ADDR 0x2ff80000
+#else
+#define SDRAM_OFFSET(x) 0x4##x
#define CONFIG_SYS_SDRAM_BASE 0x40000000
+#define CONFIG_SYS_LOAD_ADDR 0x42000000 /* default load address */
+#define CONFIG_SYS_TEXT_BASE 0x4a000000
+#define CONFIG_PRE_CON_BUF_ADDR 0x4f000000
+#define CONFIG_SYS_SPL_MALLOC_START 0x4ff00000
+#define CONFIG_SPL_BSS_START_ADDR 0x4ff80000
+#endif
+
+#define CONFIG_SPL_BSS_MAX_SIZE 0x00080000 /* 512 KiB */
+#define CONFIG_SYS_SPL_MALLOC_SIZE 0x00080000 /* 512 KiB */
+
+#ifdef CONFIG_MACH_SUN9I
+/*
+ * The A80's A1 sram starts at 0x00010000 rather then at 0x00000000 and is
+ * slightly bigger. Note that it is possible to map the first 32 KiB of the
+ * A1 at 0x00000000 like with older SoCs by writing 0x16aa0001 to the
+ * undocumented 0x008000e0 SYS_CTRL register. Where the 16aa is a key and
+ * the 1 actually activates the mapping of the first 32 KiB to 0x00000000.
+ */
+#define CONFIG_SYS_INIT_RAM_ADDR 0x10000
+#define CONFIG_SYS_INIT_RAM_SIZE 0x0a000 /* 40 KiB */
+#else
#define CONFIG_SYS_INIT_RAM_ADDR 0x0
#define CONFIG_SYS_INIT_RAM_SIZE 0x8000 /* 32 KiB */
+#endif
#define CONFIG_SYS_INIT_SP_OFFSET \
(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
@@ -96,7 +134,6 @@
#endif
#define CONFIG_CMD_MEMORY
-#define CONFIG_CMD_SETEXPR
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_CMDLINE_TAG
@@ -110,8 +147,10 @@
#define CONFIG_CMD_MMC
#define CONFIG_MMC_SUNXI
#define CONFIG_MMC_SUNXI_SLOT 0
+#if !defined(CONFIG_SPL_NAND_SUPPORT)
#define CONFIG_ENV_IS_IN_MMC
#define CONFIG_SYS_MMC_ENV_DEV 0 /* first detected MMC controller */
+#endif /* CONFIG_SPL_NAND_SUPPORT */
#endif
/* 4MB of malloc() pool */
@@ -129,10 +168,8 @@
/* Boot Argument Buffer Size */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
-#define CONFIG_SYS_LOAD_ADDR 0x42000000 /* default load address */
-
/* standalone support */
-#define CONFIG_STANDALONE_LOAD_ADDR 0x42000000
+#define CONFIG_STANDALONE_LOAD_ADDR CONFIG_SYS_LOAD_ADDR
/* baudrate */
#define CONFIG_BAUDRATE 115200
@@ -162,16 +199,6 @@
#define CONFIG_SPL_BOARD_LOAD_IMAGE
-#ifdef CONFIG_SPL_FEL
-
-#define CONFIG_SPL_TEXT_BASE 0x2000
-#define CONFIG_SPL_MAX_SIZE 0x4000 /* 16 KiB */
-
-#else /* CONFIG_SPL */
-
-#define CONFIG_SPL_BSS_START_ADDR 0x4ff80000
-#define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KiB */
-
#define CONFIG_SPL_TEXT_BASE 0x20 /* sram start+header */
#define CONFIG_SPL_MAX_SIZE 0x5fe0 /* 24KB on sun4i/sun7i */
@@ -186,13 +213,9 @@
#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 80 /* 40KiB */
#define CONFIG_SPL_PAD_TO 32768 /* decimal for 'dd' */
-#endif /* CONFIG_SPL */
-
/* end of 32 KiB in sram */
#define LOW_LEVEL_SRAM_STACK 0x00008000 /* End of sram */
#define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK
-#define CONFIG_SYS_SPL_MALLOC_START 0x4ff00000
-#define CONFIG_SYS_SPL_MALLOC_SIZE 0x00080000 /* 512 KiB */
/* I2C */
#if defined CONFIG_AXP152_POWER || defined CONFIG_AXP209_POWER
@@ -333,6 +356,24 @@
#define CONFIG_ENV_IS_NOWHERE
#endif
+#ifdef CONFIG_SPL_NAND_SUPPORT
+#define CONFIG_NAND
+#define CONFIG_SYS_NAND_SELF_INIT
+#define CONFIG_NAND_SUNXI
+#define CONFIG_CMD_SPL_WRITE_SIZE 0x000400
+#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x008000
+
+/* \todo Make these parameterisable in kernel config ? */
+#define CONFIG_NAND_SUNXI_PAGE_SIZE 8192
+#define CONFIG_NAND_SUNXI_ECC_STEP 1024
+#define CONFIG_NAND_SUNXI_ECC_STRENGTH 40
+#define CONFIG_NAND_SUNXI_ADDR_CYCLES 5
+
+#ifndef CONFIG_NAND_SUNXI_GPC_PORTS
+#error "No NAND GPC ports defined, NAND unsupported"
+#endif
+#endif /* CONFIG_SPL_NAND_SUPPORT */
+
#define CONFIG_MISC_INIT_R
#define CONFIG_SYS_CONSOLE_IS_IN_ENV
@@ -342,8 +383,6 @@
/* Enable pre-console buffer to get complete log on the VGA console */
#define CONFIG_PRE_CONSOLE_BUFFER
#define CONFIG_PRE_CON_BUF_SZ 4096 /* Aprox 2 80*25 screens */
-/* Use the room between the end of bootm_size and the framebuffer */
-#define CONFIG_PRE_CON_BUF_ADDR 0x4f000000
/*
* 240M RAM (256M minimum minus space for the framebuffer),
@@ -352,11 +391,11 @@
*/
#define MEM_LAYOUT_ENV_SETTINGS \
"bootm_size=0xf000000\0" \
- "kernel_addr_r=0x42000000\0" \
- "fdt_addr_r=0x43000000\0" \
- "scriptaddr=0x43100000\0" \
- "pxefile_addr_r=0x43200000\0" \
- "ramdisk_addr_r=0x43300000\0"
+ "kernel_addr_r=" __stringify(SDRAM_OFFSET(2000000)) "\0" \
+ "fdt_addr_r=" __stringify(SDRAM_OFFSET(3000000)) "\0" \
+ "scriptaddr=" __stringify(SDRAM_OFFSET(3100000)) "\0" \
+ "pxefile_addr_r=" __stringify(SDRAM_OFFSET(3200000)) "\0" \
+ "ramdisk_addr_r=" __stringify(SDRAM_OFFSET(3300000)) "\0"
#ifdef CONFIG_MMC
#define BOOT_TARGET_DEVICES_MMC(func) func(MMC, mmc, 0)
diff --git a/include/configs/t4qds.h b/include/configs/t4qds.h
index 75609b9..efd76da 100644
--- a/include/configs/t4qds.h
+++ b/include/configs/t4qds.h
@@ -232,7 +232,6 @@
#ifdef CONFIG_PCI
#define CONFIG_PCI_INDIRECT_BRIDGE
-#define CONFIG_NET_MULTI
#define CONFIG_PCI_PNP /* do pci plug-and-play */
#define CONFIG_E1000
@@ -284,11 +283,9 @@
#define CONFIG_CMD_I2C
#define CONFIG_CMD_MII
#define CONFIG_CMD_PING
-#define CONFIG_CMD_SETEXPR
#ifdef CONFIG_PCI
#define CONFIG_CMD_PCI
-#define CONFIG_CMD_NET
#endif
/*
diff --git a/include/configs/tam3517-common.h b/include/configs/tam3517-common.h
index 2d12e86..30bc2be 100644
--- a/include/configs/tam3517-common.h
+++ b/include/configs/tam3517-common.h
@@ -110,7 +110,6 @@
#define CONFIG_CMD_I2C /* I2C serial bus support */
#define CONFIG_CMD_MII
#define CONFIG_CMD_MMC /* MMC support */
-#define CONFIG_CMD_NET
#define CONFIG_CMD_NFS
#define CONFIG_CMD_NAND /* NAND support */
#define CONFIG_CMD_PING
diff --git a/include/configs/tbs2910.h b/include/configs/tbs2910.h
index 13a6e06..e1c9937 100644
--- a/include/configs/tbs2910.h
+++ b/include/configs/tbs2910.h
@@ -51,7 +51,6 @@
/* *** Command definition *** */
#define CONFIG_CMD_BMODE
-#define CONFIG_CMD_SETEXPR
#define CONFIG_CMD_MEMTEST
#define CONFIG_CMD_TIME
@@ -69,7 +68,6 @@
#define CONFIG_CMD_PING
#define CONFIG_CMD_DHCP
#define CONFIG_CMD_MII
-#define CONFIG_CMD_NET
#define CONFIG_FEC_MXC
#define CONFIG_MII
#define IMX_FEC_BASE ENET_BASE_ADDR
diff --git a/include/configs/tcm-bf518.h b/include/configs/tcm-bf518.h
index e726b29..1e74535 100644
--- a/include/configs/tcm-bf518.h
+++ b/include/configs/tcm-bf518.h
@@ -66,7 +66,6 @@
#define CONFIG_NETCONSOLE 1
#endif
#define CONFIG_HOSTNAME tcm-bf518
-#define CONFIG_LIB_RAND
/*
* Flash Settings
diff --git a/include/configs/tcm-bf537.h b/include/configs/tcm-bf537.h
index 3326580..a8947c5 100644
--- a/include/configs/tcm-bf537.h
+++ b/include/configs/tcm-bf537.h
@@ -71,7 +71,6 @@
#define CONFIG_NETCONSOLE 1
#endif
#define CONFIG_HOSTNAME tcm-bf537
-#define CONFIG_LIB_RAND
/*
* Flash Settings
diff --git a/include/configs/tec-ng.h b/include/configs/tec-ng.h
index cfa7fb1..cfee2c3 100644
--- a/include/configs/tec-ng.h
+++ b/include/configs/tec-ng.h
@@ -57,7 +57,6 @@
#define CONFIG_USB_ETHER_SMSC95XX
/* General networking support */
-#define CONFIG_CMD_NET
#define CONFIG_CMD_DHCP
/* Tag support */
diff --git a/include/configs/tec.h b/include/configs/tec.h
index 13c24c9..3b543eb 100644
--- a/include/configs/tec.h
+++ b/include/configs/tec.h
@@ -46,7 +46,6 @@
#define CONFIG_USB_ETHER_SMSC95XX
/* General networking support */
-#define CONFIG_CMD_NET
#define CONFIG_CMD_DHCP
/* LCD support */
diff --git a/include/configs/tegra-common.h b/include/configs/tegra-common.h
index 7ae1792..0bac9ad 100644
--- a/include/configs/tegra-common.h
+++ b/include/configs/tegra-common.h
@@ -76,7 +76,6 @@
#undef CONFIG_CMD_IMI
#undef CONFIG_CMD_IMLS
#undef CONFIG_CMD_NFS /* NFS support */
-#undef CONFIG_CMD_NET /* network support */
/* turn on command-line edit/hist/auto */
#define CONFIG_COMMAND_HISTORY
diff --git a/include/configs/ti814x_evm.h b/include/configs/ti814x_evm.h
index dcc2bdc..372a02b 100644
--- a/include/configs/ti814x_evm.h
+++ b/include/configs/ti814x_evm.h
@@ -216,7 +216,6 @@
#undef CONFIG_USE_IRQ
/* Ethernet */
-#define CONFIG_CMD_NET
#define CONFIG_CMD_DHCP
#define CONFIG_CMD_PING
#define CONFIG_CMD_MII
@@ -228,7 +227,6 @@
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_SUBNETMASK
#define CONFIG_NET_RETRY_COUNT 10
-#define CONFIG_NET_MULTI
#define CONFIG_PHY_GIGE
#define CONFIG_PHYLIB
#define CONFIG_PHY_ET1011C
diff --git a/include/configs/ti_am335x_common.h b/include/configs/ti_am335x_common.h
index 20a55f4..4d2ae28 100644
--- a/include/configs/ti_am335x_common.h
+++ b/include/configs/ti_am335x_common.h
@@ -34,7 +34,6 @@
#define CONFIG_SYS_NS16550_CLK 48000000
/* Network defines. */
-#define CONFIG_CMD_NET /* 'bootp' and 'tftp' */
#define CONFIG_CMD_DHCP
#define CONFIG_CMD_MII
#define CONFIG_BOOTP_DNS /* Configurable parts of CMD_DHCP */
diff --git a/include/configs/ti_omap4_common.h b/include/configs/ti_omap4_common.h
index 1c93aab..6c33804 100644
--- a/include/configs/ti_omap4_common.h
+++ b/include/configs/ti_omap4_common.h
@@ -79,7 +79,6 @@
#define CONFIG_SYS_CONSOLE_IS_IN_ENV 1
/* Per-Soc commands */
-#undef CONFIG_CMD_NET
#undef CONFIG_CMD_NFS
/*
diff --git a/include/configs/ti_omap5_common.h b/include/configs/ti_omap5_common.h
index 3383491..4faffef 100644
--- a/include/configs/ti_omap5_common.h
+++ b/include/configs/ti_omap5_common.h
@@ -58,7 +58,6 @@
#define CONFIG_SYS_NS16550_CLK 48000000
/* Per-SoC commands */
-#undef CONFIG_CMD_NET
#undef CONFIG_CMD_NFS
/*
diff --git a/include/configs/titanium.h b/include/configs/titanium.h
index 7490fa8..49aa3c7 100644
--- a/include/configs/titanium.h
+++ b/include/configs/titanium.h
@@ -43,7 +43,6 @@
#define CONFIG_CMD_PING
#define CONFIG_CMD_DHCP
#define CONFIG_CMD_MII
-#define CONFIG_CMD_NET
#define CONFIG_FEC_MXC
#define CONFIG_MII
#define IMX_FEC_BASE ENET_BASE_ADDR
diff --git a/include/configs/tqma6.h b/include/configs/tqma6.h
index e46c580..00294f6 100644
--- a/include/configs/tqma6.h
+++ b/include/configs/tqma6.h
@@ -107,7 +107,6 @@
#define CONFIG_CMD_PING
#define CONFIG_CMD_DHCP
#define CONFIG_CMD_MII
-#define CONFIG_CMD_NET
#define CONFIG_FEC_MXC
#define IMX_FEC_BASE ENET_BASE_ADDR
@@ -123,7 +122,6 @@
/* Command definition */
#define CONFIG_CMD_BMODE
#define CONFIG_CMD_ITEST
-#define CONFIG_CMD_SETEXPR
#define CONFIG_ENV_SIZE (SZ_8K)
/* Size of malloc() pool */
diff --git a/include/configs/tricorder.h b/include/configs/tricorder.h
index 7426bde..b004d09 100644
--- a/include/configs/tricorder.h
+++ b/include/configs/tricorder.h
@@ -162,7 +162,6 @@
#define CONFIG_CMD_UBIFS /* UBIFS commands */
#define CONFIG_LZO /* LZO is needed for UBIFS */
-#undef CONFIG_CMD_NET
#undef CONFIG_CMD_NFS
#undef CONFIG_CMD_FPGA /* FPGA configuration Support */
#undef CONFIG_CMD_IMI /* iminfo */
diff --git a/include/configs/trimslice.h b/include/configs/trimslice.h
index 81be8a2..848ef33 100644
--- a/include/configs/trimslice.h
+++ b/include/configs/trimslice.h
@@ -69,7 +69,6 @@
#define CONFIG_RTL8169
/* General networking support */
-#define CONFIG_CMD_NET
#define CONFIG_CMD_DHCP
#include "tegra-common-post.h"
diff --git a/include/configs/tseries.h b/include/configs/tseries.h
index 9218533..f3f71f1 100644
--- a/include/configs/tseries.h
+++ b/include/configs/tseries.h
@@ -3,7 +3,7 @@
*
* specific parts for B&R T-Series Motherboard
*
- * Copyright (C) 2013 Hannes Petermaier <oe5hpm@oevsv.at> -
+ * Copyright (C) 2013 Hannes Schmelzer <oe5hpm@oevsv.at> -
* Bernecker & Rainer Industrieelektronik GmbH - http://www.br-automation.com
*
* SPDX-License-Identifier: GPL-2.0+
diff --git a/include/configs/tx25.h b/include/configs/tx25.h
index 118f5ba..622bd53 100644
--- a/include/configs/tx25.h
+++ b/include/configs/tx25.h
@@ -132,7 +132,6 @@
#define CONFIG_FEC_MXC
#define CONFIG_FEC_MXC_PHYADDR 0x1f
#define CONFIG_MII
-#define CONFIG_CMD_NET
#define CONFIG_BOARD_LATE_INIT
#define CONFIG_ENV_OVERWRITE
diff --git a/include/configs/udoo.h b/include/configs/udoo.h
index fce2b9b..910bf01 100644
--- a/include/configs/udoo.h
+++ b/include/configs/udoo.h
@@ -39,7 +39,6 @@
#define CONFIG_CMD_PING
#define CONFIG_CMD_DHCP
#define CONFIG_CMD_MII
-#define CONFIG_CMD_NET
#define CONFIG_FEC_MXC
#define CONFIG_MII
#define IMX_FEC_BASE ENET_BASE_ADDR
@@ -52,7 +51,6 @@
/* Command definition */
#define CONFIG_CMD_BMODE
-#define CONFIG_CMD_SETEXPR
#define CONFIG_SYS_MEMTEST_START 0x10000000
#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 500 * SZ_1M)
diff --git a/include/configs/uniphier.h b/include/configs/uniphier.h
index 331df62..8510472 100644
--- a/include/configs/uniphier.h
+++ b/include/configs/uniphier.h
@@ -1,7 +1,5 @@
/*
- * Copyright (C) 2012-2015 Panasonic Corporation
- * Copyright (C) 2015 Socionext Inc.
- * Author: Masahiro Yamada <yamada.masahiro@socionext.com>
+ * Copyright (C) 2012-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
@@ -266,8 +264,6 @@
#define CONFIG_SYS_SDRAM_SIZE (CONFIG_SDRAM0_SIZE)
#endif
-#define CONFIG_SYS_TEXT_BASE 0x84000000
-
#if defined(CONFIG_MACH_PH1_LD4) || defined(CONFIG_MACH_PH1_SLD8)
#define CONFIG_SPL_TEXT_BASE 0x00040000
#endif
diff --git a/include/configs/vct.h b/include/configs/vct.h
index 88e58ec..ed9378e 100644
--- a/include/configs/vct.h
+++ b/include/configs/vct.h
@@ -98,7 +98,6 @@
#define CONFIG_CMD_PING
#define CONFIG_CMD_SNTP
#else
-#undef CONFIG_CMD_NET
#undef CONFIG_CMD_NFS
#endif
@@ -312,7 +311,6 @@
#undef CONFIG_CMD_LOADY
#undef CONFIG_CMD_MII
#undef CONFIG_CMD_MISC
-#undef CONFIG_CMD_NET
#undef CONFIG_CMD_PING
#undef CONFIG_CMD_REGINFO
#undef CONFIG_CMD_SNTP
diff --git a/include/configs/venice2.h b/include/configs/venice2.h
index 4594002..bfe5298 100644
--- a/include/configs/venice2.h
+++ b/include/configs/venice2.h
@@ -60,7 +60,6 @@
#define CONFIG_USB_ETHER_ASIX
/* General networking support */
-#define CONFIG_CMD_NET
#define CONFIG_CMD_DHCP
#include "tegra-common-usb-gadget.h"
diff --git a/include/configs/ventana.h b/include/configs/ventana.h
index 62bec99..3f1ebcd 100644
--- a/include/configs/ventana.h
+++ b/include/configs/ventana.h
@@ -44,7 +44,6 @@
#define CONFIG_USB_ETHER_ASIX
/* General networking support */
-#define CONFIG_CMD_NET
#define CONFIG_CMD_DHCP
/* USB keyboard */
diff --git a/include/configs/versatile.h b/include/configs/versatile.h
index 900b89c..8c3774a 100644
--- a/include/configs/versatile.h
+++ b/include/configs/versatile.h
@@ -86,7 +86,6 @@
#define CONFIG_CMD_FLASH
#define CONFIG_CMD_IMI
#define CONFIG_CMD_MEMORY
-#define CONFIG_CMD_NET
#define CONFIG_CMD_PING
#define CONFIG_CMD_SAVEENV
diff --git a/include/configs/vexpress_aemv8a.h b/include/configs/vexpress_aemv8a.h
index 032010b..b81dfce 100644
--- a/include/configs/vexpress_aemv8a.h
+++ b/include/configs/vexpress_aemv8a.h
@@ -113,9 +113,6 @@
#endif
#endif /* !CONFIG_GICV3 */
-#define CONFIG_SYS_MEMTEST_START V2M_BASE
-#define CONFIG_SYS_MEMTEST_END (V2M_BASE + 0x80000000)
-
/* Size of malloc() pool */
#define CONFIG_SYS_MALLOC_F_LEN 0x2000
#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (8 << 20))
@@ -158,7 +155,6 @@
#define CONFIG_CMD_LOADB
#define CONFIG_CMD_MEMORY
#define CONFIG_CMD_MII
-#define CONFIG_CMD_NET
#define CONFIG_CMD_PING
#define CONFIG_CMD_SAVEENV
#define CONFIG_CMD_RUN
@@ -182,8 +178,15 @@
/* Physical Memory Map */
#define CONFIG_NR_DRAM_BANKS 1
#define PHYS_SDRAM_1 (V2M_BASE) /* SDRAM Bank #1 */
-#define PHYS_SDRAM_1_SIZE 0x80000000 /* 2048 MB */
-#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
+/* Top 16MB reserved for secure world use */
+#define DRAM_SEC_SIZE 0x01000000
+#define PHYS_SDRAM_1_SIZE 0x80000000 - DRAM_SEC_SIZE
+#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
+
+/* Enable memtest */
+#define CONFIG_CMD_MEMTEST
+#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM_1
+#define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM_1 + PHYS_SDRAM_1_SIZE)
/* Initial environment variables */
#ifdef CONFIG_TARGET_VEXPRESS64_JUNO
@@ -202,6 +205,7 @@
/* Assume we boot with root on the first partition of a USB stick */
#define CONFIG_BOOTARGS "console=ttyAMA0,115200n8 " \
"root=/dev/sda1 rw " \
+ "rootwait "\
"earlyprintk=pl011,0x7ff80000 debug user_debug=31 "\
"loglevel=9"
@@ -215,7 +219,7 @@
#elif CONFIG_TARGET_VEXPRESS64_BASE_FVP
#define CONFIG_EXTRA_ENV_SETTINGS \
- "kernel_name=uImage\0" \
+ "kernel_name=Image\0" \
"kernel_addr=0x80000000\0" \
"initrd_name=ramdisk.img\0" \
"initrd_addr=0x88000000\0" \
@@ -229,11 +233,11 @@
"loglevel=9"
#define CONFIG_BOOTCOMMAND "smhload ${kernel_name} ${kernel_addr}; " \
- "smhload ${fdt_name} $fdt_addr; " \
- "smhload ${initrd_name} $initrd_addr initrd_end; " \
- "fdt addr $fdt_addr; fdt resize; " \
- "fdt chosen $initrd_addr $initrd_end; " \
- "bootm $kernel_addr - $fdt_addr"
+ "smhload ${fdt_name} ${fdt_addr}; " \
+ "smhload ${initrd_name} ${initrd_addr} initrd_end; " \
+ "fdt addr ${fdt_addr}; fdt resize; " \
+ "fdt chosen ${initrd_addr} ${initrd_end}; " \
+ "booti $kernel_addr - $fdt_addr"
#define CONFIG_BOOTDELAY 1
@@ -264,6 +268,7 @@
#define CONFIG_CMD_ARMFLASH
#define CONFIG_SYS_FLASH_CFI 1
#define CONFIG_FLASH_CFI_DRIVER 1
+#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_32BIT
#define CONFIG_SYS_FLASH_BASE 0x08000000
#define CONFIG_SYS_FLASH_SIZE 0x04000000 /* 64 MiB */
#define CONFIG_SYS_MAX_FLASH_BANKS 2
diff --git a/include/configs/vexpress_common.h b/include/configs/vexpress_common.h
index 989e755..db78c85 100644
--- a/include/configs/vexpress_common.h
+++ b/include/configs/vexpress_common.h
@@ -162,7 +162,6 @@
#define CONFIG_CMD_FLASH
#define CONFIG_CMD_IMI
#define CONFIG_CMD_MEMORY
-#define CONFIG_CMD_NET
#define CONFIG_CMD_PING
#define CONFIG_CMD_SAVEENV
#define CONFIG_CMD_RUN
diff --git a/include/configs/vf610twr.h b/include/configs/vf610twr.h
index aa31041..dde65ed 100644
--- a/include/configs/vf610twr.h
+++ b/include/configs/vf610twr.h
@@ -90,7 +90,6 @@
#define CONFIG_CMD_PING
#define CONFIG_CMD_DHCP
#define CONFIG_CMD_MII
-#define CONFIG_CMD_NET
#define CONFIG_FEC_MXC
#define CONFIG_MII
#define IMX_FEC_BASE ENET_BASE_ADDR
diff --git a/include/configs/vision2.h b/include/configs/vision2.h
index 3f35076..41680c4 100644
--- a/include/configs/vision2.h
+++ b/include/configs/vision2.h
@@ -114,7 +114,6 @@
#define CONFIG_CMD_PING
#define CONFIG_CMD_MII
-#define CONFIG_CMD_NET
/* allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE
diff --git a/include/configs/vl_ma2sc.h b/include/configs/vl_ma2sc.h
index bef821f..7dfb6da 100644
--- a/include/configs/vl_ma2sc.h
+++ b/include/configs/vl_ma2sc.h
@@ -325,7 +325,6 @@
/* Ethernet */
#define CONFIG_MACB
#define CONFIG_RMII
-#define CONFIG_NET_MULTI
#define CONFIG_NET_RETRY_COUNT 5
#define CONFIG_AT91_WANTS_COMMON_PHY
diff --git a/include/configs/vpac270.h b/include/configs/vpac270.h
index 887433b..0886ba3 100644
--- a/include/configs/vpac270.h
+++ b/include/configs/vpac270.h
@@ -69,7 +69,6 @@
*/
#include <config_cmd_default.h>
-#define CONFIG_CMD_NET
#define CONFIG_CMD_ENV
#undef CONFIG_CMD_IMLS
#define CONFIG_CMD_MMC
diff --git a/include/configs/wandboard.h b/include/configs/wandboard.h
index 0cc0f03..f05b55a 100644
--- a/include/configs/wandboard.h
+++ b/include/configs/wandboard.h
@@ -29,7 +29,6 @@
/* Command definition */
#define CONFIG_CMD_BMODE
-#define CONFIG_CMD_SETEXPR
#define CONFIG_SYS_MEMTEST_START 0x10000000
#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 500 * SZ_1M)
@@ -58,7 +57,6 @@
#define CONFIG_CMD_PING
#define CONFIG_CMD_DHCP
#define CONFIG_CMD_MII
-#define CONFIG_CMD_NET
#define CONFIG_FEC_MXC
#define CONFIG_MII
#define IMX_FEC_BASE ENET_BASE_ADDR
diff --git a/include/configs/warp.h b/include/configs/warp.h
index 296ea83..39b4919 100644
--- a/include/configs/warp.h
+++ b/include/configs/warp.h
@@ -31,7 +31,6 @@
#define CONFIG_SUPPORT_EMMC_BOOT
/* Command definition */
-#undef CONFIG_CMD_NET
#undef CONFIG_CMD_NFS
/* Watchdog */
diff --git a/include/configs/whistler.h b/include/configs/whistler.h
index 94f151e..13cc3d3 100644
--- a/include/configs/whistler.h
+++ b/include/configs/whistler.h
@@ -54,7 +54,6 @@
#define CONFIG_USB_ETHER_ASIX
/* General networking support */
-#define CONFIG_CMD_NET
#define CONFIG_CMD_DHCP
#include "tegra-common-post.h"
diff --git a/include/configs/woodburn_common.h b/include/configs/woodburn_common.h
index d0895cf..e8eabdb 100644
--- a/include/configs/woodburn_common.h
+++ b/include/configs/woodburn_common.h
@@ -98,7 +98,6 @@
#define CONFIG_CMD_I2C
#define CONFIG_CMD_SPI
#define CONFIG_CMD_MII
-#define CONFIG_CMD_NET
#define CONFIG_CMD_MMC
#define CONFIG_DOS_PARTITION
diff --git a/include/configs/x600.h b/include/configs/x600.h
index 27a66a5..d235da4 100644
--- a/include/configs/x600.h
+++ b/include/configs/x600.h
@@ -74,7 +74,6 @@
/* Ethernet config options */
#define CONFIG_MII
-#define CONFIG_NET_MULTI
#define CONFIG_PHYLIB
#define CONFIG_PHY_RESET_DELAY 10000 /* in usec */
#define CONFIG_PHY_ADDR 0 /* PHY address */
@@ -114,7 +113,6 @@
#define CONFIG_CMD_MII
#define CONFIG_CMD_MTDPARTS
#define CONFIG_CMD_NAND
-#define CONFIG_CMD_NET
#define CONFIG_CMD_PING
#define CONFIG_CMD_RUN
#define CONFIG_CMD_SAVES
diff --git a/include/configs/x86-chromebook.h b/include/configs/x86-chromebook.h
index b6a76fe..e0e7fca 100644
--- a/include/configs/x86-chromebook.h
+++ b/include/configs/x86-chromebook.h
@@ -14,7 +14,6 @@
#define CONFIG_BOARD_EARLY_INIT_F
#define CONFIG_MISC_INIT_R
-#define CONFIG_NR_DRAM_BANKS 8
#define CONFIG_X86_MRC_ADDR 0xfffa0000
#define CONFIG_CACHE_MRC_SIZE_KB 512
diff --git a/include/configs/x86-common.h b/include/configs/x86-common.h
index 3e21e09..1917d87 100644
--- a/include/configs/x86-common.h
+++ b/include/configs/x86-common.h
@@ -21,6 +21,7 @@
#define CONFIG_DISPLAY_BOARDINFO_LATE
#define CONFIG_DISPLAY_CPUINFO
#define CONFIG_LAST_STAGE_INIT
+#define CONFIG_NR_DRAM_BANKS 8
#define CONFIG_LMB
#define CONFIG_OF_LIBFDT
@@ -36,6 +37,7 @@
#define CONFIG_SCSI_AHCI
#ifdef CONFIG_SCSI_AHCI
#define CONFIG_LIBATA
+#define CONFIG_LBA48
#define CONFIG_SYS_64BIT_LBA
#define CONFIG_SYS_SCSI_MAX_SCSI_ID 2
@@ -75,10 +77,6 @@
#define CONFIG_SYS_HUSH_PARSER
#define CONFIG_SUPPORT_VFAT
-/************************************************************
- * ATAPI support (experimental)
- ************************************************************/
-#define CONFIG_ATAPI
/************************************************************
* DISK Partition support
@@ -122,7 +120,6 @@
#define CONFIG_CMD_LOADS
#define CONFIG_CMD_MEMORY
#define CONFIG_CMD_MISC
-#define CONFIG_CMD_NET
#undef CONFIG_CMD_NFS
#define CONFIG_CMD_PCI
#define CONFIG_CMD_PING
@@ -247,6 +244,7 @@
#define CONFIG_EXTRA_ENV_SETTINGS \
CONFIG_STD_DEVICES_SETTINGS \
+ "pciconfighost=1\0" \
"netdev=eth0\0" \
"consoledev=ttyS0\0" \
"othbootargs=acpi=off\0" \
diff --git a/include/configs/xilinx-ppc.h b/include/configs/xilinx-ppc.h
index 0ccd73a..4f62607 100644
--- a/include/configs/xilinx-ppc.h
+++ b/include/configs/xilinx-ppc.h
@@ -11,6 +11,9 @@
#ifndef __CONFIG_XLX_H
#define __CONFIG_XLX_H
+
+#define CONFIG_SYS_GENERIC_BOARD
+
/*
#define DEBUG
#define ET_DEBUG
@@ -35,7 +38,6 @@
#undef CONFIG_CMD_SPI
#undef CONFIG_CMD_I2C
#undef CONFIG_CMD_DTT
-#undef CONFIG_CMD_NET
#undef CONFIG_CMD_PING
#undef CONFIG_CMD_DHCP
#undef CONFIG_CMD_EEPROM
diff --git a/include/configs/xpedite1000.h b/include/configs/xpedite1000.h
index 15c9176..ea747c8 100644
--- a/include/configs/xpedite1000.h
+++ b/include/configs/xpedite1000.h
@@ -199,7 +199,6 @@
#define CONFIG_CMD_IRQ
#define CONFIG_CMD_JFFS2
#define CONFIG_CMD_MII
-#define CONFIG_CMD_NET
#define CONFIG_CMD_PCI
#define CONFIG_CMD_PING
#define CONFIG_CMD_SAVEENV
diff --git a/include/configs/xpedite517x.h b/include/configs/xpedite517x.h
index 3414230..a762ec0 100644
--- a/include/configs/xpedite517x.h
+++ b/include/configs/xpedite517x.h
@@ -543,7 +543,6 @@
#define CONFIG_CMD_JFFS2
#define CONFIG_CMD_MII
#define CONFIG_CMD_NAND
-#define CONFIG_CMD_NET
#define CONFIG_CMD_PCA953X
#define CONFIG_CMD_PCA953X_INFO
#define CONFIG_CMD_PCI
diff --git a/include/configs/xpedite520x.h b/include/configs/xpedite520x.h
index f966a8a..9484ccb 100644
--- a/include/configs/xpedite520x.h
+++ b/include/configs/xpedite520x.h
@@ -324,7 +324,6 @@
#define CONFIG_CMD_JFFS2
#define CONFIG_CMD_MII
#define CONFIG_CMD_NAND
-#define CONFIG_CMD_NET
#define CONFIG_CMD_PCA953X
#define CONFIG_CMD_PCA953X_INFO
#define CONFIG_CMD_PCI
diff --git a/include/configs/xpedite537x.h b/include/configs/xpedite537x.h
index 988a2e8..0391459 100644
--- a/include/configs/xpedite537x.h
+++ b/include/configs/xpedite537x.h
@@ -396,7 +396,6 @@
#define CONFIG_CMD_JFFS2
#define CONFIG_CMD_MII
#define CONFIG_CMD_NAND
-#define CONFIG_CMD_NET
#define CONFIG_CMD_PCA953X
#define CONFIG_CMD_PCA953X_INFO
#define CONFIG_CMD_PCI
diff --git a/include/configs/xpedite550x.h b/include/configs/xpedite550x.h
index ac3f4f1..09c248a 100644
--- a/include/configs/xpedite550x.h
+++ b/include/configs/xpedite550x.h
@@ -380,7 +380,6 @@
#define CONFIG_CMD_JFFS2
#define CONFIG_CMD_MII
#define CONFIG_CMD_NAND
-#define CONFIG_CMD_NET
#define CONFIG_CMD_PCA953X
#define CONFIG_CMD_PCA953X_INFO
#define CONFIG_CMD_PCI
diff --git a/include/configs/zeus.h b/include/configs/zeus.h
index 9ac4a0f..cc1b960 100644
--- a/include/configs/zeus.h
+++ b/include/configs/zeus.h
@@ -62,7 +62,6 @@
#define CONFIG_CMD_I2C
#define CONFIG_CMD_IRQ
#define CONFIG_CMD_MII
-#define CONFIG_CMD_NET
#define CONFIG_CMD_NFS
#define CONFIG_CMD_PING
#define CONFIG_CMD_REGINFO
diff --git a/include/configs/zipitz2.h b/include/configs/zipitz2.h
index 1dbbc15..49ca978 100644
--- a/include/configs/zipitz2.h
+++ b/include/configs/zipitz2.h
@@ -64,7 +64,6 @@
*/
#include <config_cmd_default.h>
-#undef CONFIG_CMD_NET
#undef CONFIG_CMD_NFS
#define CONFIG_CMD_ENV
#undef CONFIG_CMD_IMLS
diff --git a/include/configs/zmx25.h b/include/configs/zmx25.h
index 342fa2c..d57e665 100644
--- a/include/configs/zmx25.h
+++ b/include/configs/zmx25.h
@@ -78,7 +78,6 @@
* Command line configuration.
*/
#include <config_cmd_default.h>
-#define CONFIG_CMD_NET
#define CONFIG_CMD_CACHE
/*
diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h
index be77e50..1a52e7d 100644
--- a/include/configs/zynq-common.h
+++ b/include/configs/zynq-common.h
@@ -48,7 +48,6 @@
/* Ethernet driver */
#if defined(CONFIG_ZYNQ_GEM0) || defined(CONFIG_ZYNQ_GEM1)
-# define CONFIG_NET_MULTI
# define CONFIG_ZYNQ_GEM
# define CONFIG_MII
# define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
diff --git a/include/dm/uclass-id.h b/include/dm/uclass-id.h
index 4d737f4..c7310d7 100644
--- a/include/dm/uclass-id.h
+++ b/include/dm/uclass-id.h
@@ -39,20 +39,18 @@
UCLASS_PCH, /* x86 platform controller hub */
UCLASS_PCI, /* PCI bus */
UCLASS_PCI_GENERIC, /* Generic PCI bus device */
+ UCLASS_PMIC, /* PMIC I/O device */
+ UCLASS_REGULATOR, /* Regulator device */
UCLASS_RTC, /* Real time clock device */
UCLASS_SERIAL, /* Serial UART */
UCLASS_SPI, /* SPI bus */
- UCLASS_SPI_GENERIC, /* Generic SPI flash target */
UCLASS_SPI_FLASH, /* SPI flash */
+ UCLASS_SPI_GENERIC, /* Generic SPI flash target */
UCLASS_THERMAL, /* Thermal sensor */
UCLASS_USB, /* USB bus */
UCLASS_USB_DEV_GENERIC, /* USB generic device */
UCLASS_USB_HUB, /* USB hub */
- /* Power Management */
- UCLASS_PMIC, /* PMIC I/O device */
- UCLASS_REGULATOR, /* REGULATOR device */
-
UCLASS_COUNT,
UCLASS_INVALID = -1,
};
diff --git a/include/dt-bindings/gpio/x86-gpio.h b/include/dt-bindings/gpio/x86-gpio.h
new file mode 100644
index 0000000..7f1de30
--- /dev/null
+++ b/include/dt-bindings/gpio/x86-gpio.h
@@ -0,0 +1,31 @@
+/*
+ * This header provides constants for binding intel,x86-pinctrl.
+ */
+
+#ifndef _DT_BINDINGS_GPIO_X86_GPIO_H
+#define _DT_BINDINGS_GPIO_X86_GPIO_H
+
+#include <dt-bindings/gpio/gpio.h>
+
+#define GPIO_MODE_NATIVE 0
+#define GPIO_MODE_GPIO 1
+
+#define GPIO_MODE_FUNC0 0
+#define GPIO_MODE_FUNC1 1
+#define GPIO_MODE_FUNC2 2
+#define GPIO_MODE_FUNC3 3
+#define GPIO_MODE_FUNC4 4
+#define GPIO_MODE_FUNC5 5
+#define GPIO_MODE_FUNC6 6
+
+#define PIN_INPUT 0
+#define PIN_OUTPUT 1
+
+#define PIN_INPUT_NOPULL 0
+#define PIN_INPUT_PULLUP 1
+#define PIN_INPUT_PULLDOWN 2
+
+#define PULL_STR_2K 0
+#define PULL_STR_20K 2
+
+#endif
diff --git a/include/dt-bindings/interrupt-router/intel-irq.h b/include/dt-bindings/interrupt-router/intel-irq.h
new file mode 100644
index 0000000..5092f33
--- /dev/null
+++ b/include/dt-bindings/interrupt-router/intel-irq.h
@@ -0,0 +1,31 @@
+/*
+ * Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef _DT_BINDINGS_INTEL_IRQ_H_
+#define _DT_BINDINGS_INTEL_IRQ_H_
+
+/* PCI interrupt pin */
+#define INTA 1
+#define INTB 2
+#define INTC 3
+#define INTD 4
+
+/* PIRQs */
+#define PIRQA 0
+#define PIRQB 1
+#define PIRQC 2
+#define PIRQD 3
+#define PIRQE 4
+#define PIRQF 5
+#define PIRQG 6
+#define PIRQH 7
+
+/* PCI bdf encoding */
+#ifndef PCI_BDF
+#define PCI_BDF(b, d, f) ((b) << 16 | (d) << 11 | (f) << 8)
+#endif
+
+#endif /* _DT_BINDINGS_INTEL_IRQ_H_ */
diff --git a/include/fdt_support.h b/include/fdt_support.h
index 5d4f28d..0edc4fa 100644
--- a/include/fdt_support.h
+++ b/include/fdt_support.h
@@ -16,8 +16,35 @@
const char *prop, const u32 dflt);
u32 fdt_getprop_u32_default(const void *fdt, const char *path,
const char *prop, const u32 dflt);
+
+/**
+ * Add data to the root of the FDT before booting the OS.
+ *
+ * See doc/device-tree-bindings/root.txt
+ *
+ * @param fdt FDT address in memory
+ * @return 0 if ok, or -FDT_ERR_... on error
+ */
+int fdt_root(void *fdt);
+
+/**
+ * Add chosen data the FDT before booting the OS.
+ *
+ * In particular, this adds the kernel command line (bootargs) to the FDT.
+ *
+ * @param fdt FDT address in memory
+ * @return 0 if ok, or -FDT_ERR_... on error
+ */
int fdt_chosen(void *fdt);
+
+/**
+ * Add initrd information to the FDT before booting the OS.
+ *
+ * @param fdt FDT address in memory
+ * @return 0 if ok, or -FDT_ERR_... on error
+ */
int fdt_initrd(void *fdt, ulong initrd_start, ulong initrd_end);
+
void do_fixup_by_path(void *fdt, const char *path, const char *prop,
const void *val, int len, int create);
void do_fixup_by_path_u32(void *fdt, const char *path, const char *prop,
diff --git a/include/fdtdec.h b/include/fdtdec.h
index 6bf5f61..4fb8a2a 100644
--- a/include/fdtdec.h
+++ b/include/fdtdec.h
@@ -176,8 +176,10 @@
COMPAT_AMS_AS3722, /* AMS AS3722 PMIC */
COMPAT_INTEL_ICH_SPI, /* Intel ICH7/9 SPI controller */
COMPAT_INTEL_QRK_MRC, /* Intel Quark MRC */
+ COMPAT_INTEL_X86_PINCTRL, /* Intel ICH7/9 pin control */
COMPAT_SOCIONEXT_XHCI, /* Socionext UniPhier xHCI */
COMPAT_INTEL_PCH, /* Intel PCH */
+ COMPAT_INTEL_IRQ_ROUTER, /* Intel Interrupt Router */
COMPAT_COUNT,
};
diff --git a/include/flash.h b/include/flash.h
index 48aa3a5..5754cf9 100644
--- a/include/flash.h
+++ b/include/flash.h
@@ -460,6 +460,7 @@
#define FLASH_S29GL128N 0x00F1 /* Spansion S29GL128N */
#define FLASH_STM32F4 0x00F2 /* STM32F4 Embedded Flash */
+#define FLASH_STM32F1 0x00F3 /* STM32F1 Embedded Flash */
#define FLASH_UNKNOWN 0xFFFF /* unknown flash type */
diff --git a/include/image.h b/include/image.h
index 60b924a..b6eb57e 100644
--- a/include/image.h
+++ b/include/image.h
@@ -244,6 +244,7 @@
#define IH_TYPE_SOCFPGAIMAGE 19 /* Altera SOCFPGA Preloader */
#define IH_TYPE_X86_SETUP 20 /* x86 setup.bin Image */
#define IH_TYPE_LPC32XXIMAGE 21 /* x86 setup.bin Image */
+#define IH_TYPE_LOADABLE 22 /* A list of typeless images */
/*
* Compression Types
@@ -455,7 +456,31 @@
int boot_get_ramdisk(int argc, char * const argv[], bootm_headers_t *images,
uint8_t arch, ulong *rd_start, ulong *rd_end);
-#endif
+
+/**
+ * boot_get_loadable - routine to load a list of binaries to memory
+ * @argc: Ignored Argument
+ * @argv: Ignored Argument
+ * @images: pointer to the bootm images structure
+ * @arch: expected architecture for the image
+ * @ld_start: Ignored Argument
+ * @ld_len: Ignored Argument
+ *
+ * boot_get_loadable() will take the given FIT configuration, and look
+ * for a field named "loadables". Loadables, is a list of elements in
+ * the FIT given as strings. exe:
+ * loadables = "linux_kernel@1", "fdt@2";
+ * this function will attempt to parse each string, and load the
+ * corresponding element from the FIT into memory. Once placed,
+ * no aditional actions are taken.
+ *
+ * @return:
+ * 0, if only valid images or no images are found
+ * error code, if an error occurs during fit_image_load
+ */
+int boot_get_loadable(int argc, char * const argv[], bootm_headers_t *images,
+ uint8_t arch, const ulong *ld_start, ulong * const ld_len);
+#endif /* !USE_HOSTCC */
int boot_get_setup_fit(bootm_headers_t *images, uint8_t arch,
ulong *setup_start, ulong *setup_len);
@@ -742,6 +767,7 @@
#define FIT_KERNEL_PROP "kernel"
#define FIT_RAMDISK_PROP "ramdisk"
#define FIT_FDT_PROP "fdt"
+#define FIT_LOADABLE_PROP "loadables"
#define FIT_DEFAULT_PROP "default"
#define FIT_SETUP_PROP "setup"
diff --git a/include/linux/io.h b/include/linux/io.h
new file mode 100644
index 0000000..1b36a22
--- /dev/null
+++ b/include/linux/io.h
@@ -0,0 +1,10 @@
+/*
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef _LINUX_IO_H
+#define _LINUX_IO_H
+
+#include <asm/io.h>
+
+#endif /* _LINUX_IO_H */
diff --git a/include/os.h b/include/os.h
index ffbdce8..954a48c 100644
--- a/include/os.h
+++ b/include/os.h
@@ -112,6 +112,14 @@
void os_tty_raw(int fd, bool allow_sigs);
/**
+ * Restore the tty to its original mode
+ *
+ * Call this to restore the original terminal mode, after it has been changed
+ * by os_tty_raw(). This is an internal function.
+ */
+void os_fd_restore(void);
+
+/**
* Acquires some memory from the underlying os.
*
* \param length Number of bytes to be allocated
diff --git a/include/pci_ids.h b/include/pci_ids.h
index 2e66851..5771e12 100644
--- a/include/pci_ids.h
+++ b/include/pci_ids.h
@@ -2838,6 +2838,7 @@
#define PCI_DEVICE_ID_INTEL_ICH9_6 0x2930
#define PCI_DEVICE_ID_INTEL_ICH9_7 0x2916
#define PCI_DEVICE_ID_INTEL_ICH9_8 0x2918
+#define PCI_DEVICE_ID_INTEL_ICH9_AHCI 0x2922
#define PCI_DEVICE_ID_INTEL_I7_MCR 0x2c18
#define PCI_DEVICE_ID_INTEL_I7_MC_TAD 0x2c19
#define PCI_DEVICE_ID_INTEL_I7_MC_RAS 0x2c1a
diff --git a/include/version.h b/include/version.h
index d6c7cf2..777e9f6 100644
--- a/include/version.h
+++ b/include/version.h
@@ -19,7 +19,7 @@
#endif
#define U_BOOT_VERSION_STRING U_BOOT_VERSION " (" U_BOOT_DATE " - " \
- U_BOOT_TIME ")" CONFIG_IDENT_STRING
+ U_BOOT_TIME " " U_BOOT_TZ ")" CONFIG_IDENT_STRING
#ifndef __ASSEMBLY__
extern const char version_string[];
diff --git a/lib/Kconfig b/lib/Kconfig
index 5b6cf3d..3c8de86 100644
--- a/lib/Kconfig
+++ b/lib/Kconfig
@@ -44,6 +44,9 @@
regex support to some commands, for example "env grep" and
"setexpr".
+config LIB_RAND
+ bool
+
source lib/rsa/Kconfig
menu "Hashing Support"
diff --git a/lib/fdtdec.c b/lib/fdtdec.c
index b586da2..46dfcb6 100644
--- a/lib/fdtdec.c
+++ b/lib/fdtdec.c
@@ -75,8 +75,10 @@
COMPAT(AMS_AS3722, "ams,as3722"),
COMPAT(INTEL_ICH_SPI, "intel,ich-spi"),
COMPAT(INTEL_QRK_MRC, "intel,quark-mrc"),
+ COMPAT(INTEL_X86_PINCTRL, "intel,x86-pinctrl"),
COMPAT(SOCIONEXT_XHCI, "socionext,uniphier-xhci"),
COMPAT(COMPAT_INTEL_PCH, "intel,bd82x6x"),
+ COMPAT(COMPAT_INTEL_IRQ_ROUTER, "intel,irq-router"),
};
const char *fdtdec_get_compatible(enum fdt_compat_id id)
diff --git a/net/Kconfig b/net/Kconfig
index 524b7e4..9a9846e 100644
--- a/net/Kconfig
+++ b/net/Kconfig
@@ -10,6 +10,7 @@
config NET_RANDOM_ETHADDR
bool "Random ethaddr if unset"
+ select LIB_RAND
help
Selecting this will allow the Ethernet interface to function
even when the ethaddr variable for that interface is unset.
diff --git a/scripts/Makefile.autoconf b/scripts/Makefile.autoconf
index f054081..36bfa17 100644
--- a/scripts/Makefile.autoconf
+++ b/scripts/Makefile.autoconf
@@ -58,7 +58,8 @@
$(CPP) $(c_flags) $2 -DDO_DEPS_ONLY -dM $(srctree)/include/common.h > $@.tmp && { \
sed -n -f $(srctree)/tools/scripts/define2mk.sed $@.tmp | \
while read line; do \
- if ! grep -q "$${line%=*}=" include/config/auto.conf; then \
+ if [ -n "${KCONFIG_IGNORE_DUPLICATES}" ] || \
+ ! grep -q "$${line%=*}=" include/config/auto.conf; then \
echo "$$line"; \
fi \
done > $@; \
diff --git a/scripts/Makefile.spl b/scripts/Makefile.spl
index ea67137..fd572f4 100644
--- a/scripts/Makefile.spl
+++ b/scripts/Makefile.spl
@@ -167,7 +167,7 @@
quiet_cmd_cpp_cfg = CFG $@
cmd_cpp_cfg = $(CPP) -Wp,-MD,$(depfile) $(cpp_flags) $(LDPPFLAGS) -ansi \
- -D__ASSEMBLY__ -x assembler-with-cpp -P -dM -E -o $@ $<
+ -DDO_DEPS_ONLY -D__ASSEMBLY__ -x assembler-with-cpp -P -dM -E -o $@ $<
$(obj)/$(SPL_BIN).cfg: include/config.h
$(call if_changed,cpp_cfg)
diff --git a/test/dm/pci.c b/test/dm/pci.c
index 2f3ae79..3ab4ba8 100644
--- a/test/dm/pci.c
+++ b/test/dm/pci.c
@@ -21,6 +21,17 @@
}
DM_TEST(dm_test_pci_base, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);
+/* Test that sandbox PCI bus numbering works correctly */
+static int dm_test_pci_busnum(struct unit_test_state *uts)
+{
+ struct udevice *bus;
+
+ ut_assertok(uclass_get_device_by_seq(UCLASS_PCI, 0, &bus));
+
+ return 0;
+}
+DM_TEST(dm_test_pci_busnum, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);
+
/* Test that we can use the swapcase device correctly */
static int dm_test_pci_swapcase(struct unit_test_state *uts)
{
diff --git a/test/image/test-fit.py b/test/image/test-fit.py
index e9e756a..d5143cb 100755
--- a/test/image/test-fit.py
+++ b/test/image/test-fit.py
@@ -48,6 +48,15 @@
load = <0x40000>;
entry = <0x8>;
};
+ kernel@2 {
+ data = /incbin/("%(loadables1)s");
+ type = "kernel";
+ arch = "sandbox";
+ os = "linux";
+ compression = "none";
+ %(loadables1_load)s
+ entry = <0x0>;
+ };
fdt@1 {
description = "snow";
data = /incbin/("u-boot.dtb");
@@ -69,6 +78,15 @@
%(ramdisk_load)s
compression = "none";
};
+ ramdisk@2 {
+ description = "snow";
+ data = /incbin/("%(loadables2)s");
+ type = "ramdisk";
+ arch = "sandbox";
+ os = "linux";
+ %(loadables2_load)s
+ compression = "none";
+ };
};
configurations {
default = "conf@1";
@@ -76,6 +94,7 @@
kernel = "kernel@1";
fdt = "fdt@1";
%(ramdisk_config)s
+ %(loadables_config)s
};
};
};
@@ -103,6 +122,8 @@
sb save hostfs 0 %(kernel_addr)x %(kernel_out)s %(kernel_size)x
sb save hostfs 0 %(fdt_addr)x %(fdt_out)s %(fdt_size)x
sb save hostfs 0 %(ramdisk_addr)x %(ramdisk_out)s %(ramdisk_size)x
+sb save hostfs 0 %(loadables1_addr)x %(loadables1_out)s %(loadables1_size)x
+sb save hostfs 0 %(loadables2_addr)x %(loadables2_out)s %(loadables2_size)x
reset
'''
@@ -188,30 +209,32 @@
print >>fd, base_fdt
return fit
-def make_kernel():
+def make_kernel(filename, text):
"""Make a sample kernel with test data
+ Args:
+ filename: the name of the file you want to create
Returns:
- Filename of kernel created
+ Full path and filename of the kernel it created
"""
- fname = make_fname('test-kernel.bin')
+ fname = make_fname(filename)
data = ''
for i in range(100):
- data += 'this kernel %d is unlikely to boot\n' % i
+ data += 'this %s %d is unlikely to boot\n' % (text, i)
with open(fname, 'w') as fd:
print >>fd, data
return fname
-def make_ramdisk():
+def make_ramdisk(filename, text):
"""Make a sample ramdisk with test data
Returns:
Filename of ramdisk created
"""
- fname = make_fname('test-ramdisk.bin')
+ fname = make_fname(filename)
data = ''
for i in range(100):
- data += 'ramdisk %d was seldom used in the middle ages\n' % i
+ data += '%s %d was seldom used in the middle ages\n' % (text, i)
with open(fname, 'w') as fd:
print >>fd, data
return fname
@@ -298,11 +321,15 @@
# Set up invariant files
control_dtb = make_dtb()
- kernel = make_kernel()
- ramdisk = make_ramdisk()
+ kernel = make_kernel('test-kernel.bin', 'kernel')
+ ramdisk = make_ramdisk('test-ramdisk.bin', 'ramdisk')
+ loadables1 = make_kernel('test-loadables1.bin', 'lenrek')
+ loadables2 = make_ramdisk('test-loadables2.bin', 'ksidmar')
kernel_out = make_fname('kernel-out.bin')
fdt_out = make_fname('fdt-out.dtb')
ramdisk_out = make_fname('ramdisk-out.bin')
+ loadables1_out = make_fname('loadables1-out.bin')
+ loadables2_out = make_fname('loadables2-out.bin')
# Set up basic parameters with default values
params = {
@@ -324,6 +351,20 @@
'ramdisk_size' : filesize(ramdisk),
'ramdisk_load' : '',
'ramdisk_config' : '',
+
+ 'loadables1' : loadables1,
+ 'loadables1_out' : loadables1_out,
+ 'loadables1_addr' : 0x100000,
+ 'loadables1_size' : filesize(loadables1),
+ 'loadables1_load' : '',
+
+ 'loadables2' : loadables2,
+ 'loadables2_out' : loadables2_out,
+ 'loadables2_addr' : 0x140000,
+ 'loadables2_size' : filesize(loadables2),
+ 'loadables2_load' : '',
+
+ 'loadables_config' : '',
}
# Make a basic FIT and a script to load it
@@ -378,6 +419,19 @@
if read_file(ramdisk) != read_file(ramdisk_out):
fail('Ramdisk not loaded', stdout)
+ # Configuration with some Loadables
+ set_test('Kernel + FDT + Ramdisk load + Loadables')
+ params['loadables_config'] = 'loadables = "kernel@2", "ramdisk@2";'
+ params['loadables1_load'] = 'load = <%#x>;' % params['loadables1_addr']
+ params['loadables2_load'] = 'load = <%#x>;' % params['loadables2_addr']
+ fit = make_fit(mkimage, params)
+ stdout = command.Output(u_boot, '-d', control_dtb, '-c', cmd)
+ debug_stdout(stdout)
+ if read_file(loadables1) != read_file(loadables1_out):
+ fail('Loadables1 (kernel) not loaded', stdout)
+ if read_file(loadables2) != read_file(loadables2_out):
+ fail('Loadables2 (ramdisk) not loaded', stdout)
+
def run_tests():
"""Parse options, run the FIT tests and print the result"""
global base_path, base_dir
diff --git a/tools/Makefile b/tools/Makefile
index 4bbb153..8ff9c2e 100644
--- a/tools/Makefile
+++ b/tools/Makefile
@@ -122,7 +122,8 @@
# MXSImage needs LibSSL
ifneq ($(CONFIG_MX23)$(CONFIG_MX28)$(CONFIG_FIT_SIGNATURE),)
-HOSTLOADLIBES_mkimage += -lssl -lcrypto
+HOSTLOADLIBES_mkimage += \
+ $(shell pkg-config --libs libssl libcrypto 2> /dev/null || echo "-lssl -lcrypto")
endif
HOSTLOADLIBES_dumpimage := $(HOSTLOADLIBES_mkimage)
diff --git a/tools/ifdtool.c b/tools/ifdtool.c
index 590ccc9..1d61df1 100644
--- a/tools/ifdtool.c
+++ b/tools/ifdtool.c
@@ -462,7 +462,7 @@
if (ret)
return ret;
dump_region(i, frba);
- if (region.size == 0)
+ if (region.size <= 0)
continue;
region_fd = open(region_filename(i),
O_WRONLY | O_CREAT | O_TRUNC, S_IRUSR |
diff --git a/tools/mksunxiboot.c b/tools/mksunxiboot.c
index 0035f6e..3361251 100644
--- a/tools/mksunxiboot.c
+++ b/tools/mksunxiboot.c
@@ -65,7 +65,13 @@
#define SUN4I_SRAM_SIZE 0x7600 /* 0x7748+ is used by BROM */
#define SRAM_LOAD_MAX_SIZE (SUN4I_SRAM_SIZE - sizeof(struct boot_file_head))
-#define BLOCK_SIZE 512
+
+/*
+ * BROM (at least on A10 and A20) requires NAND-images to be explicitly aligned
+ * to a multiple of 8K, and rejects the image otherwise. MMC-images are fine
+ * with 512B blocks. To cater for both, align to the largest of the two.
+ */
+#define BLOCK_SIZE 0x2000
struct boot_img {
struct boot_file_head header;
diff --git a/tools/moveconfig.py b/tools/moveconfig.py
new file mode 100755
index 0000000..496c90a
--- /dev/null
+++ b/tools/moveconfig.py
@@ -0,0 +1,918 @@
+#!/usr/bin/env python2
+#
+# Author: Masahiro Yamada <yamada.masahiro@socionext.com>
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+"""
+Move config options from headers to defconfig files.
+
+Since Kconfig was introduced to U-Boot, we have worked on moving
+config options from headers to Kconfig (defconfig).
+
+This tool intends to help this tremendous work.
+
+
+Usage
+-----
+
+This tool takes one input file. (let's say 'recipe' file here.)
+The recipe describes the list of config options you want to move.
+Each line takes the form:
+<config_name> <type> <default>
+(the fields must be separated with whitespaces.)
+
+<config_name> is the name of config option.
+
+<type> is the type of the option. It must be one of bool, tristate,
+string, int, and hex.
+
+<default> is the default value of the option. It must be appropriate
+value corresponding to the option type. It must be either y or n for
+the bool type. Tristate options can also take m (although U-Boot has
+not supported the module feature).
+
+You can add two or more lines in the recipe file, so you can move
+multiple options at once.
+
+Let's say, for example, you want to move CONFIG_CMD_USB and
+CONFIG_SYS_TEXT_BASE.
+
+The type should be bool, hex, respectively. So, the recipe file
+should look like this:
+
+ $ cat recipe
+ CONFIG_CMD_USB bool n
+ CONFIG_SYS_TEXT_BASE hex 0x00000000
+
+Next you must edit the Kconfig to add the menu entries for the configs
+you are moving.
+
+And then run this tool giving the file name of the recipe
+
+ $ tools/moveconfig.py recipe
+
+The tool walks through all the defconfig files to move the config
+options specified by the recipe file.
+
+The log is also displayed on the terminal.
+
+Each line is printed in the format
+<defconfig_name> : <action>
+
+<defconfig_name> is the name of the defconfig
+(without the suffix _defconfig).
+
+<action> shows what the tool did for that defconfig.
+It looks like one of the followings:
+
+ - Move 'CONFIG_... '
+ This config option was moved to the defconfig
+
+ - Default value 'CONFIG_...'. Do nothing.
+ The value of this option is the same as default.
+ We do not have to add it to the defconfig.
+
+ - 'CONFIG_...' already exists in Kconfig. Do nothing.
+ This config option is already defined in Kconfig.
+ We do not need/want to touch it.
+
+ - Undefined. Do nothing.
+ This config option was not found in the config header.
+ Nothing to do.
+
+ - Failed to process. Skip.
+ An error occurred during processing this defconfig. Skipped.
+ (If -e option is passed, the tool exits immediately on error.)
+
+Finally, you will be asked, Clean up headers? [y/n]:
+
+If you say 'y' here, the unnecessary config defines are removed
+from the config headers (include/configs/*.h).
+It just uses the regex method, so you should not rely on it.
+Just in case, please do 'git diff' to see what happened.
+
+
+How does it works?
+------------------
+
+This tool runs configuration and builds include/autoconf.mk for every
+defconfig. The config options defined in Kconfig appear in the .config
+file (unless they are hidden because of unmet dependency.)
+On the other hand, the config options defined by board headers are seen
+in include/autoconf.mk. The tool looks for the specified options in both
+of them to decide the appropriate action for the options. If the option
+is found in the .config or the value is the same as the specified default,
+the option does not need to be touched. If the option is found in
+include/autoconf.mk, but not in the .config, and the value is different
+from the default, the tools adds the option to the defconfig.
+
+For faster processing, this tool handles multi-threading. It creates
+separate build directories where the out-of-tree build is run. The
+temporary build directories are automatically created and deleted as
+needed. The number of threads are chosen based on the number of the CPU
+cores of your system although you can change it via -j (--jobs) option.
+
+
+Toolchains
+----------
+
+Appropriate toolchain are necessary to generate include/autoconf.mk
+for all the architectures supported by U-Boot. Most of them are available
+at the kernel.org site, some are not provided by kernel.org.
+
+The default per-arch CROSS_COMPILE used by this tool is specified by
+the list below, CROSS_COMPILE. You may wish to update the list to
+use your own. Instead of modifying the list directly, you can give
+them via environments.
+
+
+Available options
+-----------------
+
+ -c, --color
+ Surround each portion of the log with escape sequences to display it
+ in color on the terminal.
+
+ -d, --defconfigs
+ Specify a file containing a list of defconfigs to move
+
+ -n, --dry-run
+ Peform a trial run that does not make any changes. It is useful to
+ see what is going to happen before one actually runs it.
+
+ -e, --exit-on-error
+ Exit immediately if Make exits with a non-zero status while processing
+ a defconfig file.
+
+ -H, --headers-only
+ Only cleanup the headers; skip the defconfig processing
+
+ -j, --jobs
+ Specify the number of threads to run simultaneously. If not specified,
+ the number of threads is the same as the number of CPU cores.
+
+ -v, --verbose
+ Show any build errors as boards are built
+
+To see the complete list of supported options, run
+
+ $ tools/moveconfig.py -h
+
+"""
+
+import fnmatch
+import multiprocessing
+import optparse
+import os
+import re
+import shutil
+import subprocess
+import sys
+import tempfile
+import time
+
+SHOW_GNU_MAKE = 'scripts/show-gnu-make'
+SLEEP_TIME=0.03
+
+# Here is the list of cross-tools I use.
+# Most of them are available at kernel.org
+# (https://www.kernel.org/pub/tools/crosstool/files/bin/), except the followings:
+# arc: https://github.com/foss-for-synopsys-dwc-arc-processors/toolchain/releases
+# blackfin: http://sourceforge.net/projects/adi-toolchain/files/
+# nds32: http://osdk.andestech.com/packages/
+# nios2: https://sourcery.mentor.com/GNUToolchain/subscription42545
+# sh: http://sourcery.mentor.com/public/gnu_toolchain/sh-linux-gnu
+CROSS_COMPILE = {
+ 'arc': 'arc-linux-',
+ 'aarch64': 'aarch64-linux-',
+ 'arm': 'arm-unknown-linux-gnueabi-',
+ 'avr32': 'avr32-linux-',
+ 'blackfin': 'bfin-elf-',
+ 'm68k': 'm68k-linux-',
+ 'microblaze': 'microblaze-linux-',
+ 'mips': 'mips-linux-',
+ 'nds32': 'nds32le-linux-',
+ 'nios2': 'nios2-linux-gnu-',
+ 'openrisc': 'or32-linux-',
+ 'powerpc': 'powerpc-linux-',
+ 'sh': 'sh-linux-gnu-',
+ 'sparc': 'sparc-linux-',
+ 'x86': 'i386-linux-'
+}
+
+STATE_IDLE = 0
+STATE_DEFCONFIG = 1
+STATE_AUTOCONF = 2
+STATE_SAVEDEFCONFIG = 3
+
+ACTION_MOVE = 0
+ACTION_DEFAULT_VALUE = 1
+ACTION_ALREADY_EXIST = 2
+ACTION_UNDEFINED = 3
+
+COLOR_BLACK = '0;30'
+COLOR_RED = '0;31'
+COLOR_GREEN = '0;32'
+COLOR_BROWN = '0;33'
+COLOR_BLUE = '0;34'
+COLOR_PURPLE = '0;35'
+COLOR_CYAN = '0;36'
+COLOR_LIGHT_GRAY = '0;37'
+COLOR_DARK_GRAY = '1;30'
+COLOR_LIGHT_RED = '1;31'
+COLOR_LIGHT_GREEN = '1;32'
+COLOR_YELLOW = '1;33'
+COLOR_LIGHT_BLUE = '1;34'
+COLOR_LIGHT_PURPLE = '1;35'
+COLOR_LIGHT_CYAN = '1;36'
+COLOR_WHITE = '1;37'
+
+### helper functions ###
+def get_devnull():
+ """Get the file object of '/dev/null' device."""
+ try:
+ devnull = subprocess.DEVNULL # py3k
+ except AttributeError:
+ devnull = open(os.devnull, 'wb')
+ return devnull
+
+def check_top_directory():
+ """Exit if we are not at the top of source directory."""
+ for f in ('README', 'Licenses'):
+ if not os.path.exists(f):
+ sys.exit('Please run at the top of source directory.')
+
+def get_make_cmd():
+ """Get the command name of GNU Make.
+
+ U-Boot needs GNU Make for building, but the command name is not
+ necessarily "make". (for example, "gmake" on FreeBSD).
+ Returns the most appropriate command name on your system.
+ """
+ process = subprocess.Popen([SHOW_GNU_MAKE], stdout=subprocess.PIPE)
+ ret = process.communicate()
+ if process.returncode:
+ sys.exit('GNU Make not found')
+ return ret[0].rstrip()
+
+def color_text(color_enabled, color, string):
+ """Return colored string."""
+ if color_enabled:
+ return '\033[' + color + 'm' + string + '\033[0m'
+ else:
+ return string
+
+def log_msg(color_enabled, color, defconfig, msg):
+ """Return the formated line for the log."""
+ return defconfig[:-len('_defconfig')].ljust(37) + ': ' + \
+ color_text(color_enabled, color, msg) + '\n'
+
+def update_cross_compile():
+ """Update per-arch CROSS_COMPILE via enviroment variables
+
+ The default CROSS_COMPILE values are available
+ in the CROSS_COMPILE list above.
+
+ You can override them via enviroment variables
+ CROSS_COMPILE_{ARCH}.
+
+ For example, if you want to override toolchain prefixes
+ for ARM and PowerPC, you can do as follows in your shell:
+
+ export CROSS_COMPILE_ARM=...
+ export CROSS_COMPILE_POWERPC=...
+ """
+ archs = []
+
+ for arch in os.listdir('arch'):
+ if os.path.exists(os.path.join('arch', arch, 'Makefile')):
+ archs.append(arch)
+
+ # arm64 is a special case
+ archs.append('aarch64')
+
+ for arch in archs:
+ env = 'CROSS_COMPILE_' + arch.upper()
+ cross_compile = os.environ.get(env)
+ if cross_compile:
+ CROSS_COMPILE[arch] = cross_compile
+
+def cleanup_one_header(header_path, patterns, dry_run):
+ """Clean regex-matched lines away from a file.
+
+ Arguments:
+ header_path: path to the cleaned file.
+ patterns: list of regex patterns. Any lines matching to these
+ patterns are deleted.
+ dry_run: make no changes, but still display log.
+ """
+ with open(header_path) as f:
+ lines = f.readlines()
+
+ matched = []
+ for i, line in enumerate(lines):
+ for pattern in patterns:
+ m = pattern.search(line)
+ if m:
+ print '%s: %s: %s' % (header_path, i + 1, line),
+ matched.append(i)
+ break
+
+ if dry_run or not matched:
+ return
+
+ with open(header_path, 'w') as f:
+ for i, line in enumerate(lines):
+ if not i in matched:
+ f.write(line)
+
+def cleanup_headers(config_attrs, dry_run):
+ """Delete config defines from board headers.
+
+ Arguments:
+ config_attrs: A list of dictionaris, each of them includes the name,
+ the type, and the default value of the target config.
+ dry_run: make no changes, but still display log.
+ """
+ while True:
+ choice = raw_input('Clean up headers? [y/n]: ').lower()
+ print choice
+ if choice == 'y' or choice == 'n':
+ break
+
+ if choice == 'n':
+ return
+
+ patterns = []
+ for config_attr in config_attrs:
+ config = config_attr['config']
+ patterns.append(re.compile(r'#\s*define\s+%s\W' % config))
+ patterns.append(re.compile(r'#\s*undef\s+%s\W' % config))
+
+ for dir in 'include', 'arch', 'board':
+ for (dirpath, dirnames, filenames) in os.walk(dir):
+ for filename in filenames:
+ if not fnmatch.fnmatch(filename, '*~'):
+ cleanup_one_header(os.path.join(dirpath, filename),
+ patterns, dry_run)
+
+### classes ###
+class KconfigParser:
+
+ """A parser of .config and include/autoconf.mk."""
+
+ re_arch = re.compile(r'CONFIG_SYS_ARCH="(.*)"')
+ re_cpu = re.compile(r'CONFIG_SYS_CPU="(.*)"')
+
+ def __init__(self, config_attrs, options, build_dir):
+ """Create a new parser.
+
+ Arguments:
+ config_attrs: A list of dictionaris, each of them includes the name,
+ the type, and the default value of the target config.
+ options: option flags.
+ build_dir: Build directory.
+ """
+ self.config_attrs = config_attrs
+ self.options = options
+ self.build_dir = build_dir
+
+ def get_cross_compile(self):
+ """Parse .config file and return CROSS_COMPILE.
+
+ Returns:
+ A string storing the compiler prefix for the architecture.
+ """
+ arch = ''
+ cpu = ''
+ dotconfig = os.path.join(self.build_dir, '.config')
+ for line in open(dotconfig):
+ m = self.re_arch.match(line)
+ if m:
+ arch = m.group(1)
+ continue
+ m = self.re_cpu.match(line)
+ if m:
+ cpu = m.group(1)
+
+ assert arch, 'Error: arch is not defined in %s' % defconfig
+
+ # fix-up for aarch64
+ if arch == 'arm' and cpu == 'armv8':
+ arch = 'aarch64'
+
+ return CROSS_COMPILE.get(arch, '')
+
+ def parse_one_config(self, config_attr, defconfig_lines, autoconf_lines):
+ """Parse .config, defconfig, include/autoconf.mk for one config.
+
+ This function looks for the config options in the lines from
+ defconfig, .config, and include/autoconf.mk in order to decide
+ which action should be taken for this defconfig.
+
+ Arguments:
+ config_attr: A dictionary including the name, the type,
+ and the default value of the target config.
+ defconfig_lines: lines from the original defconfig file.
+ autoconf_lines: lines from the include/autoconf.mk file.
+
+ Returns:
+ A tupple of the action for this defconfig and the line
+ matched for the config.
+ """
+ config = config_attr['config']
+ not_set = '# %s is not set' % config
+
+ if config_attr['type'] in ('bool', 'tristate') and \
+ config_attr['default'] == 'n':
+ default = not_set
+ else:
+ default = config + '=' + config_attr['default']
+
+ for line in defconfig_lines:
+ line = line.rstrip()
+ if line.startswith(config + '=') or line == not_set:
+ return (ACTION_ALREADY_EXIST, line)
+
+ if config_attr['type'] in ('bool', 'tristate'):
+ value = not_set
+ else:
+ value = '(undefined)'
+
+ for line in autoconf_lines:
+ line = line.rstrip()
+ if line.startswith(config + '='):
+ value = line
+ break
+
+ if value == default:
+ action = ACTION_DEFAULT_VALUE
+ elif value == '(undefined)':
+ action = ACTION_UNDEFINED
+ else:
+ action = ACTION_MOVE
+
+ return (action, value)
+
+ def update_defconfig(self, defconfig):
+ """Parse files for the config options and update the defconfig.
+
+ This function parses the given defconfig, the generated .config
+ and include/autoconf.mk searching the target options.
+ Move the config option(s) to the defconfig or do nothing if unneeded.
+ Also, display the log to show what happened to this defconfig.
+
+ Arguments:
+ defconfig: defconfig name.
+ """
+
+ defconfig_path = os.path.join('configs', defconfig)
+ dotconfig_path = os.path.join(self.build_dir, '.config')
+ autoconf_path = os.path.join(self.build_dir, 'include', 'autoconf.mk')
+ results = []
+
+ with open(defconfig_path) as f:
+ defconfig_lines = f.readlines()
+
+ with open(autoconf_path) as f:
+ autoconf_lines = f.readlines()
+
+ for config_attr in self.config_attrs:
+ result = self.parse_one_config(config_attr, defconfig_lines,
+ autoconf_lines)
+ results.append(result)
+
+ log = ''
+
+ for (action, value) in results:
+ if action == ACTION_MOVE:
+ actlog = "Move '%s'" % value
+ log_color = COLOR_LIGHT_GREEN
+ elif action == ACTION_DEFAULT_VALUE:
+ actlog = "Default value '%s'. Do nothing." % value
+ log_color = COLOR_LIGHT_BLUE
+ elif action == ACTION_ALREADY_EXIST:
+ actlog = "'%s' already defined in Kconfig. Do nothing." % value
+ log_color = COLOR_LIGHT_PURPLE
+ elif action == ACTION_UNDEFINED:
+ actlog = "Undefined. Do nothing."
+ log_color = COLOR_DARK_GRAY
+ else:
+ sys.exit("Internal Error. This should not happen.")
+
+ log += log_msg(self.options.color, log_color, defconfig, actlog)
+
+ # Some threads are running in parallel.
+ # Print log in one shot to not mix up logs from different threads.
+ print log,
+
+ if not self.options.dry_run:
+ with open(dotconfig_path, 'a') as f:
+ for (action, value) in results:
+ if action == ACTION_MOVE:
+ f.write(value + '\n')
+
+ os.remove(os.path.join(self.build_dir, 'include', 'config', 'auto.conf'))
+ os.remove(autoconf_path)
+
+class Slot:
+
+ """A slot to store a subprocess.
+
+ Each instance of this class handles one subprocess.
+ This class is useful to control multiple threads
+ for faster processing.
+ """
+
+ def __init__(self, config_attrs, options, devnull, make_cmd):
+ """Create a new process slot.
+
+ Arguments:
+ config_attrs: A list of dictionaris, each of them includes the name,
+ the type, and the default value of the target config.
+ options: option flags.
+ devnull: A file object of '/dev/null'.
+ make_cmd: command name of GNU Make.
+ """
+ self.options = options
+ self.build_dir = tempfile.mkdtemp()
+ self.devnull = devnull
+ self.make_cmd = (make_cmd, 'O=' + self.build_dir)
+ self.parser = KconfigParser(config_attrs, options, self.build_dir)
+ self.state = STATE_IDLE
+ self.failed_boards = []
+
+ def __del__(self):
+ """Delete the working directory
+
+ This function makes sure the temporary directory is cleaned away
+ even if Python suddenly dies due to error. It should be done in here
+ because it is guranteed the destructor is always invoked when the
+ instance of the class gets unreferenced.
+
+ If the subprocess is still running, wait until it finishes.
+ """
+ if self.state != STATE_IDLE:
+ while self.ps.poll() == None:
+ pass
+ shutil.rmtree(self.build_dir)
+
+ def add(self, defconfig, num, total):
+ """Assign a new subprocess for defconfig and add it to the slot.
+
+ If the slot is vacant, create a new subprocess for processing the
+ given defconfig and add it to the slot. Just returns False if
+ the slot is occupied (i.e. the current subprocess is still running).
+
+ Arguments:
+ defconfig: defconfig name.
+
+ Returns:
+ Return True on success or False on failure
+ """
+ if self.state != STATE_IDLE:
+ return False
+ cmd = list(self.make_cmd)
+ cmd.append(defconfig)
+ self.ps = subprocess.Popen(cmd, stdout=self.devnull,
+ stderr=subprocess.PIPE)
+ self.defconfig = defconfig
+ self.state = STATE_DEFCONFIG
+ self.num = num
+ self.total = total
+ return True
+
+ def poll(self):
+ """Check the status of the subprocess and handle it as needed.
+
+ Returns True if the slot is vacant (i.e. in idle state).
+ If the configuration is successfully finished, assign a new
+ subprocess to build include/autoconf.mk.
+ If include/autoconf.mk is generated, invoke the parser to
+ parse the .config and the include/autoconf.mk, and then set the
+ slot back to the idle state.
+
+ Returns:
+ Return True if the subprocess is terminated, False otherwise
+ """
+ if self.state == STATE_IDLE:
+ return True
+
+ if self.ps.poll() == None:
+ return False
+
+ if self.ps.poll() != 0:
+ errmsg = 'Failed to process.'
+ errout = self.ps.stderr.read()
+ if errout.find('gcc: command not found') != -1:
+ errmsg = 'Compiler not found ('
+ errmsg += color_text(self.options.color, COLOR_YELLOW,
+ self.cross_compile)
+ errmsg += color_text(self.options.color, COLOR_LIGHT_RED,
+ ')')
+ print >> sys.stderr, log_msg(self.options.color,
+ COLOR_LIGHT_RED,
+ self.defconfig,
+ errmsg),
+ if self.options.verbose:
+ print >> sys.stderr, color_text(self.options.color,
+ COLOR_LIGHT_CYAN, errout)
+ if self.options.exit_on_error:
+ sys.exit("Exit on error.")
+ else:
+ # If --exit-on-error flag is not set,
+ # skip this board and continue.
+ # Record the failed board.
+ self.failed_boards.append(self.defconfig)
+ self.state = STATE_IDLE
+ return True
+
+ if self.state == STATE_AUTOCONF:
+ self.parser.update_defconfig(self.defconfig)
+
+ print ' %d defconfigs out of %d\r' % (self.num + 1, self.total),
+ sys.stdout.flush()
+
+ """Save off the defconfig in a consistent way"""
+ cmd = list(self.make_cmd)
+ cmd.append('savedefconfig')
+ self.ps = subprocess.Popen(cmd, stdout=self.devnull,
+ stderr=subprocess.PIPE)
+ self.state = STATE_SAVEDEFCONFIG
+ return False
+
+ if self.state == STATE_SAVEDEFCONFIG:
+ defconfig_path = os.path.join(self.build_dir, 'defconfig')
+ shutil.move(defconfig_path,
+ os.path.join('configs', self.defconfig))
+ self.state = STATE_IDLE
+ return True
+
+ self.cross_compile = self.parser.get_cross_compile()
+ cmd = list(self.make_cmd)
+ if self.cross_compile:
+ cmd.append('CROSS_COMPILE=%s' % self.cross_compile)
+ cmd.append('KCONFIG_IGNORE_DUPLICATES=1')
+ cmd.append('include/config/auto.conf')
+ """This will be screen-scraped, so be sure the expected text will be
+ returned consistently on every machine by setting LANG=C"""
+ self.ps = subprocess.Popen(cmd, stdout=self.devnull,
+ env=dict(os.environ, LANG='C'),
+ stderr=subprocess.PIPE)
+ self.state = STATE_AUTOCONF
+ return False
+
+ def get_failed_boards(self):
+ """Returns a list of failed boards (defconfigs) in this slot.
+ """
+ return self.failed_boards
+
+class Slots:
+
+ """Controller of the array of subprocess slots."""
+
+ def __init__(self, config_attrs, options):
+ """Create a new slots controller.
+
+ Arguments:
+ config_attrs: A list of dictionaris containing the name, the type,
+ and the default value of the target CONFIG.
+ options: option flags.
+ """
+ self.options = options
+ self.slots = []
+ devnull = get_devnull()
+ make_cmd = get_make_cmd()
+ for i in range(options.jobs):
+ self.slots.append(Slot(config_attrs, options, devnull, make_cmd))
+
+ def add(self, defconfig, num, total):
+ """Add a new subprocess if a vacant slot is found.
+
+ Arguments:
+ defconfig: defconfig name to be put into.
+
+ Returns:
+ Return True on success or False on failure
+ """
+ for slot in self.slots:
+ if slot.add(defconfig, num, total):
+ return True
+ return False
+
+ def available(self):
+ """Check if there is a vacant slot.
+
+ Returns:
+ Return True if at lease one vacant slot is found, False otherwise.
+ """
+ for slot in self.slots:
+ if slot.poll():
+ return True
+ return False
+
+ def empty(self):
+ """Check if all slots are vacant.
+
+ Returns:
+ Return True if all the slots are vacant, False otherwise.
+ """
+ ret = True
+ for slot in self.slots:
+ if not slot.poll():
+ ret = False
+ return ret
+
+ def show_failed_boards(self):
+ """Display all of the failed boards (defconfigs)."""
+ failed_boards = []
+
+ for slot in self.slots:
+ failed_boards += slot.get_failed_boards()
+
+ if len(failed_boards) > 0:
+ msg = [ "The following boards were not processed due to error:" ]
+ msg += failed_boards
+ for line in msg:
+ print >> sys.stderr, color_text(self.options.color,
+ COLOR_LIGHT_RED, line)
+
+ with open('moveconfig.failed', 'w') as f:
+ for board in failed_boards:
+ f.write(board + '\n')
+
+def move_config(config_attrs, options):
+ """Move config options to defconfig files.
+
+ Arguments:
+ config_attrs: A list of dictionaris, each of them includes the name,
+ the type, and the default value of the target config.
+ options: option flags
+ """
+ if len(config_attrs) == 0:
+ print 'Nothing to do. exit.'
+ sys.exit(0)
+
+ print 'Move the following CONFIG options (jobs: %d)' % options.jobs
+ for config_attr in config_attrs:
+ print ' %s (type: %s, default: %s)' % (config_attr['config'],
+ config_attr['type'],
+ config_attr['default'])
+
+ if options.defconfigs:
+ defconfigs = [line.strip() for line in open(options.defconfigs)]
+ for i, defconfig in enumerate(defconfigs):
+ if not defconfig.endswith('_defconfig'):
+ defconfigs[i] = defconfig + '_defconfig'
+ if not os.path.exists(os.path.join('configs', defconfigs[i])):
+ sys.exit('%s - defconfig does not exist. Stopping.' %
+ defconfigs[i])
+ else:
+ # All the defconfig files to be processed
+ defconfigs = []
+ for (dirpath, dirnames, filenames) in os.walk('configs'):
+ dirpath = dirpath[len('configs') + 1:]
+ for filename in fnmatch.filter(filenames, '*_defconfig'):
+ defconfigs.append(os.path.join(dirpath, filename))
+
+ slots = Slots(config_attrs, options)
+
+ # Main loop to process defconfig files:
+ # Add a new subprocess into a vacant slot.
+ # Sleep if there is no available slot.
+ for i, defconfig in enumerate(defconfigs):
+ while not slots.add(defconfig, i, len(defconfigs)):
+ while not slots.available():
+ # No available slot: sleep for a while
+ time.sleep(SLEEP_TIME)
+
+ # wait until all the subprocesses finish
+ while not slots.empty():
+ time.sleep(SLEEP_TIME)
+
+ print ''
+ slots.show_failed_boards()
+
+def bad_recipe(filename, linenum, msg):
+ """Print error message with the file name and the line number and exit."""
+ sys.exit("%s: line %d: error : " % (filename, linenum) + msg)
+
+def parse_recipe(filename):
+ """Parse the recipe file and retrieve the config attributes.
+
+ This function parses the given recipe file and gets the name,
+ the type, and the default value of the target config options.
+
+ Arguments:
+ filename: path to file to be parsed.
+ Returns:
+ A list of dictionaris, each of them includes the name,
+ the type, and the default value of the target config.
+ """
+ config_attrs = []
+ linenum = 1
+
+ for line in open(filename):
+ tokens = line.split()
+ if len(tokens) != 3:
+ bad_recipe(filename, linenum,
+ "%d fields in this line. Each line must contain 3 fields"
+ % len(tokens))
+
+ (config, type, default) = tokens
+
+ # prefix the option name with CONFIG_ if missing
+ if not config.startswith('CONFIG_'):
+ config = 'CONFIG_' + config
+
+ # sanity check of default values
+ if type == 'bool':
+ if not default in ('y', 'n'):
+ bad_recipe(filename, linenum,
+ "default for bool type must be either y or n")
+ elif type == 'tristate':
+ if not default in ('y', 'm', 'n'):
+ bad_recipe(filename, linenum,
+ "default for tristate type must be y, m, or n")
+ elif type == 'string':
+ if default[0] != '"' or default[-1] != '"':
+ bad_recipe(filename, linenum,
+ "default for string type must be surrounded by double-quotations")
+ elif type == 'int':
+ try:
+ int(default)
+ except:
+ bad_recipe(filename, linenum,
+ "type is int, but default value is not decimal")
+ elif type == 'hex':
+ if len(default) < 2 or default[:2] != '0x':
+ bad_recipe(filename, linenum,
+ "default for hex type must be prefixed with 0x")
+ try:
+ int(default, 16)
+ except:
+ bad_recipe(filename, linenum,
+ "type is hex, but default value is not hexadecimal")
+ else:
+ bad_recipe(filename, linenum,
+ "unsupported type '%s'. type must be one of bool, tristate, string, int, hex"
+ % type)
+
+ config_attrs.append({'config': config, 'type': type, 'default': default})
+ linenum += 1
+
+ return config_attrs
+
+def main():
+ try:
+ cpu_count = multiprocessing.cpu_count()
+ except NotImplementedError:
+ cpu_count = 1
+
+ parser = optparse.OptionParser()
+ # Add options here
+ parser.add_option('-c', '--color', action='store_true', default=False,
+ help='display the log in color')
+ parser.add_option('-d', '--defconfigs', type='string',
+ help='a file containing a list of defconfigs to move')
+ parser.add_option('-n', '--dry-run', action='store_true', default=False,
+ help='perform a trial run (show log with no changes)')
+ parser.add_option('-e', '--exit-on-error', action='store_true',
+ default=False,
+ help='exit immediately on any error')
+ parser.add_option('-H', '--headers-only', dest='cleanup_headers_only',
+ action='store_true', default=False,
+ help='only cleanup the headers')
+ parser.add_option('-j', '--jobs', type='int', default=cpu_count,
+ help='the number of jobs to run simultaneously')
+ parser.add_option('-v', '--verbose', action='store_true', default=False,
+ help='show any build errors as boards are built')
+ parser.usage += ' recipe_file\n\n' + \
+ 'The recipe_file should describe config options you want to move.\n' + \
+ 'Each line should contain config_name, type, default_value\n\n' + \
+ 'Example:\n' + \
+ 'CONFIG_FOO bool n\n' + \
+ 'CONFIG_BAR int 100\n' + \
+ 'CONFIG_BAZ string "hello"\n'
+
+ (options, args) = parser.parse_args()
+
+ if len(args) != 1:
+ parser.print_usage()
+ sys.exit(1)
+
+ config_attrs = parse_recipe(args[0])
+
+ update_cross_compile()
+
+ check_top_directory()
+
+ if not options.cleanup_headers_only:
+ move_config(config_attrs, options)
+
+ cleanup_headers(config_attrs, options.dry_run)
+
+if __name__ == '__main__':
+ main()