commit | 5a2ad95d792b145b486ae1d43c63e6e24d8d35e5 | [log] [tgz] |
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author | Rajkumar Ayyasamy <arajkuma@codeaurora.org> | Mon Apr 16 15:47:13 2018 +0530 |
committer | Rajkumar Ayyasamy <arajkuma@codeaurora.org> | Tue Apr 17 08:39:40 2018 +0530 |
tree | 72e6b8e81f35c1486121122fc561c5c8177cdb3a | |
parent | 35992873a2a6ff045e714fead93345307667579e [diff] |
ipq40xx: Added emmc clk reset during mmc deinit 1. Added emmc clk reset during mmc deinitialization to avoid the mmc init failure in kernal bootup. 2. Clock has been configured to 192 Mhz for SDHCI mode 3. Proper register is used for disabling emmc clock Change-Id: Id21e294380ee904027e5d6d2b2929acbd7bac672 Signed-off-by: Rajkumar Ayyasamy <arajkuma@codeaurora.org>