tree c798a414e8c103be95166def21606b5179f44c17
parent c50afc1dab78a1a72bc37b60d97864e56b52cc5c
author Mikhail Kshevetskiy <mikhail.kshevetskiy@gmail.com> 1341823961 +0000
committer Albert ARIBAUD <albert.u.boot@aribaud.net> 1346504290 +0200

arm/davinci: fix DDR2/mDDR memory controller initialization for Omap L138

follow section 15.2.13.1 (Initializing Following Device Power Up or Reset) of
OMAP-L138 DSP+ARM Processor Technical Reference Manual

Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@gmail.com>
Acked-by: Christian Riesch <christian.riesch@omicron.at>
Tested-by: Christian Riesch <christian.riesch@omicron.at>