ipq40xx: spi: Added support for GD25Q256

Change-Id: Iefc667c95558234e54111e6052f16e0f035b24ab
Signed-off-by: Rajkumar Ayyasamy <arajkuma@codeaurora.org>
diff --git a/arch/arm/include/asm/arch-qca-common/qca_common.h b/arch/arm/include/asm/arch-qca-common/qca_common.h
index 28529b9..0d2fca2 100644
--- a/arch/arm/include/asm/arch-qca-common/qca_common.h
+++ b/arch/arm/include/asm/arch-qca-common/qca_common.h
@@ -79,4 +79,5 @@
 #define MMC_MODE_HC		0x800
 
 #define SPI_DEFAULT_ADDR_LEN	3
+#define SPI_MAX_ADDR_LEN	4
 #endif  /*  __QCA_COMMON_H_ */
diff --git a/board/qca/arm/ipq40xx/ipq40xx.c b/board/qca/arm/ipq40xx/ipq40xx.c
index ac89aa0..2fbc7b0 100644
--- a/board/qca/arm/ipq40xx/ipq40xx.c
+++ b/board/qca/arm/ipq40xx/ipq40xx.c
@@ -337,3 +337,8 @@
 
 	return 0;
 }
+
+unsigned int get_smem_spi_addr_len(void)
+{
+	return SPI_MAX_ADDR_LEN;
+}
diff --git a/drivers/mtd/spi/sf_internal.h b/drivers/mtd/spi/sf_internal.h
index 51a3641..d58d841 100644
--- a/drivers/mtd/spi/sf_internal.h
+++ b/drivers/mtd/spi/sf_internal.h
@@ -57,6 +57,8 @@
 #define SPI_FLASH_4B_ADDR_LEN		4
 #define SPI_FLASH_16MB_BOUN		0x1000000
 
+#define SPI_FLASH_CMD_EN4B		0xb7       /* Enter 4-byte mode */
+
 /* CFI Manufacture ID's */
 #define SPI_FLASH_CFI_MFR_SPANSION	0x01
 #define SPI_FLASH_CFI_MFR_STMICRO	0x20
@@ -64,6 +66,7 @@
 #define SPI_FLASH_CFI_MFR_SST		0xbf
 #define SPI_FLASH_CFI_MFR_WINBOND	0xef
 #define SPI_FLASH_CFI_MFR_ATMEL		0x1f
+#define SPI_FLASH_CFI_MFR_GIGA		0xc8
 
 /* Erase commands */
 #define CMD_ERASE_4K			0x20
diff --git a/drivers/mtd/spi/sf_params.c b/drivers/mtd/spi/sf_params.c
index e692078..885a8e8 100644
--- a/drivers/mtd/spi/sf_params.c
+++ b/drivers/mtd/spi/sf_params.c
@@ -36,6 +36,7 @@
 	{"GD25Q64B",	   0xc84017, 0x0,	64 * 1024,   128, RD_NORM,		    SECT_4K},
 	{"GD25LQ32",	   0xc86016, 0x0,	64 * 1024,    64, RD_NORM,		    SECT_4K},
 	{"GD25Q128",	   0xc84018, 0x0,	64 * 1024,   256, RD_NORM,		    SECT_4K},
+	{"GD25Q256",	   0xc84019, 0x0,	64 * 1024,   512, RD_NORM,		    SECT_4K},
 #endif
 #ifdef CONFIG_SPI_FLASH_ISSI		/* ISSI */
 	{"IS25LP032",	   0x9d6016, 0x0,	64 * 1024,    64, RD_NORM,			  0},
diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c
index 82f8aa2..2b9217f 100644
--- a/drivers/mtd/spi/spi_flash.c
+++ b/drivers/mtd/spi/spi_flash.c
@@ -1102,12 +1102,24 @@
 	}
 
 	flash->addr_width = SPI_FLASH_3B_ADDR_LEN;
-	printf("SPI_ADDR_LEN=%x\n",get_smem_spi_addr_len());
 	if ((flash->size > SPI_FLASH_16MB_BOUN) &&
 		(get_smem_spi_addr_len() == SPI_FLASH_4B_ADDR_LEN)) {
+#ifndef CONFIG_IPQ_4B_ADDR_SWITCH_REQD
 		if (idcode[0] == SPI_FLASH_CFI_MFR_WINBOND)
 			flash->addr_width = SPI_FLASH_4B_ADDR_LEN;
+#else
+		if (idcode[0] == SPI_FLASH_CFI_MFR_GIGA) {
+			ret = spi_flash_cmd(spi, SPI_FLASH_CMD_EN4B, NULL, 0);
+			if (ret) {
+				printf("SF:Failed to switch to 4 byte mode\n");
+				flash->size = 0x1000000;
+			} else
+				flash->addr_width = SPI_FLASH_4B_ADDR_LEN;
+		}
+#endif
 	}
+	printf("SPI_ADDR_LEN=%x\n",flash->addr_width);
+
 #ifdef CONFIG_SPI_FLASH_STMICRO
 	if (params->flags & E_FSR)
 		flash->flags |= SNOR_F_USE_FSR;
diff --git a/include/configs/ipq40xx.h b/include/configs/ipq40xx.h
index 424a5c8..217c262 100644
--- a/include/configs/ipq40xx.h
+++ b/include/configs/ipq40xx.h
@@ -302,4 +302,6 @@
 #define CONFIG_CMD_PCI
 #define CONFIG_PCI_SCAN_SHOW
 #endif
+
+#define CONFIG_IPQ_4B_ADDR_SWITCH_REQD
 #endif /* _IPQ40XX_H */