tree cf49a6530090852c02dab05228ebc358de25787a
parent f1ae382dfd3850f4fbf34d794a31b8a1d1a5c389
author Paul Burton <paul.burton@imgtec.com> 1396885307 +0100
committer Tom Rini <trini@ti.com> 1397832150 -0400

pcnet: align rx buffers for cache invalidation

The RX buffers are invalidated when a packet is received, however they
were not suitably cache-line aligned. Allocate them seperately to the
pcnet_priv structure and align to ARCH_DMA_MINALIGN in order to ensure
suitable alignment for the cache invalidation, preventing anything else
being placed in the same lines & lost.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>