[PATCH] Update AMCC Katmai 440SPe eval board support
This patch updates the recently added Katmai board support. The biggest
change is the support of ECC DIMM modules in the 440SP(e) SPD DDR2
driver.
Please note, that still some problems are left with some memory
configurations. See the driver for more details.
Signed-off-by: Stefan Roese <sr@denx.de>
diff --git a/include/configs/katmai.h b/include/configs/katmai.h
index c750e14..f350155 100644
--- a/include/configs/katmai.h
+++ b/include/configs/katmai.h
@@ -107,11 +107,8 @@
* DDR SDRAM
*----------------------------------------------------------------------*/
#define CONFIG_SPD_EEPROM 1 /* Use SPD EEPROM for setup */
-#define SPD_EEPROM_ADDRESS {0x51, 0x52} /* SPD i2c spd addresses */
-#define IIC0_DIMM0_ADDR 0x51
-#define IIC0_DIMM1_ADDR 0x52
+#define SPD_EEPROM_ADDRESS {0x51, 0x52} /* SPD i2c spd addresses*/
#undef CONFIG_STRESS
-#undef ENABLE_ECC
/*-----------------------------------------------------------------------
* I2C
@@ -384,6 +381,22 @@
EBC_CFG_PME_DISABLE | \
EBC_CFG_PR_16)
+/*-----------------------------------------------------------------------
+ * GPIO Setup
+ *----------------------------------------------------------------------*/
+#define CFG_GPIO_PCIE_PRESENT0 17
+#define CFG_GPIO_PCIE_PRESENT1 21
+#define CFG_GPIO_PCIE_PRESENT2 23
+#define CFG_GPIO_RS232_FORCEOFF 30
+
+#define CFG_PFC0 (GPIO_VAL(CFG_GPIO_PCIE_PRESENT0) | \
+ GPIO_VAL(CFG_GPIO_PCIE_PRESENT1) | \
+ GPIO_VAL(CFG_GPIO_PCIE_PRESENT2) | \
+ GPIO_VAL(CFG_GPIO_RS232_FORCEOFF))
+#define CFG_GPIO_OR GPIO_VAL(CFG_GPIO_RS232_FORCEOFF)
+#define CFG_GPIO_TCR GPIO_VAL(CFG_GPIO_RS232_FORCEOFF)
+#define CFG_GPIO_ODR 0
+
/*
* For booting Linux, the board info and command line data
* have to be in the first 8 MB of memory, since this is
diff --git a/include/ppc440.h b/include/ppc440.h
index c24f5b7..1c7f11c 100644
--- a/include/ppc440.h
+++ b/include/ppc440.h
@@ -3190,7 +3190,8 @@
#define GPIO0 0
#define GPIO1 1
-#if defined(CONFIG_440GP) || defined(CONFIG_440GX)
+#if defined(CONFIG_440GP) || defined(CONFIG_440GX) || \
+ defined(CONFIG_440SP) || defined(CONFIG_440SPE)
#define GPIO0_BASE (CFG_PERIPHERAL_BASE+0x00000700)
#define GPIO0_OR (GPIO0_BASE+0x0)
@@ -3275,6 +3276,8 @@
#define GPIO_IN_SEL 0x40000000 /* GPIO_IN value put in GPIO_ISx for the GPIO nb 0 */
/* For the other GPIO number, you must shift */
+#define GPIO_VAL(gpio) (0x80000000 >> (gpio))
+
#ifndef __ASSEMBLY__
typedef enum gpio_select { GPIO_SEL, GPIO_ALT1, GPIO_ALT2, GPIO_ALT3 } gpio_select_t;
@@ -3285,7 +3288,6 @@
gpio_select_t alt_nb; /* Selected Alternate */
} gpio_param_s;
-
#endif /* __ASSEMBLY__ */
/*