tree c791a32a4bdf363a7be4e9e4a2debcd3bbe92602
parent 232fcc6e9d5d13abba57994e6ee22e38e1321669
author Marek Vasut <marex@denx.de> 1436412062 +0200
committer Marek Vasut <marex@denx.de> 1439036047 +0200

arm: socfpga: spl: Add missing reset logic

Make sure that all the peripherals are correctly reset and then
brought out of reset in the SPL. Not going through proper reset
cycle might leave the IP blocks in inconsistent state.

Signed-off-by: Marek Vasut <marex@denx.de>