tree 6ae8dc65892324300b5f8d94df6795383a353607
parent 64cfd3f9645bebdadd4c867db5efcf8b7a568f77
author Stephen Warren <swarren@nvidia.com> 1369429397 -0600
committer Marek Vasut <marex@denx.de> 1371068572 +0200

usb: ehci: add missing cache managment

Commit 8f62ca6 "usb: ehci: Support interrupt transfers via periodic list"
didn't include any cache management in the new interrupt transfer path.
It also added an extra write to or_asynclistaddr in usb_lowlevel_init(),
without having flushed out the data there.

Add the missing cache management calls, so that the code works again.

This allows the USB keyboard on Tegra's Seaboard/Springbank boards to
work.

Cc: Patrick Georgi <patrick@georgi-clan.de>
Cc: Vincent Palatin <vpalatin@chromium.org>
Cc: Julius Werner <jwerner@chromium.org>
Cc: Simon Glass <sjg@chromium.org>
Cc: Marek Vasut <marex@denx.de>
Signed-off-by: Stephen Warren <swarren@nvidia.com>