tree 75a9861ab24ad1b02afe9e7f88640ff720008a27
parent e612ddf5939ba257f2933c7539ee39a3f760e8ce
author Jagannadha Sutradharudu Teki <jaganna@xilinx.com> 1369925654 +0530
committer Jagannadha Sutradharudu Teki <jaganna@xilinx.com> 1372005170 +0530

sf: Update sf to support all sizes of flashes

Updated the spi_flash framework to handle all sizes of flashes
using bank/extd addr reg facility

The current implementation in spi_flash supports 3-byte address mode
due to this up to 16Mbytes amount of flash is able to access for those
flashes which has an actual size of > 16MB.

As most of the flashes introduces a bank/extd address registers
for accessing the flashes in 16Mbytes of banks if the flash size
is > 16Mbytes, this new scheme will add the bank selection feature
for performing write/erase operations on all flashes.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>