MX51: removed warnings for the mx51evk
The patch removes warnings at compile time and provides
some cleanup code:
- Removed comment on NAND (not yet supported) from lowlevel_init.S
- Removed NFMS bit definition from imx-regs.h
The bit is only related to MX.25/35 and can lead to confusion
- Moved is_soc_rev() to soc specific code (removed from mx51evk.c)
Signed-off-by: Stefano Babic <sbabic@denx.de>
diff --git a/board/freescale/mx51evk/mx51evk.c b/board/freescale/mx51evk/mx51evk.c
index df0e8ed..af1b0bd 100644
--- a/board/freescale/mx51evk/mx51evk.c
+++ b/board/freescale/mx51evk/mx51evk.c
@@ -26,6 +26,7 @@
#include <asm/arch/mx51_pins.h>
#include <asm/arch/iomux.h>
#include <asm/errno.h>
+#include <asm/arch/sys_proto.h>
#include <i2c.h>
#include <mmc.h>
#include <fsl_esdhc.h>
@@ -48,16 +49,6 @@
return system_rev;
}
-static inline void set_board_rev(int rev)
-{
- system_rev |= (rev & 0xF) << 8;
-}
-
-inline int is_soc_rev(int rev)
-{
- return (system_rev & 0xFF) - rev;
-}
-
int dram_init(void)
{
gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
diff --git a/cpu/arm_cortexa8/mx51/clock.c b/cpu/arm_cortexa8/mx51/clock.c
index 3c6f0c0..38480ac 100644
--- a/cpu/arm_cortexa8/mx51/clock.c
+++ b/cpu/arm_cortexa8/mx51/clock.c
@@ -28,6 +28,7 @@
#include <asm/errno.h>
#include <asm/arch/imx-regs.h>
#include <asm/arch/crm_regs.h>
+#include <asm/arch/clock.h>
enum pll_clocks {
PLL1_CLOCK = 0,
@@ -42,7 +43,7 @@
[PLL3_CLOCK] = (struct mxc_pll_reg *)PLL3_BASE_ADDR,
};
-struct mxc_ccm_reg *mxc_ccm = MXC_CCM_BASE;
+struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)MXC_CCM_BASE;
/*
* Calculate the frequency of this pll.
diff --git a/cpu/arm_cortexa8/mx51/iomux.c b/cpu/arm_cortexa8/mx51/iomux.c
index fc39e8a..62b2954 100644
--- a/cpu/arm_cortexa8/mx51/iomux.c
+++ b/cpu/arm_cortexa8/mx51/iomux.c
@@ -25,6 +25,7 @@
#include <asm/arch/imx-regs.h>
#include <asm/arch/mx51_pins.h>
#include <asm/arch/iomux.h>
+#include <asm/arch/sys_proto.h>
/* IOMUX register (base) addresses */
enum iomux_reg_addr {
diff --git a/cpu/arm_cortexa8/mx51/lowlevel_init.S b/cpu/arm_cortexa8/mx51/lowlevel_init.S
index 680a90e..700506e 100644
--- a/cpu/arm_cortexa8/mx51/lowlevel_init.S
+++ b/cpu/arm_cortexa8/mx51/lowlevel_init.S
@@ -276,7 +276,6 @@
init_clock
- /* return from mxc_nand_load */
/* r12 saved upper lr*/
mov pc,lr
diff --git a/cpu/arm_cortexa8/mx51/soc.c b/cpu/arm_cortexa8/mx51/soc.c
index 5e69301..2a139b2 100644
--- a/cpu/arm_cortexa8/mx51/soc.c
+++ b/cpu/arm_cortexa8/mx51/soc.c
@@ -25,9 +25,14 @@
#include <common.h>
#include <asm/arch/imx-regs.h>
+#include <asm/arch/clock.h>
#include <asm/errno.h>
#include <asm/io.h>
+#ifdef CONFIG_FSL_ESDHC
+#include <fsl_esdhc.h>
+#endif
+
u32 get_cpu_rev(void)
{
int reg;
@@ -65,7 +70,7 @@
printf("CPU: Freescale i.MX51 family %d.%dV at %d MHz\n",
(cpurev & 0xF0) >> 4,
(cpurev & 0x0F) >> 4,
- get_mcu_main_clk() / 1000000);
+ mxc_get_clock(MXC_ARM_CLK) / 1000000);
return 0;
}
#endif
diff --git a/cpu/arm_cortexa8/mx51/speed.c b/cpu/arm_cortexa8/mx51/speed.c
index 10acbbf..a444def 100644
--- a/cpu/arm_cortexa8/mx51/speed.c
+++ b/cpu/arm_cortexa8/mx51/speed.c
@@ -26,6 +26,7 @@
#include <common.h>
#include <asm/arch/imx-regs.h>
+#include <asm/arch/clock.h>
int get_clocks(void)
{
diff --git a/include/asm-arm/arch-mx51/clock.h b/include/asm-arm/arch-mx51/clock.h
index 449a191..1f8a537 100644
--- a/include/asm-arm/arch-mx51/clock.h
+++ b/include/asm-arm/arch-mx51/clock.h
@@ -23,9 +23,21 @@
#ifndef __ASM_ARCH_CLOCK_H
#define __ASM_ARCH_CLOCK_H
+
+enum mxc_clock {
+ MXC_ARM_CLK = 0,
+ MXC_AHB_CLK,
+ MXC_IPG_CLK,
+ MXC_IPG_PERCLK,
+ MXC_UART_CLK,
+ MXC_CSPI_CLK,
+ MXC_FEC_CLK,
+};
+
unsigned int imx_decode_pll(unsigned int pll, unsigned int f_ref);
-ulong imx_get_uartclk(void);
-ulong imx_get_fecclk(void);
+u32 imx_get_uartclk(void);
+u32 imx_get_fecclk(void);
+unsigned int mxc_get_clock(enum mxc_clock clk);
#endif /* __ASM_ARCH_CLOCK_H */
diff --git a/include/asm-arm/arch-mx51/imx-regs.h b/include/asm-arm/arch-mx51/imx-regs.h
index 927eda3..3887d3c 100644
--- a/include/asm-arm/arch-mx51/imx-regs.h
+++ b/include/asm-arm/arch-mx51/imx-regs.h
@@ -209,16 +209,6 @@
#ifndef __ASSEMBLY__
-enum mxc_clock {
- MXC_ARM_CLK = 0,
- MXC_AHB_CLK,
- MXC_IPG_CLK,
- MXC_IPG_PERCLK,
- MXC_UART_CLK,
- MXC_CSPI_CLK,
- MXC_FEC_CLK,
-};
-
struct clkctl {
u32 ccr;
u32 ccdr;
@@ -266,17 +256,6 @@
u32 cswcr2;
};
-/*!
- * NFMS bit in RCSR register for pagesize of nandflash
- */
-#define NFMS (*((volatile u32 *)(CCM_BASE_ADDR+0x18)))
-#define NFMS_BIT 8
-#define NFMS_NF_DWIDTH 14
-#define NFMS_NF_PG_SZ 8
-
-extern unsigned int get_board_rev(void);
-extern int is_soc_rev(int rev);
-
#endif /* __ASSEMBLER__*/
#endif /* __ASM_ARCH_MXC_MX51_H__ */
diff --git a/include/asm-arm/arch-mx51/sys_proto.h b/include/asm-arm/arch-mx51/sys_proto.h
new file mode 100644
index 0000000..bf500a8
--- /dev/null
+++ b/include/asm-arm/arch-mx51/sys_proto.h
@@ -0,0 +1,30 @@
+/*
+ * (C) Copyright 2009
+ * Stefano Babic, DENX Software Engineering, sbabic@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef _SYS_PROTO_H_
+#define _SYS_PROTO_H_
+
+u32 get_cpu_rev(void);
+#define is_soc_rev(rev) ((get_cpu_rev() & 0xFF) - rev)
+
+#endif