| commit | ec4b73f09c384007b274b38052149025e080b138 | [log] [tgz] |
|---|---|---|
| author | Jagannadha Sutradharudu Teki <jagannadha.sutradharudu-teki@xilinx.com> | Fri Sep 20 18:39:47 2013 +0530 |
| committer | Michal Simek <michal.simek@xilinx.com> | Wed Nov 06 09:15:12 2013 +0100 |
| tree | 873b53a50014c59368f2c438917bec1a317212c4 | |
| parent | e5a9a4076f1fb9fb9ce53c2aec32422073bbc66a [diff] |
fpga: zynqpl: Add dcache flush support Buffers must be cache and dma aligned. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>