wdenk | 71f9511 | 2003-06-15 22:40:42 +0000 | [diff] [blame] | 1 | /* |
Jerry Huang | 4a6ee17 | 2010-11-25 17:06:07 +0000 | [diff] [blame] | 2 | * Copyright 2008,2010 Freescale Semiconductor, Inc |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 3 | * Andy Fleming |
| 4 | * |
| 5 | * Based (loosely) on the Linux code |
wdenk | 71f9511 | 2003-06-15 22:40:42 +0000 | [diff] [blame] | 6 | * |
| 7 | * See file CREDITS for list of people who contributed to this |
| 8 | * project. |
| 9 | * |
| 10 | * This program is free software; you can redistribute it and/or |
| 11 | * modify it under the terms of the GNU General Public License as |
| 12 | * published by the Free Software Foundation; either version 2 of |
| 13 | * the License, or (at your option) any later version. |
| 14 | * |
| 15 | * This program is distributed in the hope that it will be useful, |
| 16 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 18 | * GNU General Public License for more details. |
| 19 | * |
| 20 | * You should have received a copy of the GNU General Public License |
| 21 | * along with this program; if not, write to the Free Software |
| 22 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 23 | * MA 02111-1307 USA |
| 24 | */ |
| 25 | |
| 26 | #ifndef _MMC_H_ |
| 27 | #define _MMC_H_ |
wdenk | 71f9511 | 2003-06-15 22:40:42 +0000 | [diff] [blame] | 28 | |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 29 | #include <linux/list.h> |
| 30 | |
| 31 | #define SD_VERSION_SD 0x20000 |
| 32 | #define SD_VERSION_2 (SD_VERSION_SD | 0x20) |
| 33 | #define SD_VERSION_1_0 (SD_VERSION_SD | 0x10) |
| 34 | #define SD_VERSION_1_10 (SD_VERSION_SD | 0x1a) |
| 35 | #define MMC_VERSION_MMC 0x10000 |
| 36 | #define MMC_VERSION_UNKNOWN (MMC_VERSION_MMC) |
| 37 | #define MMC_VERSION_1_2 (MMC_VERSION_MMC | 0x12) |
| 38 | #define MMC_VERSION_1_4 (MMC_VERSION_MMC | 0x14) |
| 39 | #define MMC_VERSION_2_2 (MMC_VERSION_MMC | 0x22) |
| 40 | #define MMC_VERSION_3 (MMC_VERSION_MMC | 0x30) |
| 41 | #define MMC_VERSION_4 (MMC_VERSION_MMC | 0x40) |
| 42 | |
| 43 | #define MMC_MODE_HS 0x001 |
| 44 | #define MMC_MODE_HS_52MHz 0x010 |
| 45 | #define MMC_MODE_4BIT 0x100 |
| 46 | #define MMC_MODE_8BIT 0x200 |
Thomas Chou | d52ebf1 | 2010-12-24 13:12:21 +0000 | [diff] [blame] | 47 | #define MMC_MODE_SPI 0x400 |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 48 | |
| 49 | #define SD_DATA_4BIT 0x00040000 |
| 50 | |
Albin Tonnerre | 79b91de | 2009-08-22 14:21:53 +0200 | [diff] [blame] | 51 | #define IS_SD(x) (x->version & SD_VERSION_SD) |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 52 | |
| 53 | #define MMC_DATA_READ 1 |
| 54 | #define MMC_DATA_WRITE 2 |
| 55 | |
| 56 | #define NO_CARD_ERR -16 /* No SD/MMC card inserted */ |
| 57 | #define UNUSABLE_ERR -17 /* Unusable Card */ |
| 58 | #define COMM_ERR -18 /* Communications Error */ |
| 59 | #define TIMEOUT -19 |
| 60 | |
Haavard Skinnemoen | 341188b | 2008-05-22 11:09:59 +0200 | [diff] [blame] | 61 | #define MMC_CMD_GO_IDLE_STATE 0 |
| 62 | #define MMC_CMD_SEND_OP_COND 1 |
| 63 | #define MMC_CMD_ALL_SEND_CID 2 |
| 64 | #define MMC_CMD_SET_RELATIVE_ADDR 3 |
| 65 | #define MMC_CMD_SET_DSR 4 |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 66 | #define MMC_CMD_SWITCH 6 |
Haavard Skinnemoen | 341188b | 2008-05-22 11:09:59 +0200 | [diff] [blame] | 67 | #define MMC_CMD_SELECT_CARD 7 |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 68 | #define MMC_CMD_SEND_EXT_CSD 8 |
Haavard Skinnemoen | 341188b | 2008-05-22 11:09:59 +0200 | [diff] [blame] | 69 | #define MMC_CMD_SEND_CSD 9 |
| 70 | #define MMC_CMD_SEND_CID 10 |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 71 | #define MMC_CMD_STOP_TRANSMISSION 12 |
Haavard Skinnemoen | 341188b | 2008-05-22 11:09:59 +0200 | [diff] [blame] | 72 | #define MMC_CMD_SEND_STATUS 13 |
| 73 | #define MMC_CMD_SET_BLOCKLEN 16 |
| 74 | #define MMC_CMD_READ_SINGLE_BLOCK 17 |
| 75 | #define MMC_CMD_READ_MULTIPLE_BLOCK 18 |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 76 | #define MMC_CMD_WRITE_SINGLE_BLOCK 24 |
| 77 | #define MMC_CMD_WRITE_MULTIPLE_BLOCK 25 |
Haavard Skinnemoen | 341188b | 2008-05-22 11:09:59 +0200 | [diff] [blame] | 78 | #define MMC_CMD_APP_CMD 55 |
Thomas Chou | d52ebf1 | 2010-12-24 13:12:21 +0000 | [diff] [blame] | 79 | #define MMC_CMD_SPI_READ_OCR 58 |
| 80 | #define MMC_CMD_SPI_CRC_ON_OFF 59 |
Haavard Skinnemoen | 341188b | 2008-05-22 11:09:59 +0200 | [diff] [blame] | 81 | |
Haavard Skinnemoen | 341188b | 2008-05-22 11:09:59 +0200 | [diff] [blame] | 82 | #define SD_CMD_SEND_RELATIVE_ADDR 3 |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 83 | #define SD_CMD_SWITCH_FUNC 6 |
Haavard Skinnemoen | 341188b | 2008-05-22 11:09:59 +0200 | [diff] [blame] | 84 | #define SD_CMD_SEND_IF_COND 8 |
| 85 | |
| 86 | #define SD_CMD_APP_SET_BUS_WIDTH 6 |
| 87 | #define SD_CMD_APP_SEND_OP_COND 41 |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 88 | #define SD_CMD_APP_SEND_SCR 51 |
| 89 | |
| 90 | /* SCR definitions in different words */ |
| 91 | #define SD_HIGHSPEED_BUSY 0x00020000 |
| 92 | #define SD_HIGHSPEED_SUPPORTED 0x00020000 |
| 93 | |
| 94 | #define MMC_HS_TIMING 0x00000100 |
| 95 | #define MMC_HS_52MHZ 0x2 |
| 96 | |
Rabin Vincent | 0b453ff | 2009-04-05 13:30:55 +0530 | [diff] [blame] | 97 | #define OCR_BUSY 0x80000000 |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 98 | #define OCR_HCS 0x40000000 |
Raffaele Recalcati | 31cacba | 2011-03-11 02:01:13 +0000 | [diff] [blame] | 99 | #define OCR_VOLTAGE_MASK 0x007FFF80 |
| 100 | #define OCR_ACCESS_MODE 0x60000000 |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 101 | |
Raffaele Recalcati | 5d4fc8d | 2011-03-11 02:01:12 +0000 | [diff] [blame] | 102 | #define MMC_STATUS_MASK (~0x0206BF7F) |
| 103 | #define MMC_STATUS_RDY_FOR_DATA (1<<8) |
| 104 | #define MMC_STATUS_CURR_STATE (0xf<<9) |
| 105 | |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 106 | #define MMC_VDD_165_195 0x00000080 /* VDD voltage 1.65 - 1.95 */ |
| 107 | #define MMC_VDD_20_21 0x00000100 /* VDD voltage 2.0 ~ 2.1 */ |
| 108 | #define MMC_VDD_21_22 0x00000200 /* VDD voltage 2.1 ~ 2.2 */ |
| 109 | #define MMC_VDD_22_23 0x00000400 /* VDD voltage 2.2 ~ 2.3 */ |
| 110 | #define MMC_VDD_23_24 0x00000800 /* VDD voltage 2.3 ~ 2.4 */ |
| 111 | #define MMC_VDD_24_25 0x00001000 /* VDD voltage 2.4 ~ 2.5 */ |
| 112 | #define MMC_VDD_25_26 0x00002000 /* VDD voltage 2.5 ~ 2.6 */ |
| 113 | #define MMC_VDD_26_27 0x00004000 /* VDD voltage 2.6 ~ 2.7 */ |
| 114 | #define MMC_VDD_27_28 0x00008000 /* VDD voltage 2.7 ~ 2.8 */ |
| 115 | #define MMC_VDD_28_29 0x00010000 /* VDD voltage 2.8 ~ 2.9 */ |
| 116 | #define MMC_VDD_29_30 0x00020000 /* VDD voltage 2.9 ~ 3.0 */ |
| 117 | #define MMC_VDD_30_31 0x00040000 /* VDD voltage 3.0 ~ 3.1 */ |
| 118 | #define MMC_VDD_31_32 0x00080000 /* VDD voltage 3.1 ~ 3.2 */ |
| 119 | #define MMC_VDD_32_33 0x00100000 /* VDD voltage 3.2 ~ 3.3 */ |
| 120 | #define MMC_VDD_33_34 0x00200000 /* VDD voltage 3.3 ~ 3.4 */ |
| 121 | #define MMC_VDD_34_35 0x00400000 /* VDD voltage 3.4 ~ 3.5 */ |
| 122 | #define MMC_VDD_35_36 0x00800000 /* VDD voltage 3.5 ~ 3.6 */ |
| 123 | |
| 124 | #define MMC_SWITCH_MODE_CMD_SET 0x00 /* Change the command set */ |
| 125 | #define MMC_SWITCH_MODE_SET_BITS 0x01 /* Set bits in EXT_CSD byte |
| 126 | addressed by index which are |
| 127 | 1 in value field */ |
| 128 | #define MMC_SWITCH_MODE_CLEAR_BITS 0x02 /* Clear bits in EXT_CSD byte |
| 129 | addressed by index, which are |
| 130 | 1 in value field */ |
| 131 | #define MMC_SWITCH_MODE_WRITE_BYTE 0x03 /* Set target byte to value */ |
| 132 | |
| 133 | #define SD_SWITCH_CHECK 0 |
| 134 | #define SD_SWITCH_SWITCH 1 |
| 135 | |
| 136 | /* |
| 137 | * EXT_CSD fields |
| 138 | */ |
| 139 | |
| 140 | #define EXT_CSD_BUS_WIDTH 183 /* R/W */ |
| 141 | #define EXT_CSD_HS_TIMING 185 /* R/W */ |
| 142 | #define EXT_CSD_CARD_TYPE 196 /* RO */ |
| 143 | #define EXT_CSD_REV 192 /* RO */ |
| 144 | #define EXT_CSD_SEC_CNT 212 /* RO, 4 bytes */ |
| 145 | |
| 146 | /* |
| 147 | * EXT_CSD field definitions |
| 148 | */ |
| 149 | |
| 150 | #define EXT_CSD_CMD_SET_NORMAL (1<<0) |
| 151 | #define EXT_CSD_CMD_SET_SECURE (1<<1) |
| 152 | #define EXT_CSD_CMD_SET_CPSECURE (1<<2) |
| 153 | |
| 154 | #define EXT_CSD_CARD_TYPE_26 (1<<0) /* Card can run at 26MHz */ |
| 155 | #define EXT_CSD_CARD_TYPE_52 (1<<1) /* Card can run at 52MHz */ |
| 156 | |
| 157 | #define EXT_CSD_BUS_WIDTH_1 0 /* Card is in 1 bit mode */ |
| 158 | #define EXT_CSD_BUS_WIDTH_4 1 /* Card is in 4 bit mode */ |
| 159 | #define EXT_CSD_BUS_WIDTH_8 2 /* Card is in 8 bit mode */ |
Haavard Skinnemoen | 341188b | 2008-05-22 11:09:59 +0200 | [diff] [blame] | 160 | |
Andy Fleming | 1de97f9 | 2008-10-30 16:31:39 -0500 | [diff] [blame] | 161 | #define R1_ILLEGAL_COMMAND (1 << 22) |
| 162 | #define R1_APP_CMD (1 << 5) |
| 163 | |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 164 | #define MMC_RSP_PRESENT (1 << 0) |
| 165 | #define MMC_RSP_136 (1 << 1) /* 136 bit response */ |
| 166 | #define MMC_RSP_CRC (1 << 2) /* expect valid crc */ |
| 167 | #define MMC_RSP_BUSY (1 << 3) /* card may send busy */ |
| 168 | #define MMC_RSP_OPCODE (1 << 4) /* response contains opcode */ |
| 169 | |
| 170 | #define MMC_RSP_NONE (0) |
| 171 | #define MMC_RSP_R1 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE) |
| 172 | #define MMC_RSP_R1b (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE| \ |
| 173 | MMC_RSP_BUSY) |
| 174 | #define MMC_RSP_R2 (MMC_RSP_PRESENT|MMC_RSP_136|MMC_RSP_CRC) |
| 175 | #define MMC_RSP_R3 (MMC_RSP_PRESENT) |
| 176 | #define MMC_RSP_R4 (MMC_RSP_PRESENT) |
| 177 | #define MMC_RSP_R5 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE) |
| 178 | #define MMC_RSP_R6 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE) |
| 179 | #define MMC_RSP_R7 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE) |
| 180 | |
wdenk | 71f9511 | 2003-06-15 22:40:42 +0000 | [diff] [blame] | 181 | |
Andy Fleming | 1de97f9 | 2008-10-30 16:31:39 -0500 | [diff] [blame] | 182 | struct mmc_cid { |
| 183 | unsigned long psn; |
| 184 | unsigned short oid; |
| 185 | unsigned char mid; |
| 186 | unsigned char prv; |
| 187 | unsigned char mdt; |
| 188 | char pnm[7]; |
| 189 | }; |
| 190 | |
Reinhard Meyer | 1592ef8 | 2010-08-13 10:31:06 +0200 | [diff] [blame] | 191 | /* |
| 192 | * WARNING! |
| 193 | * |
| 194 | * This structure is used by atmel_mci.c only. |
| 195 | * It works for the AVR32 architecture but NOT |
| 196 | * for ARM/AT91 architectures. |
| 197 | * Its use is highly depreciated. |
| 198 | * After the atmel_mci.c driver for AVR32 has |
| 199 | * been replaced this structure will be removed. |
| 200 | */ |
Andy Fleming | 1de97f9 | 2008-10-30 16:31:39 -0500 | [diff] [blame] | 201 | struct mmc_csd |
| 202 | { |
| 203 | u8 csd_structure:2, |
| 204 | spec_vers:4, |
| 205 | rsvd1:2; |
| 206 | u8 taac; |
| 207 | u8 nsac; |
| 208 | u8 tran_speed; |
| 209 | u16 ccc:12, |
| 210 | read_bl_len:4; |
| 211 | u64 read_bl_partial:1, |
| 212 | write_blk_misalign:1, |
| 213 | read_blk_misalign:1, |
| 214 | dsr_imp:1, |
| 215 | rsvd2:2, |
| 216 | c_size:12, |
| 217 | vdd_r_curr_min:3, |
| 218 | vdd_r_curr_max:3, |
| 219 | vdd_w_curr_min:3, |
| 220 | vdd_w_curr_max:3, |
| 221 | c_size_mult:3, |
| 222 | sector_size:5, |
| 223 | erase_grp_size:5, |
| 224 | wp_grp_size:5, |
| 225 | wp_grp_enable:1, |
| 226 | default_ecc:2, |
| 227 | r2w_factor:3, |
| 228 | write_bl_len:4, |
| 229 | write_bl_partial:1, |
| 230 | rsvd3:5; |
| 231 | u8 file_format_grp:1, |
| 232 | copy:1, |
| 233 | perm_write_protect:1, |
| 234 | tmp_write_protect:1, |
| 235 | file_format:2, |
| 236 | ecc:2; |
| 237 | u8 crc:7; |
| 238 | u8 one:1; |
| 239 | }; |
| 240 | |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 241 | struct mmc_cmd { |
| 242 | ushort cmdidx; |
| 243 | uint resp_type; |
| 244 | uint cmdarg; |
Rabin Vincent | 0b453ff | 2009-04-05 13:30:55 +0530 | [diff] [blame] | 245 | uint response[4]; |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 246 | uint flags; |
| 247 | }; |
| 248 | |
| 249 | struct mmc_data { |
| 250 | union { |
| 251 | char *dest; |
| 252 | const char *src; /* src buffers don't get written to */ |
| 253 | }; |
| 254 | uint flags; |
| 255 | uint blocks; |
| 256 | uint blocksize; |
| 257 | }; |
| 258 | |
| 259 | struct mmc { |
| 260 | struct list_head link; |
| 261 | char name[32]; |
| 262 | void *priv; |
| 263 | uint voltages; |
| 264 | uint version; |
| 265 | uint f_min; |
| 266 | uint f_max; |
| 267 | int high_capacity; |
| 268 | uint bus_width; |
| 269 | uint clock; |
| 270 | uint card_caps; |
| 271 | uint host_caps; |
| 272 | uint ocr; |
| 273 | uint scr[2]; |
| 274 | uint csd[4]; |
Rabin Vincent | 0b453ff | 2009-04-05 13:30:55 +0530 | [diff] [blame] | 275 | uint cid[4]; |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 276 | ushort rca; |
| 277 | uint tran_speed; |
| 278 | uint read_bl_len; |
| 279 | uint write_bl_len; |
| 280 | u64 capacity; |
| 281 | block_dev_desc_t block_dev; |
| 282 | int (*send_cmd)(struct mmc *mmc, |
| 283 | struct mmc_cmd *cmd, struct mmc_data *data); |
| 284 | void (*set_ios)(struct mmc *mmc); |
| 285 | int (*init)(struct mmc *mmc); |
Sandeep Paulraj | 57418d2 | 2010-12-20 20:01:21 -0500 | [diff] [blame] | 286 | #ifdef CONFIG_MMC_MBLOCK |
| 287 | uint b_max; |
| 288 | #endif |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 289 | }; |
| 290 | |
| 291 | int mmc_register(struct mmc *mmc); |
| 292 | int mmc_initialize(bd_t *bis); |
| 293 | int mmc_init(struct mmc *mmc); |
| 294 | int mmc_read(struct mmc *mmc, u64 src, uchar *dst, int size); |
Jerry Huang | 4a6ee17 | 2010-11-25 17:06:07 +0000 | [diff] [blame] | 295 | void mmc_set_clock(struct mmc *mmc, uint clock); |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 296 | struct mmc *find_mmc_device(int dev_num); |
Steve Sakoman | 8971696 | 2010-07-01 12:12:42 -0700 | [diff] [blame] | 297 | int mmc_set_dev(int dev_num); |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 298 | void print_mmc_devices(char separator); |
Stefano Babic | 11fdade | 2010-02-05 15:04:43 +0100 | [diff] [blame] | 299 | int board_mmc_getcd(u8 *cd, struct mmc *mmc); |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 300 | |
Reinhard Meyer | 1592ef8 | 2010-08-13 10:31:06 +0200 | [diff] [blame] | 301 | #ifdef CONFIG_GENERIC_MMC |
| 302 | int atmel_mci_init(void *regs); |
Thomas Chou | d52ebf1 | 2010-12-24 13:12:21 +0000 | [diff] [blame] | 303 | #define mmc_host_is_spi(mmc) ((mmc)->host_caps & MMC_MODE_SPI) |
| 304 | struct mmc *mmc_spi_init(uint bus, uint cs, uint speed, uint mode); |
Reinhard Meyer | 1592ef8 | 2010-08-13 10:31:06 +0200 | [diff] [blame] | 305 | #else |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 306 | int mmc_legacy_init(int verbose); |
| 307 | #endif |
Reinhard Meyer | 1592ef8 | 2010-08-13 10:31:06 +0200 | [diff] [blame] | 308 | |
wdenk | 71f9511 | 2003-06-15 22:40:42 +0000 | [diff] [blame] | 309 | #endif /* _MMC_H_ */ |