diff --git a/Makefile b/Makefile
index 2f5188b..a3592c3 100644
--- a/Makefile
+++ b/Makefile
@@ -8,12 +8,15 @@
 # List the files that belong to the driver in alphabetical order.
 #
 qca-nss-drv-objs := \
+			nss_capwap.o \
 			nss_cmn.o \
 			nss_core.o \
 			nss_coredump.o \
 			nss_crypto.o \
+			nss_data_plane.o \
 			nss_dtls.o \
 			nss_dynamic_interface.o \
+			nss_eth_rx.o \
 			nss_gre_redir.o \
 			nss_if.o \
 			nss_init.o \
@@ -22,52 +25,56 @@
 			nss_ipv4_reasm.o \
 			nss_ipv6.o \
 			nss_ipv6_reasm.o \
-			nss_lag.o \
-			nss_lso_rx.o \
-			nss_phys_if.o \
-			nss_pm.o \
-			nss_sjack.o \
-			nss_stats.o \
-			nss_tun6rd.o \
-			nss_pptp.o \
 			nss_l2tpv2.o \
+			nss_lag.o \
+			nss_log.o \
+			nss_lso_rx.o \
 			nss_map_t.o \
-			nss_tunipip6.o \
-			nss_virt_if.o \
-			nss_shaper.o \
-			nss_pppoe.o \
-			nss_portid.o \
-			nss_capwap.o \
-			nss_eth_rx.o \
 			nss_n2h.o \
 			nss_oam.o \
-			nss_data_plane.o \
-			nss_log.o \
+			nss_phys_if.o \
+			nss_profiler.o \
+			nss_portid.o \
+			nss_pppoe.o \
+			nss_pptp.o \
+			nss_shaper.o \
+			nss_sjack.o \
+			nss_stats.o \
+			nss_tstamp.o \
+			nss_tun6rd.o \
+			nss_tunipip6.o \
+			nss_virt_if.o \
 			nss_wifi.o \
-			nss_wifi_vdev.o \
-			nss_wifi_if.o
+			nss_wifi_if.o \
+			nss_wifi_vdev.o
 
 #
 # TODO: Deprecated files should be removed before merge
 #
-qca-nss-drv-objs += \
-			nss_tx_rx_virt_if.o
+qca-nss-drv-objs += nss_tx_rx_virt_if.o
+
+qca-nss-drv-objs += nss_hal/nss_hal.o
+
+qca-nss-drv-objs += nss_hal/ipq806x/nss_hal_pvt.o
+ccflags-y += -I$(obj)/nss_hal/ipq806x -DNSS_HAL_IPQ806X_SUPPORT
 
 ccflags-y += -I$(obj)/nss_hal/include -I$(obj)/exports -DNSS_DEBUG_LEVEL=0 -DNSS_PKT_STATS_ENABLED=1
-ccflags-y += -DNSS_PM_DEBUG_LEVEL=0 -DNSS_PPP_SUPPORT=1
+ccflags-y += -DNSS_PM_DEBUG_LEVEL=0
 
 ifneq ($(findstring 3.4, $(KERNELVERSION)),)
 NSS_CCFLAGS = -DNSS_DT_SUPPORT=0 -DNSS_FW_DBG_SUPPORT=1 -DNSS_PM_SUPPORT=1 -DNSS_EMPTY_BUFFER_SIZE=1984
+qca-nss-drv-objs += nss_pm.o
 else
 NSS_CCFLAGS = -DNSS_DT_SUPPORT=1 -DNSS_FW_DBG_SUPPORT=0 -DNSS_PM_SUPPORT=0 -DNSS_EMPTY_BUFFER_SIZE=1984
+
 ccflags-y += -I$(obj)
 endif
 
 # Only the 3.14 Kernel implements fabric scaling framework and map-t
 ifneq ($(findstring 3.14, $(KERNELVERSION)),)
-NSS_CCFLAGS += -DNSS_FABRIC_SCALING_SUPPORT=1 -DNSS_MAP_T_SUPPORT=1
+NSS_CCFLAGS += -DNSS_FABRIC_SCALING_SUPPORT=1
 else
-NSS_CCFLAGS += -DNSS_FABRIC_SCALING_SUPPORT=0 -DNSS_MAP_T_SUPPORT=0
+NSS_CCFLAGS += -DNSS_FABRIC_SCALING_SUPPORT=0
 endif
 
 # Disable Frequency scaling
@@ -82,9 +89,5 @@
 
 export NSS_CCFLAGS
 
-qca-nss-drv-objs += nss_profiler.o
-
 obj ?= .
 
-qca-nss-drv-objs += nss_hal/ipq806x/nss_hal_pvt.o
-ccflags-y += -I$(obj)/nss_hal/ipq806x
diff --git a/Makefile.fsm b/Makefile.fsm
index e4dbd9f..f8401be 100644
--- a/Makefile.fsm
+++ b/Makefile.fsm
@@ -7,15 +7,15 @@
 # List the files that belong to the driver in alphabetical order.
 #
 qca-nss-drv-objs := \
+			nss_capwap.o \
 			nss_cmn.o \
 			nss_core.o \
 			nss_coredump.o \
 			nss_crypto.o \
-			nss_capwap.o \
-			nss_dtls.o \
-			nss_lso_rx.o \
 			nss_data_plane.o \
+			nss_dtls.o \
 			nss_dynamic_interface.o \
+			nss_eth_rx.o \
 			nss_gre_redir.o \
 			nss_if.o \
 			nss_init.o \
@@ -24,37 +24,42 @@
 			nss_ipv4_reasm.o \
 			nss_ipv6.o \
 			nss_ipv6_reasm.o \
-			nss_lag.o \
-			nss_phys_if.o \
-			nss_stats.o \
-			nss_tun6rd.o \
-			nss_pptp.o \
 			nss_l2tpv2.o \
+			nss_lag.o \
+			nss_log.o \
+			nss_lso_rx.o \
 			nss_map_t.o \
-			nss_tunipip6.o \
-			nss_virt_if.o \
-			nss_shaper.o \
 			nss_n2h.o \
 			nss_oam.o \
-			nss_pm.o \
-			nss_log.o \
+			nss_phys_if.o \
 			nss_profiler.o \
-			nss_eth_rx.o  \
+			nss_pm.o \
+			nss_portid.o \
+			nss_pppoe.o \
+			nss_pptp.o \
+			nss_shaper.o \
+			nss_sjack.o \
+			nss_stats.o \
+			nss_tstamp.o \
+			nss_tun6rd.o \
+			nss_tunipip6.o \
+			nss_virt_if.o \
 			nss_wifi.o \
-			nss_wifi_vdev.o \
 			nss_wifi_if.o \
-			nss_tstamp.o
+			nss_wifi_vdev.o
 
 #
 # TODO: Deprecated files should be removed before merge
 #
 qca-nss-drv-objs += nss_tx_rx_virt_if.o
+
+qca-nss-drv-objs += nss_hal/nss_hal.o
 qca-nss-drv-objs += nss_hal/fsm9010/nss_hal_pvt.o
 
 ccflags-y += -I$(obj)/nss_hal/include
 ccflags-y += -I$(obj)/nss_hal/
 ccflags-y += -I$(obj)/exports
-ccflags-y += -I$(obj)/nss_hal/fsm9010
+ccflags-y += -I$(obj)/nss_hal/fsm9010 -DNSS_HAL_FSM9010_SUPPORT
 ccflags-y += -DNSS_DEBUG_LEVEL=0 -DNSS_EMPTY_BUFFER_SIZE=1984 -DNSS_PKT_STATS_ENABLED=1
 ccflags-y += -DNSS_DT_SUPPORT=1 -DNSS_PM_SUPPORT=0 -DNSS_FW_DBG_SUPPORT=0
-ccflags-y += -DNSS_PPP_SUPPORT=0 -DNSS_FREQ_SCALE_SUPPORT=0 -DNSS_FABRIC_SCALING_SUPPORT=0
+ccflags-y += -DNSS_FREQ_SCALE_SUPPORT=0 -DNSS_FABRIC_SCALING_SUPPORT=0
diff --git a/nss_capwap.c b/nss_capwap.c
index 2bc7668..1ba84d8 100644
--- a/nss_capwap.c
+++ b/nss_capwap.c
@@ -327,8 +327,7 @@
 		goto out;
 	}
 
-	nss_hal_send_interrupt(nss_ctx->nmap, nss_ctx->h2n_desc_rings[NSS_IF_CMD_QUEUE].desc_ring.int_bit,
-				NSS_REGS_H2N_INTR_STATUS_DATA_COMMAND_QUEUE);
+	nss_hal_send_interrupt(nss_ctx, NSS_H2N_INTR_DATA_COMMAND_QUEUE);
 
 	NSS_PKT_STATS_INCREMENT(nss_ctx, &nss_ctx->nss_top->stats_drv[NSS_STATS_DRV_TX_CMD_REQ]);
 
@@ -345,7 +344,6 @@
 nss_tx_status_t nss_capwap_tx_buf(struct nss_ctx_instance *nss_ctx, struct sk_buff *os_buf, uint32_t if_num)
 {
 	int32_t status;
-	uint16_t int_bit = 0;
 
 	NSS_VERIFY_CTX_MAGIC(nss_ctx);
 
@@ -356,7 +354,6 @@
 
 	BUG_ON(!nss_capwap_verify_if_num(if_num));
 
-	int_bit = nss_ctx->h2n_desc_rings[NSS_IF_DATA_QUEUE_0].desc_ring.int_bit;
 	status = nss_core_send_buffer(nss_ctx, if_num, os_buf, NSS_IF_DATA_QUEUE_0, H2N_BUFFER_PACKET, H2N_BIT_FLAG_VIRTUAL_BUFFER);
 	if (unlikely(status != NSS_CORE_STATUS_SUCCESS)) {
 		nss_warning("%p: Unable to enqueue capwap packet\n", nss_ctx);
@@ -366,7 +363,7 @@
 		return NSS_TX_FAILURE;
 	}
 
-	nss_hal_send_interrupt(nss_ctx->nmap, int_bit, NSS_REGS_H2N_INTR_STATUS_DATA_COMMAND_QUEUE);
+	nss_hal_send_interrupt(nss_ctx, NSS_H2N_INTR_DATA_COMMAND_QUEUE);
 
 	NSS_PKT_STATS_INCREMENT(nss_ctx, &nss_ctx->nss_top->stats_drv[NSS_STATS_DRV_TX_PACKET]);
 	return NSS_TX_SUCCESS;
diff --git a/nss_core.c b/nss_core.c
old mode 100755
new mode 100644
index 4953179..5162187
--- a/nss_core.c
+++ b/nss_core.c
@@ -270,8 +270,7 @@
 		return NSS_CORE_STATUS_FAILURE;
 	}
 
-	nss_hal_send_interrupt(nss_own->nmap, nss_own->h2n_desc_rings[NSS_IF_CMD_QUEUE].desc_ring.int_bit,
-								NSS_REGS_H2N_INTR_STATUS_DATA_COMMAND_QUEUE);
+	nss_hal_send_interrupt(nss_own, NSS_H2N_INTR_DATA_COMMAND_QUEUE);
 
 	return NSS_CORE_STATUS_SUCCESS;
 }
@@ -282,15 +281,15 @@
  */
 static inline uint16_t nss_core_cause_to_queue(uint16_t cause)
 {
-	if (likely(cause == NSS_REGS_N2H_INTR_STATUS_DATA_COMMAND_QUEUE)) {
+	if (likely(cause == NSS_N2H_INTR_DATA_COMMAND_QUEUE)) {
 		return NSS_IF_DATA_QUEUE_0;
 	}
 
-	if (likely(cause == NSS_REGS_N2H_INTR_STATUS_DATA_QUEUE_1)) {
+	if (likely(cause == NSS_N2H_INTR_DATA_QUEUE_1)) {
 		return NSS_IF_DATA_QUEUE_1;
 	}
 
-	if (likely(cause == NSS_REGS_N2H_INTR_STATUS_EMPTY_BUFFER_QUEUE)) {
+	if (likely(cause == NSS_N2H_INTR_EMPTY_BUFFER_QUEUE)) {
 		return NSS_IF_EMPTY_BUFFER_QUEUE;
 	}
 
@@ -1182,12 +1181,12 @@
 	uint16_t payload_len;
 	int32_t i;
 
-	nss_assert((cause == NSS_REGS_N2H_INTR_STATUS_EMPTY_BUFFERS_SOS) || (cause == NSS_REGS_N2H_INTR_STATUS_TX_UNBLOCKED));
+	nss_assert((cause == NSS_N2H_INTR_EMPTY_BUFFERS_SOS) || (cause == NSS_N2H_INTR_TX_UNBLOCKED));
 
 	/*
 	 * TODO: find better mechanism to handle empty buffers
 	 */
-	if (likely(cause == NSS_REGS_N2H_INTR_STATUS_EMPTY_BUFFERS_SOS)) {
+	if (likely(cause == NSS_N2H_INTR_EMPTY_BUFFERS_SOS)) {
 		struct sk_buff *nbuf;
 		struct page *npage;
 		uint16_t count, size, mask;
@@ -1371,9 +1370,9 @@
 		/*
 		 * Inform NSS that new buffers are available
 		 */
-		nss_hal_send_interrupt(nss_ctx->nmap, desc_if->int_bit, NSS_REGS_H2N_INTR_STATUS_EMPTY_BUFFER_QUEUE);
+		nss_hal_send_interrupt(nss_ctx, NSS_H2N_INTR_EMPTY_BUFFER_QUEUE);
 		NSS_PKT_STATS_INCREMENT(nss_ctx, &nss_top->stats_drv[NSS_STATS_DRV_TX_EMPTY]);
-	} else if (cause == NSS_REGS_N2H_INTR_STATUS_TX_UNBLOCKED) {
+	} else if (cause == NSS_N2H_INTR_TX_UNBLOCKED) {
 		nss_trace("%p: Data queue unblocked", nss_ctx);
 
 		/*
@@ -1393,8 +1392,7 @@
 		/*
 		 * Mask Tx unblocked interrupt and unmask it again when queue full condition is reached
 		 */
-		nss_hal_disable_interrupt(nss_ctx->nmap, nss_ctx->int_ctx[0].irq,
-				nss_ctx->int_ctx[0].shift_factor, NSS_REGS_N2H_INTR_STATUS_TX_UNBLOCKED);
+		nss_hal_disable_interrupt(nss_ctx, nss_ctx->int_ctx[0].shift_factor, NSS_N2H_INTR_TX_UNBLOCKED);
 	}
 }
 
@@ -1414,46 +1412,46 @@
 	 * TODO: Modify the algorithm later with proper weights and Round Robin
 	 */
 
-	if (cause & NSS_REGS_N2H_INTR_STATUS_EMPTY_BUFFERS_SOS) {
+	if (cause & NSS_N2H_INTR_EMPTY_BUFFERS_SOS) {
 		*type = NSS_INTR_CAUSE_NON_QUEUE;
 		*weight = NSS_EMPTY_BUFFER_SOS_PROCESSING_WEIGHT;
-		return NSS_REGS_N2H_INTR_STATUS_EMPTY_BUFFERS_SOS;
+		return NSS_N2H_INTR_EMPTY_BUFFERS_SOS;
 	}
 
-	if (cause & NSS_REGS_N2H_INTR_STATUS_EMPTY_BUFFER_QUEUE) {
+	if (cause & NSS_N2H_INTR_EMPTY_BUFFER_QUEUE) {
 		*type = NSS_INTR_CAUSE_QUEUE;
 		*weight = NSS_EMPTY_BUFFER_RETURN_PROCESSING_WEIGHT;
-		return NSS_REGS_N2H_INTR_STATUS_EMPTY_BUFFER_QUEUE;
+		return NSS_N2H_INTR_EMPTY_BUFFER_QUEUE;
 	}
 
-	if (cause & NSS_REGS_N2H_INTR_STATUS_TX_UNBLOCKED) {
+	if (cause & NSS_N2H_INTR_TX_UNBLOCKED) {
 		*type = NSS_INTR_CAUSE_NON_QUEUE;
 		*weight = NSS_TX_UNBLOCKED_PROCESSING_WEIGHT;
-		return NSS_REGS_N2H_INTR_STATUS_TX_UNBLOCKED;
+		return NSS_N2H_INTR_TX_UNBLOCKED;
 	}
 
-	if (cause & NSS_REGS_N2H_INTR_STATUS_DATA_COMMAND_QUEUE) {
+	if (cause & NSS_N2H_INTR_DATA_COMMAND_QUEUE) {
 		*type = NSS_INTR_CAUSE_QUEUE;
 		*weight = NSS_DATA_COMMAND_BUFFER_PROCESSING_WEIGHT;
-		return NSS_REGS_N2H_INTR_STATUS_DATA_COMMAND_QUEUE;
+		return NSS_N2H_INTR_DATA_COMMAND_QUEUE;
 	}
 
-	if (cause & NSS_REGS_N2H_INTR_STATUS_DATA_QUEUE_1) {
+	if (cause & NSS_N2H_INTR_DATA_QUEUE_1) {
 		*type = NSS_INTR_CAUSE_QUEUE;
 		*weight = NSS_DATA_COMMAND_BUFFER_PROCESSING_WEIGHT;
-		return NSS_REGS_N2H_INTR_STATUS_DATA_QUEUE_1;
+		return NSS_N2H_INTR_DATA_QUEUE_1;
 	}
 
-	if (cause & NSS_REGS_N2H_INTR_STATUS_COREDUMP_COMPLETE_0) {
+	if (cause & NSS_N2H_INTR_COREDUMP_COMPLETE_0) {
 		printk("NSS core 0 signal COREDUMP COMPLETE %x ", cause);
 		*type = NSS_INTR_CAUSE_EMERGENCY;
-		return NSS_REGS_N2H_INTR_STATUS_COREDUMP_COMPLETE_0;
+		return NSS_N2H_INTR_COREDUMP_COMPLETE_0;
 	}
 
-	if (cause & NSS_REGS_N2H_INTR_STATUS_COREDUMP_COMPLETE_1) {
+	if (cause & NSS_N2H_INTR_COREDUMP_COMPLETE_1) {
 		printk("NSS core 1 signal COREDUMP COMPLETE %x\n", cause);
 		*type = NSS_INTR_CAUSE_EMERGENCY;
-		return NSS_REGS_N2H_INTR_STATUS_COREDUMP_COMPLETE_1;
+		return NSS_N2H_INTR_COREDUMP_COMPLETE_1;
 	}
 
 	return 0;
@@ -1466,7 +1464,7 @@
 int nss_core_handle_napi(struct napi_struct *napi, int budget)
 {
 	int16_t processed, weight, count = 0;
-	uint32_t prio_cause, int_cause, cause_type;
+	uint32_t prio_cause, int_cause = 0, cause_type;
 	struct netdev_priv_instance *ndev_priv = netdev_priv(napi->dev);
 	struct int_ctx_instance *int_ctx = ndev_priv->int_ctx;
 	struct nss_ctx_instance *nss_ctx = int_ctx->nss_ctx;
@@ -1474,8 +1472,8 @@
 	/*
 	 * Read cause of interrupt
 	 */
-	nss_hal_read_interrupt_cause(nss_ctx->nmap, int_ctx->irq, int_ctx->shift_factor, &int_cause);
-	nss_hal_clear_interrupt_cause(nss_ctx->nmap, int_ctx->irq, int_ctx->shift_factor, int_cause);
+	nss_hal_read_interrupt_cause(nss_ctx, int_ctx->shift_factor, &int_cause);
+	nss_hal_clear_interrupt_cause(nss_ctx, int_ctx->shift_factor, int_cause);
 	int_ctx->cause |= int_cause;
 
 	do {
@@ -1492,43 +1490,42 @@
 				weight = budget;
 			}
 
-		processed = 0;
-		switch (cause_type) {
-		case NSS_INTR_CAUSE_QUEUE:
-			processed = nss_core_handle_cause_queue(int_ctx, prio_cause, weight);
+			processed = 0;
+			switch (cause_type) {
+			case NSS_INTR_CAUSE_QUEUE:
+				processed = nss_core_handle_cause_queue(int_ctx, prio_cause, weight);
 
-			count += processed;
-			budget -= processed;
-			if (processed < weight) {
+				count += processed;
+				budget -= processed;
+
 				/*
-				 * If #packets processed were lesser than weight then
-				 * processing for this queue/cause is complete and
-				 * we can clear this interrupt cause from interrupt context
-				 * structure
+				 * If #packets processed were lesser than weight then processing for this queue/cause is
+				 * complete and we can clear this interrupt cause from interrupt context structure
 				 */
+				if (processed < weight) {
+					int_ctx->cause &= ~prio_cause;
+				}
+				break;
+
+			case NSS_INTR_CAUSE_NON_QUEUE:
+				nss_core_handle_cause_nonqueue(int_ctx, prio_cause, weight);
 				int_ctx->cause &= ~prio_cause;
+				break;
+
+			case NSS_INTR_CAUSE_EMERGENCY:
+				nss_fw_coredump_notify(nss_ctx, prio_cause);
+				int_ctx->cause &= ~prio_cause;
+				break;
+
+			default:
+				nss_warning("%p: Invalid cause %x received from nss", nss_ctx, int_cause);
+				nss_assert(0);
+				break;
 			}
-			break;
-
-		case NSS_INTR_CAUSE_NON_QUEUE:
-			nss_core_handle_cause_nonqueue(int_ctx, prio_cause, weight);
-			int_ctx->cause &= ~prio_cause;
-			break;
-
-		case NSS_INTR_CAUSE_EMERGENCY:
-			nss_fw_coredump_notify(nss_ctx, prio_cause);
-			int_ctx->cause &= ~prio_cause;
-			break;
-
-		default:
-			nss_warning("%p: Invalid cause %x received from nss", nss_ctx, int_cause);
-			nss_assert(0);
-			break;
 		}
-	}
 
-		nss_hal_read_interrupt_cause(nss_ctx->nmap, int_ctx->irq, int_ctx->shift_factor, &int_cause);
-		nss_hal_clear_interrupt_cause(nss_ctx->nmap, int_ctx->irq, int_ctx->shift_factor, int_cause);
+		nss_hal_read_interrupt_cause(nss_ctx, int_ctx->shift_factor, &int_cause);
+		nss_hal_clear_interrupt_cause(nss_ctx, int_ctx->shift_factor, int_cause);
 		int_ctx->cause |= int_cause;
 	} while ((int_ctx->cause) && (budget));
 
@@ -1538,7 +1535,7 @@
 		/*
 		 * Re-enable any further interrupt from this IRQ
 		 */
-		nss_hal_enable_interrupt(nss_ctx->nmap, int_ctx->irq, int_ctx->shift_factor, NSS_HAL_SUPPORTED_INTERRUPTS);
+		nss_hal_enable_interrupt(nss_ctx, int_ctx->shift_factor, NSS_HAL_SUPPORTED_INTERRUPTS);
 	}
 
 	return count;
@@ -1591,8 +1588,7 @@
 		/*
 		 * Enable de-congestion interrupt from NSS
 		 */
-		nss_hal_enable_interrupt(nss_ctx->nmap, nss_ctx->int_ctx[0].irq,
-				nss_ctx->int_ctx[0].shift_factor, NSS_REGS_N2H_INTR_STATUS_TX_UNBLOCKED);
+		nss_hal_enable_interrupt(nss_ctx, nss_ctx->int_ctx[0].shift_factor, NSS_N2H_INTR_TX_UNBLOCKED);
 
 		return NSS_CORE_STATUS_FAILURE_QUEUE;
 	}
@@ -1964,8 +1960,7 @@
 		/*
 		 * Enable de-congestion interrupt from NSS
 		 */
-		nss_hal_enable_interrupt(nss_ctx->nmap, nss_ctx->int_ctx[0].irq,
-				nss_ctx->int_ctx[0].shift_factor, NSS_REGS_N2H_INTR_STATUS_TX_UNBLOCKED);
+		nss_hal_enable_interrupt(nss_ctx, nss_ctx->int_ctx[0].shift_factor, NSS_N2H_INTR_TX_UNBLOCKED);
 
 		return NSS_CORE_STATUS_FAILURE_QUEUE;
 	}
diff --git a/nss_core.h b/nss_core.h
old mode 100755
new mode 100644
index 3ff426b..5aa17d4
--- a/nss_core.h
+++ b/nss_core.h
@@ -149,6 +149,17 @@
  * Number of n2h descriptor rings
  */
 #define NSS_N2H_DESC_RING_NUM 15
+#define NSS_H2N_DESC_RING_NUM 16
+
+/*
+ * NSS maximum data queue per core
+ */
+#define NSS_MAX_DATA_QUEUE 2
+
+/*
+ * NSS maximum IRQ per interrupt instance
+ */
+#define NSS_MAX_IRQ_PER_INSTANCE 5
 
 /*
  * NSS maximum clients
@@ -205,8 +216,9 @@
 #define NSSTCM_FREQ		400000000	/* NSS TCM Frequency in Hz */
 
 /* NSS Clock names */
-#define NSS_TCM_SRC_CLK		"nss_tcm_src"
-#define NSS_TCM_CLK		"nss_tcm_clk"
+#define NSS_CORE_CLK		"nss-core-clk"
+#define NSS_TCM_SRC_CLK		"nss-tcm-src"
+#define NSS_TCM_CLK		"nss-tcm-clk"
 #define NSS_FABRIC0_CLK		"nss-fab0-clk"
 #define NSS_FABRIC1_CLK		"nss-fab1-clk"
 
@@ -668,19 +680,18 @@
 };
 
 /*
- * Interrupt context instance (one per IRQ per NSS core)
+ * Interrupt context instance (one per queue per NSS core)
  */
 struct int_ctx_instance {
 	struct nss_ctx_instance *nss_ctx;
 					/* Back pointer to NSS context of core that
-					owns this interrupt */
-	uint32_t irq;			/* HLOS IRQ number */
-	uint32_t shift_factor;		/* Shift factor for this IRQ number */
+					   owns this interrupt */
+	uint32_t irq[NSS_MAX_IRQ_PER_INSTANCE];
+					/* HLOS IRQ numbers bind to this instance */
+	uint32_t shift_factor;		/* Shift factor for this IRQ queue */
 	uint32_t cause;			/* Interrupt cause carried forward to BH */
-	struct net_device *ndev;	/* Network device associated with this interrupt
-					   context */
+	struct net_device *ndev;	/* Netdev associated with this interrupt ctx */
 	struct napi_struct napi;	/* NAPI handler */
-	bool napi_active;		/* NAPI is active */
 };
 
 /*
@@ -729,14 +740,16 @@
 	uint32_t id;			/* Core ID for this instance */
 	uint32_t nmap;			/* Pointer to NSS CSM registers */
 	uint32_t vmap;			/* Virt mem pointer to virtual register map */
+	uint32_t qgic_map;		/* Virt mem pointer to QGIC register */
 	uint32_t nphys;			/* Phys mem pointer to CSM register map */
 	uint32_t vphys;			/* Phys mem pointer to virtual register map */
+	uint32_t qgic_phys;		/* Phys mem pointer to QGIC register map */
 	uint32_t load;			/* Load address for this core */
 	enum nss_core_state state;	/* State of NSS core */
 	uint32_t c2c_start;		/* C2C start address */
-	struct int_ctx_instance int_ctx[2];
-					/* Interrupt context instances */
-	struct hlos_h2n_desc_rings h2n_desc_rings[16];
+	struct int_ctx_instance int_ctx[NSS_MAX_DATA_QUEUE];
+					/* Interrupt context instances for each queue */
+	struct hlos_h2n_desc_rings h2n_desc_rings[NSS_H2N_DESC_RING_NUM];
 					/* Host to NSS descriptor rings */
 	struct hlos_n2h_desc_ring n2h_desc_ring[NSS_N2H_DESC_RING_NUM];
 					/* NSS to Host descriptor rings */
@@ -939,10 +952,7 @@
 					/* PPPoE exception events for per session on per interface. Interface and session indexes start with 1. */
 	uint64_t stats_portid[NSS_STATS_PORTID_MAX];
 					/* PortID statistics */
-#if (NSS_DT_SUPPORT == 1)
-	void *nss_fpb_base;			/* Virtual address of FPB base */
 	bool nss_hal_common_init_done;
-#endif
 
 	uint16_t prev_mtu_sz;		/* mtu sz needed as of now */
 	uint16_t crypto_enabled;	/* check if crypto is enabled on the platform */
@@ -951,6 +961,7 @@
 	 * TODO: Review and update following fields
 	 */
 	uint64_t last_rx_jiffies;	/* Time of the last RX message from the NA in jiffies */
+	struct nss_hal_ops *hal_ops;	/* nss_hal ops for this target platform */
 };
 
 #if (NSS_PKT_STATS_ENABLED == 1)
@@ -1060,37 +1071,60 @@
  */
 struct nss_platform_data {
 	uint32_t id;					/* NSS core ID */
-	uint32_t num_irq;				/* No. of interrupts supported per core */
-	uint32_t irq[2];				/* IRQ numbers per interrupt */
-	uint32_t nmap;					/* Virtual address of NSS CSM space */
-	uint32_t vmap;					/* Virtual address of NSS virtual register map */
-	uint32_t nphys;					/* Physical address of NSS CSM space */
-	uint32_t vphys;					/* Physical address of NSS virtual register map */
-	uint32_t rst_addr;				/* Reset address of NSS core */
+	uint32_t num_queue;				/* No. of queues supported per core */
+	uint32_t num_irq;				/* No. of irq binded per queue */
+	uint32_t irq[5];				/* IRQ numbers per queue */
+	uint32_t nmap;					/* Virtual addr of NSS CSM space */
+	uint32_t vmap;					/* Virtual addr of NSS virtual register map */
+	uint32_t qgic_map;				/* Virtual addr of QGIC interrupt register */
+	uint32_t nphys;					/* Physical addr of NSS CSM space */
+	uint32_t vphys;					/* Physical addr of NSS virtual register map */
+	uint32_t qgic_phys;				/* Physical addr of QGIC virtual register map */
 	uint32_t load_addr;				/* Load address of NSS firmware */
-	enum nss_feature_enabled turbo_frequency;	/* Does this core support turbo frequencies */
-	enum nss_feature_enabled ipv4_enabled;		/* Does this core handle IPv4? */
-	enum nss_feature_enabled ipv4_reasm_enabled;	/* Does this core handle IPv4 reassembly? */
-	enum nss_feature_enabled ipv6_enabled;		/* Does this core handle IPv6? */
-	enum nss_feature_enabled ipv6_reasm_enabled;	/* Does this core handle IPv6 reassembly? */
-	enum nss_feature_enabled l2switch_enabled;	/* Does this core handle L2 switch? */
-	enum nss_feature_enabled crypto_enabled;	/* Does this core handle crypto? */
-	enum nss_feature_enabled ipsec_enabled;		/* Does this core handle IPsec? */
-	enum nss_feature_enabled wlanredirect_enabled;	/* Does this core handle WLAN redirect? */
-	enum nss_feature_enabled tun6rd_enabled;	/* Does this core handle 6rd Tunnel ? */
-	enum nss_feature_enabled pptp_enabled;		/* Does this core handle pptp Tunnel ? */
-	enum nss_feature_enabled l2tpv2_enabled;	/* Does this core handle l2tpv2 Tunnel ? */
-	enum nss_feature_enabled dtls_enabled;		/* Does this core handle DTLS sessions ? */
-	enum nss_feature_enabled map_t_enabled;		/* Does this core handle map-t */
-	enum nss_feature_enabled tunipip6_enabled;	/* Does this core handle ipip6 Tunnel ? */
-	enum nss_feature_enabled gre_redir_enabled;	/* Does this core handle gre_redir Tunnel ? */
-	enum nss_feature_enabled shaping_enabled;	/* Does this core handle shaping ? */
-	enum nss_feature_enabled gmac_enabled[4];	/* Does this core handle GMACs? */
-	enum nss_feature_enabled wifioffload_enabled;   /* Does this core handle WIFI OFFLOAD? */
-	enum nss_feature_enabled tstamp_enabled;	/* Does this core handle timestamping? */
-	enum nss_feature_enabled portid_enabled;	/* Does this core handle portid? */
-	enum nss_feature_enabled oam_enabled;		/* Does this core handle oam? */
-	enum nss_feature_enabled capwap_enabled;	/* Does this core handle capwap? */
+	enum nss_feature_enabled capwap_enabled;
+				/* Does this core handle capwap? */
+	enum nss_feature_enabled crypto_enabled;
+				/* Does this core handle crypto? */
+	enum nss_feature_enabled dtls_enabled;
+				/* Does this core handle DTLS sessions ? */
+	enum nss_feature_enabled gre_redir_enabled;
+				/* Does this core handle gre_redir Tunnel ? */
+	enum nss_feature_enabled ipsec_enabled;
+				/* Does this core handle IPsec? */
+	enum nss_feature_enabled ipv4_enabled;
+				/* Does this core handle IPv4? */
+	enum nss_feature_enabled ipv4_reasm_enabled;
+				/* Does this core handle IPv4 reassembly? */
+	enum nss_feature_enabled ipv6_enabled;
+				/* Does this core handle IPv6? */
+	enum nss_feature_enabled ipv6_reasm_enabled;
+				/* Does this core handle IPv6 reassembly? */
+	enum nss_feature_enabled l2tpv2_enabled;
+				/* Does this core handle l2tpv2 Tunnel ? */
+	enum nss_feature_enabled map_t_enabled;
+				/* Does this core handle map-t */
+	enum nss_feature_enabled oam_enabled;
+				/* Does this core handle oam? */
+	enum nss_feature_enabled pppoe_enabled;
+				/* Does this core handle pppoe? */
+	enum nss_feature_enabled pptp_enabled;
+				/* Does this core handle pptp Tunnel ? */
+	enum nss_feature_enabled portid_enabled;
+				/* Does this core handle portid? */
+	enum nss_feature_enabled shaping_enabled;
+				/* Does this core handle shaping ? */
+	enum nss_feature_enabled tstamp_enabled;
+				/* Does this core handle timestamping? */
+	enum nss_feature_enabled turbo_frequency;
+				/* Does this core support turbo frequencies */
+	enum nss_feature_enabled tun6rd_enabled;
+				/* Does this core handle 6rd Tunnel ? */
+	enum nss_feature_enabled tunipip6_enabled;
+				/* Does this core handle ipip6 Tunnel ? */
+	enum nss_feature_enabled wlanredirect_enabled;
+				/* Does this core handle WLAN redirect? */
+	enum nss_feature_enabled wifioffload_enabled;
+				/* Does this core handle WIFI OFFLOAD? */
 };
 #endif
 
diff --git a/nss_coredump.c b/nss_coredump.c
index 5e609db..f621d88 100644
--- a/nss_coredump.c
+++ b/nss_coredump.c
@@ -1,6 +1,6 @@
 /*
  **************************************************************************
- * Copyright (c) 2015, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2015, 2016, The Linux Foundation. All rights reserved.
  * Permission to use, copy, modify, and/or distribute this software for
  * any purpose with or without fee is hereby granted, provided that the
  * above copyright notice and this permission notice appear in all copies.
@@ -77,8 +77,7 @@
 		if (nss_ctx->state & NSS_CORE_STATE_FW_DEAD || !nss_ctx->nmap)
 			continue;
 		nss_ctx->state |= NSS_CORE_STATE_PANIC;
-		nss_hal_send_interrupt(nss_ctx->nmap, 0,
-			NSS_REGS_H2N_INTR_STATUS_TRIGGER_COREDUMP);
+		nss_hal_send_interrupt(nss_ctx, NSS_H2N_INTR_TRIGGER_COREDUMP);
 		nss_warning("panic call NSS FW %x to dump %x\n",
 			nss_ctx->nmap, nss_ctx->state);
 	}
@@ -160,8 +159,7 @@
 			}
 			nss_warning("notify NSS FW %X for coredump\n",
 				nss_ctx->nmap);
-			nss_hal_send_interrupt(nss_ctx->nmap, 0,
-				NSS_REGS_H2N_INTR_STATUS_TRIGGER_COREDUMP);
+			nss_hal_send_interrupt(nss_ctx, NSS_H2N_INTR_TRIGGER_COREDUMP);
 		}
 	}
 }
diff --git a/nss_crypto.c b/nss_crypto.c
index 4f76d93..11a09f5 100644
--- a/nss_crypto.c
+++ b/nss_crypto.c
@@ -197,8 +197,7 @@
 		return NSS_TX_FAILURE;
 	}
 
-	nss_hal_send_interrupt(nss_ctx->nmap, nss_ctx->h2n_desc_rings[NSS_IF_CMD_QUEUE].desc_ring.int_bit,
-				NSS_REGS_H2N_INTR_STATUS_DATA_COMMAND_QUEUE);
+	nss_hal_send_interrupt(nss_ctx, NSS_H2N_INTR_DATA_COMMAND_QUEUE);
 
 	return NSS_TX_SUCCESS;
 }
@@ -232,8 +231,7 @@
 	/*
 	 * Kick the NSS awake so it can process our new entry.
 	 */
-	nss_hal_send_interrupt(nss_ctx->nmap, nss_ctx->h2n_desc_rings[NSS_IF_DATA_QUEUE_0].desc_ring.int_bit,
-								NSS_REGS_H2N_INTR_STATUS_DATA_COMMAND_QUEUE);
+	nss_hal_send_interrupt(nss_ctx, NSS_H2N_INTR_DATA_COMMAND_QUEUE);
 
 	NSS_PKT_STATS_INCREMENT(nss_ctx, &nss_ctx->nss_top->stats_drv[NSS_STATS_DRV_TX_CRYPTO_REQ]);
 
diff --git a/nss_data_plane.c b/nss_data_plane.c
index 5f485dd..5096741 100644
--- a/nss_data_plane.c
+++ b/nss_data_plane.c
@@ -160,14 +160,6 @@
 };
 
 /*
- * nss_data_plane_set_enabled()
- */
-void nss_data_plane_set_enabled(int if_num)
-{
-	nss_data_plane_params[if_num].enabled = 1;
-}
-
-/*
  * nss_data_plane_register_to_nss_gmac()
  */
 bool nss_data_plane_register_to_nss_gmac(struct nss_ctx_instance *nss_ctx, int if_num)
@@ -177,10 +169,6 @@
 	struct net_device *netdev;
 	bool is_open;
 
-	if (!ndpp->enabled) {
-		return false;
-	}
-
 	netdev = nss_gmac_get_netdev_by_macid(if_num);
 	if (!netdev) {
 		nss_info("Platform don't have gmac%d enabled, don't bring up nss_phys_if and don't register to nss-gmac", if_num);
@@ -254,7 +242,6 @@
 	nss_data_plane_params[if_num].nss_ctx = NULL;
 	nss_data_plane_params[if_num].if_num = 0;
 	nss_data_plane_params[if_num].notify_open = 0;
-	nss_data_plane_params[if_num].enabled = 0;
 	nss_data_plane_params[if_num].bypass_nw_process = 0;
 }
 
diff --git a/nss_data_plane.h b/nss_data_plane.h
index 95933ae..8e5ea57 100644
--- a/nss_data_plane.h
+++ b/nss_data_plane.h
@@ -1,6 +1,6 @@
 /*
  **************************************************************************
- * Copyright (c) 2014, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2014, 2016, The Linux Foundation. All rights reserved.
  * Permission to use, copy, modify, and/or distribute this software for
  * any purpose with or without fee is hereby granted, provided that the
  * above copyright notice and this permission notice appear in all copies.
@@ -33,18 +33,11 @@
 	struct net_device *dev;			/* net_device instance of this gmac */
 	struct nss_ctx_instance *nss_ctx;	/* which nss core */
 	int notify_open;			/* This gmac interface has been opened or not */
-	int enabled;				/* This gmac is enabled or not */
 	uint32_t features;			/* skb types supported by this interface */
 	uint32_t bypass_nw_process;		/* Do we want to bypass NW processing in NSS for this GMAC */
 };
 
 /*
- * nss_data_plane_set_enabled
- *	Mark this data plane enabled, so when nss_init complete, we can call register_to_nss_gmac
- */
-void nss_data_plane_set_enabled(int if_num);
-
-/*
  * nss_data_plane_schedule_registration()
  *	Called from nss_init to schedule a work to do data_plane register to nss-gmac
  */
diff --git a/nss_dtls.c b/nss_dtls.c
index e09ca71..d4e21ee 100644
--- a/nss_dtls.c
+++ b/nss_dtls.c
@@ -252,7 +252,6 @@
 				struct nss_ctx_instance *nss_ctx)
 {
 	int32_t status;
-	uint16_t int_bit = 0;
 
 	NSS_VERIFY_CTX_MAGIC(nss_ctx);
 
@@ -263,8 +262,6 @@
 
 	BUG_ON(!nss_dtls_verify_if_num(if_num));
 
-	int_bit = nss_ctx->h2n_desc_rings[NSS_IF_DATA_QUEUE_0].desc_ring.int_bit;
-
 	status = nss_core_send_buffer(nss_ctx, if_num, skb,
 				      NSS_IF_DATA_QUEUE_0,
 				      H2N_BUFFER_PACKET,
@@ -278,8 +275,7 @@
 		return NSS_TX_FAILURE;
 	}
 
-	nss_hal_send_interrupt(nss_ctx->nmap, int_bit,
-			       NSS_REGS_H2N_INTR_STATUS_DATA_COMMAND_QUEUE);
+	nss_hal_send_interrupt(nss_ctx, NSS_H2N_INTR_DATA_COMMAND_QUEUE);
 
 	NSS_PKT_STATS_INCREMENT(nss_ctx, &nss_ctx->nss_top->stats_drv[NSS_STATS_DRV_TX_PACKET]);
 	return NSS_TX_SUCCESS;
@@ -296,7 +292,6 @@
 	struct nss_dtls_msg *nm;
 	struct nss_cmn_msg *ncm = &msg->cm;
 	struct sk_buff *nbuf;
-	uint16_t int_bit = 0;
 	int32_t status;
 
 	NSS_VERIFY_CTX_MAGIC(nss_ctx);
@@ -310,8 +305,6 @@
 	 */
 	BUG_ON(!nss_dtls_verify_if_num(ncm->interface));
 
-	int_bit = nss_ctx->h2n_desc_rings[NSS_IF_CMD_QUEUE].desc_ring.int_bit;
-
 	if (ncm->type > NSS_DTLS_MSG_MAX) {
 		nss_warning("%p: dtls message type out of range: %d",
 			    nss_ctx, ncm->type);
@@ -350,8 +343,7 @@
 		return NSS_TX_FAILURE;
 	}
 
-	nss_hal_send_interrupt(nss_ctx->nmap, int_bit,
-			       NSS_REGS_H2N_INTR_STATUS_DATA_COMMAND_QUEUE);
+	nss_hal_send_interrupt(nss_ctx, NSS_H2N_INTR_DATA_COMMAND_QUEUE);
 
 	NSS_PKT_STATS_INCREMENT(nss_ctx, &nss_ctx->nss_top->stats_drv[NSS_STATS_DRV_TX_CMD_REQ]);
 	return NSS_TX_SUCCESS;
@@ -449,7 +441,7 @@
 	nss_top_main.dtls_msg_callback = ev_cb;
 	nss_core_register_handler(if_num, nss_dtls_handler, app_ctx);
 
-	return (struct nss_ctx_instance *)&nss_top_main.nss[nss_top_main.dtls_handler_id];
+	return nss_ctx;
 }
 EXPORT_SYMBOL(nss_dtls_register_if);
 
diff --git a/nss_dynamic_interface.c b/nss_dynamic_interface.c
index 879b9fc..23ff5a3 100644
--- a/nss_dynamic_interface.c
+++ b/nss_dynamic_interface.c
@@ -204,8 +204,7 @@
 		return NSS_TX_FAILURE;
 	}
 
-	nss_hal_send_interrupt(nss_ctx->nmap, nss_ctx->h2n_desc_rings[NSS_IF_CMD_QUEUE].desc_ring.int_bit,
-				NSS_REGS_H2N_INTR_STATUS_DATA_COMMAND_QUEUE);
+	nss_hal_send_interrupt(nss_ctx, NSS_H2N_INTR_DATA_COMMAND_QUEUE);
 
 	NSS_PKT_STATS_INCREMENT(nss_ctx, &nss_ctx->nss_top->stats_drv[NSS_STATS_DRV_TX_CMD_REQ]);
 	return NSS_TX_SUCCESS;
diff --git a/nss_freq.c b/nss_freq.c
index 4e1d1e1..e05b835 100644
--- a/nss_freq.c
+++ b/nss_freq.c
@@ -107,7 +107,7 @@
 		return NSS_TX_FAILURE;
 	}
 
-	nss_hal_send_interrupt(nss_ctx->nmap, nss_ctx->h2n_desc_rings[NSS_IF_CMD_QUEUE].desc_ring.int_bit, NSS_REGS_H2N_INTR_STATUS_DATA_COMMAND_QUEUE);
+	nss_hal_send_interrupt(nss_ctx, NSS_H2N_INTR_DATA_COMMAND_QUEUE);
 
 	return NSS_TX_SUCCESS;
 }
diff --git a/nss_gre_redir.c b/nss_gre_redir.c
index 3c51d0b..8ffa9a1 100644
--- a/nss_gre_redir.c
+++ b/nss_gre_redir.c
@@ -212,8 +212,7 @@
 		return NSS_TX_FAILURE;
 	}
 
-	nss_hal_send_interrupt(nss_ctx->nmap, nss_ctx->h2n_desc_rings[NSS_IF_CMD_QUEUE].desc_ring.int_bit,
-				NSS_REGS_H2N_INTR_STATUS_DATA_COMMAND_QUEUE);
+	nss_hal_send_interrupt(nss_ctx, NSS_H2N_INTR_DATA_COMMAND_QUEUE);
 
 	NSS_PKT_STATS_INCREMENT(nss_ctx, &nss_ctx->nss_top->stats_drv[NSS_STATS_DRV_TX_CMD_REQ]);
 	return NSS_TX_SUCCESS;
@@ -248,8 +247,7 @@
 	/*
 	 * Kick the NSS awake so it can process our new entry.
 	 */
-	nss_hal_send_interrupt(nss_ctx->nmap, nss_ctx->h2n_desc_rings[NSS_IF_DATA_QUEUE_0].desc_ring.int_bit,
-				NSS_REGS_H2N_INTR_STATUS_DATA_COMMAND_QUEUE);
+	nss_hal_send_interrupt(nss_ctx, NSS_H2N_INTR_DATA_COMMAND_QUEUE);
 
 	NSS_PKT_STATS_INCREMENT(nss_ctx, &nss_ctx->nss_top->stats_drv[NSS_STATS_DRV_TX_PACKET]);
 	return NSS_TX_SUCCESS;
diff --git a/nss_hal/fsm9010/nss_hal_pvt.c b/nss_hal/fsm9010/nss_hal_pvt.c
index 09dc604..ce90c7d 100644
--- a/nss_hal/fsm9010/nss_hal_pvt.c
+++ b/nss_hal/fsm9010/nss_hal_pvt.c
@@ -19,106 +19,40 @@
  *	NSS HAL private APIs.
  */
 
-#include <linux/delay.h>
 #include <linux/err.h>
-#include <linux/gpio.h>
-#include <linux/firmware.h>
-#include <linux/clk.h>
 #include <linux/of.h>
 #include <linux/of_net.h>
 #include <linux/of_irq.h>
 #include <linux/of_address.h>
-
-#include "nss_hal_pvt.h"
+#include "nss_hal.h"
 #include "nss_core.h"
-#include "nss_tx_rx_common.h"
-#include "nss_data_plane.h"
+
+#define NSS_H2N_INTR_EMPTY_BUFFER_QUEUE_BIT     0
+#define NSS_H2N_INTR_DATA_COMMAND_QUEUE_BIT     1
+#define NSS_H2N_INTR_TX_UNBLOCKED_BIT           11
+#define NSS_H2N_INTR_TRIGGER_COREDUMP_BIT       15
 
 /*
- * Table of Compatible devices
+ * Interrupt type to cause vector.
  */
-struct of_device_id nss_dt_ids[] = {
-	{ .compatible =  "qcom,nss" },
-	{},
-};
-MODULE_DEVICE_TABLE(of, nss_dt_ids);
+static uint32_t intr_cause[] = {(1 << NSS_H2N_INTR_EMPTY_BUFFER_QUEUE_BIT),
+				(1 << NSS_H2N_INTR_DATA_COMMAND_QUEUE_BIT),
+				(1 << NSS_H2N_INTR_TX_UNBLOCKED_BIT),
+				(1 << NSS_H2N_INTR_TRIGGER_COREDUMP_BIT)};
 
 /*
- * __nss_hal_debug_enable()
- *	Enable NSS debug
+ * nss_hal_get_num_irqs()
+ *	get number of irqs from interrupt resource of device tree
  */
-void __nss_hal_debug_enable(void)
+static inline int nss_hal_get_num_irqs(struct device_node *np)
 {
-	return;
-}
+	int num_irqs = 0;
 
-/*
- * __nss_hal_core_reset
- */
-void __nss_hal_core_reset(uint32_t map, uint32_t addr)
-{
-	return;
-}
+	while (of_irq_to_resource(np, num_irqs, NULL)) {
+		num_irqs++;
+	}
 
-/*
- * __nss_hal_clock_pre_init()
- * 	Initialize NSS TCM Clock
- */
-int32_t __nss_hal_clock_pre_init(struct platform_device *nss_dev)
-{
-	return NSS_SUCCESS;
-}
-
-/*
- * nss_hal_update_freq_scale()
- * Update frequency scale table
- */
-int32_t nss_hal_update_freq_scale(struct nss_platform_data *npd)
-{
-	return NSS_SUCCESS;
-}
-
-/*
- * __nss_hal_load_fw()
- * 	Load NSS firmware
- */
-int32_t __nss_hal_load_fw(struct platform_device *nss_dev, struct nss_platform_data *npd)
-{
-	return NSS_SUCCESS;
-}
-
-/*
- * __nss_hal_clock_post_init()
- * 	Configure Core clock
- */
-int32_t __nss_hal_clock_post_init(struct platform_device *nss_dev, struct nss_platform_data *npd)
-{
-	return NSS_SUCCESS;
-}
-
-/*
- * __nss_hal_reset_control()
- * 	Initialize HW resources for UBI core and pull out-of-reset
- */
-int32_t __nss_hal_reset_control(struct platform_device *nss_dev)
-{
-	return NSS_SUCCESS;
-}
-
-/*
- * File local/Static variables/functions
- */
-
-static const struct net_device_ops nss_netdev_ops;
-static const struct ethtool_ops nss_ethtool_ops;
-
-/*
- * nss_hal_dummy_netdev_setup()
- *	Dummy setup for net_device handler
- */
-static void nss_hal_dummy_netdev_setup(struct net_device *ndev)
-{
-
+	return num_irqs;
 }
 
 /*
@@ -133,8 +67,7 @@
 	/*
 	 * Mask interrupt until our bottom half re-enables it
 	 */
-	nss_hal_disable_interrupt(nss_ctx->nmap, int_ctx->irq,
-			int_ctx->shift_factor, NSS_HAL_SUPPORTED_INTERRUPTS);
+	nss_hal_disable_interrupt(nss_ctx, int_ctx->shift_factor, NSS_HAL_SUPPORTED_INTERRUPTS);
 
 	/*
 	 * Schedule tasklet to process interrupt cause
@@ -144,39 +77,25 @@
 }
 
 /*
- * nss_hal_get_num_irqs()
- * 	get number of irqs from interrupt resource of device tree
- */
-static inline int nss_hal_get_num_irqs(struct device_node *np)
-{
-	int num_irqs = 0;
-
-	while (of_irq_to_resource(np, num_irqs, NULL)) {
-		num_irqs++;
-	}
-
-	return num_irqs;
-}
-
-/*
  * nss_hal_of_get_pdata()
  *	Retrieve platform data from device node.
  */
-static struct nss_platform_data *nss_hal_of_get_pdata(struct device_node *np,
-						      struct platform_device *pdev)
+static struct nss_platform_data *__nss_hal_of_get_pdata(struct platform_device *pdev)
 {
+	struct device_node *np = of_node_get(pdev->dev.of_node);
 	struct nss_platform_data *npd = NULL;
 	struct nss_ctx_instance *nss_ctx = NULL;
 	struct nss_top_instance *nss_top = &nss_top_main;
-	uint32_t val;
 	struct resource res_nphys, res_vphys;
+	int32_t i;
 
 	npd = devm_kzalloc(&pdev->dev, sizeof(struct nss_platform_data), GFP_KERNEL);
 	if (!npd) {
 		return NULL;
 	}
 
-	if (of_property_read_u32(np, "qcom,id", &npd->id)) {
+	if (of_property_read_u32(np, "qcom,id", &npd->id)
+	    || of_property_read_u32(np, "qcom,num_queue", &npd->num_queue)) {
 		pr_err("%s: error reading critical device node properties\n", np->name);
 		goto out;
 	}
@@ -185,21 +104,21 @@
 		npd->num_irq = nss_hal_get_num_irqs(np);
 	}
 
-	npd->gmac_enabled[0] = of_property_read_bool(np, "qcom,gmac0-enabled");
-	npd->gmac_enabled[1] = of_property_read_bool(np, "qcom,gmac1-enabled");
-	npd->turbo_frequency = of_property_read_bool(np, "qcom,turbo-frequency");
-	npd->tstamp_enabled = of_property_read_bool(np, "qcom,tstamp-enabled");
+	if (npd->num_irq < npd->num_queue) {
+		pr_err("%s: not enough interrupts configured for all the queues\n", np->name);
+		goto out;
+	}
 
 	nss_ctx = &nss_top->nss[npd->id];
 	nss_ctx->id = npd->id;
 
 	if (of_address_to_resource(np, 0, &res_nphys) != 0) {
-		nss_info("%p: nss%d: of_address_to_resource() fail for nphys \n", nss_ctx, nss_ctx->id);
+		nss_info_always("%p: nss%d: of_address_to_resource() fail for nphys\n", nss_ctx, nss_ctx->id);
 		goto out;
 	}
 
 	if (of_address_to_resource(np, 1, &res_vphys) != 0) {
-		nss_info("%p: nss%d: of_address_to_resource() fail for vphys \n", nss_ctx, nss_ctx->id);
+		nss_info_always("%p: nss%d: of_address_to_resource() fail for vphys\n", nss_ctx, nss_ctx->id);
 		goto out;
 	}
 
@@ -211,42 +130,30 @@
 
 	npd->nmap = (uint32_t)ioremap_nocache(npd->nphys, resource_size(&res_nphys));
 	if (!npd->nmap) {
-		nss_info("%p: nss%d: ioremap() fail for nphys \n", nss_ctx, nss_ctx->id);
+		nss_info_always("%p: nss%d: ioremap() fail for nphys\n", nss_ctx, nss_ctx->id);
 		goto out;
 	}
 
 	npd->vmap = (uint32_t)ioremap_nocache(npd->vphys, resource_size(&res_vphys));
 	if (!npd->vmap) {
-		nss_info("%p: nss%d: ioremap() fail for vphys \n", nss_ctx, nss_ctx->id);
+		nss_info_always("%p: nss%d: ioremap() fail for vphys\n", nss_ctx, nss_ctx->id);
 		goto out;
 	}
 
 	/*
 	 * Get IRQ numbers
 	 */
-	for (val = 0 ; val < npd->num_irq ; val++) {
-		npd->irq[val] = irq_of_parse_and_map(np, val);
-		if (!npd->irq[val]) {
-			nss_info("%p: nss%d: irq_of_parse_and_map() fail for irq %d\n",
-				 nss_ctx, nss_ctx->id, val);
+	for (i = 0 ; i < npd->num_irq; i++) {
+		npd->irq[i] = irq_of_parse_and_map(np, i);
+		if (!npd->irq[i]) {
+			nss_info_always("%p: nss%d: irq_of_parse_and_map() fail for irq %d\n", nss_ctx, nss_ctx->id, i);
 			goto out;
 		}
 	}
 
-	npd->ipv4_enabled = of_property_read_bool(np, "qcom,ipv4-enabled");
-	npd->ipv4_reasm_enabled = of_property_read_bool(np, "qcom,ipv4-reasm-enabled");
-	npd->ipv6_enabled = of_property_read_bool(np, "qcom,ipv6-enabled");
-	npd->ipv6_reasm_enabled = of_property_read_bool(np, "qcom,ipv6-reasm-enabled");
-	npd->crypto_enabled = of_property_read_bool(np, "qcom,crypto-enabled");
-	npd->l2switch_enabled = of_property_read_bool(np, "qcom,l2switch-enabled");
-	npd->ipsec_enabled = of_property_read_bool(np, "qcom,ipsec-enabled");
-	npd->wlanredirect_enabled = of_property_read_bool(np, "qcom,wlan-enabled");
-	npd->tun6rd_enabled = of_property_read_bool(np, "qcom,tun6rd-enabled");
-	npd->l2tpv2_enabled = of_property_read_bool(np, "qcom,l2tpv2-enabled");
-	npd->tunipip6_enabled = of_property_read_bool(np, "qcom,tunipip6-enabled");
-	npd->shaping_enabled = of_property_read_bool(np, "qcom,shaping-enabled");
-	npd->oam_enabled = of_property_read_bool(np, "qcom,oam-enabled");
+	nss_hal_dt_parse_features(np, npd);
 
+	of_node_put(np);
 	return npd;
 
 out:
@@ -259,426 +166,130 @@
 	}
 
 	devm_kfree(&pdev->dev, npd);
-
+	of_node_put(np);
 	return NULL;
 }
 
 /*
- * nss_hal_probe()
- *	HLOS device probe callback
+ * __nss_hal_debug_enable()
+ *	Enable NSS debug
  */
-int nss_hal_probe(struct platform_device *nss_dev)
+static void __nss_hal_debug_enable(void)
 {
-	struct nss_top_instance *nss_top = &nss_top_main;
-	struct nss_ctx_instance *nss_ctx = NULL;
-	struct nss_platform_data *npd = NULL;
-	struct netdev_priv_instance *ndev_priv;
-	struct net_device *tstamp_ndev = NULL;
-	int i, err = 0;
-
-	struct device_node *np = NULL;
-
-	if (!nss_dev->dev.of_node) {
-		/*
-		 * Device node not present
-		 */
-		pr_err("nss-driver: Device tree not available\n");
-		return -ENODEV;
-	}
-
-	/*
-	 * Device Tree based init
-	 */
-	np = of_node_get(nss_dev->dev.of_node);
-	npd = nss_hal_of_get_pdata(np, nss_dev);
-
-	of_node_put(np);
-
-	if (!npd) {
-		return -EFAULT;
-	}
-
-	nss_ctx = &nss_top->nss[npd->id];
-	nss_ctx->id = npd->id;
-	nss_dev->id = nss_ctx->id;
-
-	nss_ctx->nss_top = nss_top;
-
-	nss_info("%p: NSS_DEV_ID %s \n", nss_ctx, dev_name(&nss_dev->dev));
-	/*
-	 * Get virtual and physical memory addresses for nss logical/hardware address maps
-	 */
-
-	/*
-	 * Virtual address of CSM space
-	 */
-	nss_ctx->nmap = npd->nmap;
-	nss_assert(nss_ctx->nmap);
-
-	/*
-	 * Physical address of CSM space
-	 */
-	nss_ctx->nphys = npd->nphys;
-	nss_assert(nss_ctx->nphys);
-
-	/*
-	 * Virtual address of logical registers space
-	 */
-	nss_ctx->vmap = npd->vmap;
-	nss_assert(nss_ctx->vmap);
-
-	/*
-	 * Physical address of logical registers space
-	 */
-	nss_ctx->vphys = npd->vphys;
-	nss_assert(nss_ctx->vphys);
-	nss_info("%d:ctx=%p, vphys=%x, vmap=%x, nphys=%x, nmap=%x",
-			nss_ctx->id, nss_ctx, nss_ctx->vphys, nss_ctx->vmap, nss_ctx->nphys, nss_ctx->nmap);
-
-	/*
-	 * Register netdevice handlers
-	 */
-#if (LINUX_VERSION_CODE <= KERNEL_VERSION(3, 16, 0))
-	nss_ctx->int_ctx[0].ndev = alloc_netdev(sizeof(struct netdev_priv_instance),
-					"qca-nss-dev%d", nss_hal_dummy_netdev_setup);
-#else
-	nss_ctx->int_ctx[0].ndev = alloc_netdev(sizeof(struct netdev_priv_instance),
-					"qca-nss-dev%d", NET_NAME_ENUM, nss_hal_dummy_netdev_setup);
-#endif
-	if (nss_ctx->int_ctx[0].ndev == NULL) {
-		nss_warning("%p: Could not allocate net_device #0", nss_ctx);
-		err = -ENOMEM;
-		goto err_init_0;
-	}
-
-	nss_ctx->int_ctx[0].ndev->netdev_ops = &nss_netdev_ops;
-	nss_ctx->int_ctx[0].ndev->ethtool_ops = &nss_ethtool_ops;
-	err = register_netdev(nss_ctx->int_ctx[0].ndev);
-	if (err) {
-		nss_warning("%p: Could not register net_device #0", nss_ctx);
-		goto err_init_1;
-	}
-
-	/*
-	 * request for IRQs
-	 *
-	 * WARNING: CPU affinities should be set using OS supported methods
-	 */
-	nss_ctx->int_ctx[0].nss_ctx = nss_ctx;
-	nss_ctx->int_ctx[0].shift_factor = 0;
-	nss_ctx->int_ctx[0].irq = npd->irq[0];
-	err = request_irq(npd->irq[0], nss_hal_handle_irq, 0, "nss", &nss_ctx->int_ctx[0]);
-	if (err) {
-		nss_warning("%d: IRQ0 request failed", nss_dev->id);
-		goto err_init_2;
-	}
-
-	/*
-	 * Register NAPI for NSS core interrupt #0
-	 */
-	ndev_priv = netdev_priv(nss_ctx->int_ctx[0].ndev);
-	ndev_priv->int_ctx = &nss_ctx->int_ctx[0];
-	netif_napi_add(nss_ctx->int_ctx[0].ndev, &nss_ctx->int_ctx[0].napi, nss_core_handle_napi, 64);
-	napi_enable(&nss_ctx->int_ctx[0].napi);
-	nss_ctx->int_ctx[0].napi_active = true;
-
-	/*
-	 * Check if second interrupt is supported on this nss core
-	 */
-	if (npd->num_irq > 1) {
-		nss_info("%d: This NSS core supports two interrupts", nss_dev->id);
-
-		/*
-		 * Register netdevice handlers
-		 */
-#if (LINUX_VERSION_CODE <= KERNEL_VERSION(3, 16, 0))
-		nss_ctx->int_ctx[1].ndev = alloc_netdev(sizeof(struct netdev_priv_instance),
-						"qca-nss-dev%d", nss_hal_dummy_netdev_setup);
-#else
-		nss_ctx->int_ctx[1].ndev = alloc_netdev(sizeof(struct netdev_priv_instance),
-						"qca-nss-dev%d", NET_NAME_ENUM, nss_hal_dummy_netdev_setup);
-#endif
-		if (nss_ctx->int_ctx[1].ndev == NULL) {
-			nss_warning("%p: Could not allocate net_device #1", nss_ctx);
-			err = -ENOMEM;
-			goto err_init_3;
-		}
-
-		nss_ctx->int_ctx[1].ndev->netdev_ops = &nss_netdev_ops;
-		nss_ctx->int_ctx[1].ndev->ethtool_ops = &nss_ethtool_ops;
-		err = register_netdev(nss_ctx->int_ctx[1].ndev);
-		if (err) {
-			nss_warning("%p: Could not register net_device #1", nss_ctx);
-			goto err_init_4;
-		}
-
-		nss_ctx->int_ctx[1].nss_ctx = nss_ctx;
-		nss_ctx->int_ctx[1].shift_factor = 15;
-		nss_ctx->int_ctx[1].irq = npd->irq[1];
-		err = request_irq(npd->irq[1], nss_hal_handle_irq, 0, "nss", &nss_ctx->int_ctx[1]);
-		if (err) {
-			nss_warning("%d: IRQ1 request failed for nss", nss_dev->id);
-			goto err_init_5;
-		}
-
-		/*
-		 * Register NAPI for NSS core interrupt #1
-		 */
-		ndev_priv = netdev_priv(nss_ctx->int_ctx[1].ndev);
-		ndev_priv->int_ctx = &nss_ctx->int_ctx[1];
-		netif_napi_add(nss_ctx->int_ctx[1].ndev, &nss_ctx->int_ctx[1].napi, nss_core_handle_napi, 64);
-		napi_enable(&nss_ctx->int_ctx[1].napi);
-		nss_ctx->int_ctx[1].napi_active = true;
-	}
-
-	/*
-	 * Allocate tstamp net_device and register the net_device
-	 */
-	if (npd->tstamp_enabled == NSS_FEATURE_ENABLED) {
-		tstamp_ndev = nss_tstamp_register_netdev();
-		if (!tstamp_ndev) {
-			nss_warning("%p: Unable to register the TSTAMP net_device", nss_ctx);
-			npd->tstamp_enabled = NSS_FEATURE_NOT_ENABLED;
-		}
-	}
-
-	spin_lock_bh(&(nss_top->lock));
-
-	/*
-	 * Check functionalities are supported by this NSS core
-	 */
-	if (npd->shaping_enabled == NSS_FEATURE_ENABLED) {
-		nss_top->shaping_handler_id = nss_dev->id;
-		nss_info("%d: NSS shaping is enabled", nss_dev->id);
-	}
-
-	if (npd->tstamp_enabled == NSS_FEATURE_ENABLED) {
-		nss_top->tstamp_handler_id = nss_dev->id;
-		nss_tstamp_register_handler(tstamp_ndev);
-	}
-
-	if (npd->ipv4_enabled == NSS_FEATURE_ENABLED) {
-		nss_top->ipv4_handler_id = nss_dev->id;
-		nss_ipv4_register_handler();
-#if (NSS_PPP_SUPPORT == 1)
-		nss_pppoe_register_handler();
-#endif
-		nss_eth_rx_register_handler();
-		nss_n2h_register_handler();
-		nss_lag_register_handler();
-		nss_dynamic_interface_register_handler();
-
-		for (i = 0; i < NSS_MAX_VIRTUAL_INTERFACES; i++) {
-			nss_top->virt_if_handler_id[i] = nss_dev->id;
-		}
-
-		nss_top->dynamic_interface_table[NSS_DYNAMIC_INTERFACE_TYPE_802_3_REDIR] = nss_dev->id;
-	}
-
-	if (npd->ipv4_reasm_enabled == NSS_FEATURE_ENABLED) {
-		nss_top->ipv4_reasm_handler_id = nss_dev->id;
-		nss_ipv4_reasm_register_handler();
-	}
-
-	if (npd->ipv6_enabled == NSS_FEATURE_ENABLED) {
-		nss_top->ipv6_handler_id = nss_dev->id;
-		nss_ipv6_register_handler();
-	}
-
-	if (npd->ipv6_reasm_enabled == NSS_FEATURE_ENABLED) {
-		nss_top->ipv6_reasm_handler_id = nss_dev->id;
-		nss_ipv6_reasm_register_handler();
-	}
-
-	if (npd->crypto_enabled == NSS_FEATURE_ENABLED) {
-		nss_top->crypto_enabled = 1;
-		nss_top->crypto_handler_id = nss_dev->id;
-		nss_crypto_register_handler();
-	}
-
-	if (npd->ipsec_enabled == NSS_FEATURE_ENABLED) {
-		nss_top->ipsec_handler_id = nss_dev->id;
-		nss_ipsec_register_handler();
-	}
-
-	if (npd->wlanredirect_enabled == NSS_FEATURE_ENABLED) {
-		nss_top->wlan_handler_id = nss_dev->id;
-	}
-
-	if (npd->tun6rd_enabled == NSS_FEATURE_ENABLED) {
-		nss_top->tun6rd_handler_id = nss_dev->id;
-	}
-
-	if (npd->l2tpv2_enabled == NSS_FEATURE_ENABLED) {
-		nss_top->l2tpv2_handler_id = nss_dev->id;
-		nss_l2tpv2_register_handler();
-	}
-
-	if (npd->tunipip6_enabled == NSS_FEATURE_ENABLED) {
-		nss_top->tunipip6_handler_id = nss_dev->id;
-		nss_tunipip6_register_handler();
-	}
-
-	if (npd->oam_enabled == NSS_FEATURE_ENABLED) {
-		nss_top->oam_handler_id = nss_dev->id;
-		nss_oam_register_handler();
-	}
-
-	/*
-	 * Mark data plane enabled so when nss core init done we call register to nss-gmac
-	 */
-	for (i = 0 ; i < NSS_MAX_PHYSICAL_INTERFACES ; i++) {
-		if (npd->gmac_enabled[i] == NSS_FEATURE_ENABLED) {
-			nss_data_plane_set_enabled(i);
-		}
-	}
-
-#if (NSS_PM_SUPPORT == 1)
-	nss_freq_register_handler();
-#endif
-	nss_lso_rx_register_handler();
-
-	nss_top->frequency_handler_id = nss_dev->id;
-
-	spin_unlock_bh(&(nss_top->lock));
-
-	/*
-	 * Initialize decongestion callbacks to NULL
-	 */
-	for (i = 0; i < NSS_MAX_CLIENTS; i++) {
-		nss_ctx->queue_decongestion_callback[i] = 0;
-		nss_ctx->queue_decongestion_ctx[i] = 0;
-	}
-
-	spin_lock_init(&(nss_ctx->decongest_cb_lock));
-	nss_ctx->magic = NSS_CTX_MAGIC;
-
-	nss_info("%p: Reseting NSS core %d now", nss_ctx, nss_ctx->id);
-
-	/*
-	 * Initialize max buffer size for NSS core
-	 */
-	nss_ctx->max_buf_size = NSS_NBUF_PAYLOAD_SIZE;
-
-	/*
-	 * Initialize S/G status pointers to NULL
-	 */
-	for (i = 0; i < NSS_N2H_DESC_RING_NUM; i++) {
-		nss_ctx->n2h_desc_ring[i].head = NULL;
-		nss_ctx->n2h_desc_ring[i].tail = NULL;
-		nss_ctx->n2h_desc_ring[i].jumbo_start = NULL;
-	}
-
-	/*
-	 * Increment number of cores
-	 */
-	nss_top->num_nss++;
-
-	/*
-	 * Enable interrupts for NSS core
-	 */
-	nss_hal_enable_interrupt(nss_ctx->nmap, nss_ctx->int_ctx[0].irq,
-					nss_ctx->int_ctx[0].shift_factor, NSS_HAL_SUPPORTED_INTERRUPTS);
-
-	if (npd->num_irq > 1) {
-		nss_hal_enable_interrupt(nss_ctx->nmap, nss_ctx->int_ctx[1].irq,
-					nss_ctx->int_ctx[1].shift_factor, NSS_HAL_SUPPORTED_INTERRUPTS);
-	}
-
-	nss_info("%p: All resources initialized and nss core%d has been brought out of reset", nss_ctx, nss_dev->id);
-	goto err_init_0;
-
-err_init_5:
-	unregister_netdev(nss_ctx->int_ctx[1].ndev);
-err_init_4:
-	free_netdev(nss_ctx->int_ctx[1].ndev);
-err_init_3:
-	free_irq(npd->irq[0], &nss_ctx->int_ctx[0]);
-err_init_2:
-	unregister_netdev(nss_ctx->int_ctx[0].ndev);
-err_init_1:
-	free_netdev(nss_ctx->int_ctx[0].ndev);
-
-	if (nss_dev->dev.of_node) {
-		if (npd->nmap) {
-			iounmap((void *)npd->nmap);
-		}
-
-		if (npd->vmap) {
-			iounmap((void *)npd->vmap);
-		}
-	}
-
-err_init_0:
-
-	if (nss_dev->dev.of_node) {
-		devm_kfree(&nss_dev->dev, npd);
-	}
-
-	return err;
+	return;
 }
 
 /*
- * nss_hal_remove()
- *	HLOS device remove callback
+ * __nss_hal_common_reset()
  */
-int nss_hal_remove(struct platform_device *nss_dev)
+static int __nss_hal_common_reset(struct platform_device *nss_dev)
 {
-	struct nss_top_instance *nss_top = &nss_top_main;
-	struct nss_ctx_instance *nss_ctx = &nss_top->nss[nss_dev->id];
-	int i;
-
-	/*
-	 * Clean-up debugfs
-	 */
-	nss_stats_clean();
-
-	/*
-	 * Disable interrupts and bottom halves in HLOS
-	 * Disable interrupts from NSS to HLOS
-	 */
-	nss_hal_disable_interrupt(nss_ctx->nmap, nss_ctx->int_ctx[0].irq,
-					nss_ctx->int_ctx[0].shift_factor, NSS_HAL_SUPPORTED_INTERRUPTS);
-
-	free_irq(nss_ctx->int_ctx[0].irq, &nss_ctx->int_ctx[0]);
-	unregister_netdev(nss_ctx->int_ctx[0].ndev);
-	free_netdev(nss_ctx->int_ctx[0].ndev);
-
-	/*
-	 * Check if second interrupt is supported
-	 * If so then clear resources for second interrupt as well
-	 */
-	if (nss_ctx->int_ctx[1].irq) {
-		nss_hal_disable_interrupt(nss_ctx->nmap, nss_ctx->int_ctx[1].irq,
-					nss_ctx->int_ctx[1].shift_factor, NSS_HAL_SUPPORTED_INTERRUPTS);
-		free_irq(nss_ctx->int_ctx[1].irq, &nss_ctx->int_ctx[1]);
-		unregister_netdev(nss_ctx->int_ctx[1].ndev);
-		free_netdev(nss_ctx->int_ctx[1].ndev);
-	}
-
-	/*
-	 * nss-drv is exiting, remove from nss-gmac
-	 */
-	for (i = 0 ; i < NSS_MAX_PHYSICAL_INTERFACES ; i++) {
-		if (nss_top->subsys_dp_register[i].ndev) {
-			nss_data_plane_unregister_from_nss_gmac(i);
-			nss_top->subsys_dp_register[i].ndev = NULL;
-		}
-	}
-
-	if (nss_dev->dev.of_node) {
-		if (nss_ctx->nmap) {
-			iounmap((void *)nss_ctx->nmap);
-			nss_ctx->nmap = 0;
-		}
-
-		if (nss_ctx->vmap) {
-			iounmap((void *)nss_ctx->vmap);
-			nss_ctx->vmap = 0;
-		}
-	}
-
-	nss_info("%p: All resources freed for nss core%d", nss_ctx, nss_dev->id);
 	return 0;
 }
 
+/*
+ * __nss_hal_core_reset()
+ */
+static int __nss_hal_core_reset(struct platform_device *nss_dev, uint32_t map, uint32_t addr, uint32_t clk_src)
+{
+	return 0;
+}
+
+/*
+ * __nss_hal_firmware_load()
+ */
+static int __nss_hal_firmware_load(struct nss_ctx_instance *nss_ctx, struct platform_device *nss_dev, struct nss_platform_data *npd)
+{
+	return 0;
+}
+
+/*
+ * __nss_hal_clock_configure()
+ */
+static int __nss_hal_clock_configure(struct nss_ctx_instance *nss_ctx, struct platform_device *nss_dev, struct nss_platform_data *npd)
+{
+	return 0;
+}
+
+/*
+ * __nss_hal_read_interrupt_cause()
+ */
+static void __nss_hal_read_interrupt_cause(struct nss_ctx_instance *nss_ctx, uint32_t shift_factor, uint32_t *cause)
+{
+	uint32_t value = nss_read_32(nss_ctx->nmap, NSS_REGS_N2H_INTR_STATUS_OFFSET);
+	*cause = (((value) >> shift_factor) & 0x7FFF);
+}
+
+/*
+ * __nss_hal_clear_interrupt_cause()
+ */
+static void __nss_hal_clear_interrupt_cause(struct nss_ctx_instance *nss_ctx, uint32_t shift_factor, uint32_t cause)
+{
+	nss_write_32(nss_ctx->nmap, NSS_REGS_N2H_INTR_CLR_OFFSET, (cause << shift_factor));
+}
+
+/*
+ * __nss_hal_disable_interrupt()
+ */
+static void __nss_hal_disable_interrupt(struct nss_ctx_instance *nss_ctx, uint32_t shift_factor, uint32_t cause)
+{
+	nss_write_32(nss_ctx->nmap, NSS_REGS_N2H_INTR_MASK_CLR_OFFSET, (cause << shift_factor));
+}
+
+/*
+ * __nss_hal_enable_interrupt()
+ */
+static void __nss_hal_enable_interrupt(struct nss_ctx_instance *nss_ctx, uint32_t shift_factor, uint32_t cause)
+{
+	nss_write_32(nss_ctx->nmap, NSS_REGS_N2H_INTR_MASK_SET_OFFSET, (cause << shift_factor));
+}
+
+/*
+ * __nss_hal_send_interrupt()
+ */
+static void __nss_hal_send_interrupt(struct nss_ctx_instance *nss_ctx, uint32_t type)
+{
+	nss_write_32(nss_ctx->nmap, NSS_REGS_C2C_INTR_SET_OFFSET, intr_cause[type]);
+}
+
+/*
+ * __nss_hal_request_irq_for_queue()
+ */
+static int __nss_hal_request_irq_for_queue(struct nss_ctx_instance *nss_ctx, struct nss_platform_data *npd, int qnum)
+{
+	struct int_ctx_instance *int_ctx = &nss_ctx->int_ctx[qnum];
+	int err;
+
+	if (qnum == 1) {
+		int_ctx->shift_factor = 15;
+		err = request_irq(npd->irq[qnum], nss_hal_handle_irq, 0, "nss_queue1", int_ctx);
+	} else {
+		int_ctx->shift_factor = 0;
+		err = request_irq(npd->irq[qnum], nss_hal_handle_irq, 0, "nss", int_ctx);
+	}
+	if (err) {
+		nss_warning("%p: IRQ%d request failed", nss_ctx, npd->irq[qnum]);
+		return err;
+	}
+
+	int_ctx->irq[0] = npd->irq[qnum];
+	return 0;
+}
+
+/*
+ * nss_hal_fsm9010_ops
+ */
+struct nss_hal_ops nss_hal_fsm9010_ops = {
+	.common_reset = __nss_hal_common_reset,
+	.core_reset = __nss_hal_core_reset,
+	.clock_configure = __nss_hal_clock_configure,
+	.firmware_load = __nss_hal_firmware_load,
+	.debug_enable = __nss_hal_debug_enable,
+	.of_get_pdata = __nss_hal_of_get_pdata,
+	.request_irq_for_queue = __nss_hal_request_irq_for_queue,
+	.send_interrupt = __nss_hal_send_interrupt,
+	.enable_interrupt = __nss_hal_enable_interrupt,
+	.disable_interrupt = __nss_hal_disable_interrupt,
+	.clear_interrupt_cause = __nss_hal_clear_interrupt_cause,
+	.read_interrupt_cause = __nss_hal_read_interrupt_cause,
+};
diff --git a/nss_hal/fsm9010/nss_hal_pvt.h b/nss_hal/fsm9010/nss_hal_pvt.h
deleted file mode 100644
index 7f439f0..0000000
--- a/nss_hal/fsm9010/nss_hal_pvt.h
+++ /dev/null
@@ -1,86 +0,0 @@
-/*
- **************************************************************************
- * Copyright (c) 2015, The Linux Foundation. All rights reserved.
- * Permission to use, copy, modify, and/or distribute this software for
- * any purpose with or without fee is hereby granted, provided that the
- * above copyright notice and this permission notice appear in all copies.
- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
- * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
- * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT
- * OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
- **************************************************************************
- */
-
-/**
- * nss_hal_pvt.h
- *	NSS HAL private declarations.for IPQ806x platform
- */
-
-#ifndef __NSS_HAL_PVT_H
-#define __NSS_HAL_PVT_H
-
-#include "nss_regs.h"
-#include "nss_core.h"
-#include <linux/platform_device.h>
-#include <linux/types.h>
-
-#define NSS_HAL_SUPPORTED_INTERRUPTS (NSS_REGS_N2H_INTR_STATUS_EMPTY_BUFFER_QUEUE | \
-                                        NSS_REGS_N2H_INTR_STATUS_DATA_COMMAND_QUEUE | \
-                                        NSS_REGS_N2H_INTR_STATUS_DATA_QUEUE_1 | \
-                                        NSS_REGS_N2H_INTR_STATUS_EMPTY_BUFFERS_SOS | \
-                                        NSS_REGS_N2H_INTR_STATUS_TX_UNBLOCKED | \
-                                        NSS_REGS_N2H_INTR_STATUS_COREDUMP_COMPLETE_0 | \
-                                        NSS_REGS_N2H_INTR_STATUS_COREDUMP_COMPLETE_1)
-
-/*
- * __nss_hal_read_interrupt_cause()
- */
-static inline void __nss_hal_read_interrupt_cause(uint32_t map, uint32_t irq __attribute__ ((unused)), uint32_t shift_factor, uint32_t *cause)
-{
-	uint32_t value = nss_read_32(map, NSS_REGS_N2H_INTR_STATUS_OFFSET);
-	*cause = (((value) >> shift_factor) & 0x7FFF);
-}
-
-/*
- * __nss_hal_clear_interrupt_cause()
- */
-static inline void __nss_hal_clear_interrupt_cause(uint32_t map, uint32_t irq __attribute__ ((unused)), uint32_t shift_factor, uint32_t cause)
-{
-	nss_write_32(map, NSS_REGS_N2H_INTR_CLR_OFFSET, (cause << shift_factor));
-}
-
-/*
- * __nss_hal_disable_interrupt()
- */
-static inline void __nss_hal_disable_interrupt(uint32_t map, uint32_t irq __attribute__ ((unused)), uint32_t shift_factor, uint32_t cause)
-{
-	nss_write_32(map, NSS_REGS_N2H_INTR_MASK_CLR_OFFSET, (cause << shift_factor));
-}
-
-/*
- * __nss_hal_enable_interrupt()
- */
-static inline void __nss_hal_enable_interrupt(uint32_t map, uint32_t irq __attribute__ ((unused)), uint32_t shift_factor, uint32_t cause)
-{
-	nss_write_32(map, NSS_REGS_N2H_INTR_MASK_SET_OFFSET, (cause << shift_factor));
-}
-
-/*
- * __nss_hal_send_interrupt()
- */
-static inline void __nss_hal_send_interrupt(uint32_t map, uint32_t irq __attribute__ ((unused)), uint32_t cause)
-{
-	nss_write_32(map, NSS_REGS_C2C_INTR_SET_OFFSET, cause);
-}
-
-extern void __nss_hal_core_reset(uint32_t map, uint32_t reset);
-extern struct nss_platform_data *__nss_hal_of_get_pdata(struct device_node *np, struct platform_device *pdev);
-extern int32_t __nss_hal_clock_pre_init(struct platform_device *nss_dev);
-extern void __nss_hal_debug_enable(void);
-extern int32_t __nss_hal_load_fw(struct platform_device *nss_dev, struct nss_platform_data *npd);
-extern int32_t __nss_hal_reset_control(struct platform_device *nss_dev);
-extern int32_t __nss_hal_clock_post_init(struct platform_device *nss_dev, struct nss_platform_data *npd);
-#endif /* __NSS_HAL_PVT_H */
diff --git a/nss_hal/fsm9010/nss_regs.h b/nss_hal/fsm9010/nss_regs.h
deleted file mode 100644
index 3823455..0000000
--- a/nss_hal/fsm9010/nss_regs.h
+++ /dev/null
@@ -1,108 +0,0 @@
-/*
- **************************************************************************
- * Copyright (c) 2015, The Linux Foundation. All rights reserved.
- * Permission to use, copy, modify, and/or distribute this software for
- * any purpose with or without fee is hereby granted, provided that the
- * above copyright notice and this permission notice appear in all copies.
- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
- * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
- * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT
- * OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
- **************************************************************************
- */
-
-/**
- * nss_regs.h
- *	NSS register definitions.
- */
-
-#ifndef __NSS_REGS_H
-#define __NSS_REGS_H
-
-#include <linux/types.h>
-#include <asm/io.h>
-
-#define NSS_FSM9010_TCM_SIZE SZ_64K
-#define NSS_FSM9010_TCM_BASE IOMEM(0xe4000000)
-#define NSS_FSM9010_FPB_BASE 0xfc800000
-/*
- * CSM register offsets
- */
-#define NSS_REGS_CORE_ID_OFFSET			0x0000
-#define NSS_REGS_RESET_CTRL_OFFSET		0x0004
-#define NSS_REGS_CORE_BAR_OFFSET		0x0008
-#define NSS_REGS_CORE_AMC_OFFSET		0x000c
-#define NSS_REGS_CORE_BOOT_ADDR_OFFSET		0x0010
-#define NSS_REGS_C2C_INTR_STATUS_OFFSET		0x0014
-#define NSS_REGS_C2C_INTR_SET_OFFSET		0x0018
-#define NSS_REGS_C2C_INTR_CLR_OFFSET		0x001c
-#define NSS_REGS_N2H_INTR_STATUS_OFFSET		0x0020
-#define NSS_REGS_N2H_INTR_SET_OFFSET		0x0024
-#define NSS_REGS_N2H_INTR_CLR_OFFSET		0x0028
-#define NSS_REGS_N2H_INTR_MASK_OFFSET		0x002c
-#define NSS_REGS_N2H_INTR_MASK_SET_OFFSET	0x0030
-#define NSS_REGS_N2H_INTR_MASK_CLR_OFFSET	0x0034
-#define NSS_REGS_CORE_INT_STAT0_TYPE_OFFSET	0x0038
-#define NSS_REGS_CORE_INT_STAT1_TYPE_OFFSET	0x003c
-#define NSS_REGS_CORE_INT_STAT2_TYPE_OFFSET	0x0040
-#define NSS_REGS_CORE_INT_STAT3_TYPE_OFFSET	0x0044
-#define NSS_REGS_CORE_IFETCH_RANGE_OFFSET	0x0048
-
-/*
- * FPB register offsets
- */
-#define NSS_REGS_FPB_CSR_CFG_OFFSET		0x0004
-
-/*
- * Defines for N2H interrupts
- *
- * It is required to have 2 COREDUMP_COMPLETE interrupts because
- * both NSS cores may generate interrupt simultaneously
- */
-#define NSS_REGS_N2H_INTR_STATUS_EMPTY_BUFFER_QUEUE	(1 << 0)
-#define NSS_REGS_N2H_INTR_STATUS_DATA_COMMAND_QUEUE	(1 << 1)
-#define NSS_REGS_N2H_INTR_STATUS_DATA_QUEUE_1	    	(1 << 2)
-#define NSS_REGS_N2H_INTR_STATUS_EMPTY_BUFFERS_SOS	(1 << 10)
-#define NSS_REGS_N2H_INTR_STATUS_TX_UNBLOCKED		(1 << 11)
-#define NSS_REGS_N2H_INTR_STATUS_COREDUMP_COMPLETE_1	(1 << 13)
-#define NSS_REGS_N2H_INTR_STATUS_COREDUMP_COMPLETE_0	(1 << 14)
-
-/*
- * Defines for H2N interrupts
- */
-#define NSS_REGS_H2N_INTR_STATUS_EMPTY_BUFFER_QUEUE	(1 << 0)
-#define NSS_REGS_H2N_INTR_STATUS_DATA_COMMAND_QUEUE	(1 << 1)
-#define NSS_REGS_H2N_INTR_STATUS_RESET			(1 << 10)	/** Unused */
-#define NSS_REGS_H2N_INTR_STATUS_TX_UNBLOCKED		(1 << 11)
-#define NSS_REGS_H2N_INTR_STATUS_TRIGGER_COREDUMP	(1 << 15)
-
-/*
- * clock source for NSS cores
- */
-enum nss_regs_clk_src_select {
-	NSS_REGS_CLK_SRC_DEFAULT,
-	NSS_REGS_CLK_SRC_ALTERNATE
-};
-
-/*
- * nss_read_32()
- *	Read NSS register
- */
-static inline uint32_t nss_read_32(uint32_t addr, uint32_t offs)
-{
-	return readl((uint32_t *)(addr + offs));
-}
-
-/*
- * nss_write_32()
- *	Write NSS register
- */
-static inline void nss_write_32(uint32_t addr, uint32_t offs, uint32_t val)
-{
-	writel(val, (uint32_t *)(addr + offs));
-}
-
-#endif /* __NSS_REGS_H */
diff --git a/nss_hal/include/nss_hal.h b/nss_hal/include/nss_hal.h
index 3ee380f..23526a3 100644
--- a/nss_hal/include/nss_hal.h
+++ b/nss_hal/include/nss_hal.h
@@ -23,73 +23,69 @@
 #define __NSS_HAL_H
 
 #include <linux/platform_device.h>
-#include <linux/version.h>
+#include <nss_core.h>
+#include <nss_regs.h>
+#include <nss_hal_ops.h>
 
-#include <nss_hal_pvt.h>
+extern struct clk *nss_core0_clk;
+extern struct nss_runtime_sampling nss_runtime_samples;
+extern struct clk *nss_fab0_clk;
+extern struct clk *nss_fab1_clk;
 
-#if (NSS_DT_SUPPORT != 1)
-/*
- * nss_hal_common_reset()
- */
-static inline void nss_hal_common_reset(uint32_t *clk_src)
-{
-	__nss_hal_common_reset(clk_src);
-}
+#if defined(NSS_HAL_IPQ806X_SUPPORT)
+extern struct nss_hal_ops nss_hal_ipq806x_ops;
+#endif
+#if defined(NSS_HAL_FSM9010_SUPPORT)
+extern struct nss_hal_ops nss_hal_fsm9010_ops;
 #endif
 
-/*
- * nss_hal_core_reset()
- */
-#if (NSS_DT_SUPPORT != 1)
-static inline void nss_hal_core_reset(uint32_t core_id, uint32_t map, uint32_t addr, uint32_t clk_src)
-{
-	__nss_hal_core_reset(core_id, map, addr, clk_src);
-}
-#else
-static inline void nss_hal_core_reset(uint32_t map_base, uint32_t reset_addr)
-{
-	__nss_hal_core_reset(map_base, reset_addr);
-}
-#endif
+#define NSS_HAL_SUPPORTED_INTERRUPTS (NSS_N2H_INTR_EMPTY_BUFFER_QUEUE | \
+					NSS_N2H_INTR_DATA_COMMAND_QUEUE | \
+					NSS_N2H_INTR_DATA_QUEUE_1 | \
+					NSS_N2H_INTR_EMPTY_BUFFERS_SOS | \
+					NSS_N2H_INTR_TX_UNBLOCKED | \
+					NSS_N2H_INTR_COREDUMP_COMPLETE_0 | \
+					NSS_N2H_INTR_COREDUMP_COMPLETE_1)
+#define NSS_MAX_IRQ_PER_QUEUE 5
 
 /*
  * nss_hal_read_interrupt_cause()
  */
-static inline void nss_hal_read_interrupt_cause(uint32_t map, uint32_t irq, uint32_t shift_factor, uint32_t *cause)
+static inline void nss_hal_read_interrupt_cause(struct nss_ctx_instance *nss_ctx, uint32_t shift_factor, uint32_t *cause)
 {
-	__nss_hal_read_interrupt_cause(map, irq, shift_factor, cause);
+	nss_top_main.hal_ops->read_interrupt_cause(nss_ctx, shift_factor, cause);
 }
 
 /*
  * nss_hal_clear_interrupt_cause()
  */
-static inline void nss_hal_clear_interrupt_cause(uint32_t map, uint32_t irq, uint32_t shift_factor, uint32_t cause)
+static inline void nss_hal_clear_interrupt_cause(struct nss_ctx_instance *nss_ctx, uint32_t shift_factor, uint32_t cause)
 {
-	__nss_hal_clear_interrupt_cause(map, irq, shift_factor, cause);
+	nss_top_main.hal_ops->clear_interrupt_cause(nss_ctx, shift_factor, cause);
 }
 
 /*
  * nss_hal_disable_interrupt()
  */
-static inline void nss_hal_disable_interrupt(uint32_t map, uint32_t irq, uint32_t shift_factor, uint32_t cause)
+static inline void nss_hal_disable_interrupt(struct nss_ctx_instance *nss_ctx, uint32_t shift_factor, uint32_t cause)
 {
-	__nss_hal_disable_interrupt(map, irq, shift_factor, cause);
+	nss_top_main.hal_ops->disable_interrupt(nss_ctx, shift_factor, cause);
 }
 
 /*
  * nss_hal_enable_interrupt()
  */
-static inline void nss_hal_enable_interrupt(uint32_t map, uint32_t irq, uint32_t shift_factor, uint32_t cause)
+static inline void nss_hal_enable_interrupt(struct nss_ctx_instance *nss_ctx, uint32_t shift_factor, uint32_t cause)
 {
-	__nss_hal_enable_interrupt(map, irq, shift_factor, cause);
+	nss_top_main.hal_ops->enable_interrupt(nss_ctx, shift_factor, cause);
 }
 
 /*
  * nss_hal_send_interrupt()
  */
-static inline void nss_hal_send_interrupt(uint32_t map, uint32_t irq, uint32_t cause)
+static inline void nss_hal_send_interrupt(struct nss_ctx_instance *nss_ctx, uint32_t cause)
 {
-	__nss_hal_send_interrupt(map, irq, cause);
+	nss_top_main.hal_ops->send_interrupt(nss_ctx, cause);
 }
 
 /*
@@ -97,7 +93,7 @@
  */
 static inline void nss_hal_debug_enable(void)
 {
-	__nss_hal_debug_enable();
+	nss_top_main.hal_ops->debug_enable();
 }
 
 /*
@@ -110,4 +106,13 @@
  */
 int nss_hal_remove(struct platform_device *nss_dev);
 
+/*
+ * nss_hal_firmware_load()
+ */
+int nss_hal_firmware_load(struct nss_ctx_instance *nss_ctx, struct platform_device *nss_dev, struct nss_platform_data *npd);
+
+/*
+ * nss_hal_dt_parse_features()
+ */
+void nss_hal_dt_parse_features(struct device_node *np, struct nss_platform_data *npd);
 #endif /* __NSS_HAL_H */
diff --git a/nss_hal/include/nss_hal_ops.h b/nss_hal/include/nss_hal_ops.h
new file mode 100644
index 0000000..c30c6f4
--- /dev/null
+++ b/nss_hal/include/nss_hal_ops.h
@@ -0,0 +1,47 @@
+/*
+ **************************************************************************
+ * Copyright (c) 2016 The Linux Foundation. All rights reserved.
+ * Permission to use, copy, modify, and/or distribute this software for
+ * any purpose with or without fee is hereby granted, provided that the
+ * above copyright notice and this permission notice appear in all copies.
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT
+ * OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ **************************************************************************
+ */
+
+/**
+ * nss_hal_ops.h
+ *	NSS HAL ops structure declaration.
+ */
+
+#ifndef __NSS_HAL_OPS_H
+#define __NSS_HAL_OPS_H
+
+#if (NSS_DT_SUPPORT != 1)
+#include <mach/gpiomux.h>
+#include <mach/msm_nss.h>
+#endif
+
+/*
+ * nss_hal_ops defines the HAL layer API required to support multiple targets
+ */
+struct nss_hal_ops {
+	int (*common_reset)(struct platform_device *pdev);
+	int (*core_reset)(struct platform_device *nss_dev, uint32_t map, uint32_t addr, uint32_t clk_src);
+	int (*clock_configure)(struct nss_ctx_instance *nss_ctx, struct platform_device *nss_dev, struct nss_platform_data *npd);
+	void (*debug_enable)(void);
+	struct nss_platform_data * (*of_get_pdata)(struct platform_device *pdev);
+	int (*firmware_load)(struct nss_ctx_instance *nss_ctx, struct platform_device *nss_dev, struct nss_platform_data *npd);
+	void (*read_interrupt_cause)(struct nss_ctx_instance *nss_ctx, uint32_t shift_factor, uint32_t *cause);
+	int (*request_irq_for_queue)(struct nss_ctx_instance *nss_ctx, struct nss_platform_data *npd, int qnum);
+	void (*clear_interrupt_cause)(struct nss_ctx_instance *nss_ctx, uint32_t shift_factor, uint32_t cause);
+	void (*send_interrupt)(struct nss_ctx_instance *nss_ctx, uint32_t type);
+	void (*enable_interrupt)(struct nss_ctx_instance *nss_ctx, uint32_t shift_factor, uint32_t cause);
+	void (*disable_interrupt)(struct nss_ctx_instance *nss_ctx, uint32_t shift_factor, uint32_t cause);
+};
+#endif /* __NSS_HAL_OPS_H */
diff --git a/nss_hal/ipq806x/nss_regs.h b/nss_hal/include/nss_regs.h
old mode 100755
new mode 100644
similarity index 75%
rename from nss_hal/ipq806x/nss_regs.h
rename to nss_hal/include/nss_regs.h
index 715042a..6a0a60b
--- a/nss_hal/ipq806x/nss_regs.h
+++ b/nss_hal/include/nss_regs.h
@@ -1,6 +1,6 @@
 /*
  **************************************************************************
- * Copyright (c) 2013, 2015 The Linux Foundation. All rights reserved.
+ * Copyright (c) 2013, 2015, 2016, The Linux Foundation. All rights reserved.
  * Permission to use, copy, modify, and/or distribute this software for
  * any purpose with or without fee is hereby granted, provided that the
  * above copyright notice and this permission notice appear in all copies.
@@ -23,7 +23,7 @@
 #define __NSS_REGS_H
 
 #include <linux/types.h>
-#include <asm/io.h>
+#include <linux/io.h>
 
 /*
  * CSM register offsets
@@ -59,22 +59,21 @@
  * It is required to have 2 COREDUMP_COMPLETE interrupts because
  * both NSS cores may generate interrupt simultaneously
  */
-#define NSS_REGS_N2H_INTR_STATUS_EMPTY_BUFFER_QUEUE	(1 << 0)
-#define NSS_REGS_N2H_INTR_STATUS_DATA_COMMAND_QUEUE	(1 << 1)
-#define NSS_REGS_N2H_INTR_STATUS_DATA_QUEUE_1	    	(1 << 2)
-#define NSS_REGS_N2H_INTR_STATUS_EMPTY_BUFFERS_SOS	(1 << 10)
-#define NSS_REGS_N2H_INTR_STATUS_TX_UNBLOCKED		(1 << 11)
-#define NSS_REGS_N2H_INTR_STATUS_COREDUMP_COMPLETE_1	(1 << 13)
-#define NSS_REGS_N2H_INTR_STATUS_COREDUMP_COMPLETE_0	(1 << 14)
+#define NSS_N2H_INTR_EMPTY_BUFFER_QUEUE		(1 << 0)
+#define NSS_N2H_INTR_DATA_COMMAND_QUEUE		(1 << 1)
+#define NSS_N2H_INTR_DATA_QUEUE_1		(1 << 2)
+#define NSS_N2H_INTR_EMPTY_BUFFERS_SOS		(1 << 10)
+#define NSS_N2H_INTR_TX_UNBLOCKED		(1 << 11)
+#define NSS_N2H_INTR_COREDUMP_COMPLETE_1	(1 << 13)
+#define NSS_N2H_INTR_COREDUMP_COMPLETE_0	(1 << 14)
 
 /*
- * Defines for H2N interrupts
+ * Types of H2N interrupts
  */
-#define NSS_REGS_H2N_INTR_STATUS_EMPTY_BUFFER_QUEUE	(1 << 0)
-#define NSS_REGS_H2N_INTR_STATUS_DATA_COMMAND_QUEUE	(1 << 1)
-#define NSS_REGS_H2N_INTR_STATUS_RESET			(1 << 10)	/** Unused */
-#define NSS_REGS_H2N_INTR_STATUS_TX_UNBLOCKED		(1 << 11)
-#define NSS_REGS_H2N_INTR_STATUS_TRIGGER_COREDUMP	(1 << 15)
+#define NSS_H2N_INTR_EMPTY_BUFFER_QUEUE	0
+#define NSS_H2N_INTR_DATA_COMMAND_QUEUE	1
+#define NSS_H2N_INTR_TX_UNBLOCKED	2
+#define NSS_H2N_INTR_TRIGGER_COREDUMP	3
 
 /*
  * clock source for NSS cores
diff --git a/nss_hal/ipq806x/nss_hal_pvt.c b/nss_hal/ipq806x/nss_hal_pvt.c
index e7b3b5a..ef95a62 100644
--- a/nss_hal/ipq806x/nss_hal_pvt.c
+++ b/nss_hal/ipq806x/nss_hal_pvt.c
@@ -23,52 +23,39 @@
 #include <linux/err.h>
 #include <linux/gpio.h>
 #include <linux/version.h>
-#include <linux/firmware.h>
 #include <linux/clk.h>
-
 #if (NSS_DT_SUPPORT != 1)
 #include <mach/gpiomux.h>
 #include <mach/msm_nss.h>
 #else
-#if (NSS_FABRIC_SCALING_SUPPORT == 1)
-#include <linux/fab_scaling.h>
-#endif
 #include <linux/of.h>
 #include <linux/of_net.h>
 #include <linux/of_irq.h>
 #include <linux/of_address.h>
 #include <linux/reset.h>
 #endif
-
-#include "nss_hal_pvt.h"
+#include "nss_hal.h"
 #include "nss_clocks.h"
 #include "nss_core.h"
-#include "nss_tx_rx_common.h"
-#include "nss_data_plane.h"
 #if (NSS_PM_SUPPORT == 1)
 #include "nss_pm.h"
 #endif
-
-extern struct clk *nss_core0_clk;
-extern struct nss_runtime_sampling nss_runtime_samples;
-
-#if (NSS_DT_SUPPORT == 1)
-extern struct clk *nss_fab0_clk;
-extern struct clk *nss_fab1_clk;
+#if (NSS_FABRIC_SCALING_SUPPORT == 1)
+#include <linux/fab_scaling.h>
 #endif
 
-/*
- * File local/Static variables/functions
- */
-static const struct net_device_ops nss_netdev_ops;
-static const struct ethtool_ops nss_ethtool_ops;
+#define NSS_H2N_INTR_EMPTY_BUFFER_QUEUE_BIT     0
+#define NSS_H2N_INTR_DATA_COMMAND_QUEUE_BIT     1
+#define NSS_H2N_INTR_TX_UNBLOCKED_BIT           11
+#define NSS_H2N_INTR_TRIGGER_COREDUMP_BIT       15
 
 /*
- * Macros
+ * Interrupt type to cause vector.
  */
-#define MIN_IMG_SIZE (64*1024)
-#define NETAP0_IMAGE "qca-nss0.bin"
-#define NETAP1_IMAGE "qca-nss1.bin"
+static uint32_t intr_cause[] = {(1 << NSS_H2N_INTR_EMPTY_BUFFER_QUEUE_BIT),
+				(1 << NSS_H2N_INTR_DATA_COMMAND_QUEUE_BIT),
+				(1 << NSS_H2N_INTR_TX_UNBLOCKED_BIT),
+				(1 << NSS_H2N_INTR_TRIGGER_COREDUMP_BIT)};
 
 #if (NSS_FW_DBG_SUPPORT == 1)
 /*
@@ -191,232 +178,33 @@
 #endif /* NSS_FW_DBG_SUPPORT */
 
 /*
- * __nss_hal_debug_enable()
- *	Enable NSS debug
+ * nss_hal_handle_irq()
+ *	HLOS interrupt handler for nss interrupts
  */
-void __nss_hal_debug_enable(void)
+static irqreturn_t nss_hal_handle_irq(int irq, void *ctx)
 {
-#if (NSS_FW_DBG_SUPPORT == 1)
-	msm_gpiomux_install(nss_spi_gpiomux,
-				ARRAY_SIZE(nss_spi_gpiomux));
-#endif
+	struct int_ctx_instance *int_ctx = (struct int_ctx_instance *) ctx;
+	struct nss_ctx_instance *nss_ctx = int_ctx->nss_ctx;
+
+	/*
+	 * Mask interrupt until our bottom half re-enables it
+	 */
+	nss_hal_disable_interrupt(nss_ctx, int_ctx->shift_factor, NSS_HAL_SUPPORTED_INTERRUPTS);
+
+	/*
+	 * Schedule tasklet to process interrupt cause
+	 */
+	napi_schedule(&int_ctx->napi);
+	return IRQ_HANDLED;
 }
 
 #if (NSS_DT_SUPPORT != 1)
-/*
- * nss_hal_pvt_pll_change
- *	Change the Pll between 11(400mhz) or 18(1066 or 1466)
- */
-void nss_hal_pvt_pll_change(uint32_t pll)
-{
-	uint32_t ctl_reg0;
-	uint32_t ctl_reg1;
-
-	uint32_t pll11_mask = 0x1;
-	uint32_t pll18_mask = 0x0;
-
-	uint32_t pll_cl_mask = 0x1;
-
-	nss_trace("Picking PLL%d\n", pll);
-
-	if (pll == 11) {
-
-		ctl_reg0 = readl(UBI32_COREn_CLK_CTL(0));
-		ctl_reg1 = readl(UBI32_COREn_CLK_CTL(1));
-
-		ctl_reg0 &= ~pll_cl_mask;
-		ctl_reg1 &= ~pll_cl_mask;
-
-		ctl_reg0 |= pll11_mask;
-		ctl_reg1 |= pll11_mask;
-
-		writel(ctl_reg0, UBI32_COREn_CLK_CTL(0));
-		writel(ctl_reg1, UBI32_COREn_CLK_CTL(1));
-
-	} else if (pll == 18) {
-
-		ctl_reg0 = readl(UBI32_COREn_CLK_CTL(0));
-		ctl_reg1 = readl(UBI32_COREn_CLK_CTL(1));
-
-		ctl_reg0 &= ~pll_cl_mask;
-		ctl_reg1 &= ~pll_cl_mask;
-
-		ctl_reg0 |= pll18_mask;
-		ctl_reg1 |= pll18_mask;
-
-		writel(ctl_reg0, UBI32_COREn_CLK_CTL(0));
-		writel(ctl_reg1, UBI32_COREn_CLK_CTL(1));
-	} else {
-		BUG_ON(1);
-	}
-
-	return;
-}
-
-/*
- * nss_hal_pvt_register_dump
- *	Dump Registers Regarding NSS
- */
-void nss_hal_pvt_register_dump(void) {
-	nss_trace("NSSFB0_CLK_SRC_CTL	: %x\n", readl(NSSFB0_CLK_SRC_CTL));
-	nss_trace("NSSFB1_CLK_SRC_CTL	: %x\n", readl(NSSFB1_CLK_SRC_CTL));
-	nss_trace("NSSFB0_CLK_SRC0_NS	: %x\n", readl(NSSFB0_CLK_SRC0_NS));
-	nss_trace("NSSFB0_CLK_SRC1_NS	: %x\n", readl(NSSFB0_CLK_SRC1_NS));
-	nss_trace("NSSFB1_CLK_SRC0_NS	: %x\n", readl(NSSFB1_CLK_SRC0_NS));
-	nss_trace("NSSFB1_CLK_SRC1_NS	: %x\n", readl(NSSFB1_CLK_SRC1_NS));
-	nss_trace("\n");
-	nss_trace("PLL_ENA_NSS	: %x\n", readl(PLL_ENA_NSS));
-	nss_trace("PLL18_L_VAL	: %x\n", readl(PLL18_L_VAL));
-	nss_trace("PLL18_M_VAL	: %x\n", readl(PLL18_M_VAL));
-	nss_trace("PLL18_N_VAL	: %x\n", readl(PLL18_N_VAL));
-	nss_trace("PLL18_CONFIG	: %x\n", readl(PLL18_CONFIG));
-	nss_trace("PLL18_TEST_CTL: %x\n", readl(PLL18_TEST_CTL));
-	nss_trace("\n");
-	nss_trace("UBI32_COREn_CLK_SRC0_CTL Core 0: %x\n", readl(UBI32_COREn_CLK_SRC_CTL(0)));
-	nss_trace("UBI32_COREn_CLK_SRC0_CTL Core 1: %x\n", readl(UBI32_COREn_CLK_SRC_CTL(1)));
-	nss_trace("UBI32_COREn_CLK_SRC0_NS Core 0: %x\n", readl(UBI32_COREn_CLK_SRC0_NS(0)));
-	nss_trace("UBI32_COREn_CLK_SRC0_NS Core 1: %x\n", readl(UBI32_COREn_CLK_SRC0_NS(1)));
-	nss_trace("UBI32_COREn_CLK_SRC0_MD Core 0: %x\n", readl(UBI32_COREn_CLK_SRC0_MD(0)));
-	nss_trace("UBI32_COREn_CLK_SRC0_MD Core 1: %x\n", readl(UBI32_COREn_CLK_SRC0_MD(1)));
-	nss_trace("\n\n\n");
-}
-
-/*
- * nss_hal_pvt_divide_pll
- *	Divide PLL by int val
- */
-uint32_t nss_hal_pvt_divide_pll18(uint32_t core_id, uint32_t divider)
-{
-	uint32_t ns_mask 	= 0x00ff01ff;
-	uint32_t ns_mask_1	= 0x00ff0001;
-	uint32_t ns_mask_2	= 0x00fe0141;
-	uint32_t ns_mask_5 	= 0x00fb0141;
-	uint32_t ns_reg0;
-	uint32_t ns_reg1;
-
-	uint32_t md_mask 	= 0x00ff00ff;
-	uint32_t md_mask_2	= 0x000100fd;
-	uint32_t md_mask_5 	= 0x000100fa;
-	uint32_t md_reg0;
-	uint32_t md_reg1;
-
-	nss_trace("NSSFB0_CLK_SRC_CTL  : %x\n", readl(NSSFB0_CLK_SRC_CTL));
-	nss_trace("NSSFB1_CLK_SRC_CTL  : %x\n", readl(NSSFB1_CLK_SRC_CTL));
-	nss_trace("NSSFB0_CLK_SRC0_NS  : %x\n", readl(NSSFB0_CLK_SRC0_NS));
-	nss_trace("NSSFB0_CLK_SRC1_NS  : %x\n", readl(NSSFB0_CLK_SRC1_NS));
-	nss_trace("NSSFB1_CLK_SRC0_NS  : %x\n", readl(NSSFB1_CLK_SRC0_NS));
-	nss_trace("NSSFB1_CLK_SRC1_NS  : %x\n", readl(NSSFB1_CLK_SRC1_NS));
-	nss_trace("\n");
-	nss_trace("PLL_ENA_NSS	: %x\n", readl(PLL_ENA_NSS));
-	nss_trace("PLL18_L_VAL  : %x\n", readl(PLL18_L_VAL));
-	nss_trace("PLL18_M_VAL  : %x\n", readl(PLL18_M_VAL));
-	nss_trace("PLL18_N_VAL  : %x\n", readl(PLL18_N_VAL));
-	nss_trace("PLL18_CONFIG : %x\n", readl(PLL18_CONFIG));
-	nss_trace("PLL18_TEST_CTL: %x\n", readl(PLL18_TEST_CTL));
-	nss_trace("\n");
-	nss_trace("UBI32_COREn_CLK_SRC0_CTL Core 0: %x\n", readl(UBI32_COREn_CLK_SRC_CTL(0)));
-	nss_trace("UBI32_COREn_CLK_SRC0_CTL Core 1: %x\n", readl(UBI32_COREn_CLK_SRC_CTL(1)));
-	nss_trace("UBI32_COREn_CLK_SRC0_NS Core 0: %x\n", readl(UBI32_COREn_CLK_SRC0_NS(0)));
-	nss_trace("UBI32_COREn_CLK_SRC0_NS Core 1: %x\n", readl(UBI32_COREn_CLK_SRC0_NS(1)));
-	nss_trace("UBI32_COREn_CLK_SRC0_MD Core 0: %x\n", readl(UBI32_COREn_CLK_SRC0_MD(0)));
-	nss_trace("UBI32_COREn_CLK_SRC0_MD Core 1: %x\n", readl(UBI32_COREn_CLK_SRC0_MD(1)));
-	nss_trace("\n\n\n");
-
-	md_reg0 = readl(UBI32_COREn_CLK_SRC0_MD(0));
-	md_reg1 = readl(UBI32_COREn_CLK_SRC0_MD(1));
-	ns_reg0 = readl(UBI32_COREn_CLK_SRC0_NS(0));
-	ns_reg1 = readl(UBI32_COREn_CLK_SRC0_NS(1));
-
-	/*
-	 * Bypass
-	 */
-	if (divider == 1) {
-		nss_trace("Bypass PLL Output\n");
-
-		/*
-		 * Clear M and D ( Not2*D ) and Set Bits
-		 */
-
-		md_reg0 &= ~md_mask;
-		md_reg1 &= ~md_mask;
-
-		/*
-		 * PLL Source/ Pre Divide/ Counter Mode/ Counter Reset/ Counter Enable/ N Value
-		 */
-
-		ns_reg0 &= ~ns_mask;
-		ns_reg1 &= ~ns_mask;
-
-		ns_reg0 |= ns_mask_1;
-		ns_reg1 |= ns_mask_1;
-	} else if (divider == 2) {
-		nss_trace("Divide PLL Output by 2\n");
-
-		/*
-		 * Clear M and D ( Not2*D ) and Set Bits
-		 */
-
-		md_reg0 &= ~md_mask;
-		md_reg1 &= ~md_mask;
-
-		md_reg0 |= md_mask_2;
-		md_reg1 |= md_mask_2;
-
-		/*
-		 * PLL Source/ Pre Divide/ Counter Mode/ Counter Reset/ Counter Enable/ N Value
-		 */
-
-		ns_reg0 &= ~ns_mask;
-		ns_reg1 &= ~ns_mask;
-
-		ns_reg0 |= ns_mask_2;
-		ns_reg1 |= ns_mask_2;
-	} else if (divider == 5) {
-		nss_trace("Divide PLL Output by 5\n");
-
-		/*
-		 * Clear M and D ( Not2*D ) and Set Bits
-		 */
-
-		md_reg0 &= ~md_mask;
-		md_reg1 &= ~md_mask;
-
-		md_reg0 |= md_mask_5;
-		md_reg1 |= md_mask_5;
-
-		/*
-		 * PLL Source/ Pre Divide/ Counter Mode/ Counter Reset/ Counter Enable/ N Value
-		 */
-
-		ns_reg0 &= ~ns_mask;
-		ns_reg1 &= ~ns_mask;
-
-		ns_reg0 |= ns_mask_5;
-		ns_reg1 |= ns_mask_5;
-	} else {
-		return 0;
-	}
-
-	writel(md_reg0, UBI32_COREn_CLK_SRC0_MD(0));
-	writel(md_reg1, UBI32_COREn_CLK_SRC0_MD(1));
-	writel(ns_reg0, UBI32_COREn_CLK_SRC0_NS(0));
-	writel(ns_reg1, UBI32_COREn_CLK_SRC0_NS(1));
-
-	nss_trace("UBI32_COREn_CLK_SRC0_CTL Core 0: %x\n", readl(UBI32_COREn_CLK_SRC_CTL(0)));
-	nss_trace("UBI32_COREn_CLK_SRC0_CTL Core 1: %x\n", readl(UBI32_COREn_CLK_SRC_CTL(1)));
-	nss_trace("UBI32_COREn_CLK_SRC0_NS Core 0: %x\n", readl(UBI32_COREn_CLK_SRC0_NS(0)));
-	nss_trace("UBI32_COREn_CLK_SRC0_NS Core 1: %x\n", readl(UBI32_COREn_CLK_SRC0_NS(1)));
-	nss_trace("UBI32_COREn_CLK_SRC0_MD Core 0: %x\n", readl(UBI32_COREn_CLK_SRC0_MD(0)));
-	nss_trace("UBI32_COREn_CLK_SRC0_MD Core 1: %x\n", readl(UBI32_COREn_CLK_SRC0_MD(1)));
-
-	return 1;
-}
-
+#if defined(NSS_ENABLE_CLK)
 /*
  * nss_hal_pvt_enable_pll18()
  *	Enable PLL18
  */
-uint32_t nss_hal_pvt_enable_pll18(uint32_t speed)
+static uint32_t nss_hal_pvt_enable_pll18(uint32_t speed)
 {
 	uint32_t retries = 100;
 
@@ -485,20 +273,397 @@
 
 	return PLL_NOT_LOCKED;
 }
+#endif
+#else
+/*
+ * __nss_hal_of_get_pdata()
+ *	Retrieve platform data from device node.
+ */
+static struct nss_platform_data *__nss_hal_of_get_pdata(struct platform_device *pdev)
+{
+	struct device_node *np = of_node_get(pdev->dev.of_node);
+	struct nss_platform_data *npd;
+	struct nss_ctx_instance *nss_ctx = NULL;
+	struct nss_top_instance *nss_top = &nss_top_main;
+	struct resource res_nphys, res_vphys;
+	int32_t i;
+
+	npd = devm_kzalloc(&pdev->dev, sizeof(struct nss_platform_data), GFP_KERNEL);
+	if (!npd) {
+		return NULL;
+	}
+
+	if (of_property_read_u32(np, "qcom,id", &npd->id)
+	    || of_property_read_u32(np, "qcom,load-addr", &npd->load_addr)
+	    || of_property_read_u32(np, "qcom,num-queue", &npd->num_queue)
+	    || of_property_read_u32(np, "qcom,num-irq", &npd->num_irq)) {
+		pr_err("%s: error reading critical device node properties\n", np->name);
+		goto out;
+	}
+
+	/*
+	 * Read frequencies. If failure, load default values.
+	 */
+	of_property_read_u32(np, "qcom,low-frequency", &nss_runtime_samples.freq_scale[NSS_FREQ_LOW_SCALE].frequency);
+	of_property_read_u32(np, "qcom,mid-frequency", &nss_runtime_samples.freq_scale[NSS_FREQ_MID_SCALE].frequency);
+	of_property_read_u32(np, "qcom,max-frequency", &nss_runtime_samples.freq_scale[NSS_FREQ_HIGH_SCALE].frequency);
+
+	if (npd->num_irq < npd->num_queue) {
+		pr_err("%s: not enough interrupts configured for all the queues\n", np->name);
+		goto out;
+	}
+
+	nss_ctx = &nss_top->nss[npd->id];
+	nss_ctx->id = npd->id;
+
+	if (of_address_to_resource(np, 0, &res_nphys) != 0) {
+		nss_info_always("%p: nss%d: of_address_to_resource() fail for nphys\n", nss_ctx, nss_ctx->id);
+		goto out;
+	}
+
+	if (of_address_to_resource(np, 1, &res_vphys) != 0) {
+		nss_info_always("%p: nss%d: of_address_to_resource() fail for vphys\n", nss_ctx, nss_ctx->id);
+		goto out;
+	}
+
+	/*
+	 * Save physical addresses
+	 */
+	npd->nphys = res_nphys.start;
+	npd->vphys = res_vphys.start;
+
+	npd->nmap = (uint32_t)ioremap_nocache(npd->nphys, resource_size(&res_nphys));
+	if (!npd->nmap) {
+		nss_info_always("%p: nss%d: ioremap() fail for nphys\n", nss_ctx, nss_ctx->id);
+		goto out;
+	}
+
+	npd->vmap = (uint32_t)ioremap_nocache(npd->vphys, resource_size(&res_vphys));
+	if (!npd->vmap) {
+		nss_info_always("%p: nss%d: ioremap() fail for vphys\n", nss_ctx, nss_ctx->id);
+		goto out;
+	}
+
+	/*
+	 * Clear TCM memory used by this core
+	 */
+	for (i = 0; i < resource_size(&res_vphys) ; i += 4) {
+		nss_write_32((uint32_t)npd->vmap, i, 0);
+	}
+
+	/*
+	 * Get IRQ numbers
+	 */
+	for (i = 0 ; i < npd->num_irq; i++) {
+		npd->irq[i] = irq_of_parse_and_map(np, i);
+		if (!npd->irq[i]) {
+			nss_info_always("%p: nss%d: irq_of_parse_and_map() fail for irq %d\n", nss_ctx, nss_ctx->id, i);
+			goto out;
+		}
+	}
+
+	nss_hal_dt_parse_features(np, npd);
+
+	of_node_put(np);
+	return npd;
+
+out:
+	if (npd->nmap) {
+		iounmap((void *)npd->nmap);
+	}
+
+	if (npd->vmap) {
+		iounmap((void *)npd->vmap);
+	}
+
+	devm_kfree(&pdev->dev, npd);
+	of_node_put(np);
+	return NULL;
+}
+#endif
+
+/*
+ * __nss_hal_core_reset()
+ */
+static int __nss_hal_core_reset(struct platform_device *nss_dev, uint32_t map, uint32_t addr, uint32_t clk_src)
+{
+#if (NSS_DT_SUPPORT == 1)
+	struct reset_control *rstctl = NULL;
+
+	/*
+	 * Remove UBI32 reset clamp
+	 */
+	rstctl = devm_reset_control_get(&nss_dev->dev, "clkrst-clamp");
+	if (IS_ERR(rstctl)) {
+		nss_info_always("%p: Deassert UBI32 core%d reset clamp failed", nss_dev, nss_dev->id);
+		return -EFAULT;
+	}
+	reset_control_deassert(rstctl);
+
+	/*
+	 * Remove UBI32 core clamp
+	 */
+	rstctl = devm_reset_control_get(&nss_dev->dev, "clamp");
+	if (IS_ERR(rstctl)) {
+		nss_info_always("%p: Deassert UBI32 core%d clamp failed", nss_dev, nss_dev->id);
+		return -EFAULT;
+	}
+	reset_control_deassert(rstctl);
+
+	/*
+	 * Remove UBI32 AHB reset
+	 */
+	rstctl = devm_reset_control_get(&nss_dev->dev, "ahb");
+	if (IS_ERR(rstctl)) {
+		nss_info_always("%p: Deassert AHB core%d reset failed", nss_dev, nss_dev->id);
+		return -EFAULT;
+	}
+	reset_control_deassert(rstctl);
+
+	/*
+	 * Remove UBI32 AXI reset
+	 */
+	rstctl = devm_reset_control_get(&nss_dev->dev, "axi");
+	if (IS_ERR(rstctl)) {
+		nss_info_always("%p: Deassert core%d AXI reset failed", nss_dev, nss_dev->id);
+		return -EFAULT;
+	}
+	reset_control_deassert(rstctl);
+#else
+#if defined(NSS_ENABLE_CLOCK)
+	/*
+	 * Enable mpt clock
+	 */
+	writel(0x10, UBI32_MPT0_CLK_CTL);
+
+	/*
+	 * UBI coren clock root enable
+	 */
+	if (clk_src == NSS_REGS_CLK_SRC_DEFAULT) {
+		/* select Src0 */
+		writel(0x02, UBI32_COREn_CLK_SRC_CTL(nss_dev->id));
+	} else {
+		/* select Src1 */
+		writel(0x03, UBI32_COREn_CLK_SRC_CTL(nss_dev->id));
+	}
+
+	/*
+	 * Src0: Bypass M value configuration.
+	 */
+
+	/*
+	 * Src1: M val is 0x01 and NOT_2D value is 0xfd, 400 MHz with PLL0.
+	 */
+	writel(0x100fd, UBI32_COREn_CLK_SRC1_MD(nss_dev->id));
+
+	/*
+	 * Bypass, pll18
+	 * Effective frequency = 550 MHz
+	 */
+	writel(0x00000001, UBI32_COREn_CLK_SRC0_NS(nss_dev->id));
+
+	/*
+	 * Dual edge, pll0, NOT(N_M) = 0xfe.
+	 * Effective frequency = 400 MHz
+	 */
+	writel(0x00fe0142, UBI32_COREn_CLK_SRC1_NS(nss_dev->id));
+
+	/*
+	 * UBI32 coren clock control branch.
+	 */
+	writel(0x4f, UBI32_COREn_CLK_FS(nss_dev->id));
+
+	/*
+	 * UBI32 coren clock control branch.
+	 */
+	writel(0x10, UBI32_COREn_CLK_CTL(nss_dev->id));
+#endif
+	/*
+	 * Remove UBI32 reset clamp
+	 */
+	writel(0xB, UBI32_COREn_RESET_CLAMP(nss_dev->id));
+
+	/*
+	 * Busy wait for few cycles
+	 */
+	mdelay(1);
+
+	/*
+	 * Remove UBI32 core clamp
+	 */
+	writel(0x3, UBI32_COREn_RESET_CLAMP(nss_dev->id));
+
+	mdelay(1);
+
+	/*
+	 * Remove UBI32 AHB reset
+	 */
+	writel(0x1, UBI32_COREn_RESET_CLAMP(nss_dev->id));
+
+	mdelay(1);
+
+	/*
+	 * Remove UBI32 AXI reset
+	 */
+	writel(0x0, UBI32_COREn_RESET_CLAMP(nss_dev->id));
+
+	mdelay(1);
+#endif /* NSS_DT_SUPPORT */
+
+	/*
+	 * Apply ubi32 core reset
+	 */
+	nss_write_32(map, NSS_REGS_RESET_CTRL_OFFSET, 1);
+
+	/*
+	 * Program address configuration
+	 */
+	nss_write_32(map, NSS_REGS_CORE_AMC_OFFSET, 1);
+	nss_write_32(map, NSS_REGS_CORE_BAR_OFFSET, 0x3c000000);
+	nss_write_32(map, NSS_REGS_CORE_BOOT_ADDR_OFFSET, addr);
+
+	/*
+	 * C2C interrupts are level sensitive
+	 */
+	nss_write_32(map, NSS_REGS_CORE_INT_STAT2_TYPE_OFFSET, 0xFFFF);
+
+	/*
+	 * Set IF check value
+	 */
+	nss_write_32(map, NSS_REGS_CORE_IFETCH_RANGE_OFFSET, 0xBF004001);
+
+	/*
+	 * De-assert ubi32 core reset
+	 */
+	nss_write_32(map, NSS_REGS_RESET_CTRL_OFFSET, 0);
+
+	return 0;
+}
+
+/*
+ * __nss_hal_debug_enable()
+ *	Enable NSS debug
+ */
+static void __nss_hal_debug_enable(void)
+{
+#if (NSS_FW_DBG_SUPPORT == 1)
+	msm_gpiomux_install(nss_spi_gpiomux,
+				ARRAY_SIZE(nss_spi_gpiomux));
+#endif
+}
 
 /*
  * __nss_hal_common_reset
  *	Do reset/clock configuration common to all cores
  */
-void __nss_hal_common_reset(uint32_t *clk_src)
+static int __nss_hal_common_reset(struct platform_device *nss_dev)
 {
+#if (NSS_DT_SUPPORT == 1)
+	struct device_node *cmn = NULL;
+	struct resource res_nss_fpb_base;
+	struct clk *nss_tcm_src = NULL;
+	struct clk *nss_tcm_clk = NULL;
+	void __iomem *fpb_base;
+	int err;
+
+	/*
+	 * Get reference to NSS common device node
+	 */
+	cmn = of_find_node_by_name(NULL, "nss-common");
+	if (!cmn) {
+		pr_err("%p: Unable to find nss-common node\n", nss_dev);
+		return -EFAULT;
+	}
+
+	if (of_address_to_resource(cmn, 0, &res_nss_fpb_base) != 0) {
+		pr_err("%p: of_address_to_resource() return error for nss_fpb_base\n", nss_dev);
+		of_node_put(cmn);
+		return -EFAULT;
+	}
+	of_node_put(cmn);
+
+	fpb_base = ioremap_nocache(res_nss_fpb_base.start, resource_size(&res_nss_fpb_base));
+	if (!fpb_base) {
+		pr_err("%p: ioremap fail for nss_fpb_base\n", nss_dev);
+		return -EFAULT;
+	}
+
+	/*
+	 * Attach debug interface to TLMM
+	 */
+	nss_write_32((uint32_t)fpb_base, NSS_REGS_FPB_CSR_CFG_OFFSET, 0x360);
+
+	/*
+	 * NSS TCM CLOCK
+	 */
+	nss_tcm_src = clk_get(&nss_dev->dev, NSS_TCM_SRC_CLK);
+	if (IS_ERR(nss_tcm_src)) {
+		pr_err("%p: cannot get clock: %s\n", nss_dev, NSS_TCM_SRC_CLK);
+		return -EFAULT;
+	}
+
+	err = clk_set_rate(nss_tcm_src, NSSTCM_FREQ);
+	if (err) {
+		pr_err("%p: cannot set NSSTCM freq\n", nss_dev);
+		return -EFAULT;
+	}
+
+	err = clk_prepare_enable(nss_tcm_src);
+	if (err) {
+		pr_err("%p: cannot enable NSSTCM clock source\n", nss_dev);
+		return -EFAULT;
+	}
+
+	nss_tcm_clk = clk_get(&nss_dev->dev, NSS_TCM_CLK);
+	if (IS_ERR(nss_tcm_clk)) {
+		pr_err("%p: cannot get clock: %s\n", nss_dev, NSS_TCM_CLK);
+		return -EFAULT;
+	}
+
+	err = clk_prepare_enable(nss_tcm_clk);
+	if (err) {
+		pr_err("%p: cannot enable NSSTCM clock\n", nss_dev);
+		return -EFAULT;
+	}
+
+	/*
+	 * NSS Fabric Clocks.
+	 */
+	nss_fab0_clk = clk_get(&nss_dev->dev, NSS_FABRIC0_CLK);
+	if (IS_ERR(nss_fab0_clk)) {
+		pr_err("%p: cannot get clock: %s\n", nss_dev, NSS_FABRIC0_CLK);
+		nss_fab0_clk = NULL;
+	} else {
+		err = clk_prepare_enable(nss_fab0_clk);
+		if (err) {
+			pr_err("%p: cannot enable clock: %s\n", nss_dev, NSS_FABRIC0_CLK);
+			return -EFAULT;
+		}
+	}
+
+	nss_fab1_clk = clk_get(&nss_dev->dev, NSS_FABRIC1_CLK);
+	if (IS_ERR(nss_fab1_clk)) {
+		pr_err("%p: cannot get clock: %s\n", nss_dev, NSS_FABRIC1_CLK);
+		nss_fab1_clk = NULL;
+	} else {
+		err = clk_prepare_enable(nss_fab1_clk);
+		if (err) {
+			pr_err("%p: cannot enable clock: %s\n", nss_dev, NSS_FABRIC1_CLK);
+			return -EFAULT;
+		}
+	}
+
+	nss_top_main.nss_hal_common_init_done = true;
+	nss_info("nss_hal_common_reset Done\n");
+	return 0;
+}
+#else
 	uint32_t i;
 	uint32_t value;
 	uint32_t status_mask = 0x1;
 	uint32_t wait_cycles = 100;
 
 #if defined(NSS_ENABLE_CLK)
-
 	/*
 	 * NSS FPB CLOCK
 	 */
@@ -598,14 +763,14 @@
 		/*
 		 * Select alternate good source (Src1/pll0)
 		 */
-		*clk_src = NSS_REGS_CLK_SRC_ALTERNATE;
+		nss_top->clk_src = NSS_REGS_CLK_SRC_ALTERNATE;
 		return;
 	}
 
 	/*
 	 * Select default source (Src0/pll18)
 	 */
-	*clk_src = NSS_REGS_CLK_SRC_DEFAULT;
+	nss_top->clk_src = NSS_REGS_CLK_SRC_DEFAULT;
 #endif
 
 	/*
@@ -652,1067 +817,255 @@
 		nss_write_32((uint32_t)MSM_NSS_TCM_BASE, i, 0);
 	}
 
-	return;
+	return 0;
 }
 #endif /* NSS_DT_SUPPORT */
 
 /*
- * __nss_hal_core_reset
+ * __nss_hal_clock_configure()
  */
-#if (NSS_DT_SUPPORT == 1)
-void __nss_hal_core_reset(uint32_t map, uint32_t addr)
-#else
-void __nss_hal_core_reset(uint32_t core_id, uint32_t map, uint32_t addr, uint32_t clk_src)
-#endif
+static int __nss_hal_clock_configure(struct nss_ctx_instance *nss_ctx, struct platform_device *nss_dev, struct nss_platform_data *npd)
 {
-#if (NSS_DT_SUPPORT != 1)
-#if defined(NSS_ENABLE_CLOCK)
-	/*
-	 * Enable mpt clock
-	 */
-	writel(0x10, UBI32_MPT0_CLK_CTL);
-
-	/*
-	 * UBI coren clock root enable
-	 */
-	if (clk_src == NSS_REGS_CLK_SRC_DEFAULT) {
-		/* select Src0 */
-		writel(0x02, UBI32_COREn_CLK_SRC_CTL(core_id));
-	} else {
-		/* select Src1 */
-		writel(0x03, UBI32_COREn_CLK_SRC_CTL(core_id));
-	}
-
-	/*
-	 * Src0: Bypass M value configuration.
-	 */
-
-	/*
-	 * Src1: M val is 0x01 and NOT_2D value is 0xfd, 400 MHz with PLL0.
-	 */
-	writel(0x100fd, UBI32_COREn_CLK_SRC1_MD(core_id));
-
-	/*
-	 * Bypass, pll18
-	 * Effective frequency = 550 MHz
-	 */
-	writel(0x00000001, UBI32_COREn_CLK_SRC0_NS(core_id));
-
-	/*
-	 * Dual edge, pll0, NOT(N_M) = 0xfe.
-	 * Effective frequency = 400 MHz
-	 */
-	writel(0x00fe0142, UBI32_COREn_CLK_SRC1_NS(core_id));
-
-	/*
-	 * UBI32 coren clock control branch.
-	 */
-	writel(0x4f, UBI32_COREn_CLK_FS(core_id));
-
-	/*
-	 * UBI32 coren clock control branch.
-	 */
-	writel(0x10, UBI32_COREn_CLK_CTL(core_id));
-#endif
-	/*
-	 * Remove UBI32 reset clamp
-	 */
-	writel(0xB, UBI32_COREn_RESET_CLAMP(core_id));
-
-	/*
-	 * Busy wait for few cycles
-	 */
-	mdelay(1);
-
-	/*
-	 * Remove UBI32 core clamp
-	 */
-	writel(0x3, UBI32_COREn_RESET_CLAMP(core_id));
-
-	mdelay(1);
-
-	/*
-	 * Remove UBI32 AHB reset
-	 */
-	writel(0x1, UBI32_COREn_RESET_CLAMP(core_id));
-
-	mdelay(1);
-
-	/*
-	 * Remove UBI32 AXI reset
-	 */
-	writel(0x0, UBI32_COREn_RESET_CLAMP(core_id));
-
-	mdelay(1);
-#endif /* NSS_DT_SUPPORT */
-
-	/*
-	* Apply ubi32 core reset
-	*/
-	nss_write_32(map, NSS_REGS_RESET_CTRL_OFFSET, 1);
-
-	/*
-	 * Program address configuration
-	 */
-	nss_write_32(map, NSS_REGS_CORE_AMC_OFFSET, 1);
-	nss_write_32(map, NSS_REGS_CORE_BAR_OFFSET, 0x3c000000);
-	nss_write_32(map, NSS_REGS_CORE_BOOT_ADDR_OFFSET, addr);
-
-	/*
-	 * C2C interrupts are level sensitive
-	 */
-	nss_write_32(map, NSS_REGS_CORE_INT_STAT2_TYPE_OFFSET, 0xFFFF);
-
-	/*
-	 * Set IF check value
-	 */
-	nss_write_32(map, NSS_REGS_CORE_IFETCH_RANGE_OFFSET, 0xBF004001);
-
-	/*
-	 * De-assert ubi32 core reset
-	 */
-	nss_write_32(map, NSS_REGS_RESET_CTRL_OFFSET, 0);
-}
-
-#if (NSS_DT_SUPPORT == 1)
-/*
- * Platform Device ID for NSS core.
- */
-struct of_device_id nss_dt_ids[] = {
-	{ .compatible =  "qcom,nss0" },
-	{ .compatible =  "qcom,nss1" },
-	{},
-};
-MODULE_DEVICE_TABLE(of, nss_dt_ids);
-
-/*
- * nss_hal_of_get_pdata()
- *	Retrieve platform data from device node.
- */
-static struct nss_platform_data *nss_hal_of_get_pdata(struct device_node *np,
-						      struct platform_device *pdev)
-{
-	struct nss_platform_data *npd = NULL;
-	struct nss_ctx_instance *nss_ctx = NULL;
-	struct nss_top_instance *nss_top = &nss_top_main;
-	uint32_t val;
-	struct resource res_nphys, res_vphys;
-	int32_t i;
-
-	npd = devm_kzalloc(&pdev->dev, sizeof(struct nss_platform_data), GFP_KERNEL);
-	if (!npd) {
-		return NULL;
-	}
-
-	if (of_property_read_u32(np, "qcom,id", &npd->id)
-	    || of_property_read_u32(np, "qcom,rst_addr", &npd->rst_addr)
-	    || of_property_read_u32(np, "qcom,load_addr", &npd->load_addr)
-	    || of_property_read_u32(np, "qcom,turbo_frequency", &npd->turbo_frequency)
-	    || of_property_read_u32(np, "qcom,gmac0_enabled", &npd->gmac_enabled[0])
-	    || of_property_read_u32(np, "qcom,gmac1_enabled", &npd->gmac_enabled[1])
-	    || of_property_read_u32(np, "qcom,gmac2_enabled", &npd->gmac_enabled[2])
-	    || of_property_read_u32(np, "qcom,gmac3_enabled", &npd->gmac_enabled[3])
-	    || of_property_read_u32(np, "qcom,num_irq", &npd->num_irq)) {
-		pr_err("%s: error reading critical device node properties\n", np->name);
-		goto out;
-	}
-
-	/*
-	 * Read frequencies. If failure, load default values.
-	 */
-	of_property_read_u32(np, "qcom,low_frequency", &nss_runtime_samples.freq_scale[NSS_FREQ_LOW_SCALE].frequency);
-	of_property_read_u32(np, "qcom,mid_frequency", &nss_runtime_samples.freq_scale[NSS_FREQ_MID_SCALE].frequency);
-	of_property_read_u32(np, "qcom,max_frequency", &nss_runtime_samples.freq_scale[NSS_FREQ_HIGH_SCALE].frequency);
-
-	nss_ctx = &nss_top->nss[npd->id];
-	nss_ctx->id = npd->id;
-
-	if (of_address_to_resource(np, 0, &res_nphys) != 0) {
-		nss_info("%p: nss%d: of_address_to_resource() fail for nphys\n", nss_ctx, nss_ctx->id);
-		goto out;
-	}
-
-	if (of_address_to_resource(np, 1, &res_vphys) != 0) {
-		nss_info("%p: nss%d: of_address_to_resource() fail for vphys\n", nss_ctx, nss_ctx->id);
-		goto out;
-	}
-
-	/*
-	 * Save physical addresses
-	 */
-	npd->nphys = res_nphys.start;
-	npd->vphys = res_vphys.start;
-
-	npd->nmap = (uint32_t)ioremap_nocache(npd->nphys, resource_size(&res_nphys));
-	if (!npd->nmap) {
-		nss_info("%p: nss%d: ioremap() fail for nphys\n", nss_ctx, nss_ctx->id);
-		goto out;
-	}
-
-	npd->vmap = (uint32_t)ioremap_nocache(npd->vphys, resource_size(&res_vphys));
-	if (!npd->vmap) {
-		nss_info("%p: nss%d: ioremap() fail for vphys\n", nss_ctx, nss_ctx->id);
-		goto out;
-	}
-
-	/*
-	 * Clear TCM memory used by this core
-	 */
-	for (i = 0; i < resource_size(&res_vphys) ; i += 4) {
-		nss_write_32((uint32_t)npd->vmap, i, 0);
-	}
-
-	/*
-	 * Get IRQ numbers
-	 */
-	for (val = 0 ; val < npd->num_irq ; val++) {
-		npd->irq[val] = irq_of_parse_and_map(np, val);
-		if (!npd->irq[val]) {
-			nss_info("%p: nss%d: irq_of_parse_and_map() fail for irq %d\n",
-				 nss_ctx, nss_ctx->id, val);
-			goto out;
-		}
-	}
-
-	of_property_read_u32(np, "qcom,ipv4_enabled", &npd->ipv4_enabled);
-	of_property_read_u32(np, "qcom,ipv4_reasm_enabled", &npd->ipv4_reasm_enabled);
-	of_property_read_u32(np, "qcom,ipv6_enabled", &npd->ipv6_enabled);
-	of_property_read_u32(np, "qcom,ipv6_reasm_enabled", &npd->ipv6_reasm_enabled);
-	of_property_read_u32(np, "qcom,l2switch_enabled", &npd->l2switch_enabled);
-	of_property_read_u32(np, "qcom,crypto_enabled", &npd->crypto_enabled);
-	of_property_read_u32(np, "qcom,ipsec_enabled", &npd->ipsec_enabled);
-	of_property_read_u32(np, "qcom,wlanredirect_enabled", &npd->wlanredirect_enabled);
-	of_property_read_u32(np, "qcom,tun6rd_enabled", &npd->tun6rd_enabled);
-	of_property_read_u32(np, "qcom,l2tpv2_enabled", &npd->l2tpv2_enabled);
-#if (NSS_MAP_T_SUPPORT == 1)
-	of_property_read_u32(np, "qcom,map_t_enabled", &npd->map_t_enabled);
-#endif
-	of_property_read_u32(np, "qcom,tunipip6_enabled", &npd->tunipip6_enabled);
-	of_property_read_u32(np, "qcom,pptp_enabled", &npd->pptp_enabled);
-	of_property_read_u32(np, "qcom,shaping_enabled", &npd->shaping_enabled);
-	of_property_read_u32(np, "qcom,wlan_dataplane_offload_enabled", &npd->wifioffload_enabled);
-	of_property_read_u32(np, "qcom,portid_enabled", &npd->portid_enabled);
-	of_property_read_u32(np, "qcom,dtls_enabled", &npd->dtls_enabled);
-	of_property_read_u32(np, "qcom,capwap_enabled", &npd->capwap_enabled);
-
-	return npd;
-
-out:
-	if (npd->nmap) {
-		iounmap((void *)npd->nmap);
-	}
-
-	if (npd->vmap) {
-		iounmap((void *)npd->vmap);
-	}
-
-	devm_kfree(&pdev->dev, npd);
-
-	return NULL;
-}
-#endif
-
-/*
- * nss_hal_dummy_netdev_setup()
- *	Dummy setup for net_device handler
- */
-static void nss_hal_dummy_netdev_setup(struct net_device *ndev)
-{
-
-}
-
-/*
- * nss_hal_handle_irq()
- *	HLOS interrupt handler for nss interrupts
- */
-static irqreturn_t nss_hal_handle_irq(int irq, void *ctx)
-{
-	struct int_ctx_instance *int_ctx = (struct int_ctx_instance *) ctx;
-	struct nss_ctx_instance *nss_ctx = int_ctx->nss_ctx;
-
-	/*
-	 * Mask interrupt until our bottom half re-enables it
-	 */
-	nss_hal_disable_interrupt(nss_ctx->nmap, int_ctx->irq,
-			int_ctx->shift_factor, NSS_HAL_SUPPORTED_INTERRUPTS);
-
-	/*
-	 * Schedule tasklet to process interrupt cause
-	 */
-	napi_schedule(&int_ctx->napi);
-	return IRQ_HANDLED;
-}
-
-/*
- * nss_hal_probe()
- *	HLOS device probe callback
- */
-int nss_hal_probe(struct platform_device *nss_dev)
-{
-	struct nss_top_instance *nss_top = &nss_top_main;
-	struct nss_ctx_instance *nss_ctx = NULL;
-	struct nss_platform_data *npd = NULL;
-	struct netdev_priv_instance *ndev_priv;
-#if (NSS_DT_SUPPORT == 1)
-	struct reset_control *rstctl = NULL;
 #if (NSS_FABRIC_SCALING_SUPPORT == 1)
 	struct fab_scaling_info fab_data;
 #endif
-#endif
-	int i, err = 0;
+	int i, err;
 
-	const struct firmware *nss_fw = NULL;
-	int rc = -ENODEV;
-	void __iomem *load_mem;
-
-#if (NSS_DT_SUPPORT == 1)
-	struct device_node *np = NULL;
-
-	if (nss_top_main.nss_hal_common_init_done == false) {
-		/*
-		 * Perform clock init common to all NSS cores
-		 */
-		struct clk *nss_tcm_src = NULL;
-		struct clk *nss_tcm_clk = NULL;
-
-		/*
-		 * Attach debug interface to TLMM
-		 */
-		nss_write_32((uint32_t)nss_top_main.nss_fpb_base, NSS_REGS_FPB_CSR_CFG_OFFSET, 0x360);
-
-		/*
-		 * NSS TCM CLOCK
-		 */
-		nss_tcm_src = clk_get(&nss_dev->dev, NSS_TCM_SRC_CLK);
-		if (IS_ERR(nss_tcm_src)) {
-			pr_err("nss-driver: cannot get clock: %s\n", NSS_TCM_SRC_CLK);
-			return -EFAULT;
-		}
-
-		clk_set_rate(nss_tcm_src, NSSTCM_FREQ);
-		clk_prepare(nss_tcm_src);
-		clk_enable(nss_tcm_src);
-
-		nss_tcm_clk = clk_get(&nss_dev->dev, NSS_TCM_CLK);
-		if (IS_ERR(nss_tcm_clk)) {
-			pr_err("nss-driver: cannot get clock: %s\n", NSS_TCM_CLK);
-			return -EFAULT;
-		}
-
-		clk_prepare(nss_tcm_clk);
-		clk_enable(nss_tcm_clk);
-
-		/*
-		 * DT - Fabric Clocks.
-		 */
-
-		nss_fab0_clk = clk_get(&nss_dev->dev, NSS_FABRIC0_CLK);
-		if (IS_ERR(nss_fab0_clk)) {
-			printk("nss-driver: cannot get clock: %s\n", NSS_FABRIC0_CLK);
-			nss_fab0_clk = NULL;
-		} else {
-			printk("nss-driver: fabric 0 handler\n");
-			clk_prepare(nss_fab0_clk);
-			clk_enable(nss_fab0_clk);
-		}
-
-		nss_fab1_clk = clk_get(&nss_dev->dev, NSS_FABRIC1_CLK);
-		if (IS_ERR(nss_fab1_clk)) {
-			printk("nss-driver: cannot get clock: %s\n", NSS_FABRIC1_CLK);
-			nss_fab1_clk = NULL;
-		} else {
-			printk("nss-driver: fabric 1 handler\n");
-			clk_prepare(nss_fab1_clk);
-			clk_enable(nss_fab1_clk);
-		}
-
-		nss_top_main.nss_hal_common_init_done = true;
-		nss_info("nss_hal_common_reset Done.\n");
-	}
-
-	if (!nss_dev->dev.of_node) {
-		/*
-		 * Device node not present
-		 */
-		pr_err("nss-driver: Device tree not available\n");
-		return -ENODEV;
+	nss_core0_clk = clk_get(&nss_dev->dev, NSS_CORE_CLK);
+	if (IS_ERR(nss_core0_clk)) {
+		err = PTR_ERR(nss_core0_clk);
+		nss_info_always("%p: Regulator %s get failed, err=%d\n", nss_ctx, dev_name(&nss_dev->dev), err);
+		return err;
 	}
 
 	/*
-	 * Device Tree based init
+	 * Check if turbo is supported
 	 */
-	np = of_node_get(nss_dev->dev.of_node);
-	npd = nss_hal_of_get_pdata(np, nss_dev);
+	if (npd->turbo_frequency) {
+		nss_info_always("nss_driver - Turbo Support %d\n", npd->turbo_frequency);
+#if (NSS_PM_SUPPORT == 1)
+		nss_pm_set_turbo();
+#endif
+	} else {
+		nss_info_always("nss_driver - Turbo No Support %d\n", npd->turbo_frequency);
+	}
 
-	of_node_put(np);
+	/*
+	 * If valid entries - from dtsi - then just init clks.
+	 * Otherwise query for clocks.
+	 */
+	if ((nss_runtime_samples.freq_scale[NSS_FREQ_LOW_SCALE].frequency != 0) &&
+		(nss_runtime_samples.freq_scale[NSS_FREQ_MID_SCALE].frequency != 0) &&
+		(nss_runtime_samples.freq_scale[NSS_FREQ_HIGH_SCALE].frequency != 0)) {
+		goto clk_complete;
+	}
 
-	if (!npd) {
+	/*
+	 * Load default scales, then query for higher.
+	 * If basic set cannot be set, then go to error, and abort
+	 * Two set of defaults, 110, 550, 733 or 110, 275 and 550
+	 */
+	if (clk_set_rate(nss_core0_clk, NSS_FREQ_110) != 0) {
+		return -EFAULT;
+	}
+	nss_runtime_samples.freq_scale[NSS_FREQ_LOW_SCALE].frequency = NSS_FREQ_110;
+
+	if (npd->turbo_frequency) {
+		/*
+		 * Figure out the middle scale
+		 */
+		if (clk_set_rate(nss_core0_clk, NSS_FREQ_600) == 0) {
+			nss_runtime_samples.freq_scale[NSS_FREQ_MID_SCALE].frequency = NSS_FREQ_600;
+		} else if (clk_set_rate(nss_core0_clk, NSS_FREQ_550) == 0) {
+			nss_runtime_samples.freq_scale[NSS_FREQ_MID_SCALE].frequency = NSS_FREQ_550;
+		} else {
+			return -EFAULT;
+		}
+
+		/*
+		 * Figure out the max scale
+		 */
+		if (clk_set_rate(nss_core0_clk, NSS_FREQ_800) == 0) {
+			nss_runtime_samples.freq_scale[NSS_FREQ_HIGH_SCALE].frequency = NSS_FREQ_800;
+		} else if (clk_set_rate(nss_core0_clk, NSS_FREQ_733) == 0) {
+			nss_runtime_samples.freq_scale[NSS_FREQ_HIGH_SCALE].frequency = NSS_FREQ_733;
+		} else {
+			return -EFAULT;
+		}
+
+	} else {
+		if (clk_set_rate(nss_core0_clk, NSS_FREQ_275) != 0) {
+			return -EFAULT;
+		}
+		nss_runtime_samples.freq_scale[NSS_FREQ_MID_SCALE].frequency = NSS_FREQ_275;
+
+		if (clk_set_rate(nss_core0_clk, NSS_FREQ_550) != 0) {
+			return -EFAULT;
+		}
+		nss_runtime_samples.freq_scale[NSS_FREQ_HIGH_SCALE].frequency = NSS_FREQ_550;
+	}
+
+clk_complete:
+#if (NSS_FABRIC_SCALING_SUPPORT == 1)
+	if (npd->turbo_frequency) {
+		fab_data.idle_freq = nss_runtime_samples.freq_scale[NSS_FREQ_MID_SCALE].frequency;
+	} else {
+		fab_data.idle_freq = nss_runtime_samples.freq_scale[NSS_FREQ_HIGH_SCALE].frequency;
+	}
+	fab_data.clk = nss_core0_clk;
+	fab_scaling_register(&fab_data);
+#endif
+
+	/*
+	 * Setup Ranges
+	 */
+	for (i = 0; i < NSS_FREQ_MAX_SCALE; i++) {
+		if (nss_runtime_samples.freq_scale[i].frequency == NSS_FREQ_110) {
+			nss_runtime_samples.freq_scale[i].minimum = NSS_FREQ_110_MIN;
+			nss_runtime_samples.freq_scale[i].maximum = NSS_FREQ_110_MAX;
+		}
+		if (nss_runtime_samples.freq_scale[i].frequency == NSS_FREQ_275) {
+			nss_runtime_samples.freq_scale[i].minimum = NSS_FREQ_275_MIN;
+			nss_runtime_samples.freq_scale[i].maximum = NSS_FREQ_275_MAX;
+		}
+		if (nss_runtime_samples.freq_scale[i].frequency == NSS_FREQ_550) {
+			nss_runtime_samples.freq_scale[i].minimum = NSS_FREQ_550_MIN;
+			nss_runtime_samples.freq_scale[i].maximum = NSS_FREQ_550_MAX;
+		}
+		if (nss_runtime_samples.freq_scale[i].frequency == NSS_FREQ_600) {
+			nss_runtime_samples.freq_scale[i].minimum = NSS_FREQ_600_MIN;
+			nss_runtime_samples.freq_scale[i].maximum = NSS_FREQ_600_MAX;
+		}
+		if (nss_runtime_samples.freq_scale[i].frequency == NSS_FREQ_733) {
+			nss_runtime_samples.freq_scale[i].minimum = NSS_FREQ_733_MIN;
+			nss_runtime_samples.freq_scale[i].maximum = NSS_FREQ_733_MAX;
+		}
+		if (nss_runtime_samples.freq_scale[i].frequency == NSS_FREQ_800) {
+			nss_runtime_samples.freq_scale[i].minimum = NSS_FREQ_800_MIN;
+			nss_runtime_samples.freq_scale[i].maximum = NSS_FREQ_800_MAX;
+		}
+	}
+
+	nss_info_always("Supported Frequencies - ");
+	for (i = 0; i < NSS_FREQ_MAX_SCALE; i++) {
+		if (nss_runtime_samples.freq_scale[i].frequency == NSS_FREQ_110) {
+			nss_info_always("110Mhz ");
+		} else if (nss_runtime_samples.freq_scale[i].frequency == NSS_FREQ_275) {
+			nss_info_always("275Mhz ");
+		} else if (nss_runtime_samples.freq_scale[i].frequency == NSS_FREQ_550) {
+			nss_info_always("550Mhz ");
+		} else if (nss_runtime_samples.freq_scale[i].frequency == NSS_FREQ_600) {
+			nss_info_always("600Mhz ");
+		} else if (nss_runtime_samples.freq_scale[i].frequency == NSS_FREQ_733) {
+			nss_info_always("733Mhz ");
+		} else if (nss_runtime_samples.freq_scale[i].frequency == NSS_FREQ_800) {
+			nss_info_always("800Mhz ");
+		} else {
+			nss_info_always("Error\nNo Table/Invalid Frequency Found - Loading Old Tables -");
+			return -EFAULT;
+		}
+	}
+	nss_info_always("\n");
+
+	/*
+	 * Set default frequency
+	 */
+	err = clk_set_rate(nss_core0_clk, nss_runtime_samples.freq_scale[NSS_FREQ_MID_SCALE].frequency);
+	if (err) {
+		nss_info_always("%p: cannot set nss core0 clock\n", nss_ctx);
 		return -EFAULT;
 	}
 
-	nss_ctx = &nss_top->nss[npd->id];
-	nss_ctx->id = npd->id;
-	nss_dev->id = nss_ctx->id;
-
-#else
-	npd = (struct nss_platform_data *) nss_dev->dev.platform_data;
-	nss_ctx = &nss_top->nss[nss_dev->id];
-	nss_ctx->id = nss_dev->id;
-#endif
-	nss_ctx->nss_top = nss_top;
-
-	nss_info("%p: NSS_DEV_ID %s \n", nss_ctx, dev_name(&nss_dev->dev));
-
-	/*
-	 * F/W load from NSS Driver
-	 */
-	if (nss_ctx->id == 0) {
-		rc = request_firmware(&nss_fw, NETAP0_IMAGE, &(nss_dev->dev));
-	} else if (nss_ctx->id == 1) {
-		rc = request_firmware(&nss_fw, NETAP1_IMAGE, &(nss_dev->dev));
-	} else {
-		nss_warning("%p: Invalid nss dev: %d \n", nss_ctx, nss_ctx->id);
-	}
-
-	/*
-	 *  Check if the file read is successful
-	 */
-	if (rc) {
-		nss_info_always("%p: request_firmware failed with err code: %d", nss_ctx, rc);
-		err = rc;
-		goto err_init_0;
-	}
-
-	if (nss_fw->size < MIN_IMG_SIZE) {
-		nss_info_always("%p: nss firmware is truncated, size:%d", nss_ctx, nss_fw->size);
-		goto err_init_0;
-	}
-
-	load_mem = ioremap_nocache(npd->load_addr, nss_fw->size);
-	if (load_mem == NULL) {
-		nss_info_always("%p: ioremap_nocache failed: %x", nss_ctx, npd->load_addr);
-		release_firmware(nss_fw);
-		goto err_init_0;
-	}
-
-	printk("nss_driver - fw of size %u  bytes copied to load addr: %x, nss_id : %d\n", nss_fw->size, npd->load_addr, nss_dev->id);
-	memcpy_toio(load_mem, nss_fw->data, nss_fw->size);
-	release_firmware(nss_fw);
-	iounmap(load_mem);
-
-	/*
-	 * Both NSS cores controlled by same regulator, Hook only Once
-	 */
-	if (!nss_ctx->id) {
-		nss_core0_clk = clk_get(&nss_dev->dev, "nss_core_clk");
-		if (IS_ERR(nss_core0_clk)) {
-			err = PTR_ERR(nss_core0_clk);
-			nss_info("%p: Regulator %s get failed, err=%d\n", nss_ctx, dev_name(&nss_dev->dev), err);
-			return err;
-		}
-
-		/*
-		 * Check if turbo is supported
-		 */
-		if (npd->turbo_frequency) {
-			/*
-			 * Turbo is supported
-			 */
-			printk("nss_driver - Turbo Support %d\n", npd->turbo_frequency);
-#if (NSS_PM_SUPPORT == 1)
-			nss_pm_set_turbo();
-#endif
-		} else {
-			printk("nss_driver - Turbo No Support %d\n", npd->turbo_frequency);
-		}
-
-		/*
-		 * If valid entries - from dtsi - then just init clks.
-		 * Otherwise query for clocks.
-		 */
-		if ((nss_runtime_samples.freq_scale[NSS_FREQ_LOW_SCALE].frequency != 0) &&
-			(nss_runtime_samples.freq_scale[NSS_FREQ_MID_SCALE].frequency != 0) &&
-			(nss_runtime_samples.freq_scale[NSS_FREQ_HIGH_SCALE].frequency != 0)) {
-			goto clk_complete;
-		}
-
-		/*
-		 * Load default scales, then query for higher.
-		 * If basic set cannot be set, then go to error, and abort
-		 * Two set of defaults, 110, 550, 733 or 110, 275 and 550
-		 */
-		if (clk_set_rate(nss_core0_clk, NSS_FREQ_110) != 0) {
-			goto err_init_0;
-		}
-		nss_runtime_samples.freq_scale[NSS_FREQ_LOW_SCALE].frequency = NSS_FREQ_110;
-
-		if (npd->turbo_frequency) {
-			/*
-			 * Figure out the middle scale
-			 */
-			if (clk_set_rate(nss_core0_clk, NSS_FREQ_600) == 0) {
-				nss_runtime_samples.freq_scale[NSS_FREQ_MID_SCALE].frequency = NSS_FREQ_600;
-			} else if (clk_set_rate(nss_core0_clk, NSS_FREQ_550) == 0) {
-				nss_runtime_samples.freq_scale[NSS_FREQ_MID_SCALE].frequency = NSS_FREQ_550;
-			} else {
-				goto err_init_0;
-			}
-
-			/*
-			 * Figure out the max scale
-			 */
-			if (clk_set_rate(nss_core0_clk, NSS_FREQ_800) == 0) {
-				nss_runtime_samples.freq_scale[NSS_FREQ_HIGH_SCALE].frequency = NSS_FREQ_800;
-			} else if (clk_set_rate(nss_core0_clk, NSS_FREQ_733) == 0) {
-				nss_runtime_samples.freq_scale[NSS_FREQ_HIGH_SCALE].frequency = NSS_FREQ_733;
-			} else {
-				goto err_init_0;
-			}
-
-		} else {
-			if (clk_set_rate(nss_core0_clk, NSS_FREQ_275) != 0) {
-				goto err_init_0;
-			}
-			nss_runtime_samples.freq_scale[NSS_FREQ_MID_SCALE].frequency = NSS_FREQ_275;
-
-			if (clk_set_rate(nss_core0_clk, NSS_FREQ_550) != 0) {
-				goto err_init_0;
-			}
-			nss_runtime_samples.freq_scale[NSS_FREQ_HIGH_SCALE].frequency = NSS_FREQ_550;
-		}
-
-clk_complete:
-#if (NSS_DT_SUPPORT == 1)
-#if (NSS_FABRIC_SCALING_SUPPORT == 1)
-		if (npd->turbo_frequency) {
-			fab_data.idle_freq = nss_runtime_samples.freq_scale[NSS_FREQ_MID_SCALE].frequency;
-		} else {
-			fab_data.idle_freq = nss_runtime_samples.freq_scale[NSS_FREQ_HIGH_SCALE].frequency;
-		}
-		fab_data.clk = nss_core0_clk;
-		fab_scaling_register(&fab_data);
-#endif
-#endif
-
-		/*
-		 * Setup Ranges
-		 */
-		for (i = 0; i < NSS_FREQ_MAX_SCALE; i++) {
-			if (nss_runtime_samples.freq_scale[i].frequency == NSS_FREQ_110) {
-				nss_runtime_samples.freq_scale[i].minimum = NSS_FREQ_110_MIN;
-				nss_runtime_samples.freq_scale[i].maximum = NSS_FREQ_110_MAX;
-			}
-			if (nss_runtime_samples.freq_scale[i].frequency == NSS_FREQ_275) {
-				nss_runtime_samples.freq_scale[i].minimum = NSS_FREQ_275_MIN;
-				nss_runtime_samples.freq_scale[i].maximum = NSS_FREQ_275_MAX;
-			}
-			if (nss_runtime_samples.freq_scale[i].frequency == NSS_FREQ_550) {
-				nss_runtime_samples.freq_scale[i].minimum = NSS_FREQ_550_MIN;
-				nss_runtime_samples.freq_scale[i].maximum = NSS_FREQ_550_MAX;
-			}
-			if (nss_runtime_samples.freq_scale[i].frequency == NSS_FREQ_600) {
-				nss_runtime_samples.freq_scale[i].minimum = NSS_FREQ_600_MIN;
-				nss_runtime_samples.freq_scale[i].maximum = NSS_FREQ_600_MAX;
-			}
-			if (nss_runtime_samples.freq_scale[i].frequency == NSS_FREQ_733) {
-				nss_runtime_samples.freq_scale[i].minimum = NSS_FREQ_733_MIN;
-				nss_runtime_samples.freq_scale[i].maximum = NSS_FREQ_733_MAX;
-			}
-			if (nss_runtime_samples.freq_scale[i].frequency == NSS_FREQ_800) {
-				nss_runtime_samples.freq_scale[i].minimum = NSS_FREQ_800_MIN;
-				nss_runtime_samples.freq_scale[i].maximum = NSS_FREQ_800_MAX;
-			}
-		}
-
-		printk("Supported Frequencies - ");
-		for (i = 0; i < NSS_FREQ_MAX_SCALE; i++) {
-			if (nss_runtime_samples.freq_scale[i].frequency == NSS_FREQ_110) {
-				printk("110Mhz ");
-			} else if (nss_runtime_samples.freq_scale[i].frequency == NSS_FREQ_275) {
-				printk("275Mhz ");
-			} else if (nss_runtime_samples.freq_scale[i].frequency == NSS_FREQ_550) {
-				printk("550Mhz ");
-			} else if (nss_runtime_samples.freq_scale[i].frequency == NSS_FREQ_600) {
-				printk("600Mhz ");
-			} else if (nss_runtime_samples.freq_scale[i].frequency == NSS_FREQ_733) {
-				printk("733Mhz ");
-			} else if (nss_runtime_samples.freq_scale[i].frequency == NSS_FREQ_800) {
-				printk("800Mhz ");
-			} else {
-				printk("Error \nNo Table/Invalid Frequency Found - Loading Old Tables - ");
-				goto err_init_0;
-			}
-		}
-		printk("\n");
-
-		/*
-		 * Set default frequency
-		 */
-		clk_set_rate(nss_core0_clk, nss_runtime_samples.freq_scale[NSS_FREQ_MID_SCALE].frequency);
-		clk_prepare(nss_core0_clk);
-		clk_enable(nss_core0_clk);
-	}
-
-	/*
-	 * Get load address of NSS firmware
-	 */
-	nss_info("%p: Setting NSS%d Firmware load address to %x\n", nss_ctx, nss_ctx->id, npd->load_addr);
-	nss_top->nss[nss_ctx->id].load = npd->load_addr;
-
-	/*
-	 * Get virtual and physical memory addresses for nss logical/hardware address maps
-	 */
-
-	/*
-	 * Virtual address of CSM space
-	 */
-	nss_ctx->nmap = npd->nmap;
-	nss_assert(nss_ctx->nmap);
-
-	/*
-	 * Physical address of CSM space
-	 */
-	nss_ctx->nphys = npd->nphys;
-	nss_assert(nss_ctx->nphys);
-
-	/*
-	 * Virtual address of logical registers space
-	 */
-	nss_ctx->vmap = npd->vmap;
-	nss_assert(nss_ctx->vmap);
-
-	/*
-	 * Physical address of logical registers space
-	 */
-	nss_ctx->vphys = npd->vphys;
-	nss_assert(nss_ctx->vphys);
-	nss_info("%d:ctx=%p, vphys=%x, vmap=%x, nphys=%x, nmap=%x",
-			nss_ctx->id, nss_ctx, nss_ctx->vphys, nss_ctx->vmap, nss_ctx->nphys, nss_ctx->nmap);
-
-	/*
-	 * Register netdevice handlers
-	 */
-#if (LINUX_VERSION_CODE <= KERNEL_VERSION(3, 16, 0))
-	nss_ctx->int_ctx[0].ndev = alloc_netdev(sizeof(struct netdev_priv_instance),
-					"qca-nss-dev%d", nss_hal_dummy_netdev_setup);
-#else
-	nss_ctx->int_ctx[0].ndev = alloc_netdev(sizeof(struct netdev_priv_instance),
-					"qca-nss-dev%d", NET_NAME_ENUM, nss_hal_dummy_netdev_setup);
-#endif
-	if (nss_ctx->int_ctx[0].ndev == NULL) {
-		nss_warning("%p: Could not allocate net_device #0", nss_ctx);
-		err = -ENOMEM;
-		goto err_init_0;
-	}
-
-	nss_ctx->int_ctx[0].ndev->netdev_ops = &nss_netdev_ops;
-	nss_ctx->int_ctx[0].ndev->ethtool_ops = &nss_ethtool_ops;
-	err = register_netdev(nss_ctx->int_ctx[0].ndev);
+	err = clk_prepare_enable(nss_core0_clk);
 	if (err) {
-		nss_warning("%p: Could not register net_device #0", nss_ctx);
-		goto err_init_1;
+		nss_info_always("%p: cannot enable nss core0 clock\n", nss_ctx);
+		return -EFAULT;
 	}
 
-	/*
-	 * request for IRQs
-	 *
-	 * WARNING: CPU affinities should be set using OS supported methods
-	 */
-	nss_ctx->int_ctx[0].nss_ctx = nss_ctx;
-	nss_ctx->int_ctx[0].shift_factor = 0;
-	nss_ctx->int_ctx[0].irq = npd->irq[0];
-	err = request_irq(npd->irq[0], nss_hal_handle_irq, 0, "nss", &nss_ctx->int_ctx[0]);
-	if (err) {
-		nss_warning("%d: IRQ0 request failed", nss_dev->id);
-		goto err_init_2;
-	}
-
-	/*
-	 * Register NAPI for NSS core interrupt #0
-	 */
-	ndev_priv = netdev_priv(nss_ctx->int_ctx[0].ndev);
-	ndev_priv->int_ctx = &nss_ctx->int_ctx[0];
-	netif_napi_add(nss_ctx->int_ctx[0].ndev, &nss_ctx->int_ctx[0].napi, nss_core_handle_napi, 64);
-	napi_enable(&nss_ctx->int_ctx[0].napi);
-	nss_ctx->int_ctx[0].napi_active = true;
-
-	/*
-	 * Check if second interrupt is supported on this nss core
-	 */
-	if (npd->num_irq > 1) {
-		nss_info("%d: This NSS core supports two interrupts", nss_dev->id);
-
-		/*
-		 * Register netdevice handlers
-		 */
-#if (LINUX_VERSION_CODE <= KERNEL_VERSION(3, 16, 0))
-		nss_ctx->int_ctx[1].ndev = alloc_netdev(sizeof(struct netdev_priv_instance),
-						"qca-nss-dev%d", nss_hal_dummy_netdev_setup);
-#else
-		nss_ctx->int_ctx[1].ndev = alloc_netdev(sizeof(struct netdev_priv_instance),
-						"qca-nss-dev%d", NET_NAME_ENUM, nss_hal_dummy_netdev_setup);
-#endif
-		if (nss_ctx->int_ctx[1].ndev == NULL) {
-			nss_warning("%p: Could not allocate net_device #1", nss_ctx);
-			err = -ENOMEM;
-			goto err_init_3;
-		}
-
-		nss_ctx->int_ctx[1].ndev->netdev_ops = &nss_netdev_ops;
-		nss_ctx->int_ctx[1].ndev->ethtool_ops = &nss_ethtool_ops;
-		err = register_netdev(nss_ctx->int_ctx[1].ndev);
-		if (err) {
-			nss_warning("%p: Could not register net_device #1", nss_ctx);
-			goto err_init_4;
-		}
-
-		nss_ctx->int_ctx[1].nss_ctx = nss_ctx;
-		nss_ctx->int_ctx[1].shift_factor = 15;
-		nss_ctx->int_ctx[1].irq = npd->irq[1];
-		err = request_irq(npd->irq[1], nss_hal_handle_irq, 0, "nss", &nss_ctx->int_ctx[1]);
-		if (err) {
-			nss_warning("%d: IRQ1 request failed for nss", nss_dev->id);
-			goto err_init_5;
-		}
-
-		/*
-		 * Register NAPI for NSS core interrupt #1
-		 */
-		ndev_priv = netdev_priv(nss_ctx->int_ctx[1].ndev);
-		ndev_priv->int_ctx = &nss_ctx->int_ctx[1];
-		netif_napi_add(nss_ctx->int_ctx[1].ndev, &nss_ctx->int_ctx[1].napi, nss_core_handle_napi, 64);
-		napi_enable(&nss_ctx->int_ctx[1].napi);
-		nss_ctx->int_ctx[1].napi_active = true;
-	}
-
-	spin_lock_bh(&(nss_top->lock));
-
-	/*
-	 * Check functionalities are supported by this NSS core
-	 */
-	if (npd->shaping_enabled == NSS_FEATURE_ENABLED) {
-		nss_top->shaping_handler_id = nss_dev->id;
-		nss_info("%d: NSS shaping is enabled", nss_dev->id);
-	}
-
-	if (npd->ipv4_enabled == NSS_FEATURE_ENABLED) {
-		nss_top->ipv4_handler_id = nss_dev->id;
-		nss_ipv4_register_handler();
-		nss_pppoe_register_handler();
-		nss_eth_rx_register_handler();
-		nss_n2h_register_handler();
-		nss_lag_register_handler();
-		nss_dynamic_interface_register_handler();
-
-		for (i = 0; i < NSS_MAX_VIRTUAL_INTERFACES; i++) {
-			nss_top->virt_if_handler_id[i] = nss_dev->id;
-		}
-
-		nss_top->dynamic_interface_table[NSS_DYNAMIC_INTERFACE_TYPE_802_3_REDIR] = nss_dev->id;
-	}
-
-	if (npd->capwap_enabled == NSS_FEATURE_ENABLED) {
-		nss_top->capwap_handler_id = nss_dev->id;
-		nss_top->dynamic_interface_table[NSS_DYNAMIC_INTERFACE_TYPE_CAPWAP] = nss_dev->id;
-	}
-
-	if (npd->ipv4_reasm_enabled == NSS_FEATURE_ENABLED) {
-		nss_top->ipv4_reasm_handler_id = nss_dev->id;
-		nss_ipv4_reasm_register_handler();
-	}
-
-	if (npd->ipv6_enabled == NSS_FEATURE_ENABLED) {
-		nss_top->ipv6_handler_id = nss_dev->id;
-		nss_ipv6_register_handler();
-	}
-
-	if (npd->ipv6_reasm_enabled == NSS_FEATURE_ENABLED) {
-		nss_top->ipv6_reasm_handler_id = nss_dev->id;
-		nss_ipv6_reasm_register_handler();
-	}
-
-	if (npd->crypto_enabled == NSS_FEATURE_ENABLED) {
-		nss_top->crypto_enabled = 1;
-		nss_top->crypto_handler_id = nss_dev->id;
-		nss_crypto_register_handler();
-	}
-
-	if (npd->ipsec_enabled == NSS_FEATURE_ENABLED) {
-		nss_top->ipsec_handler_id = nss_dev->id;
-		nss_ipsec_register_handler();
-	}
-
-	if (npd->wlanredirect_enabled == NSS_FEATURE_ENABLED) {
-		nss_top->wlan_handler_id = nss_dev->id;
-	}
-
-	if (npd->tun6rd_enabled == NSS_FEATURE_ENABLED) {
-		nss_top->tun6rd_handler_id = nss_dev->id;
-	}
-
-	if (npd->pptp_enabled == NSS_FEATURE_ENABLED) {
-		nss_top->pptp_handler_id = nss_dev->id;
-		nss_pptp_register_handler();
-	}
-
-	if (npd->l2tpv2_enabled == NSS_FEATURE_ENABLED) {
-		nss_top->l2tpv2_handler_id = nss_dev->id;
-		nss_l2tpv2_register_handler();
-	}
-
-	if (npd->dtls_enabled == NSS_FEATURE_ENABLED) {
-		nss_top->dtls_handler_id = nss_dev->id;
-		nss_top->dynamic_interface_table[NSS_DYNAMIC_INTERFACE_TYPE_DTLS] = nss_dev->id;
-		nss_dtls_register_handler();
-	}
-
-#if (NSS_MAP_T_SUPPORT == 1)
-	if (npd->map_t_enabled == NSS_FEATURE_ENABLED) {
-		nss_top->map_t_handler_id = nss_dev->id;
-		nss_map_t_register_handler();
-	}
-#endif
-
-	if (npd->tunipip6_enabled == NSS_FEATURE_ENABLED) {
-		nss_top->tunipip6_handler_id = nss_dev->id;
-		nss_tunipip6_register_handler();
-	}
-
-	if (npd->gre_redir_enabled == NSS_FEATURE_ENABLED) {
-		nss_top->gre_redir_handler_id = nss_dev->id;
-		nss_top->dynamic_interface_table[NSS_DYNAMIC_INTERFACE_TYPE_GRE_REDIR] =  nss_dev->id;
-		nss_gre_redir_register_handler();
-		nss_sjack_register_handler();
-	}
-
-	if (npd->portid_enabled == NSS_FEATURE_ENABLED) {
-		nss_top->portid_handler_id = nss_dev->id;
-		nss_top->dynamic_interface_table[NSS_DYNAMIC_INTERFACE_TYPE_PORTID] = nss_dev->id;
-		nss_portid_register_handler();
-	}
-
-        if (npd->wifioffload_enabled == NSS_FEATURE_ENABLED) {
-                nss_top->wifi_handler_id = nss_dev->id;
-                nss_top->dynamic_interface_table[NSS_DYNAMIC_INTERFACE_TYPE_RADIO_0] =  nss_dev->id;
-                nss_top->dynamic_interface_table[NSS_DYNAMIC_INTERFACE_TYPE_RADIO_1] =  nss_dev->id;
-                nss_top->dynamic_interface_table[NSS_DYNAMIC_INTERFACE_TYPE_RADIO_2] =  nss_dev->id;
-                nss_wifi_register_handler();
-        }
-
-	/*
-	 * Mark data plane enabled so when nss core init done we call register to nss-gmac
-	 */
-	for (i = 0 ; i < NSS_MAX_PHYSICAL_INTERFACES ; i++) {
-		if (npd->gmac_enabled[i] == NSS_FEATURE_ENABLED) {
-			nss_data_plane_set_enabled(i);
-		}
-	}
-
-#if (NSS_FREQ_SCALE_SUPPORT == 1)
-	nss_freq_register_handler();
-#endif
-	nss_lso_rx_register_handler();
-
-	nss_top->frequency_handler_id = nss_dev->id;
-
-	spin_unlock_bh(&(nss_top->lock));
-
-	/*
-	 * Initialize decongestion callbacks to NULL
-	 */
-	for (i = 0; i < NSS_MAX_CLIENTS; i++) {
-		nss_ctx->queue_decongestion_callback[i] = 0;
-		nss_ctx->queue_decongestion_ctx[i] = 0;
-	}
-
-	spin_lock_init(&(nss_ctx->decongest_cb_lock));
-	nss_ctx->magic = NSS_CTX_MAGIC;
-
-	nss_info("%p: Reseting NSS core %d now", nss_ctx, nss_ctx->id);
-
-	/*
-	 * Enable clocks and bring NSS core out of reset
-	 */
-#if (NSS_DT_SUPPORT == 1)
-	/*
-	 * Remove UBI32 reset clamp
-	 */
-	rstctl = devm_reset_control_get(&nss_dev->dev, "clkrst_clamp");
-	if (IS_ERR(rstctl)) {
-		nss_info("%p: Deassert UBI32 core%d reset clamp failed", nss_ctx, nss_ctx->id);
-		err = -EFAULT;
-		goto err_init_5;
-	}
-	reset_control_deassert(rstctl);
-
-	/*
-	 * Remove UBI32 core clamp
-	 */
-	rstctl = devm_reset_control_get(&nss_dev->dev, "clamp");
-	if (IS_ERR(rstctl)) {
-		nss_info("%p: Deassert UBI32 core%d clamp failed", nss_ctx, nss_ctx->id);
-		err = -EFAULT;
-		goto err_init_5;
-	}
-	reset_control_deassert(rstctl);
-
-	/*
-	 * Remove UBI32 AHB reset
-	 */
-	rstctl = devm_reset_control_get(&nss_dev->dev, "ahb");
-	if (IS_ERR(rstctl)) {
-		nss_info("%p: Deassert AHB core%d reset failed", nss_ctx, nss_ctx->id);
-		err = -EFAULT;
-		goto err_init_5;
-	}
-	reset_control_deassert(rstctl);
-
-	/*
-	 * Remove UBI32 AXI reset
-	 */
-	rstctl = devm_reset_control_get(&nss_dev->dev, "axi");
-	if (IS_ERR(rstctl)) {
-		nss_info("%p: Deassert core%d AXI reset failed", nss_ctx, nss_ctx->id);
-		err = -EFAULT;
-		goto err_init_5;
-	}
-	reset_control_deassert(rstctl);
-
-	nss_hal_core_reset(nss_ctx->nmap, nss_ctx->load);
-#else
-	nss_hal_core_reset(nss_dev->id, nss_ctx->nmap, nss_ctx->load, nss_top->clk_src);
-#endif
-	/*
-	 * Initialize max buffer size for NSS core
-	 */
-	nss_ctx->max_buf_size = NSS_NBUF_PAYLOAD_SIZE;
-
-	/*
-	 * Initialize S/G status pointers to NULL
-	 */
-	for (i = 0; i < NSS_N2H_DESC_RING_NUM; i++) {
-		nss_ctx->n2h_desc_ring[i].head = NULL;
-		nss_ctx->n2h_desc_ring[i].tail = NULL;
-		nss_ctx->n2h_desc_ring[i].jumbo_start = NULL;
-	}
-
-        /*
-	 * Increment number of cores
-	 */
-	nss_top->num_nss++;
-
-	/*
-	 * Enable interrupts for NSS core
-	 */
-	nss_hal_enable_interrupt(nss_ctx->nmap, nss_ctx->int_ctx[0].irq,
-					nss_ctx->int_ctx[0].shift_factor, NSS_HAL_SUPPORTED_INTERRUPTS);
-
-	if (npd->num_irq > 1) {
-		nss_hal_enable_interrupt(nss_ctx->nmap, nss_ctx->int_ctx[1].irq,
-					nss_ctx->int_ctx[1].shift_factor, NSS_HAL_SUPPORTED_INTERRUPTS);
-	}
-
-	nss_info("%p: All resources initialized and nss core%d has been brought out of reset", nss_ctx, nss_dev->id);
-	goto err_init_0;
-
-err_init_5:
-	unregister_netdev(nss_ctx->int_ctx[1].ndev);
-err_init_4:
-	free_netdev(nss_ctx->int_ctx[1].ndev);
-err_init_3:
-	free_irq(npd->irq[0], &nss_ctx->int_ctx[0]);
-err_init_2:
-	unregister_netdev(nss_ctx->int_ctx[0].ndev);
-err_init_1:
-	free_netdev(nss_ctx->int_ctx[0].ndev);
-
-#if (NSS_DT_SUPPORT == 1)
-	if (nss_dev->dev.of_node) {
-		if (npd->nmap) {
-			iounmap((void *)npd->nmap);
-		}
-
-		if (npd->vmap) {
-			iounmap((void *)npd->vmap);
-		}
-	}
-#endif
-
-err_init_0:
-
-#if (NSS_DT_SUPPORT == 1)
-	if (nss_dev->dev.of_node) {
-		devm_kfree(&nss_dev->dev, npd);
-	}
-#endif
-	return err;
-}
-
-/*
- * nss_hal_remove()
- *	HLOS device remove callback
- */
-int nss_hal_remove(struct platform_device *nss_dev)
-{
-	struct nss_top_instance *nss_top = &nss_top_main;
-	struct nss_ctx_instance *nss_ctx = &nss_top->nss[nss_dev->id];
-	int i;
-
-	/*
-	 * Clean-up debugfs
-	 */
-	nss_stats_clean();
-
-	/*
-	 * Disable interrupts and bottom halves in HLOS
-	 * Disable interrupts from NSS to HLOS
-	 */
-	nss_hal_disable_interrupt(nss_ctx->nmap, nss_ctx->int_ctx[0].irq,
-					nss_ctx->int_ctx[0].shift_factor, NSS_HAL_SUPPORTED_INTERRUPTS);
-
-	free_irq(nss_ctx->int_ctx[0].irq, &nss_ctx->int_ctx[0]);
-	unregister_netdev(nss_ctx->int_ctx[0].ndev);
-	free_netdev(nss_ctx->int_ctx[0].ndev);
-
-	/*
-	 * Check if second interrupt is supported
-	 * If so then clear resources for second interrupt as well
-	 */
-	if (nss_ctx->int_ctx[1].irq) {
-		nss_hal_disable_interrupt(nss_ctx->nmap, nss_ctx->int_ctx[1].irq,
-					nss_ctx->int_ctx[1].shift_factor, NSS_HAL_SUPPORTED_INTERRUPTS);
-		free_irq(nss_ctx->int_ctx[1].irq, &nss_ctx->int_ctx[1]);
-		unregister_netdev(nss_ctx->int_ctx[1].ndev);
-		free_netdev(nss_ctx->int_ctx[1].ndev);
-	}
-
-	/*
-	 * nss-drv is exiting, remove from nss-gmac
-	 */
-	for (i = 0 ; i < NSS_MAX_PHYSICAL_INTERFACES ; i++) {
-		if (nss_top->subsys_dp_register[i].ndev) {
-			nss_data_plane_unregister_from_nss_gmac(i);
-			nss_top->subsys_dp_register[i].ndev = NULL;
-		}
-	}
-#if (NSS_DT_SUPPORT == 1)
-#if (NSS_FABRIC_SCALING_SUPPORT == 1)
-	fab_scaling_unregister(nss_core0_clk);
-#endif
-	if (nss_dev->dev.of_node) {
-		if (nss_ctx->nmap) {
-			iounmap((void *)nss_ctx->nmap);
-			nss_ctx->nmap = 0;
-		}
-
-		if (nss_ctx->vmap) {
-			iounmap((void *)nss_ctx->vmap);
-			nss_ctx->vmap = 0;
-		}
-	}
-#endif
-
-	nss_info("%p: All resources freed for nss core%d", nss_ctx, nss_dev->id);
 	return 0;
 }
 
+/*
+ * __nss_hal_read_interrupt_cause()
+ */
+static void __nss_hal_read_interrupt_cause(struct nss_ctx_instance *nss_ctx, uint32_t shift_factor, uint32_t *cause)
+{
+	uint32_t value = nss_read_32(nss_ctx->nmap, NSS_REGS_N2H_INTR_STATUS_OFFSET);
+	*cause = (((value) >> shift_factor) & 0x7FFF);
+}
+
+/*
+ * __nss_hal_clear_interrupt_cause()
+ */
+static void __nss_hal_clear_interrupt_cause(struct nss_ctx_instance *nss_ctx, uint32_t shift_factor, uint32_t cause)
+{
+	nss_write_32(nss_ctx->nmap, NSS_REGS_N2H_INTR_CLR_OFFSET, (cause << shift_factor));
+}
+
+/*
+ * __nss_hal_disable_interrupt()
+ */
+static void __nss_hal_disable_interrupt(struct nss_ctx_instance *nss_ctx, uint32_t shift_factor, uint32_t cause)
+{
+	nss_write_32(nss_ctx->nmap, NSS_REGS_N2H_INTR_MASK_CLR_OFFSET, (cause << shift_factor));
+}
+
+/*
+ * __nss_hal_enable_interrupt()
+ */
+static void __nss_hal_enable_interrupt(struct nss_ctx_instance *nss_ctx, uint32_t shift_factor, uint32_t cause)
+{
+	nss_write_32(nss_ctx->nmap, NSS_REGS_N2H_INTR_MASK_SET_OFFSET, (cause << shift_factor));
+}
+
+/*
+ * __nss_hal_send_interrupt()
+ */
+static void __nss_hal_send_interrupt(struct nss_ctx_instance *nss_ctx, uint32_t type)
+{
+	nss_write_32(nss_ctx->nmap, NSS_REGS_C2C_INTR_SET_OFFSET, intr_cause[type]);
+}
+
+/*
+ * __nss_hal_request_irq_for_queue()
+ */
+static int __nss_hal_request_irq_for_queue(struct nss_ctx_instance *nss_ctx, struct nss_platform_data *npd, int qnum)
+{
+	struct int_ctx_instance *int_ctx = &nss_ctx->int_ctx[qnum];
+	int err;
+
+	if (qnum == 1) {
+		int_ctx->shift_factor = 15;
+		err = request_irq(npd->irq[qnum], nss_hal_handle_irq, 0, "nss_queue1", int_ctx);
+	} else {
+		int_ctx->shift_factor = 0;
+		err = request_irq(npd->irq[qnum], nss_hal_handle_irq, 0, "nss", int_ctx);
+	}
+	if (err) {
+		nss_info_always("%p: IRQ%d request failed", nss_ctx, npd->irq[qnum]);
+		return err;
+	}
+
+	int_ctx->irq[0] = npd->irq[qnum];
+	return 0;
+}
+
+/*
+ * nss_hal_ipq806x_ops
+ */
+struct nss_hal_ops nss_hal_ipq806x_ops = {
+	.common_reset = __nss_hal_common_reset,
+	.core_reset = __nss_hal_core_reset,
+	.clock_configure = __nss_hal_clock_configure,
+	.firmware_load = nss_hal_firmware_load,
+	.debug_enable = __nss_hal_debug_enable,
+#if (NSS_DT_SUPPORT == 1)
+	.of_get_pdata = __nss_hal_of_get_pdata,
+#endif
+	.request_irq_for_queue = __nss_hal_request_irq_for_queue,
+	.send_interrupt = __nss_hal_send_interrupt,
+	.enable_interrupt = __nss_hal_enable_interrupt,
+	.disable_interrupt = __nss_hal_disable_interrupt,
+	.clear_interrupt_cause = __nss_hal_clear_interrupt_cause,
+	.read_interrupt_cause = __nss_hal_read_interrupt_cause,
+};
diff --git a/nss_hal/ipq806x/nss_hal_pvt.h b/nss_hal/ipq806x/nss_hal_pvt.h
deleted file mode 100755
index b27b035..0000000
--- a/nss_hal/ipq806x/nss_hal_pvt.h
+++ /dev/null
@@ -1,91 +0,0 @@
-/*
- **************************************************************************
- * Copyright (c) 2013, The Linux Foundation. All rights reserved.
- * Permission to use, copy, modify, and/or distribute this software for
- * any purpose with or without fee is hereby granted, provided that the
- * above copyright notice and this permission notice appear in all copies.
- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
- * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
- * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT
- * OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
- **************************************************************************
- */
-
-/**
- * nss_hal_pvt.h
- *	NSS HAL private declarations.for IPQ806x platform
- */
-
-#ifndef __NSS_HAL_PVT_H
-#define __NSS_HAL_PVT_H
-
-#include "nss_regs.h"
-#include "nss_clocks.h"
-#include <linux/types.h>
-#include <linux/platform_device.h>
-
-#define NSS_HAL_SUPPORTED_INTERRUPTS (NSS_REGS_N2H_INTR_STATUS_EMPTY_BUFFER_QUEUE | \
-					NSS_REGS_N2H_INTR_STATUS_DATA_COMMAND_QUEUE | \
-					NSS_REGS_N2H_INTR_STATUS_DATA_QUEUE_1 | \
-					NSS_REGS_N2H_INTR_STATUS_EMPTY_BUFFERS_SOS | \
-					NSS_REGS_N2H_INTR_STATUS_TX_UNBLOCKED | \
-					NSS_REGS_N2H_INTR_STATUS_COREDUMP_COMPLETE_0 | \
-					NSS_REGS_N2H_INTR_STATUS_COREDUMP_COMPLETE_1)
-
-
-/*
- * __nss_hal_read_interrupt_cause()
- */
-static inline void __nss_hal_read_interrupt_cause(uint32_t map, uint32_t irq __attribute__ ((unused)), uint32_t shift_factor, uint32_t *cause)
-{
-	uint32_t value = nss_read_32(map, NSS_REGS_N2H_INTR_STATUS_OFFSET);
-	*cause = (((value)>> shift_factor) & 0x7FFF);
-}
-
-/*
- * __nss_hal_clear_interrupt_cause()
- */
-static inline void __nss_hal_clear_interrupt_cause(uint32_t map, uint32_t irq __attribute__ ((unused)), uint32_t shift_factor, uint32_t cause)
-{
-	nss_write_32(map, NSS_REGS_N2H_INTR_CLR_OFFSET, (cause << shift_factor));
-}
-
-/*
- * __nss_hal_disable_interrupt()
- */
-static inline void __nss_hal_disable_interrupt(uint32_t map, uint32_t irq __attribute__ ((unused)), uint32_t shift_factor, uint32_t cause)
-{
-	nss_write_32(map, NSS_REGS_N2H_INTR_MASK_CLR_OFFSET, (cause << shift_factor));
-}
-
-/*
- * __nss_hal_enable_interrupt()
- */
-static inline void __nss_hal_enable_interrupt(uint32_t map, uint32_t irq __attribute__ ((unused)), uint32_t shift_factor, uint32_t cause)
-{
-	nss_write_32(map, NSS_REGS_N2H_INTR_MASK_SET_OFFSET, (cause << shift_factor));
-}
-
-/*
- * __nss_hal_send_interrupt()
- */
-static inline void __nss_hal_send_interrupt(uint32_t map, uint32_t irq __attribute__ ((unused)), uint32_t cause)
-{
-	nss_write_32(map, NSS_REGS_C2C_INTR_SET_OFFSET, cause);
-}
-
-#if (NSS_DT_SUPPORT == 1)
-extern void __nss_hal_core_reset(uint32_t map, uint32_t reset);
-#else
-extern void __nss_hal_core_reset(uint32_t core_id, uint32_t map, uint32_t addr, uint32_t clk_src);
-extern void __nss_hal_common_reset(uint32_t *clk_src);
-extern uint32_t nss_hal_pvt_divide_pll18(uint32_t core_id, uint32_t divider);
-extern void nss_hal_pvt_pll_change(uint32_t pll);
-extern uint32_t nss_hal_pvt_enable_pll18(uint32_t speed);
-extern void nss_hal_pvt_register_dump(void);
-#endif
-extern void __nss_hal_debug_enable(void);
-#endif /* __NSS_HAL_PVT_H */
diff --git a/nss_hal/nss_hal.c b/nss_hal/nss_hal.c
new file mode 100644
index 0000000..e857f63
--- /dev/null
+++ b/nss_hal/nss_hal.c
@@ -0,0 +1,614 @@
+/*
+ **************************************************************************
+ * Copyright (c) 2016, The Linux Foundation. All rights reserved.
+ * Permission to use, copy, modify, and/or distribute this software for
+ * any purpose with or without fee is hereby granted, provided that the
+ * above copyright notice and this permission notice appear in all copies.
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT
+ * OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ **************************************************************************
+ */
+
+/**
+ * nss_hal.c
+ *	NSS HAL general APIs.
+ */
+
+#include <linux/err.h>
+#include <linux/version.h>
+#include <linux/firmware.h>
+#include <linux/of.h>
+
+#include "nss_hal.h"
+#include "nss_core.h"
+#include "nss_tx_rx_common.h"
+#include "nss_data_plane.h"
+#if (NSS_PM_SUPPORT == 1)
+#include "nss_pm.h"
+#endif
+#if (NSS_FABRIC_SCALING_SUPPORT == 1)
+#include <linux/fab_scaling.h>
+#endif
+
+/*
+ * Macros
+ */
+#define MIN_IMG_SIZE (64*1024)
+#define NSS_AP0_IMAGE "qca-nss0.bin"
+#define NSS_AP1_IMAGE "qca-nss1.bin"
+
+/*
+ * File local/Static variables/functions
+ */
+static const struct net_device_ops nss_netdev_ops;
+static const struct ethtool_ops nss_ethtool_ops;
+
+int nss_hal_firmware_load(struct nss_ctx_instance *nss_ctx, struct platform_device *nss_dev, struct nss_platform_data *npd)
+{
+	const struct firmware *nss_fw;
+	void __iomem *load_mem;
+	int rc;
+
+	if (nss_ctx->id == 0) {
+		rc = request_firmware(&nss_fw, NSS_AP0_IMAGE, &(nss_dev->dev));
+	} else if (nss_ctx->id == 1) {
+		rc = request_firmware(&nss_fw, NSS_AP1_IMAGE, &(nss_dev->dev));
+	} else {
+		nss_warning("%p: Invalid nss dev: %d\n", nss_ctx, nss_ctx->id);
+		return -EINVAL;
+	}
+
+	/*
+	 *  Check if the file read is successful
+	 */
+	if (rc) {
+		nss_info_always("%p: request_firmware failed with err code: %d", nss_ctx, rc);
+		return rc;
+	}
+
+	if (nss_fw->size < MIN_IMG_SIZE) {
+		nss_info_always("%p: nss firmware is truncated, size:%d", nss_ctx, nss_fw->size);
+		return rc;
+	}
+
+	load_mem = ioremap_nocache(npd->load_addr, nss_fw->size);
+	if (!load_mem) {
+		nss_info_always("%p: ioremap_nocache failed: %x", nss_ctx, npd->load_addr);
+		release_firmware(nss_fw);
+		return rc;
+	}
+
+	nss_info_always("nss_driver - fw of size %u  bytes copied to load addr: %x, nss_id : %d\n", nss_fw->size, npd->load_addr, nss_dev->id);
+	memcpy_toio(load_mem, nss_fw->data, nss_fw->size);
+	release_firmware(nss_fw);
+	iounmap(load_mem);
+	return 0;
+}
+
+/*
+ * nss_hal_dt_parse_features()
+ */
+void nss_hal_dt_parse_features(struct device_node *np, struct nss_platform_data *npd)
+{
+	/*
+	 * Read the features in
+	 */
+	npd->capwap_enabled = of_property_read_bool(np, "qcom,capwap-enabled");
+	npd->crypto_enabled = of_property_read_bool(np, "qcom,crypto-enabled");
+	npd->dtls_enabled = of_property_read_bool(np, "qcom,dtls-enabled");
+	npd->gre_redir_enabled = of_property_read_bool(np, "qcom,gre-redir-enabled");
+	npd->ipsec_enabled = of_property_read_bool(np, "qcom,ipsec-enabled");
+	npd->ipv4_enabled = of_property_read_bool(np, "qcom,ipv4-enabled");
+	npd->ipv4_reasm_enabled = of_property_read_bool(np, "qcom,ipv4-reasm-enabled");
+	npd->ipv6_enabled = of_property_read_bool(np, "qcom,ipv6-enabled");
+	npd->ipv6_reasm_enabled = of_property_read_bool(np, "qcom,ipv6-reasm-enabled");
+	npd->l2tpv2_enabled = of_property_read_bool(np, "qcom,l2tpv2-enabled");
+	npd->map_t_enabled = of_property_read_bool(np, "qcom,map-t-enabled");
+	npd->oam_enabled = of_property_read_bool(np, "qcom,oam-enabled");
+	npd->pppoe_enabled = of_property_read_bool(np, "qcom,pppoe-enabled");
+	npd->pptp_enabled = of_property_read_bool(np, "qcom,pptp-enabled");
+	npd->portid_enabled = of_property_read_bool(np, "qcom,portid-enabled");
+	npd->shaping_enabled = of_property_read_bool(np, "qcom,shaping-enabled");
+	npd->tstamp_enabled = of_property_read_bool(np, "qcom,tstamp-enabled");
+	npd->turbo_frequency = of_property_read_bool(np, "qcom,turbo-frequency");
+	npd->tun6rd_enabled = of_property_read_bool(np, "qcom,tun6rd-enabled");
+	npd->tunipip6_enabled = of_property_read_bool(np, "qcom,tunipip6-enabled");
+	npd->wlanredirect_enabled = of_property_read_bool(np, "qcom,wlanredirect-enabled");
+	npd->wifioffload_enabled = of_property_read_bool(np, "qcom,wlan-dataplane-offload-enabled");
+}
+
+/*
+ * nss_hal_dummy_netdev_setup()
+ *	Dummy setup for net_device handler
+ */
+static void nss_hal_dummy_netdev_setup(struct net_device *ndev)
+{
+
+}
+
+/*
+ * nss_hal_clean_up_netdevice()
+ */
+static void nss_hal_clean_up_netdevice(struct int_ctx_instance *int_ctx)
+{
+	int i;
+
+	for (i = 0; i < NSS_MAX_IRQ_PER_QUEUE; i++) {
+		if (int_ctx->irq[i]) {
+			free_irq(int_ctx->irq[i], int_ctx);
+			int_ctx->irq[i] = 0;
+		}
+	}
+	unregister_netdev(int_ctx->ndev);
+	free_netdev(int_ctx->ndev);
+	int_ctx->ndev = NULL;
+}
+
+/*
+ * nss_hal_register_netdevice()
+ */
+static int nss_hal_register_netdevice(struct nss_ctx_instance *nss_ctx, struct nss_platform_data *npd, int qnum)
+{
+	struct nss_top_instance *nss_top = &nss_top_main;
+	struct net_device *netdev;
+	struct netdev_priv_instance *ndev_priv;
+	struct int_ctx_instance *int_ctx = &nss_ctx->int_ctx[qnum];
+	int err = 0;
+
+	/*
+	 * Register netdevice handlers
+	 */
+#if (LINUX_VERSION_CODE <= KERNEL_VERSION(3, 16, 0))
+	netdev = alloc_netdev(sizeof(struct netdev_priv_instance),
+					"qca-nss-dev%d", nss_hal_dummy_netdev_setup);
+#else
+	netdev = alloc_netdev(sizeof(struct netdev_priv_instance),
+					"qca-nss-dev%d", NET_NAME_ENUM, nss_hal_dummy_netdev_setup);
+#endif
+	if (!netdev) {
+		nss_warning("%p: Could not allocate net_device for queue %d\n", nss_ctx, qnum);
+		return -ENOMEM;
+	}
+
+	netdev->netdev_ops = &nss_netdev_ops;
+	netdev->ethtool_ops = &nss_ethtool_ops;
+	err = register_netdev(netdev);
+	if (err) {
+		nss_warning("%p: Could not register net_device %d\n", nss_ctx, qnum);
+		free_netdev(netdev);
+		return err;
+	}
+
+	/*
+	 * request for IRQs
+	 */
+	int_ctx->nss_ctx = nss_ctx;
+	int_ctx->ndev = netdev;
+	err = nss_top->hal_ops->request_irq_for_queue(nss_ctx, npd, qnum);
+	if (err) {
+		nss_warning("%p: IRQ request for queue %d failed", nss_ctx, qnum);
+		nss_hal_clean_up_netdevice(int_ctx);
+		return err;
+	}
+
+	/*
+	 * Register NAPI for NSS core interrupt
+	 */
+	ndev_priv = netdev_priv(netdev);
+	ndev_priv->int_ctx = int_ctx;
+	netif_napi_add(netdev, &int_ctx->napi, nss_core_handle_napi, 64);
+	napi_enable(&int_ctx->napi);
+	return 0;
+}
+
+/*
+ * nss_hal_probe()
+ *	HLOS device probe callback
+ */
+int nss_hal_probe(struct platform_device *nss_dev)
+{
+	struct nss_top_instance *nss_top = &nss_top_main;
+	struct nss_ctx_instance *nss_ctx = NULL;
+	struct nss_platform_data *npd = NULL;
+	int i, err = 0;
+	struct net_device *tstamp_ndev = NULL;
+
+	if (nss_top_main.nss_hal_common_init_done == false) {
+		err = nss_top->hal_ops->common_reset(nss_dev);
+		if (err) {
+			nss_info_always("NSS HAL common init failed\n");
+			return -EFAULT;
+		}
+	}
+
+#if (NSS_DT_SUPPORT == 1)
+	if (!nss_dev->dev.of_node) {
+		pr_err("nss-driver: Device tree not available\n");
+		return -ENODEV;
+	}
+
+	npd = nss_top->hal_ops->of_get_pdata(nss_dev);
+	if (!npd) {
+		return -EFAULT;
+	}
+
+	nss_ctx = &nss_top->nss[npd->id];
+	nss_ctx->id = npd->id;
+	nss_dev->id = nss_ctx->id;
+#else
+	npd = (struct nss_platform_data *) nss_dev->dev.platform_data;
+	nss_ctx = &nss_top->nss[nss_dev->id];
+	nss_ctx->id = nss_dev->id;
+#endif
+	nss_ctx->nss_top = nss_top;
+
+	nss_info("%p: NSS_DEV_ID %s\n", nss_ctx, dev_name(&nss_dev->dev));
+
+	/*
+	 * Do firmware load from nss-drv if required
+	 */
+	err = nss_top->hal_ops->firmware_load(nss_ctx, nss_dev, npd);
+	if (err) {
+		nss_warning("%p: firmware load from driver failed\n", nss_ctx);
+		goto err_init;
+	}
+
+	/*
+	 * Both NSS cores controlled by same regulator, Hook only Once
+	 */
+	if (!nss_ctx->id) {
+		err = nss_top->hal_ops->clock_configure(nss_ctx, nss_dev, npd);
+		if (err) {
+			nss_warning("%p: clock configure failed\n", nss_ctx);
+			goto err_init;
+		}
+	}
+
+	/*
+	 * Get load address of NSS firmware
+	 */
+	nss_info("%p: Setting NSS%d Firmware load address to %x\n", nss_ctx, nss_ctx->id, npd->load_addr);
+	nss_top->nss[nss_ctx->id].load = npd->load_addr;
+
+	/*
+	 * Get virtual and physical memory addresses for nss logical/hardware address maps
+	 */
+
+	/*
+	 * Virtual address of CSM space
+	 */
+	nss_ctx->nmap = npd->nmap;
+
+	/*
+	 * Physical address of CSM space
+	 */
+	nss_ctx->nphys = npd->nphys;
+	nss_assert(nss_ctx->nphys);
+
+	/*
+	 * Virtual address of logical registers space
+	 */
+	nss_ctx->vmap = npd->vmap;
+
+	/*
+	 * Virtual address of QGIC interrupt space
+	 */
+	nss_ctx->qgic_map = npd->qgic_map;
+
+	/*
+	 * Physical address of logical registers space
+	 */
+	nss_ctx->vphys = npd->vphys;
+	nss_assert(nss_ctx->vphys);
+	nss_info("%d:ctx=%p, vphys=%x, vmap=%x, nphys=%x, nmap=%x",
+			nss_ctx->id, nss_ctx, nss_ctx->vphys, nss_ctx->vmap, nss_ctx->nphys, nss_ctx->nmap);
+
+	/*
+	 * Register netdevice for queue 0
+	 */
+	err = nss_hal_register_netdevice(nss_ctx, npd, 0);
+	if (err) {
+		goto err_init;
+	}
+
+	/*
+	 * Check if second interrupt is supported on this nss core
+	 */
+	if (npd->num_queue > 1) {
+		nss_info("%d: This NSS core supports two interrupts", nss_dev->id);
+
+		/*
+		 * Register netdevice for queue 1
+		 */
+		err = nss_hal_register_netdevice(nss_ctx, npd, 1);
+		if (err) {
+			goto err_register_netdev_0;
+		}
+	}
+
+	/*
+	 * Allocate tstamp net_device and register the net_device
+	 */
+	if (npd->tstamp_enabled == NSS_FEATURE_ENABLED) {
+		tstamp_ndev = nss_tstamp_register_netdev();
+		if (!tstamp_ndev) {
+			nss_warning("%p: Unable to register the TSTAMP net_device", nss_ctx);
+			npd->tstamp_enabled = NSS_FEATURE_NOT_ENABLED;
+		}
+	}
+	spin_lock_bh(&(nss_top->lock));
+
+	/*
+	 * Check functionalities are supported by this NSS core
+	 */
+	if (npd->shaping_enabled == NSS_FEATURE_ENABLED) {
+		nss_top->shaping_handler_id = nss_dev->id;
+		nss_info("%d: NSS shaping is enabled", nss_dev->id);
+	}
+
+	if (npd->ipv4_enabled == NSS_FEATURE_ENABLED) {
+		nss_top->ipv4_handler_id = nss_dev->id;
+		nss_ipv4_register_handler();
+		if (npd->pppoe_enabled == NSS_FEATURE_ENABLED) {
+			nss_pppoe_register_handler();
+		}
+		nss_eth_rx_register_handler();
+		nss_n2h_register_handler();
+		nss_lag_register_handler();
+		nss_dynamic_interface_register_handler();
+
+		for (i = 0; i < NSS_MAX_VIRTUAL_INTERFACES; i++) {
+			nss_top->virt_if_handler_id[i] = nss_dev->id;
+		}
+
+		nss_top->dynamic_interface_table[NSS_DYNAMIC_INTERFACE_TYPE_802_3_REDIR] = nss_dev->id;
+	}
+
+	if (npd->capwap_enabled == NSS_FEATURE_ENABLED) {
+		nss_top->capwap_handler_id = nss_dev->id;
+		nss_top->dynamic_interface_table[NSS_DYNAMIC_INTERFACE_TYPE_CAPWAP] = nss_dev->id;
+	}
+
+	if (npd->ipv4_reasm_enabled == NSS_FEATURE_ENABLED) {
+		nss_top->ipv4_reasm_handler_id = nss_dev->id;
+		nss_ipv4_reasm_register_handler();
+	}
+
+	if (npd->ipv6_enabled == NSS_FEATURE_ENABLED) {
+		nss_top->ipv6_handler_id = nss_dev->id;
+		nss_ipv6_register_handler();
+	}
+
+	if (npd->ipv6_reasm_enabled == NSS_FEATURE_ENABLED) {
+		nss_top->ipv6_reasm_handler_id = nss_dev->id;
+		nss_ipv6_reasm_register_handler();
+	}
+
+	if (npd->crypto_enabled == NSS_FEATURE_ENABLED) {
+		nss_top->crypto_enabled = 1;
+		nss_top->crypto_handler_id = nss_dev->id;
+		nss_crypto_register_handler();
+	}
+
+	if (npd->ipsec_enabled == NSS_FEATURE_ENABLED) {
+		nss_top->ipsec_handler_id = nss_dev->id;
+		nss_ipsec_register_handler();
+	}
+
+	if (npd->wlanredirect_enabled == NSS_FEATURE_ENABLED) {
+		nss_top->wlan_handler_id = nss_dev->id;
+	}
+
+	if (npd->tun6rd_enabled == NSS_FEATURE_ENABLED) {
+		nss_top->tun6rd_handler_id = nss_dev->id;
+	}
+
+	if (npd->pptp_enabled == NSS_FEATURE_ENABLED) {
+		nss_top->pptp_handler_id = nss_dev->id;
+		nss_pptp_register_handler();
+	}
+
+	if (npd->l2tpv2_enabled == NSS_FEATURE_ENABLED) {
+		nss_top->l2tpv2_handler_id = nss_dev->id;
+		nss_l2tpv2_register_handler();
+	}
+
+	if (npd->dtls_enabled == NSS_FEATURE_ENABLED) {
+		nss_top->dtls_handler_id = nss_dev->id;
+		nss_top->dynamic_interface_table[NSS_DYNAMIC_INTERFACE_TYPE_DTLS] = nss_dev->id;
+		nss_dtls_register_handler();
+	}
+
+	if (npd->map_t_enabled == NSS_FEATURE_ENABLED) {
+		nss_top->map_t_handler_id = nss_dev->id;
+		nss_map_t_register_handler();
+	}
+
+	if (npd->tunipip6_enabled == NSS_FEATURE_ENABLED) {
+		nss_top->tunipip6_handler_id = nss_dev->id;
+		nss_tunipip6_register_handler();
+	}
+
+	if (npd->gre_redir_enabled == NSS_FEATURE_ENABLED) {
+		nss_top->gre_redir_handler_id = nss_dev->id;
+		nss_top->dynamic_interface_table[NSS_DYNAMIC_INTERFACE_TYPE_GRE_REDIR] =  nss_dev->id;
+		nss_gre_redir_register_handler();
+		nss_sjack_register_handler();
+	}
+
+	if (npd->portid_enabled == NSS_FEATURE_ENABLED) {
+		nss_top->portid_handler_id = nss_dev->id;
+		nss_top->dynamic_interface_table[NSS_DYNAMIC_INTERFACE_TYPE_PORTID] = nss_dev->id;
+		nss_portid_register_handler();
+	}
+
+	if (npd->wifioffload_enabled == NSS_FEATURE_ENABLED) {
+		nss_top->wifi_handler_id = nss_dev->id;
+		nss_top->dynamic_interface_table[NSS_DYNAMIC_INTERFACE_TYPE_RADIO_0] =  nss_dev->id;
+		nss_top->dynamic_interface_table[NSS_DYNAMIC_INTERFACE_TYPE_RADIO_1] =  nss_dev->id;
+		nss_top->dynamic_interface_table[NSS_DYNAMIC_INTERFACE_TYPE_RADIO_2] =  nss_dev->id;
+		nss_wifi_register_handler();
+	}
+
+	if (npd->tstamp_enabled == NSS_FEATURE_ENABLED) {
+		nss_top->tstamp_handler_id = nss_dev->id;
+		nss_tstamp_register_handler(tstamp_ndev);
+	}
+
+	if (npd->oam_enabled == NSS_FEATURE_ENABLED) {
+		nss_top->oam_handler_id = nss_dev->id;
+		nss_oam_register_handler();
+	}
+
+	if (nss_ctx->id == 0) {
+#if (NSS_FREQ_SCALE_SUPPORT == 1)
+		nss_freq_register_handler();
+#endif
+		nss_lso_rx_register_handler();
+	}
+
+	nss_top->frequency_handler_id = nss_dev->id;
+
+	spin_unlock_bh(&(nss_top->lock));
+
+	/*
+	 * Initialize decongestion callbacks to NULL
+	 */
+	for (i = 0; i < NSS_MAX_CLIENTS; i++) {
+		nss_ctx->queue_decongestion_callback[i] = 0;
+		nss_ctx->queue_decongestion_ctx[i] = 0;
+	}
+
+	spin_lock_init(&(nss_ctx->decongest_cb_lock));
+	nss_ctx->magic = NSS_CTX_MAGIC;
+
+	nss_info("%p: Reseting NSS core %d now", nss_ctx, nss_ctx->id);
+
+	/*
+	 * Enable clocks and bring NSS core out of reset
+	 */
+	err = nss_top->hal_ops->core_reset(nss_dev, nss_ctx->nmap, nss_ctx->load, nss_top->clk_src);
+	if (err) {
+		goto err_register_netdev_1;
+	}
+
+	/*
+	 * Initialize max buffer size for NSS core
+	 */
+	nss_ctx->max_buf_size = NSS_NBUF_PAYLOAD_SIZE;
+
+	/*
+	 * Initialize S/G status pointers to NULL
+	 */
+	for (i = 0; i < NSS_N2H_DESC_RING_NUM; i++) {
+		nss_ctx->n2h_desc_ring[i].head = NULL;
+		nss_ctx->n2h_desc_ring[i].tail = NULL;
+		nss_ctx->n2h_desc_ring[i].jumbo_start = NULL;
+	}
+
+	/*
+	 * Increment number of cores
+	 */
+	nss_top->num_nss++;
+
+	/*
+	 * Enable interrupts for NSS core
+	 */
+	nss_hal_enable_interrupt(nss_ctx, nss_ctx->int_ctx[0].shift_factor, NSS_HAL_SUPPORTED_INTERRUPTS);
+
+	if (npd->num_queue > 1) {
+		nss_hal_enable_interrupt(nss_ctx, nss_ctx->int_ctx[1].shift_factor, NSS_HAL_SUPPORTED_INTERRUPTS);
+	}
+
+	nss_info("%p: All resources initialized and nss core%d has been brought out of reset", nss_ctx, nss_dev->id);
+	goto out;
+
+err_register_netdev_1:
+	nss_hal_clean_up_netdevice(&nss_ctx->int_ctx[1]);
+
+err_register_netdev_0:
+	nss_hal_clean_up_netdevice(&nss_ctx->int_ctx[0]);
+
+err_init:
+	if (nss_dev->dev.of_node) {
+		if (npd->nmap) {
+			iounmap((void *)npd->nmap);
+		}
+
+		if (npd->vmap) {
+			iounmap((void *)npd->vmap);
+		}
+	}
+
+out:
+	if (nss_dev->dev.of_node) {
+		devm_kfree(&nss_dev->dev, npd);
+	}
+	return err;
+}
+
+/*
+ * nss_hal_remove()
+ *	HLOS device remove callback
+ */
+int nss_hal_remove(struct platform_device *nss_dev)
+{
+	struct nss_top_instance *nss_top = &nss_top_main;
+	struct nss_ctx_instance *nss_ctx = &nss_top->nss[nss_dev->id];
+	int i;
+
+	/*
+	 * Clean up debugfs
+	 */
+	nss_stats_clean();
+
+	/*
+	 * Clean up netdev/interrupts
+	 */
+	nss_hal_disable_interrupt(nss_ctx, nss_ctx->int_ctx[0].shift_factor, NSS_HAL_SUPPORTED_INTERRUPTS);
+	nss_hal_clean_up_netdevice(&nss_ctx->int_ctx[0]);
+
+	/*
+	 * Check if second interrupt is supported
+	 * If so then clear resources for second interrupt as well
+	 */
+	if (nss_ctx->int_ctx[1].ndev) {
+		nss_hal_disable_interrupt(nss_ctx, nss_ctx->int_ctx[1].shift_factor, NSS_HAL_SUPPORTED_INTERRUPTS);
+		nss_hal_clean_up_netdevice(&nss_ctx->int_ctx[1]);
+	}
+
+	/*
+	 * nss-drv is exiting, remove from nss-gmac
+	 */
+	for (i = 0 ; i < NSS_MAX_PHYSICAL_INTERFACES ; i++) {
+		if (nss_top->subsys_dp_register[i].ndev) {
+			nss_data_plane_unregister_from_nss_gmac(i);
+			nss_top->subsys_dp_register[i].ndev = NULL;
+		}
+	}
+
+#if (NSS_FABRIC_SCALING_SUPPORT == 1)
+	fab_scaling_unregister(nss_core0_clk);
+#endif
+
+	if (nss_dev->dev.of_node) {
+		if (nss_ctx->nmap) {
+			iounmap((void *)nss_ctx->nmap);
+			nss_ctx->nmap = 0;
+		}
+
+		if (nss_ctx->vmap) {
+			iounmap((void *)nss_ctx->vmap);
+			nss_ctx->vmap = 0;
+		}
+	}
+
+	nss_info("%p: All resources freed for nss core%d", nss_ctx, nss_dev->id);
+	return 0;
+}
+
diff --git a/nss_hlos_if.h b/nss_hlos_if.h
old mode 100755
new mode 100644
diff --git a/nss_if.c b/nss_if.c
index b72a315..3fe24cd 100644
--- a/nss_if.c
+++ b/nss_if.c
@@ -103,8 +103,7 @@
 	/*
 	 * Kick the NSS awake so it can process our new entry.
 	 */
-	nss_hal_send_interrupt(nss_ctx->nmap, nss_ctx->h2n_desc_rings[NSS_IF_DATA_QUEUE_0].desc_ring.int_bit,
-									NSS_REGS_H2N_INTR_STATUS_DATA_COMMAND_QUEUE);
+	nss_hal_send_interrupt(nss_ctx, NSS_H2N_INTR_DATA_COMMAND_QUEUE);
 	NSS_PKT_STATS_INCREMENT(nss_ctx, &nss_ctx->nss_top->stats_drv[NSS_STATS_DRV_TX_PACKET]);
 	return NSS_TX_SUCCESS;
 }
@@ -165,8 +164,7 @@
 		return NSS_TX_FAILURE;
 	}
 
-	nss_hal_send_interrupt(nss_ctx->nmap, nss_ctx->h2n_desc_rings[NSS_IF_CMD_QUEUE].desc_ring.int_bit,
-					NSS_REGS_H2N_INTR_STATUS_DATA_COMMAND_QUEUE);
+	nss_hal_send_interrupt(nss_ctx, NSS_H2N_INTR_DATA_COMMAND_QUEUE);
 	return NSS_TX_SUCCESS;
 }
 
diff --git a/nss_init.c b/nss_init.c
index 8229746..a5ad138 100644
--- a/nss_init.c
+++ b/nss_init.c
@@ -115,6 +115,19 @@
 	return nss_hal_remove(nss_dev);
 }
 
+#if (NSS_DT_SUPPORT == 1)
+/*
+ * Platform Device ID for NSS core.
+ */
+struct of_device_id nss_dt_ids[] = {
+	{ .compatible = "qcom,nss" },
+	{ .compatible = "qcom,nss0" },
+	{ .compatible = "qcom,nss1" },
+	{},
+};
+MODULE_DEVICE_TABLE(of, nss_dt_ids);
+#endif
+
 /*
  * nss_driver
  *	Platform driver structure for NSS
@@ -438,7 +451,7 @@
 	if (!ret) {
 		if ((write) && (nss_ctl_debug != 0)) {
 			printk("Coredumping to DDR\n");
-			nss_hal_send_interrupt(nss_ctx->nmap, nss_ctx->h2n_desc_rings[NSS_IF_CMD_QUEUE].desc_ring.int_bit, NSS_REGS_H2N_INTR_STATUS_TRIGGER_COREDUMP);
+			nss_hal_send_interrupt(nss_ctx, NSS_H2N_INTR_TRIGGER_COREDUMP);
 		}
 	}
 
@@ -614,51 +627,34 @@
  */
 static int __init nss_init(void)
 {
-#if (NSS_DT_SUPPORT == 1)
-	struct device_node *cmn = NULL;
-	struct resource res_nss_fpb_base;
-#endif
-
 	nss_info("Init NSS driver");
 
 #if (NSS_DT_SUPPORT == 1)
 	/*
-	 * Get reference to NSS common device node
+	 * Pick up HAL by target information
 	 */
-	cmn = of_find_node_by_name(NULL, "nss-common");
-	if (!cmn) {
-		nss_info_always("qca-nss-drv.ko is loaded for symbol link\n");
-		return 0;
+#if defined(NSS_HAL_IPQ806X_SUPPORT)
+	if (of_machine_is_compatible("qcom,ipq8064") || of_machine_is_compatible("qcom,ipq8062")) {
+		nss_top_main.hal_ops = &nss_hal_ipq806x_ops;
 	}
-
-	if (of_address_to_resource(cmn, 0, &res_nss_fpb_base) != 0) {
-		nss_info("of_address_to_resource() return error for nss_fpb_base\n");
-		of_node_put(cmn);
+#endif
+#if defined(NSS_HAL_FSM9010_SUPPORT)
+	if (of_machine_is_compatible("qcom,fsm9010")) {
+		nss_top_main.hal_ops = &nss_hal_fsm9010_ops;
+	}
+#endif
+	if (!nss_top_main.hal_ops) {
+		nss_info_always("No supported HAL compiled on this platform\n");
 		return -EFAULT;
 	}
-
-	nss_top_main.nss_fpb_base = ioremap_nocache(res_nss_fpb_base.start,
-						    resource_size(&res_nss_fpb_base));
-	if (!nss_top_main.nss_fpb_base) {
-		nss_info("ioremap fail for nss_fpb_base\n");
-		of_node_put(cmn);
-		return -EFAULT;
-	}
-
-	nss_top_main.nss_hal_common_init_done = false;
-
-	/*
-	 * Release reference to NSS common device node
-	 */
-	of_node_put(cmn);
-	cmn = NULL;
 #else
 	/*
-	 * Perform clock init common to all NSS cores
+	 * For banana, only ipq806x is supported
 	 */
-	nss_hal_common_reset(&(nss_top_main.clk_src));
+	nss_top_main.hal_ops = &nss_hal_ipq806x_ops;
 
 #endif /* NSS_DT_SUPPORT */
+	nss_top_main.nss_hal_common_init_done = false;
 
 	/*
 	 * Initialize data_plane workqueue
@@ -758,19 +754,6 @@
  */
 static void __exit nss_cleanup(void)
 {
-#if (NSS_DT_SUPPORT == 1)
-	struct device_node *cmn = NULL;
-
-	/*
-	 * Get reference to NSS common device node
-	 */
-	cmn = of_find_node_by_name(NULL, "nss-common");
-	if (!cmn) {
-		nss_info_always("cannot find nss-common node, maybe just for symbol link\n");
-		return;
-	}
-#endif
-
 	nss_info("Exit NSS driver");
 
 	if (nss_dev_header)
@@ -787,13 +770,6 @@
 	nss_ipv4_unregister_sysctl();
 	nss_ipv6_unregister_sysctl();
 
-#if (NSS_DT_SUPPORT == 1)
-	if(nss_top_main.nss_fpb_base) {
-		iounmap(nss_top_main.nss_fpb_base);
-		nss_top_main.nss_fpb_base = 0;
-	}
-#endif
-
 	nss_data_plane_destroy_delay_work();
 
 	platform_driver_unregister(&nss_driver);
diff --git a/nss_ipsec.c b/nss_ipsec.c
index 8d75402..76ccbda 100644
--- a/nss_ipsec.c
+++ b/nss_ipsec.c
@@ -219,8 +219,7 @@
 		return NSS_TX_FAILURE;
 	}
 
-	nss_hal_send_interrupt(nss_ctx->nmap, nss_ctx->h2n_desc_rings[NSS_IF_CMD_QUEUE].desc_ring.int_bit,
-									NSS_REGS_H2N_INTR_STATUS_DATA_COMMAND_QUEUE);
+	nss_hal_send_interrupt(nss_ctx, NSS_H2N_INTR_DATA_COMMAND_QUEUE);
 
 	return NSS_TX_SUCCESS;
 }
@@ -234,7 +233,6 @@
 {
 	int32_t status;
 	struct nss_ctx_instance *nss_ctx = &nss_top_main.nss[nss_top_main.ipsec_handler_id];
-	uint16_t int_bit = nss_ctx->h2n_desc_rings[NSS_IF_DATA_QUEUE_0].desc_ring.int_bit;
 
 	nss_trace("%p: IPsec If Tx packet, id:%d, data=%p", nss_ctx, if_num, skb->data);
 
@@ -257,7 +255,7 @@
 	/*
 	 * Kick the NSS awake so it can process our new entry.
 	 */
-	nss_hal_send_interrupt(nss_ctx->nmap, int_bit, NSS_REGS_H2N_INTR_STATUS_DATA_COMMAND_QUEUE);
+	nss_hal_send_interrupt(nss_ctx, NSS_H2N_INTR_DATA_COMMAND_QUEUE);
 	NSS_PKT_STATS_INCREMENT(nss_ctx, &nss_ctx->nss_top->stats_drv[NSS_STATS_DRV_TX_PACKET]);
 	return NSS_TX_SUCCESS;
 }
diff --git a/nss_ipv4.c b/nss_ipv4.c
index 81ea0e2..79b750d 100644
--- a/nss_ipv4.c
+++ b/nss_ipv4.c
@@ -251,8 +251,7 @@
 		return NSS_TX_FAILURE;
 	}
 
-	nss_hal_send_interrupt(nss_ctx->nmap, nss_ctx->h2n_desc_rings[NSS_IF_CMD_QUEUE].desc_ring.int_bit,
-								NSS_REGS_H2N_INTR_STATUS_DATA_COMMAND_QUEUE);
+	nss_hal_send_interrupt(nss_ctx, NSS_H2N_INTR_DATA_COMMAND_QUEUE);
 
 	NSS_PKT_STATS_INCREMENT(nss_ctx, &nss_ctx->nss_top->stats_drv[NSS_STATS_DRV_TX_CMD_REQ]);
 	return NSS_TX_SUCCESS;
diff --git a/nss_ipv6.c b/nss_ipv6.c
index 3e6fa02..70198b3 100644
--- a/nss_ipv6.c
+++ b/nss_ipv6.c
@@ -254,8 +254,7 @@
 		return NSS_TX_FAILURE;
 	}
 
-	nss_hal_send_interrupt(nss_ctx->nmap, nss_ctx->h2n_desc_rings[NSS_IF_CMD_QUEUE].desc_ring.int_bit,
-								NSS_REGS_H2N_INTR_STATUS_DATA_COMMAND_QUEUE);
+	nss_hal_send_interrupt(nss_ctx, NSS_H2N_INTR_DATA_COMMAND_QUEUE);
 
 	NSS_PKT_STATS_INCREMENT(nss_ctx, &nss_ctx->nss_top->stats_drv[NSS_STATS_DRV_TX_CMD_REQ]);
 	return NSS_TX_SUCCESS;
diff --git a/nss_l2tpv2.c b/nss_l2tpv2.c
index 4174e89..64d3a25 100644
--- a/nss_l2tpv2.c
+++ b/nss_l2tpv2.c
@@ -200,8 +200,7 @@
 		return NSS_TX_FAILURE;
 	}
 
-	nss_hal_send_interrupt(nss_ctx->nmap, nss_ctx->h2n_desc_rings[NSS_IF_CMD_QUEUE].desc_ring.int_bit,
-				NSS_REGS_H2N_INTR_STATUS_DATA_COMMAND_QUEUE);
+	nss_hal_send_interrupt(nss_ctx, NSS_H2N_INTR_DATA_COMMAND_QUEUE);
 
 	NSS_PKT_STATS_INCREMENT(nss_ctx, &nss_ctx->nss_top->stats_drv[NSS_STATS_DRV_TX_CMD_REQ]);
 	return NSS_TX_SUCCESS;
diff --git a/nss_lag.c b/nss_lag.c
index a8d44e7..d831036 100644
--- a/nss_lag.c
+++ b/nss_lag.c
@@ -57,8 +57,7 @@
 		nss_warning("%p: Unable to enqueue LAG msg\n", nss_ctx);
 		return NSS_TX_FAILURE;
 	}
-	nss_hal_send_interrupt(nss_ctx->nmap, nss_ctx->h2n_desc_rings[NSS_IF_CMD_QUEUE].desc_ring.int_bit,
-									NSS_REGS_H2N_INTR_STATUS_DATA_COMMAND_QUEUE);
+	nss_hal_send_interrupt(nss_ctx, NSS_H2N_INTR_DATA_COMMAND_QUEUE);
 
 	NSS_PKT_STATS_INCREMENT(nss_ctx, &nss_ctx->nss_top->stats_drv[NSS_STATS_DRV_TX_CMD_REQ]);
 	return NSS_TX_SUCCESS;
diff --git a/nss_log.c b/nss_log.c
index 478fdfe..aba17bd 100644
--- a/nss_log.c
+++ b/nss_log.c
@@ -425,8 +425,7 @@
 		return NSS_TX_FAILURE;
 	}
 
-	nss_hal_send_interrupt(nss_ctx->nmap, nss_ctx->h2n_desc_rings[NSS_IF_CMD_QUEUE].desc_ring.int_bit,
-				NSS_REGS_H2N_INTR_STATUS_DATA_COMMAND_QUEUE);
+	nss_hal_send_interrupt(nss_ctx, NSS_H2N_INTR_DATA_COMMAND_QUEUE);
 
 	NSS_PKT_STATS_INCREMENT(nss_ctx, &nss_ctx->nss_top->stats_drv[NSS_STATS_DRV_TX_CMD_REQ]);
 	return NSS_TX_SUCCESS;
diff --git a/nss_map_t.c b/nss_map_t.c
index 23d3c61..6c92391 100644
--- a/nss_map_t.c
+++ b/nss_map_t.c
@@ -259,8 +259,7 @@
 		return NSS_TX_FAILURE;
 	}
 
-	nss_hal_send_interrupt(nss_ctx->nmap, nss_ctx->h2n_desc_rings[NSS_IF_CMD_QUEUE].desc_ring.int_bit,
-				NSS_REGS_H2N_INTR_STATUS_DATA_COMMAND_QUEUE);
+	nss_hal_send_interrupt(nss_ctx, NSS_H2N_INTR_DATA_COMMAND_QUEUE);
 
 	NSS_PKT_STATS_INCREMENT(nss_ctx, &nss_ctx->nss_top->stats_drv[NSS_STATS_DRV_TX_CMD_REQ]);
 	return NSS_TX_SUCCESS;
diff --git a/nss_n2h.c b/nss_n2h.c
index 17368e9..cecfc82 100644
--- a/nss_n2h.c
+++ b/nss_n2h.c
@@ -1357,9 +1357,7 @@
 		return NSS_TX_FAILURE;
 	}
 
-	nss_hal_send_interrupt(nss_ctx->nmap,
-				nss_ctx->h2n_desc_rings[NSS_IF_CMD_QUEUE].desc_ring.int_bit,
-				NSS_REGS_H2N_INTR_STATUS_DATA_COMMAND_QUEUE);
+	nss_hal_send_interrupt(nss_ctx, NSS_H2N_INTR_DATA_COMMAND_QUEUE);
 	NSS_PKT_STATS_INCREMENT(nss_ctx, &nss_ctx->nss_top->stats_drv[NSS_STATS_DRV_TX_CMD_REQ]);
 	return NSS_TX_SUCCESS;
 }
diff --git a/nss_oam.c b/nss_oam.c
index 2957d5d..cfac00d 100644
--- a/nss_oam.c
+++ b/nss_oam.c
@@ -122,7 +122,7 @@
 		return NSS_TX_FAILURE;
 	}
 
-	nss_hal_send_interrupt(nss_ctx->nmap, nss_ctx->h2n_desc_rings[NSS_IF_CMD_QUEUE].desc_ring.int_bit, NSS_REGS_H2N_INTR_STATUS_DATA_COMMAND_QUEUE);
+	nss_hal_send_interrupt(nss_ctx, NSS_H2N_INTR_DATA_COMMAND_QUEUE);
 	NSS_PKT_STATS_INCREMENT(nss_ctx, &nss_ctx->nss_top->stats_drv[NSS_STATS_DRV_TX_CMD_REQ]);
 	return NSS_TX_SUCCESS;
 }
diff --git a/nss_phys_if.c b/nss_phys_if.c
index 69fbe1b..ca04889 100644
--- a/nss_phys_if.c
+++ b/nss_phys_if.c
@@ -304,8 +304,7 @@
 	/*
 	 * Kick the NSS awake so it can process our new entry.
 	 */
-	nss_hal_send_interrupt(nss_ctx->nmap, nss_ctx->h2n_desc_rings[NSS_IF_DATA_QUEUE_0].desc_ring.int_bit,
-									NSS_REGS_H2N_INTR_STATUS_DATA_COMMAND_QUEUE);
+	nss_hal_send_interrupt(nss_ctx, NSS_H2N_INTR_DATA_COMMAND_QUEUE);
 
 	NSS_PKT_STATS_INCREMENT(nss_ctx, &nss_ctx->nss_top->stats_drv[NSS_STATS_DRV_TX_PACKET]);
 	return NSS_TX_SUCCESS;
@@ -370,8 +369,7 @@
 		return NSS_TX_FAILURE;
 	}
 
-	nss_hal_send_interrupt(nss_ctx->nmap, nss_ctx->h2n_desc_rings[NSS_IF_CMD_QUEUE].desc_ring.int_bit,
-		NSS_REGS_H2N_INTR_STATUS_DATA_COMMAND_QUEUE);
+	nss_hal_send_interrupt(nss_ctx, NSS_H2N_INTR_DATA_COMMAND_QUEUE);
 
 	return NSS_TX_SUCCESS;
 }
diff --git a/nss_pm.c b/nss_pm.c
index 1b2ea18..58b1d3c 100644
--- a/nss_pm.c
+++ b/nss_pm.c
@@ -19,13 +19,12 @@
  *    NSS Power Management APIs
  *
  */
+#if (NSS_PM_SUPPORT == 1)
 #include <linux/debugfs.h>
 #include <linux/module.h>
 #include <linux/netdevice.h>
-#include <nss_hal.h>
+#include <nss_clocks.h>
 #include <nss_api_if.h>
-
-#if (NSS_PM_SUPPORT == 1)
 #include "nss_pm.h"
 
 /*
diff --git a/nss_portid.c b/nss_portid.c
index 0e7b559..4209141 100644
--- a/nss_portid.c
+++ b/nss_portid.c
@@ -267,8 +267,7 @@
 		return NSS_TX_FAILURE;
 	}
 
-	nss_hal_send_interrupt(nss_ctx->nmap, nss_ctx->h2n_desc_rings[NSS_IF_CMD_QUEUE].desc_ring.int_bit,
-				NSS_REGS_H2N_INTR_STATUS_DATA_COMMAND_QUEUE);
+	nss_hal_send_interrupt(nss_ctx, NSS_H2N_INTR_DATA_COMMAND_QUEUE);
 
 	NSS_PKT_STATS_INCREMENT(nss_ctx, &nss_ctx->nss_top->stats_drv[NSS_STATS_DRV_TX_CMD_REQ]);
 	return NSS_TX_SUCCESS;
diff --git a/nss_pppoe.c b/nss_pppoe.c
index f135fd2..1aa61aa 100644
--- a/nss_pppoe.c
+++ b/nss_pppoe.c
@@ -78,8 +78,7 @@
 		return NSS_TX_FAILURE;
 	}
 
-	nss_hal_send_interrupt(nss_ctx->nmap, nss_ctx->h2n_desc_rings[NSS_IF_CMD_QUEUE].desc_ring.int_bit,
-								NSS_REGS_H2N_INTR_STATUS_DATA_COMMAND_QUEUE);
+	nss_hal_send_interrupt(nss_ctx, NSS_H2N_INTR_DATA_COMMAND_QUEUE);
 
 	NSS_PKT_STATS_INCREMENT(nss_ctx, &nss_ctx->nss_top->stats_drv[NSS_STATS_DRV_TX_CMD_REQ]);
 
diff --git a/nss_pptp.c b/nss_pptp.c
index ed163cf..bbde710 100644
--- a/nss_pptp.c
+++ b/nss_pptp.c
@@ -229,8 +229,7 @@
 		return NSS_TX_FAILURE;
 	}
 
-	nss_hal_send_interrupt(nss_ctx->nmap, nss_ctx->h2n_desc_rings[NSS_IF_CMD_QUEUE].desc_ring.int_bit,
-				NSS_REGS_H2N_INTR_STATUS_DATA_COMMAND_QUEUE);
+	nss_hal_send_interrupt(nss_ctx, NSS_H2N_INTR_DATA_COMMAND_QUEUE);
 
 	NSS_PKT_STATS_INCREMENT(nss_ctx, &nss_ctx->nss_top->stats_drv[NSS_STATS_DRV_TX_CMD_REQ]);
 	return NSS_TX_SUCCESS;
@@ -329,8 +328,7 @@
 	/*
 	 * Kick the NSS awake so it can process our new entry.
 	 */
-	nss_hal_send_interrupt(nss_ctx->nmap, nss_ctx->h2n_desc_rings[NSS_IF_DATA_QUEUE_0].desc_ring.int_bit,
-				NSS_REGS_H2N_INTR_STATUS_DATA_COMMAND_QUEUE);
+	nss_hal_send_interrupt(nss_ctx, NSS_H2N_INTR_DATA_COMMAND_QUEUE);
 
 	NSS_PKT_STATS_INCREMENT(nss_ctx, &nss_ctx->nss_top->stats_drv[NSS_STATS_DRV_TX_PACKET]);
 	return NSS_TX_SUCCESS;
diff --git a/nss_profiler.c b/nss_profiler.c
index 900ee58..f029b68 100644
--- a/nss_profiler.c
+++ b/nss_profiler.c
@@ -1,6 +1,6 @@
 /*
  **************************************************************************
- * Copyright (c) 2013-2015, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2013-2016, The Linux Foundation. All rights reserved.
  * Permission to use, copy, modify, and/or distribute this software for
  * any purpose with or without fee is hereby granted, provided that the
  * above copyright notice and this permission notice appear in all copies.
@@ -115,8 +115,7 @@
 		return NSS_TX_FAILURE;
 	}
 
-	nss_hal_send_interrupt(nss_ctx->nmap, nss_ctx->h2n_desc_rings[NSS_IF_CMD_QUEUE].desc_ring.int_bit,
-								NSS_REGS_H2N_INTR_STATUS_DATA_COMMAND_QUEUE);
+	nss_hal_send_interrupt(nss_ctx, NSS_H2N_INTR_DATA_COMMAND_QUEUE);
 
 	NSS_PKT_STATS_INCREMENT(nss_ctx, &nss_ctx->nss_top->stats_drv[NSS_STATS_DRV_TX_CMD_REQ]);
 	return NSS_TX_SUCCESS;
diff --git a/nss_shaper.c b/nss_shaper.c
index 7ff489a..5eb35b4 100644
--- a/nss_shaper.c
+++ b/nss_shaper.c
@@ -1,6 +1,6 @@
 /*
  **************************************************************************
- * Copyright (c) 2014, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2014, 2016, The Linux Foundation. All rights reserved.
  * Permission to use, copy, modify, and/or distribute this software for
  * any purpose with or without fee is hereby granted, provided that the
  * above copyright notice and this permission notice appear in all copies.
@@ -294,8 +294,7 @@
 	if (status != NSS_CORE_STATUS_SUCCESS) {
 		return NSS_TX_FAILURE;
 	}
-	nss_hal_send_interrupt(nss_ctx->nmap, nss_ctx->h2n_desc_rings[NSS_IF_CMD_QUEUE].desc_ring.int_bit,
-								NSS_REGS_H2N_INTR_STATUS_DATA_COMMAND_QUEUE);
+	nss_hal_send_interrupt(nss_ctx, NSS_H2N_INTR_DATA_COMMAND_QUEUE);
 
 	NSS_PKT_STATS_INCREMENT(nss_ctx, &nss_ctx->nss_top->stats_drv[NSS_STATS_DRV_TX_CMD_REQ]);
 	return NSS_TX_SUCCESS;
@@ -340,8 +339,7 @@
 		nss_info("%s: Bridge bounce core send rejected", __func__);
 		return NSS_TX_FAILURE;
 	}
-	nss_hal_send_interrupt(nss_ctx->nmap, nss_ctx->h2n_desc_rings[NSS_IF_CMD_QUEUE].desc_ring.int_bit,
-								NSS_REGS_H2N_INTR_STATUS_DATA_COMMAND_QUEUE);
+	nss_hal_send_interrupt(nss_ctx, NSS_H2N_INTR_DATA_COMMAND_QUEUE);
 
 	NSS_PKT_STATS_INCREMENT(nss_ctx, &nss_ctx->nss_top->stats_drv[NSS_STATS_DRV_TX_CMD_REQ]);
 	return NSS_TX_SUCCESS;
diff --git a/nss_sjack.c b/nss_sjack.c
index 9b61611..d73536d 100644
--- a/nss_sjack.c
+++ b/nss_sjack.c
@@ -156,8 +156,7 @@
 		return NSS_TX_FAILURE;
 	}
 
-	nss_hal_send_interrupt(nss_ctx->nmap, nss_ctx->h2n_desc_rings[NSS_IF_CMD_QUEUE].desc_ring.int_bit,
-				NSS_REGS_H2N_INTR_STATUS_DATA_COMMAND_QUEUE);
+	nss_hal_send_interrupt(nss_ctx, NSS_H2N_INTR_DATA_COMMAND_QUEUE);
 
 	NSS_PKT_STATS_INCREMENT(nss_ctx, &nss_ctx->nss_top->stats_drv[NSS_STATS_DRV_TX_CMD_REQ]);
 	return NSS_TX_SUCCESS;
diff --git a/nss_tstamp.c b/nss_tstamp.c
index 42bcfe1..a891458 100644
--- a/nss_tstamp.c
+++ b/nss_tstamp.c
@@ -1,6 +1,6 @@
 /*
  **************************************************************************
- * Copyright (c) 2015, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2015, 2016, The Linux Foundation. All rights reserved.
  * Permission to use, copy, modify, and/or distribute this software for
  * any purpose with or without fee is hereby granted, provided that the
  * above copyright notice and this permission notice appear in all copies.
@@ -65,7 +65,9 @@
 
 	tstamp = skb_hwtstamps(skb);
 	tstamp->hwtstamp = ktime_set(ntm->ts_data_hi, ntm->ts_data_lo);
+#if (LINUX_VERSION_CODE <= KERNEL_VERSION(3, 16, 0))
 	tstamp->syststamp = ktime_set(ntm->ts_data_hi, ntm->ts_data_lo);
+#endif
 }
 
 /*
@@ -153,7 +155,11 @@
 	struct net_device *ndev;
 	uint32_t err = 0;
 
+#if (LINUX_VERSION_CODE <= KERNEL_VERSION(3, 16, 0))
 	ndev = alloc_netdev(sizeof(struct netdev_priv_instance), "qca-nss-tstamp", nss_tstamp_ndev_setup);
+#else
+	ndev = alloc_netdev(sizeof(struct netdev_priv_instance), "qca-nss-tstamp", NET_NAME_ENUM, nss_tstamp_ndev_setup);
+#endif
 	if (!ndev) {
 		nss_warning("Tstamp: Could not allocate tstamp net_device ");
 		return NULL;
diff --git a/nss_tun6rd.c b/nss_tun6rd.c
index 4f1b322..1d356a4 100644
--- a/nss_tun6rd.c
+++ b/nss_tun6rd.c
@@ -134,8 +134,7 @@
 		return NSS_TX_FAILURE;
 	}
 
-	nss_hal_send_interrupt(nss_ctx->nmap, nss_ctx->h2n_desc_rings[NSS_IF_CMD_QUEUE].desc_ring.int_bit,
-				NSS_REGS_H2N_INTR_STATUS_DATA_COMMAND_QUEUE);
+	nss_hal_send_interrupt(nss_ctx, NSS_H2N_INTR_DATA_COMMAND_QUEUE);
 
 	NSS_PKT_STATS_INCREMENT(nss_ctx, &nss_ctx->nss_top->stats_drv[NSS_STATS_DRV_TX_CMD_REQ]);
 	return NSS_TX_SUCCESS;
diff --git a/nss_tunipip6.c b/nss_tunipip6.c
index 727fef0..214ea75 100644
--- a/nss_tunipip6.c
+++ b/nss_tunipip6.c
@@ -132,8 +132,7 @@
 		return NSS_TX_FAILURE;
 	}
 
-	nss_hal_send_interrupt(nss_ctx->nmap, nss_ctx->h2n_desc_rings[NSS_IF_CMD_QUEUE].desc_ring.int_bit,
-				NSS_REGS_H2N_INTR_STATUS_DATA_COMMAND_QUEUE);
+	nss_hal_send_interrupt(nss_ctx, NSS_H2N_INTR_DATA_COMMAND_QUEUE);
 
 	NSS_PKT_STATS_INCREMENT(nss_ctx, &nss_ctx->nss_top->stats_drv[NSS_STATS_DRV_TX_CMD_REQ]);
 	return NSS_TX_SUCCESS;
diff --git a/nss_tx_rx_common.h b/nss_tx_rx_common.h
index 296e479..44c1262 100644
--- a/nss_tx_rx_common.h
+++ b/nss_tx_rx_common.h
@@ -22,7 +22,6 @@
 #ifndef __NSS_TX_RX_COMMON_H
 #define __NSS_TX_RX_COMMON_H
 
-#include "nss_core.h"
 #include <nss_hal.h>
 #include <linux/module.h>
 #include <linux/vmalloc.h>
diff --git a/nss_tx_rx_virt_if.c b/nss_tx_rx_virt_if.c
index 574700d..48b854b 100644
--- a/nss_tx_rx_virt_if.c
+++ b/nss_tx_rx_virt_if.c
@@ -300,9 +300,7 @@
 	/*
 	 * Kick the NSS awake so it can process our new entry.
 	 */
-	nss_hal_send_interrupt(nss_ctx->nmap,
-				nss_ctx->h2n_desc_rings[NSS_IF_DATA_QUEUE_0].desc_ring.int_bit,
-				NSS_REGS_H2N_INTR_STATUS_DATA_COMMAND_QUEUE);
+	nss_hal_send_interrupt(nss_ctx, NSS_H2N_INTR_DATA_COMMAND_QUEUE);
 	NSS_PKT_STATS_INCREMENT(nss_ctx, &nss_ctx->nss_top->stats_drv[NSS_STATS_DRV_TX_PACKET]);
 	return NSS_TX_SUCCESS;
 }
@@ -473,9 +471,7 @@
 		return NSS_TX_FAILURE;
 	}
 
-	nss_hal_send_interrupt(nss_ctx->nmap,
-				nss_ctx->h2n_desc_rings[NSS_IF_CMD_QUEUE].desc_ring.int_bit,
-				NSS_REGS_H2N_INTR_STATUS_DATA_COMMAND_QUEUE);
+	nss_hal_send_interrupt(nss_ctx, NSS_H2N_INTR_DATA_COMMAND_QUEUE);
 
 	/*
 	 * The context returned is the redir interface # which is, essentially, the index into the if_ctx
diff --git a/nss_virt_if.c b/nss_virt_if.c
index c251f3d..f0bfaae 100644
--- a/nss_virt_if.c
+++ b/nss_virt_if.c
@@ -796,9 +796,7 @@
 	/*
 	 * Kick the NSS awake so it can process our new entry.
 	 */
-	nss_hal_send_interrupt(nss_ctx->nmap,
-				nss_ctx->h2n_desc_rings[NSS_IF_DATA_QUEUE_0].desc_ring.int_bit,
-				NSS_REGS_H2N_INTR_STATUS_DATA_COMMAND_QUEUE);
+	nss_hal_send_interrupt(nss_ctx, NSS_H2N_INTR_DATA_COMMAND_QUEUE);
 	NSS_PKT_STATS_INCREMENT(nss_ctx, &nss_ctx->nss_top->stats_drv[NSS_STATS_DRV_TX_PACKET]);
 	return NSS_TX_SUCCESS;
 }
@@ -855,9 +853,7 @@
 		return NSS_TX_FAILURE;
 	}
 
-	nss_hal_send_interrupt(nss_ctx->nmap,
-				nss_ctx->h2n_desc_rings[NSS_IF_CMD_QUEUE].desc_ring.int_bit,
-				NSS_REGS_H2N_INTR_STATUS_DATA_COMMAND_QUEUE);
+	nss_hal_send_interrupt(nss_ctx, NSS_H2N_INTR_DATA_COMMAND_QUEUE);
 
 	/*
 	 * The context returned is the virtual interface # which is, essentially, the index into the if_ctx
diff --git a/nss_wifi.c b/nss_wifi.c
index ea8ac36..dd684d4 100644
--- a/nss_wifi.c
+++ b/nss_wifi.c
@@ -199,8 +199,7 @@
 		return NSS_TX_FAILURE;
 	}
 
-	nss_hal_send_interrupt(nss_ctx->nmap, nss_ctx->h2n_desc_rings[NSS_IF_CMD_QUEUE].desc_ring.int_bit,
-				NSS_REGS_H2N_INTR_STATUS_DATA_COMMAND_QUEUE);
+	nss_hal_send_interrupt(nss_ctx, NSS_H2N_INTR_DATA_COMMAND_QUEUE);
 
 	NSS_PKT_STATS_INCREMENT(nss_ctx, &nss_ctx->nss_top->stats_drv[NSS_STATS_DRV_TX_CMD_REQ]);
 
diff --git a/nss_wifi_if.c b/nss_wifi_if.c
index f6b53bd..47ef4dc 100644
--- a/nss_wifi_if.c
+++ b/nss_wifi_if.c
@@ -226,9 +226,7 @@
 		return NSS_TX_FAILURE;
 	}
 
-	nss_hal_send_interrupt(nss_ctx->nmap,
-				nss_ctx->h2n_desc_rings[NSS_IF_CMD_QUEUE].desc_ring.int_bit,
-				NSS_REGS_H2N_INTR_STATUS_DATA_COMMAND_QUEUE);
+	nss_hal_send_interrupt(nss_ctx, NSS_H2N_INTR_DATA_COMMAND_QUEUE);
 
 	/*
 	 * The context returned is the virtual interface # which is, essentially, the index into the if_ctx
@@ -590,9 +588,7 @@
 	/*
 	 * Kick the NSS awake so it can process our new entry.
 	 */
-	nss_hal_send_interrupt(nss_ctx->nmap,
-				nss_ctx->h2n_desc_rings[NSS_IF_DATA_QUEUE_0].desc_ring.int_bit,
-				NSS_REGS_H2N_INTR_STATUS_DATA_COMMAND_QUEUE);
+	nss_hal_send_interrupt(nss_ctx, NSS_H2N_INTR_DATA_COMMAND_QUEUE);
 	NSS_PKT_STATS_INCREMENT(nss_ctx, &nss_ctx->nss_top->stats_drv[NSS_STATS_DRV_TX_PACKET]);
 	return NSS_TX_SUCCESS;
 }
diff --git a/nss_wifi_vdev.c b/nss_wifi_vdev.c
index b8079f7..beee2d1 100644
--- a/nss_wifi_vdev.c
+++ b/nss_wifi_vdev.c
@@ -141,8 +141,7 @@
 		return NSS_TX_FAILURE;
 	}
 
-	nss_hal_send_interrupt(nss_ctx->nmap, nss_ctx->h2n_desc_rings[NSS_IF_CMD_QUEUE].desc_ring.int_bit,
-				NSS_REGS_H2N_INTR_STATUS_DATA_COMMAND_QUEUE);
+	nss_hal_send_interrupt(nss_ctx, NSS_H2N_INTR_DATA_COMMAND_QUEUE);
 
 	NSS_PKT_STATS_INCREMENT(nss_ctx, &nss_ctx->nss_top->stats_drv[NSS_STATS_DRV_TX_CMD_REQ]);
 
@@ -190,8 +189,7 @@
 		return NSS_TX_FAILURE;
 	}
 
-	nss_hal_send_interrupt(nss_ctx->nmap, nss_ctx->h2n_desc_rings[NSS_IF_CMD_QUEUE].desc_ring.int_bit,
-			NSS_REGS_H2N_INTR_STATUS_DATA_COMMAND_QUEUE);
+	nss_hal_send_interrupt(nss_ctx, NSS_H2N_INTR_DATA_COMMAND_QUEUE);
 
 	NSS_PKT_STATS_INCREMENT(nss_ctx, &nss_ctx->nss_top->stats_drv[NSS_STATS_DRV_TX_CMD_REQ]);
 
@@ -205,7 +203,6 @@
 nss_tx_status_t nss_wifi_vdev_tx_buf(struct nss_ctx_instance *nss_ctx, struct sk_buff *os_buf, uint32_t if_num)
 {
 	int32_t status;
-	uint16_t int_bit = nss_ctx->h2n_desc_rings[NSS_IF_DATA_QUEUE_0].desc_ring.int_bit;
 
 	NSS_VERIFY_CTX_MAGIC(nss_ctx);
 
@@ -229,7 +226,7 @@
 	/*
 	 * Kick the NSS awake so it can process our new entry.
 	 */
-	nss_hal_send_interrupt(nss_ctx->nmap, int_bit, NSS_REGS_H2N_INTR_STATUS_DATA_COMMAND_QUEUE);
+	nss_hal_send_interrupt(nss_ctx, NSS_H2N_INTR_DATA_COMMAND_QUEUE);
 
 	NSS_PKT_STATS_INCREMENT(nss_ctx, &nss_ctx->nss_top->stats_drv[NSS_STATS_DRV_TX_PACKET]);