Merge "[qca-ssdk] Add more conditons for HNAT acceleration"
diff --git a/app/nathelper/linux/lib/nat_helper_dt.c b/app/nathelper/linux/lib/nat_helper_dt.c
index 77f87e3..a815b23 100755
--- a/app/nathelper/linux/lib/nat_helper_dt.c
+++ b/app/nathelper/linux/lib/nat_helper_dt.c
@@ -552,10 +552,17 @@
if((cct != NULL) && (napt_hw_get_by_index(&napt, hw_index) == 0))
{
spin_lock_bh(&ct->lock);
- atomic64_add(napt.egress_packet, &cct[IP_CT_DIR_ORIGINAL].packets);
- atomic64_add(napt.egress_byte, &cct[IP_CT_DIR_ORIGINAL].bytes);
- atomic64_add(napt.ingress_packet, &cct[IP_CT_DIR_REPLY].packets);
- atomic64_add(napt.ingress_byte, &cct[IP_CT_DIR_REPLY].bytes);
+ if ((ct->status & IPS_NAT_MASK) == IPS_SRC_NAT) {
+ atomic64_add(napt.egress_packet, &cct[IP_CT_DIR_ORIGINAL].packets);
+ atomic64_add(napt.egress_byte, &cct[IP_CT_DIR_ORIGINAL].bytes);
+ atomic64_add(napt.ingress_packet, &cct[IP_CT_DIR_REPLY].packets);
+ atomic64_add(napt.ingress_byte, &cct[IP_CT_DIR_REPLY].bytes);
+ } else {
+ atomic64_add(napt.ingress_packet, &cct[IP_CT_DIR_ORIGINAL].packets);
+ atomic64_add(napt.ingress_byte, &cct[IP_CT_DIR_ORIGINAL].bytes);
+ atomic64_add(napt.egress_packet, &cct[IP_CT_DIR_REPLY].packets);
+ atomic64_add(napt.egress_byte, &cct[IP_CT_DIR_REPLY].bytes);
+ }
spin_unlock_bh(&ct->lock);
HNAT_PRINTK("original packets:0x%llx bytes:0x%llx\n",
cct[IP_CT_DIR_ORIGINAL].packets, cct[IP_CT_DIR_ORIGINAL].bytes);
diff --git a/app/nathelper/linux/lib/nat_helper_hsl.c b/app/nathelper/linux/lib/nat_helper_hsl.c
index d8d63a2..1982036 100755
--- a/app/nathelper/linux/lib/nat_helper_hsl.c
+++ b/app/nathelper/linux/lib/nat_helper_hsl.c
@@ -39,14 +39,25 @@
#define DESS_CHIP(ver) ((((ver)&0xffff)>>8) == 0x14)
-static a_uint8_t
-hw_debug_counter_get(void)
-{
- static a_uint32_t debug_counter = 0;
+#define ARP_HW_COUNTER_OFFSET 8
- return ((debug_counter++) & 0x7);
+static a_uint8_t
+nat_hw_debug_counter_get(void)
+{
+ static a_uint32_t nat_debug_counter = 0;
+
+ return ((nat_debug_counter++) & 0x7);
}
+static a_uint8_t
+arp_hw_debug_counter_get(void)
+{
+ static a_uint32_t ip_debug_counter = 0;
+
+ return ((ip_debug_counter++) & 0x7) + ARP_HW_COUNTER_OFFSET;
+}
+
+
a_int32_t
nat_hw_add(nat_entry_t *nat)
{
@@ -58,7 +69,7 @@
hw_nat.port_num = nat->port_num;
hw_nat.port_range = nat->port_range;
hw_nat.counter_en = 1;
- hw_nat.counter_id = hw_debug_counter_get();
+ hw_nat.counter_id = nat_hw_debug_counter_get();
if(NAT_ADD(0, &hw_nat) != 0)
{
@@ -466,7 +477,7 @@
}
else
{
- arp_entry.counter_id = hw_debug_counter_get();
+ arp_entry.counter_id = arp_hw_debug_counter_get();
}
if(_arp_hw_add(&arp_entry) != 0)
@@ -678,7 +689,7 @@
fal_napt.flags |= FAL_NAT_ENTRY_TRANS_IPADDR_INDEX;
fal_napt.counter_en = 1;
- fal_napt.counter_id = hw_debug_counter_get();
+ fal_napt.counter_id = nat_hw_debug_counter_get();
fal_napt.action = FAL_MAC_FRWRD;
ret = NAPT_ADD(0, &fal_napt);
diff --git a/include/fal/fal_port_ctrl.h b/include/fal/fal_port_ctrl.h
index effaaf4..7ff25ed 100755
--- a/include/fal/fal_port_ctrl.h
+++ b/include/fal/fal_port_ctrl.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2012, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2012, 2015, The Linux Foundation. All rights reserved.
* Permission to use, copy, modify, and/or distribute this software for
* any purpose with or without fee is hereby granted, provided that the
* above copyright notice and this permission notice appear in all copies.
@@ -12,7 +12,6 @@
* OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
-
/**
* @defgroup fal_port_ctrl FAL_PORT_CONTROL
* @{
@@ -27,30 +26,27 @@
#include "common/sw.h"
#include "fal/fal_type.h"
- typedef enum {
- FAL_HALF_DUPLEX = 0,
- FAL_FULL_DUPLEX,
- FAL_DUPLEX_BUTT = 0xffff
- }
- fal_port_duplex_t;
+ typedef enum {
+ FAL_HALF_DUPLEX = 0,
+ FAL_FULL_DUPLEX,
+ FAL_DUPLEX_BUTT = 0xffff
+ } fal_port_duplex_t;
- typedef enum
- {
- FAL_SPEED_10 = 10,
- FAL_SPEED_100 = 100,
- FAL_SPEED_1000 = 1000,
- FAL_SPEED_10000 = 10000,
- FAL_SPEED_BUTT = 0xffff,
- } fal_port_speed_t;
+ typedef enum {
+ FAL_SPEED_10 = 10,
+ FAL_SPEED_100 = 100,
+ FAL_SPEED_1000 = 1000,
+ FAL_SPEED_10000 = 10000,
+ FAL_SPEED_BUTT = 0xffff,
+ } fal_port_speed_t;
- typedef enum
- {
- FAL_CABLE_STATUS_NORMAL = 0,
- FAL_CABLE_STATUS_SHORT = 1,
- FAL_CABLE_STATUS_OPENED = 2,
- FAL_CABLE_STATUS_INVALID = 3,
- FAL_CABLE_STATUS_BUTT = 0xffff,
- } fal_cable_status_t;
+ typedef enum {
+ FAL_CABLE_STATUS_NORMAL = 0,
+ FAL_CABLE_STATUS_SHORT = 1,
+ FAL_CABLE_STATUS_OPENED = 2,
+ FAL_CABLE_STATUS_INVALID = 3,
+ FAL_CABLE_STATUS_BUTT = 0xffff,
+ } fal_cable_status_t;
#define FAL_ENABLE 1
#define FAL_DISABLE 0
@@ -62,6 +58,9 @@
#define FAL_PHY_ADV_100TX_FD 0x08
//#define FAL_PHY_ADV_1000T_HD 0x100
#define FAL_PHY_ADV_1000T_FD 0x200
+#define FAL_PHY_ADV_1000BX_HD 0x400
+#define FAL_PHY_ADV_1000BX_FD 0x800
+
#define FAL_PHY_ADV_FE_SPEED_ALL \
(FAL_PHY_ADV_10T_HD | FAL_PHY_ADV_10T_FD | FAL_PHY_ADV_100TX_HD |\
FAL_PHY_ADV_100TX_FD)
@@ -70,6 +69,9 @@
(FAL_PHY_ADV_10T_HD | FAL_PHY_ADV_10T_FD | FAL_PHY_ADV_100TX_HD |\
FAL_PHY_ADV_100TX_FD | FAL_PHY_ADV_1000T_FD)
+#define FAL_PHY_ADV_BX_SPEED_ALL \
+ (FAL_PHY_ADV_1000BX_HD | FAL_PHY_ADV_1000BX_FD)
+
#define FAL_PHY_ADV_PAUSE 0x10
#define FAL_PHY_ADV_ASY_PAUSE 0x20
#define FAL_PHY_FE_ADV_ALL \
@@ -104,238 +106,342 @@
#define FAL_PHY_INTR_DUPLEX_CHANGE 0x2
#define FAL_PHY_INTR_STATUS_UP_CHANGE 0x4
#define FAL_PHY_INTR_STATUS_DOWN_CHANGE 0x8
+#define FAL_PHY_INTR_BX_FX_STATUS_UP_CHANGE 0x40
+#define FAL_PHY_INTR_BX_FX_STATUS_DOWN_CHANGE 0x80
- typedef enum
- {
- FAL_NO_HEADER_EN = 0,
- FAL_ONLY_MANAGE_FRAME_EN,
- FAL_ALL_TYPE_FRAME_EN
- } fal_port_header_mode_t;
+ typedef enum {
+ FAL_NO_HEADER_EN = 0,
+ FAL_ONLY_MANAGE_FRAME_EN,
+ FAL_ALL_TYPE_FRAME_EN
+ } fal_port_header_mode_t;
- typedef struct
- {
- a_uint16_t pair_a_status;
- a_uint16_t pair_b_status;
- a_uint16_t pair_c_status;
- a_uint16_t pair_d_status;
- a_uint32_t pair_a_len;
- a_uint32_t pair_b_len;
- a_uint32_t pair_c_len;
- a_uint32_t pair_d_len;
- } fal_port_cdt_t;
+ typedef struct {
+ a_uint16_t pair_a_status;
+ a_uint16_t pair_b_status;
+ a_uint16_t pair_c_status;
+ a_uint16_t pair_d_status;
+ a_uint32_t pair_a_len;
+ a_uint32_t pair_b_len;
+ a_uint32_t pair_c_len;
+ a_uint32_t pair_d_len;
+ } fal_port_cdt_t;
- sw_error_t
- fal_port_duplex_set(a_uint32_t dev_id, fal_port_t port_id,
- fal_port_duplex_t duplex);
+/*below is new add for malibu phy*/
+/** Phy mdix mode */
+ typedef enum {
+ PHY_MDIX_AUTO = 0,
+ /**< Auto MDI/MDIX */
+ PHY_MDIX_MDI = 1,
+ /**< Fixed MDI */
+ PHY_MDIX_MDIX = 2
+ /**< Fixed MDIX */
+ } fal_port_mdix_mode_t;
+/** Phy mdix status */
+ typedef enum {
+ PHY_MDIX_STATUS_MDI = 0,
+ /**< Fixed MDI */
+ PHY_MDIX_STATUS_MDIX = 1
+ /**< Fixed MDIX */
+ } fal_port_mdix_status_t;
- sw_error_t
- fal_port_duplex_get(a_uint32_t dev_id, fal_port_t port_id,
- fal_port_duplex_t * pduplex);
+/** Phy master mode */
+ typedef enum {
+ PHY_MASTER_MASTER = 0,
+ /**< Phy manual MASTER configuration */
+ PHY_MASTER_SLAVE = 1,
+ /**< Phy manual SLAVE configuration */
+ PHY_MASTER_AUTO = 2
+ /**< Phy automatic MASTER/SLAVE configuration */
+ } fal_port_master_t;
+/** Phy preferred medium type */
+ typedef enum {
+ PHY_MEDIUM_COPPER = 0,
+ /**< Copper */
+ PHY_MEDIUM_FIBER = 1,
+ /**< Fiber */
+ } fal_port_medium_t;
- sw_error_t
- fal_port_speed_set(a_uint32_t dev_id, fal_port_t port_id,
- fal_port_speed_t speed);
+/** Phy pages */
+ typedef enum {
+ PHY_SGBX_PAGES = 0,
+ /**< sgbx pages */
+ PHY_COPPER_PAGES = 1
+ /**< copper pages */
+ } fal_port_reg_pages_t;
+/** Phy preferred Fiber mode */
+ typedef enum {
+ PHY_FIBER_100FX = 0,
+ /**< 100FX fiber mode */
+ PHY_FIBER_1000BX = 1,
+ /**< 1000BX fiber mode */
+ } fal_port_fiber_mode_t;
- sw_error_t
- fal_port_speed_get(a_uint32_t dev_id, fal_port_t port_id,
- fal_port_speed_t * pspeed);
+/** Phy reset status */
+ typedef enum {
+ PHY_RESET_DONE = 0,
+ /**< Phy reset done */
+ PHY_RESET_BUSY = 1
+ /**< Phy still in reset process */
+ } fal_port_reset_status_t;
+/** Phy auto-negotiation status */
+ typedef enum {
+ PHY_AUTO_NEG_STATUS_BUSY = 0,
+ /**< Phy still in auto-negotiation process */
+ PHY_AUTO_NEG_STATUS_DONE = 1
+ /**< Phy auto-negotiation done */
+ } fal_port_auto_neg_status_t;
+/*above is new add for malibu phy*/
- sw_error_t
- fal_port_autoneg_status_get(a_uint32_t dev_id, fal_port_t port_id,
- a_bool_t * status);
+ sw_error_t
+ fal_port_duplex_set(a_uint32_t dev_id, fal_port_t port_id,
+ fal_port_duplex_t duplex);
+ sw_error_t
+ fal_port_duplex_get(a_uint32_t dev_id, fal_port_t port_id,
+ fal_port_duplex_t * pduplex);
+ sw_error_t
+ fal_port_speed_set(a_uint32_t dev_id, fal_port_t port_id,
+ fal_port_speed_t speed);
- sw_error_t
- fal_port_autoneg_enable(a_uint32_t dev_id, fal_port_t port_id);
+ sw_error_t
+ fal_port_speed_get(a_uint32_t dev_id, fal_port_t port_id,
+ fal_port_speed_t * pspeed);
+ sw_error_t
+ fal_port_autoneg_status_get(a_uint32_t dev_id, fal_port_t port_id,
+ a_bool_t * status);
+ sw_error_t
+ fal_port_autoneg_enable(a_uint32_t dev_id, fal_port_t port_id);
- sw_error_t
- fal_port_autoneg_restart(a_uint32_t dev_id, fal_port_t port_id);
+ sw_error_t
+ fal_port_autoneg_restart(a_uint32_t dev_id, fal_port_t port_id);
+ sw_error_t
+ fal_port_autoneg_adv_set(a_uint32_t dev_id, fal_port_t port_id,
+ a_uint32_t autoadv);
+ sw_error_t
+ fal_port_autoneg_adv_get(a_uint32_t dev_id, fal_port_t port_id,
+ a_uint32_t * autoadv);
- sw_error_t
- fal_port_autoneg_adv_set(a_uint32_t dev_id, fal_port_t port_id,
- a_uint32_t autoadv);
+ sw_error_t
+ fal_port_hdr_status_set(a_uint32_t dev_id, fal_port_t port_id,
+ a_bool_t enable);
+ sw_error_t
+ fal_port_hdr_status_get(a_uint32_t dev_id, fal_port_t port_id,
+ a_bool_t * enable);
+ sw_error_t
+ fal_port_flowctrl_set(a_uint32_t dev_id, fal_port_t port_id,
+ a_bool_t enable);
- sw_error_t
- fal_port_autoneg_adv_get(a_uint32_t dev_id, fal_port_t port_id,
- a_uint32_t * autoadv);
+ sw_error_t
+ fal_port_flowctrl_get(a_uint32_t dev_id, fal_port_t port_id,
+ a_bool_t * enable);
+ sw_error_t
+ fal_port_flowctrl_forcemode_set(a_uint32_t dev_id,
+ fal_port_t port_id,
+ a_bool_t enable);
+ sw_error_t
+ fal_port_flowctrl_forcemode_get(a_uint32_t dev_id,
+ fal_port_t port_id,
+ a_bool_t * enable);
- sw_error_t
- fal_port_hdr_status_set(a_uint32_t dev_id, fal_port_t port_id,
- a_bool_t enable);
+ sw_error_t
+ fal_port_powersave_set(a_uint32_t dev_id, fal_port_t port_id,
+ a_bool_t enable);
+ sw_error_t
+ fal_port_powersave_get(a_uint32_t dev_id, fal_port_t port_id,
+ a_bool_t * enable);
+ sw_error_t
+ fal_port_hibernate_set(a_uint32_t dev_id, fal_port_t port_id,
+ a_bool_t enable);
- sw_error_t
- fal_port_hdr_status_get(a_uint32_t dev_id, fal_port_t port_id,
- a_bool_t * enable);
+ sw_error_t
+ fal_port_hibernate_get(a_uint32_t dev_id, fal_port_t port_id,
+ a_bool_t * enable);
+ sw_error_t
+ fal_port_cdt(a_uint32_t dev_id, fal_port_t port_id,
+ a_uint32_t mdi_pair, fal_cable_status_t * cable_status,
+ a_uint32_t * cable_len);
+ sw_error_t
+ fal_port_rxhdr_mode_set(a_uint32_t dev_id, fal_port_t port_id,
+ fal_port_header_mode_t mode);
- sw_error_t
- fal_port_flowctrl_set(a_uint32_t dev_id, fal_port_t port_id, a_bool_t enable);
+ sw_error_t
+ fal_port_rxhdr_mode_get(a_uint32_t dev_id, fal_port_t port_id,
+ fal_port_header_mode_t * mode);
+ sw_error_t
+ fal_port_txhdr_mode_set(a_uint32_t dev_id, fal_port_t port_id,
+ fal_port_header_mode_t mode);
+ sw_error_t
+ fal_port_txhdr_mode_get(a_uint32_t dev_id, fal_port_t port_id,
+ fal_port_header_mode_t * mode);
- sw_error_t
- fal_port_flowctrl_get(a_uint32_t dev_id, fal_port_t port_id, a_bool_t *enable);
+ sw_error_t
+ fal_header_type_set(a_uint32_t dev_id, a_bool_t enable,
+ a_uint32_t type);
+ sw_error_t
+ fal_header_type_get(a_uint32_t dev_id, a_bool_t * enable,
+ a_uint32_t * type);
- sw_error_t
- fal_port_flowctrl_forcemode_set(a_uint32_t dev_id, fal_port_t port_id,
- a_bool_t enable);
-
-
- sw_error_t
- fal_port_flowctrl_forcemode_get(a_uint32_t dev_id, fal_port_t port_id,
- a_bool_t * enable);
-
-
- sw_error_t
- fal_port_powersave_set(a_uint32_t dev_id, fal_port_t port_id, a_bool_t enable);
-
-
- sw_error_t
- fal_port_powersave_get(a_uint32_t dev_id, fal_port_t port_id, a_bool_t *enable);
-
-
- sw_error_t
- fal_port_hibernate_set(a_uint32_t dev_id, fal_port_t port_id, a_bool_t enable);
-
-
- sw_error_t
- fal_port_hibernate_get(a_uint32_t dev_id, fal_port_t port_id, a_bool_t *enable);
-
-
- sw_error_t
- fal_port_cdt(a_uint32_t dev_id, fal_port_t port_id, a_uint32_t mdi_pair,
- fal_cable_status_t *cable_status, a_uint32_t *cable_len);
-
-
- sw_error_t
- fal_port_rxhdr_mode_set(a_uint32_t dev_id, fal_port_t port_id,
- fal_port_header_mode_t mode);
-
-
- sw_error_t
- fal_port_rxhdr_mode_get(a_uint32_t dev_id, fal_port_t port_id,
- fal_port_header_mode_t * mode);
-
-
- sw_error_t
- fal_port_txhdr_mode_set(a_uint32_t dev_id, fal_port_t port_id,
- fal_port_header_mode_t mode);
-
-
- sw_error_t
- fal_port_txhdr_mode_get(a_uint32_t dev_id, fal_port_t port_id,
- fal_port_header_mode_t * mode);
-
-
- sw_error_t
- fal_header_type_set(a_uint32_t dev_id, a_bool_t enable, a_uint32_t type);
-
-
- sw_error_t
- fal_header_type_get(a_uint32_t dev_id, a_bool_t * enable, a_uint32_t * type);
-
-
- sw_error_t
- fal_port_txmac_status_set(a_uint32_t dev_id, fal_port_t port_id, a_bool_t enable);
-
-
- sw_error_t
- fal_port_txmac_status_get(a_uint32_t dev_id, fal_port_t port_id, a_bool_t * enable);
-
-
- sw_error_t
- fal_port_rxmac_status_set(a_uint32_t dev_id, fal_port_t port_id, a_bool_t enable);
-
-
- sw_error_t
- fal_port_rxmac_status_get(a_uint32_t dev_id, fal_port_t port_id, a_bool_t * enable);
-
-
- sw_error_t
- fal_port_txfc_status_set(a_uint32_t dev_id, fal_port_t port_id, a_bool_t enable);
-
-
- sw_error_t
- fal_port_txfc_status_get(a_uint32_t dev_id, fal_port_t port_id, a_bool_t * enable);
+ sw_error_t
+ fal_port_txmac_status_set(a_uint32_t dev_id, fal_port_t port_id,
+ a_bool_t enable);
+ sw_error_t
+ fal_port_txmac_status_get(a_uint32_t dev_id, fal_port_t port_id,
+ a_bool_t * enable);
- sw_error_t
- fal_port_rxfc_status_set(a_uint32_t dev_id, fal_port_t port_id, a_bool_t enable);
+ sw_error_t
+ fal_port_rxmac_status_set(a_uint32_t dev_id, fal_port_t port_id,
+ a_bool_t enable);
+ sw_error_t
+ fal_port_rxmac_status_get(a_uint32_t dev_id, fal_port_t port_id,
+ a_bool_t * enable);
- sw_error_t
- fal_port_rxfc_status_get(a_uint32_t dev_id, fal_port_t port_id, a_bool_t * enable);
+ sw_error_t
+ fal_port_txfc_status_set(a_uint32_t dev_id, fal_port_t port_id,
+ a_bool_t enable);
+ sw_error_t
+ fal_port_txfc_status_get(a_uint32_t dev_id, fal_port_t port_id,
+ a_bool_t * enable);
- sw_error_t
- fal_port_bp_status_set(a_uint32_t dev_id, fal_port_t port_id, a_bool_t enable);
+ sw_error_t
+ fal_port_rxfc_status_set(a_uint32_t dev_id, fal_port_t port_id,
+ a_bool_t enable);
+ sw_error_t
+ fal_port_rxfc_status_get(a_uint32_t dev_id, fal_port_t port_id,
+ a_bool_t * enable);
- sw_error_t
- fal_port_bp_status_get(a_uint32_t dev_id, fal_port_t port_id, a_bool_t * enable);
+ sw_error_t
+ fal_port_bp_status_set(a_uint32_t dev_id, fal_port_t port_id,
+ a_bool_t enable);
+ sw_error_t
+ fal_port_bp_status_get(a_uint32_t dev_id, fal_port_t port_id,
+ a_bool_t * enable);
- sw_error_t
- fal_port_link_forcemode_set(a_uint32_t dev_id, fal_port_t port_id, a_bool_t enable);
+ sw_error_t
+ fal_port_link_forcemode_set(a_uint32_t dev_id, fal_port_t port_id,
+ a_bool_t enable);
+ sw_error_t
+ fal_port_link_forcemode_get(a_uint32_t dev_id, fal_port_t port_id,
+ a_bool_t * enable);
- sw_error_t
- fal_port_link_forcemode_get(a_uint32_t dev_id, fal_port_t port_id, a_bool_t * enable);
+ sw_error_t
+ fal_port_link_status_get(a_uint32_t dev_id, fal_port_t port_id,
+ a_bool_t * status);
+ sw_error_t
+ fal_ports_link_status_get(a_uint32_t dev_id, a_uint32_t * status);
- sw_error_t
- fal_port_link_status_get(a_uint32_t dev_id, fal_port_t port_id, a_bool_t * status);
+ sw_error_t
+ fal_port_mac_loopback_set(a_uint32_t dev_id, fal_port_t port_id,
+ a_bool_t enable);
- sw_error_t
- fal_ports_link_status_get(a_uint32_t dev_id, a_uint32_t * status);
+ sw_error_t
+ fal_port_mac_loopback_get(a_uint32_t dev_id, fal_port_t port_id,
+ a_bool_t * enable);
- sw_error_t
- fal_port_mac_loopback_set(a_uint32_t dev_id, fal_port_t port_id, a_bool_t enable);
+ sw_error_t
+ fal_port_congestion_drop_set(a_uint32_t dev_id, fal_port_t port_id,
+ a_uint32_t queue_id, a_bool_t enable);
+ sw_error_t
+ fal_port_congestion_drop_get(a_uint32_t dev_id, fal_port_t port_id,
+ a_uint32_t queue_id,
+ a_bool_t * enable);
- sw_error_t
- fal_port_mac_loopback_get(a_uint32_t dev_id, fal_port_t port_id, a_bool_t * enable);
+ sw_error_t
+ fal_ring_flow_ctrl_thres_set(a_uint32_t dev_id, a_uint32_t ring_id,
+ a_uint8_t on_thres,
+ a_uint8_t off_thres);
- sw_error_t
- fal_port_congestion_drop_set(a_uint32_t dev_id, fal_port_t port_id, a_uint32_t queue_id, a_bool_t enable);
+ sw_error_t
+ fal_ring_flow_ctrl_thres_get(a_uint32_t dev_id, a_uint32_t ring_id,
+ a_uint8_t * on_thres,
+ a_uint8_t * off_thres);
+ sw_error_t
+ fal_port_8023az_set(a_uint32_t dev_id, fal_port_t port_id,
+ a_bool_t enable);
- sw_error_t
- fal_port_congestion_drop_get(a_uint32_t dev_id, fal_port_t port_id, a_uint32_t queue_id, a_bool_t * enable);
+ sw_error_t
+ fal_port_8023az_get(a_uint32_t dev_id, fal_port_t port_id,
+ a_bool_t * enable);
- sw_error_t
- fal_ring_flow_ctrl_thres_set(a_uint32_t dev_id, a_uint32_t ring_id, a_uint8_t on_thres, a_uint8_t off_thres);
+ sw_error_t
+ fal_port_mdix_set(a_uint32_t dev_id, fal_port_t port_id,
+ fal_port_mdix_mode_t mode);
+ sw_error_t
+ fal_port_mdix_get(a_uint32_t dev_id, fal_port_t port_id,
+ fal_port_mdix_mode_t * mode);
+ sw_error_t
+ fal_port_mdix_status_get(a_uint32_t dev_id, fal_port_t port_id,
+ fal_port_mdix_status_t * mode);
+ sw_error_t
+ fal_port_combo_prefer_medium_set(a_uint32_t dev_id,
+ a_uint32_t port_id,
+ fal_port_medium_t medium);
+ sw_error_t fal_port_combo_prefer_medium_get(a_uint32_t dev_id,
+ a_uint32_t port_id,
+ fal_port_medium_t *
+ medium);
+ sw_error_t fal_port_combo_medium_status_get(a_uint32_t dev_id,
+ a_uint32_t port_id,
+ fal_port_medium_t *
+ medium);
+ sw_error_t fal_port_combo_fiber_mode_set(a_uint32_t dev_id,
+ a_uint32_t port_id,
+ fal_port_fiber_mode_t mode);
+ sw_error_t fal_port_combo_fiber_mode_get(a_uint32_t dev_id,
+ a_uint32_t port_id,
+ fal_port_fiber_mode_t * mode);
+ sw_error_t fal_port_local_loopback_set(a_uint32_t dev_id,
+ fal_port_t port_id,
+ a_bool_t enable);
+ sw_error_t
+ fal_port_local_loopback_get(a_uint32_t dev_id, fal_port_t port_id,
+ a_bool_t * enable);
- sw_error_t
- fal_ring_flow_ctrl_thres_get(a_uint32_t dev_id, a_uint32_t ring_id, a_uint8_t *on_thres, a_uint8_t *off_thres);
+ sw_error_t
+ fal_port_remote_loopback_set(a_uint32_t dev_id, fal_port_t port_id,
+ a_bool_t enable);
+ sw_error_t
+ fal_port_remote_loopback_get(a_uint32_t dev_id, fal_port_t port_id,
+ a_bool_t * enable);
#ifdef __cplusplus
}
-#endif /* __cplusplus */
-#endif /* _FAL_PORTCTRL_H_ */
+#endif /* __cplusplus */
+#endif /* _FAL_PORTCTRL_H_ */
/**
* @}
*/
diff --git a/src/hsl/phy/Makefile b/src/hsl/phy/Makefile
index e69afdb..94ec929 100755
--- a/src/hsl/phy/Makefile
+++ b/src/hsl/phy/Makefile
@@ -28,7 +28,7 @@
endif
ifeq (ALL_CHIP, $(CHIP_TYPE))
- SRC_LIST = f1_phy.c f2_phy.c
+ SRC_LIST = f1_phy.c f2_phy.c hsl_phy.c
endif
ifeq (linux, $(OS))
diff --git a/src/sal/sd/linux/uk_interface/sw_api_ks_ioctl.c b/src/sal/sd/linux/uk_interface/sw_api_ks_ioctl.c
index ec783d2..74bf43a 100755
--- a/src/sal/sd/linux/uk_interface/sw_api_ks_ioctl.c
+++ b/src/sal/sd/linux/uk_interface/sw_api_ks_ioctl.c
@@ -148,6 +148,8 @@
pp = sw_api.api_pp;
nr_param = sw_api.api_nr;
+ /* Clean up cmd_buf */
+ aos_mem_set(cmd_buf, 0, SW_MAX_API_BUF);
rv = input_parser(pp, nr_param, args);
SW_OUT_ON_ERROR(rv);
func = fp->func;