[qca-ssdk] add access malibu phy interrupt enable and status register.
Add malibu phy interrupt status register access.
Change-Id: I5b0d45fb69ef76cc43de6c8036765c4fb96f82ca
Signed-off-by: esong <song@codeaurora.org>
diff --git a/include/hsl/phy/hsl_phy.h b/include/hsl/phy/hsl_phy.h
index 312a172..821884e 100755
--- a/include/hsl/phy/hsl_phy.h
+++ b/include/hsl/phy/hsl_phy.h
@@ -188,6 +188,16 @@
a_uint32_t phy_id,
fal_port_interface_mode_t
* interface_mode);
+ typedef sw_error_t(*hsl_phy_intr_mask_set) (a_uint32_t dev_id,
+ a_uint32_t phy_id,
+ a_uint32_t mask);
+ typedef sw_error_t(*hsl_phy_intr_mask_get) (a_uint32_t dev_id,
+ a_uint32_t phy_id,
+ a_uint32_t * mask);
+ typedef sw_error_t(*hsl_phy_intr_status_get) (a_uint32_t dev_id,
+ a_uint32_t phy_id,
+ a_uint32_t * status);
+
typedef struct hsl_phy_ops_s {
hsl_phy_init phy_init;
@@ -242,7 +252,9 @@
hsl_phy_interface_mode_set phy_interface_mode_set;
hsl_phy_interface_mode_get phy_interface_mode_get;
hsl_phy_interface_mode_status_get phy_interface_mode_status_get;
-
+ hsl_phy_intr_mask_set phy_intr_mask_set;
+ hsl_phy_intr_mask_get phy_intr_mask_get;
+ hsl_phy_intr_status_get phy_intr_status_get;
} hsl_phy_ops_t;
sw_error_t hsl_phy_api_ops_register(hsl_phy_ops_t * phy_api_ops);
diff --git a/src/hsl/dess/dess_misc.c b/src/hsl/dess/dess_misc.c
index 413e4fe..76b2916 100755
--- a/src/hsl/dess/dess_misc.c
+++ b/src/hsl/dess/dess_misc.c
@@ -23,7 +23,7 @@
#include "hsl_port_prop.h"
#include "dess_misc.h"
#include "dess_reg.h"
-#include "f1_phy.h"
+#include "hsl_phy.h"
#define DESS_MAX_FRMAE_SIZE 9216
@@ -1077,6 +1077,7 @@
{
sw_error_t rv;
a_uint32_t phy_id;
+ hsl_phy_ops_t *phy_drv;
HSL_DEV_ID_CHECK(dev_id);
@@ -1085,10 +1086,15 @@
return SW_BAD_PARAM;
}
+ SW_RTN_ON_NULL (phy_drv = hsl_phy_api_ops_get (dev_id));
+
+ if (NULL == phy_drv->phy_intr_mask_set)
+ return SW_NOT_SUPPORTED;
+
rv = hsl_port_prop_get_phyid(dev_id, port_id, &phy_id);
SW_RTN_ON_ERROR(rv);
- rv = f1_phy_intr_mask_set(dev_id, phy_id, intr_mask_flag);
+ rv = phy_drv->phy_intr_mask_set(dev_id, phy_id, intr_mask_flag);
return rv;
}
@@ -1097,6 +1103,7 @@
{
sw_error_t rv;
a_uint32_t phy_id;
+ hsl_phy_ops_t *phy_drv;
HSL_DEV_ID_CHECK(dev_id);
@@ -1105,10 +1112,16 @@
return SW_BAD_PARAM;
}
+ SW_RTN_ON_NULL (phy_drv = hsl_phy_api_ops_get (dev_id));
+
+ if (NULL == phy_drv->phy_intr_mask_get)
+ return SW_NOT_SUPPORTED;
+
rv = hsl_port_prop_get_phyid(dev_id, port_id, &phy_id);
SW_RTN_ON_ERROR(rv);
- rv = f1_phy_intr_mask_get(dev_id, phy_id, intr_mask_flag);
+ rv = phy_drv->phy_intr_mask_get(dev_id, phy_id, intr_mask_flag);
+
return rv;
}
@@ -1117,6 +1130,7 @@
{
sw_error_t rv;
a_uint32_t phy_id;
+ hsl_phy_ops_t *phy_drv;
HSL_DEV_ID_CHECK(dev_id);
@@ -1125,10 +1139,15 @@
return SW_BAD_PARAM;
}
+ SW_RTN_ON_NULL (phy_drv = hsl_phy_api_ops_get (dev_id));
+
+ if (NULL == phy_drv->phy_intr_status_get)
+ return SW_NOT_SUPPORTED;
+
rv = hsl_port_prop_get_phyid(dev_id, port_id, &phy_id);
SW_RTN_ON_ERROR(rv);
- rv = f1_phy_intr_status_get(dev_id, phy_id, intr_mask_flag);
+ rv = phy_drv->phy_intr_status_get(dev_id, phy_id, intr_mask_flag);
return rv;
}
diff --git a/src/hsl/phy/malibu_phy.c b/src/hsl/phy/malibu_phy.c
index 4ff394a..d7dea58 100755
--- a/src/hsl/phy/malibu_phy.c
+++ b/src/hsl/phy/malibu_phy.c
@@ -2291,8 +2291,9 @@
malibu_phy_api_ops.phy_interface_mode_set = malibu_phy_interface_set_mode;
malibu_phy_api_ops.phy_interface_mode_get = malibu_phy_interface_get_mode;
malibu_phy_api_ops.phy_interface_mode_status_get = malibu_phy_interface_get_mode_status;
-
-
+ malibu_phy_api_ops.phy_intr_mask_set = malibu_phy_intr_mask_set;
+ malibu_phy_api_ops.phy_intr_mask_get = malibu_phy_intr_mask_get;
+ malibu_phy_api_ops.phy_intr_status_get = malibu_phy_intr_status_get;
ret = hsl_phy_api_ops_register(&malibu_phy_api_ops);
malibu_phy_hw_init();