Merge "[qca-ssdk]: return success if no switch chip on board"
diff --git a/include/ref/ref_fdb.h b/include/ref/ref_fdb.h
index d0172c9..0087207 100755
--- a/include/ref/ref_fdb.h
+++ b/include/ref/ref_fdb.h
@@ -21,7 +21,9 @@
int
-qca_ar8327_sw_atu_flush(struct qca_phy_priv *priv);
+ qca_ar8327_sw_atu_flush(struct switch_dev *dev,
+ const struct switch_attr *attr,
+ struct switch_val *val);
int
qca_ar8327_sw_atu_dump(struct switch_dev *dev,
diff --git a/src/hsl/dess/dess_acl.c b/src/hsl/dess/dess_acl.c
index 5690823..9591640 100755
--- a/src/hsl/dess/dess_acl.c
+++ b/src/hsl/dess/dess_acl.c
@@ -165,6 +165,7 @@
filter.msk[4] |= (flag & 0x7);
_dess_filter_down_to_hw(dev_id, &filter, flt_idx);
+ return SW_OK;
#else
sw_error_t rv;
a_uint32_t addr, data = 0;
@@ -261,6 +262,8 @@
#endif
}
+#ifndef DESS_SW_ENTRY
+#ifndef DESS_HW_ENTRY
static sw_error_t
_dess_filter_write(a_uint32_t dev_id, a_uint32_t reg[], a_uint32_t flt_idx,
a_uint32_t op)
@@ -319,6 +322,8 @@
return SW_OK;
}
+#endif
+#endif
static sw_error_t
_dess_filter_down_to_hw(a_uint32_t dev_id, hw_filter_t * filter,
diff --git a/src/hsl/dess/dess_multicast_acl.c b/src/hsl/dess/dess_multicast_acl.c
index 0b2ba17..d2d5865 100755
--- a/src/hsl/dess/dess_multicast_acl.c
+++ b/src/hsl/dess/dess_multicast_acl.c
@@ -261,7 +261,7 @@
a_uint32_t i, base, addr;
a_uint32_t dev_id=0;
a_uint32_t msk_valid=0;
- sw_error_t rv;
+ sw_error_t rv = SW_OK;
/* 2'b00:start; 2'b01:continue; 2'b10:end; 2'b11:start&end*/
for(i=pos; i<pos+4; i++)
@@ -316,7 +316,7 @@
act[1] |= (pm&0x7)<<29; //the low 3 bits of pm means redirect port 0,1,2
/* New modification: update acl ACTION register from DENY to redirect */
- if((act[2]>>6)&0x7 == 0x7 ) //DENY mode
+ if (((act[2]>>6)&0x7) == 0x7) //DENY mode
{
if(pm)
{
@@ -324,7 +324,7 @@
act[2] |= (0x1<<4); //DES_PORT_EN set 1, enable
}
}
- else if((act[2]>>4)&0x1 == 0x1) //redirect mode
+ else if (((act[2]>>4)&0x1) == 0x1) //redirect mode
{
if(pm==0)
{
@@ -399,6 +399,7 @@
else
continue;
}
+ return 0;
}
/*
** Only update the related portmap from the privious input.
@@ -409,7 +410,7 @@
//a_uint32_t list_pos;
a_uint32_t rule_pos;
a_uint32_t list_pri;
- sw_error_t rv;
+ sw_error_t rv = SW_OK;
//if(entry->port_map < 1 || acl_index<0)
if(acl_index<0)
@@ -473,6 +474,7 @@
rv = ACL_RULE_DEL(0, list_id, rule_id, 1);
multi_acl_bind(); //Here need extra bind since IGMP join/leave would happen
+ return rv;
}
/*
@@ -700,17 +702,15 @@
return 2; //Normal update
}
- ;
+ return 0;
}
sw_error_t dess_igmp_sg_entry_set(a_uint32_t dev_id, fal_igmp_sg_entry_t * entry)
{
HSL_API_LOCK;
int number, count;
int new_index=0;
- int tmp_index=0;
sw_error_t rv;
int action = MULT_ACTION_SET;
- fal_igmp_sg_entry_t tmp_entry[1]= {};
int i=0;
(void)dess_multicast_init(0);
diff --git a/src/hsl/dess/dess_nat.c b/src/hsl/dess/dess_nat.c
index 1630530..e28c1d3 100755
--- a/src/hsl/dess/dess_nat.c
+++ b/src/hsl/dess/dess_nat.c
@@ -3215,7 +3215,7 @@
HSL_LOCAL sw_error_t
dess_nat_global_set(a_uint32_t dev_id, a_bool_t enable)
{
- sw_error_t rv;
+ sw_error_t rv = SW_OK;
HSL_API_LOCK;
printk("enable:%d\n", enable);
diff --git a/src/hsl/dess/dess_portvlan.c b/src/hsl/dess/dess_portvlan.c
index 75dbc66..58a69bd 100755
--- a/src/hsl/dess/dess_portvlan.c
+++ b/src/hsl/dess/dess_portvlan.c
@@ -2138,7 +2138,7 @@
HSL_API_UNLOCK;
return rv;
}
-
+#if 0
HSL_LOCAL sw_error_t
dess_port_route_defv_set(a_uint32_t dev_id, fal_port_t port_id)
{
@@ -2149,7 +2149,7 @@
HSL_API_UNLOCK;
return rv;
}
-
+#endif
/**
* @brief Set NET_ISOLATE_EN
* @param[in] dev_id device id
diff --git a/src/hsl/dess/dess_reg_access.c b/src/hsl/dess/dess_reg_access.c
index e13c9ef..73b2204 100755
--- a/src/hsl/dess/dess_reg_access.c
+++ b/src/hsl/dess/dess_reg_access.c
@@ -45,15 +45,22 @@
static a_uint32_t mdio_base_addr = 0xffffffff;
#endif
+uint32_t qca_ar8216_mii_read(int reg);
+void qca_ar8216_mii_write(int reg, uint32_t val);
+
static sw_error_t
_dess_mdio_reg_get(a_uint32_t dev_id, a_uint32_t reg_addr,
a_uint8_t value[], a_uint32_t value_len)
{
- a_uint32_t reg_word_addr;
- a_uint32_t phy_addr, reg_val;
- a_uint16_t phy_val, tmp_val;
- a_uint8_t phy_reg;
- sw_error_t rv;
+#if 0
+ a_uint32_t reg_word_addr;
+ a_uint32_t phy_addr, reg_val;
+ a_uint16_t phy_val, tmp_val;
+ a_uint8_t phy_reg;
+ sw_error_t rv;
+#else
+ a_uint32_t reg_val;
+#endif
if (value_len != sizeof (a_uint32_t))
return SW_BAD_LEN;
@@ -109,11 +116,16 @@
_dess_mdio_reg_set(a_uint32_t dev_id, a_uint32_t reg_addr, a_uint8_t value[],
a_uint32_t value_len)
{
- a_uint32_t reg_word_addr;
- a_uint32_t phy_addr, reg_val;
- a_uint16_t phy_val;
- a_uint8_t phy_reg;
- sw_error_t rv;
+#if 0
+ a_uint32_t reg_word_addr;
+ a_uint32_t phy_addr, reg_val;
+ a_uint16_t phy_val;
+ a_uint8_t phy_reg;
+ sw_error_t rv;
+#else
+ a_uint32_t reg_val;
+#endif
+
if (value_len != sizeof (a_uint32_t))
return SW_BAD_LEN;
@@ -195,7 +207,6 @@
a_uint32_t value_len)
{
sw_error_t rv;
- unsigned long flags;
MDIO_LOCKER_LOCK;
if (HSL_MDIO == reg_mode)
@@ -216,6 +227,7 @@
a_uint32_t value_len)
{
sw_error_t rv;
+#if 0
unsigned long flags;
struct file *filp;
@@ -224,10 +236,13 @@
a_uint32_t write_flag = 0;
char s[20]= {0};
a_uint32_t tmp_val = *((a_uint32_t *) value);
+#else
+ a_uint32_t rt_value = 0;
+#endif
/*get MODULE_EN reg rsv */
SW_RTN_ON_ERROR(dess_reg_get(dev_id, 0x30,(void *)&rt_value,4));
- write_flag = (rt_value>>15) & 0x1;
+// write_flag = (rt_value>>15) & 0x1;
MDIO_LOCKER_LOCK;
if (HSL_MDIO == reg_mode)
diff --git a/src/hsl/isis/isis_multicast_acl.c b/src/hsl/isis/isis_multicast_acl.c
index 4f5d92c..e67d88f 100755
--- a/src/hsl/isis/isis_multicast_acl.c
+++ b/src/hsl/isis/isis_multicast_acl.c
@@ -251,7 +251,7 @@
a_uint32_t i, base, addr;
a_uint32_t dev_id=0;
a_uint32_t msk_valid=0;
- sw_error_t rv;
+ sw_error_t rv = SW_OK;
/* 2'b00:start; 2'b01:continue; 2'b10:end; 2'b11:start&end*/
for(i=pos; i<pos+4; i++)
@@ -306,7 +306,7 @@
act[1] |= (pm&0x7)<<29; //the low 3 bits of pm means redirect port 0,1,2
/* New modification: update acl ACTION register from DENY to redirect */
- if((act[2]>>6)&0x7 == 0x7 ) //DENY mode
+ if (((act[2]>>6)&0x7) == 0x7) //DENY mode
{
if(pm)
{
@@ -314,7 +314,7 @@
act[2] |= (0x1<<4); //DES_PORT_EN set 1, enable
}
}
- else if((act[2]>>4)&0x1 == 0x1) //redirect mode
+ else if (((act[2]>>4)&0x1) == 0x1) //redirect mode
{
if(pm==0)
{
@@ -389,6 +389,7 @@
else
continue;
}
+ return 0;
}
/*
** Only update the related portmap from the privious input.
@@ -463,6 +464,7 @@
rv = ACL_RULE_DEL(0, list_id, rule_id, 1);
multi_acl_bind(); //Here need extra bind since IGMP join/leave would happen
+ return rv;
}
/*
@@ -682,7 +684,7 @@
return 2; //Normal update
}
- ;
+ return 0;
}
sw_error_t isis_igmp_sg_entry_set(a_uint32_t dev_id, fal_igmp_sg_entry_t * entry)
{
diff --git a/src/hsl/isis/isis_nat.c b/src/hsl/isis/isis_nat.c
index f5242c6..6a4d381 100755
--- a/src/hsl/isis/isis_nat.c
+++ b/src/hsl/isis/isis_nat.c
@@ -2374,7 +2374,7 @@
HSL_LOCAL sw_error_t
isis_nat_global_set(a_uint32_t dev_id, a_bool_t enable)
{
- sw_error_t rv;
+ sw_error_t rv = SW_OK;
HSL_API_LOCK;
printk("enable:%d\n", enable);
diff --git a/src/hsl/isis/isis_reg_access.c b/src/hsl/isis/isis_reg_access.c
index 64aff33..95d6d33 100755
--- a/src/hsl/isis/isis_reg_access.c
+++ b/src/hsl/isis/isis_reg_access.c
@@ -36,6 +36,8 @@
static a_uint32_t mdio_base_addr = 0xffffffff;
#endif
+uint32_t qca_ar8216_mii_read(int reg);
+void qca_ar8216_mii_write(int reg, uint32_t val);
@@ -134,11 +136,15 @@
_isis_mdio_reg_get(a_uint32_t dev_id, a_uint32_t reg_addr,
a_uint8_t value[], a_uint32_t value_len)
{
+#if 0
a_uint32_t reg_word_addr;
a_uint32_t phy_addr, reg_val;
a_uint16_t phy_val, tmp_val;
a_uint8_t phy_reg;
sw_error_t rv;
+#else
+ a_uint32_t reg_val;
+#endif
if (value_len != sizeof (a_uint32_t))
return SW_BAD_LEN;
@@ -195,11 +201,15 @@
_isis_mdio_reg_set(a_uint32_t dev_id, a_uint32_t reg_addr, a_uint8_t value[],
a_uint32_t value_len)
{
+#if 0
a_uint32_t reg_word_addr;
a_uint32_t phy_addr, reg_val;
a_uint16_t phy_val;
a_uint8_t phy_reg;
sw_error_t rv;
+#else
+ a_uint32_t reg_val = 0;
+#endif
if (value_len != sizeof (a_uint32_t))
return SW_BAD_LEN;
@@ -282,7 +292,6 @@
a_uint32_t value_len)
{
sw_error_t rv;
- unsigned long flags;
MDIO_LOCKER_LOCK;
if (HSL_MDIO == reg_mode)
@@ -303,7 +312,6 @@
a_uint32_t value_len)
{
sw_error_t rv;
- unsigned long flags;
MDIO_LOCKER_LOCK;
if (HSL_MDIO == reg_mode)
diff --git a/src/hsl/isisc/isisc_multicast_acl.c b/src/hsl/isisc/isisc_multicast_acl.c
index d51f710..b1dff66 100755
--- a/src/hsl/isisc/isisc_multicast_acl.c
+++ b/src/hsl/isisc/isisc_multicast_acl.c
@@ -261,7 +261,7 @@
a_uint32_t i, base, addr;
a_uint32_t dev_id=0;
a_uint32_t msk_valid=0;
- sw_error_t rv;
+ sw_error_t rv = SW_OK;
/* 2'b00:start; 2'b01:continue; 2'b10:end; 2'b11:start&end*/
for(i=pos; i<pos+4; i++)
@@ -316,7 +316,7 @@
act[1] |= (pm&0x7)<<29; //the low 3 bits of pm means redirect port 0,1,2
/* New modification: update acl ACTION register from DENY to redirect */
- if((act[2]>>6)&0x7 == 0x7 ) //DENY mode
+ if (((act[2]>>6)&0x7) == 0x7) //DENY mode
{
if(pm)
{
@@ -324,7 +324,7 @@
act[2] |= (0x1<<4); //DES_PORT_EN set 1, enable
}
}
- else if((act[2]>>4)&0x1 == 0x1) //redirect mode
+ else if (((act[2]>>4)&0x1) == 0x1) //redirect mode
{
if(pm==0)
{
@@ -399,6 +399,7 @@
else
continue;
}
+ return 0;
}
/*
** Only update the related portmap from the privious input.
@@ -473,6 +474,7 @@
rv = ACL_RULE_DEL(0, list_id, rule_id, 1);
multi_acl_bind(); //Here need extra bind since IGMP join/leave would happen
+ return rv;
}
/*
@@ -700,7 +702,7 @@
return 2; //Normal update
}
- ;
+ return 0;
}
sw_error_t isisc_igmp_sg_entry_set(a_uint32_t dev_id, fal_igmp_sg_entry_t * entry)
{
diff --git a/src/hsl/isisc/isisc_nat.c b/src/hsl/isisc/isisc_nat.c
index d429eff..f95d776 100755
--- a/src/hsl/isisc/isisc_nat.c
+++ b/src/hsl/isisc/isisc_nat.c
@@ -2385,7 +2385,7 @@
HSL_LOCAL sw_error_t
isisc_nat_global_set(a_uint32_t dev_id, a_bool_t enable)
{
- sw_error_t rv;
+ sw_error_t rv = SW_OK;
HSL_API_LOCK;
printk("enable:%d\n", enable);
diff --git a/src/init/ssdk_init.c b/src/init/ssdk_init.c
index 648b14a..7e1cc4f 100755
--- a/src/init/ssdk_init.c
+++ b/src/init/ssdk_init.c
@@ -1222,7 +1222,7 @@
priv->phy = pdev;
ret = qca_phy_id_chip(priv);
if (ret != 0) {
- return ret;
+ return ret;
}
priv->mii_read = qca_ar8216_mii_read;
@@ -1249,7 +1249,7 @@
ret = qca_ar8327_hw_init(priv);
if (ret != 0) {
- return ret;
+ return ret;
}
qca_phy_mib_work_start(priv);
@@ -1342,7 +1342,7 @@
{
struct qca_phy_priv *priv = pdev->priv;
struct switch_port_link port_link;
- int ret;
+ int ret = 0;
if (pdev->addr != 0) {
mutex_lock(&priv->reg_mutex);
@@ -1360,22 +1360,22 @@
return 0;
if(port_link.speed == SWITCH_PORT_SPEED_10) {
- pdev->speed = SPEED_10;
- } else if (port_link.speed == SWITCH_PORT_SPEED_100) {
- pdev->speed = SPEED_100;
- } else if (port_link.speed == SWITCH_PORT_SPEED_1000) {
- pdev->speed = SPEED_1000;
- } else {
- pdev->speed = 0;
- }
+ pdev->speed = SPEED_10;
+ } else if (port_link.speed == SWITCH_PORT_SPEED_100) {
+ pdev->speed = SPEED_100;
+ } else if (port_link.speed == SWITCH_PORT_SPEED_1000) {
+ pdev->speed = SPEED_1000;
+ } else {
+ pdev->speed = 0;
+ }
- if(port_link.duplex) {
- pdev->duplex = DUPLEX_FULL;
- } else {
- pdev->duplex = DUPLEX_HALF;
- }
+ if(port_link.duplex) {
+ pdev->duplex = DUPLEX_FULL;
+ } else {
+ pdev->duplex = DUPLEX_HALF;
+ }
- pdev->state = PHY_RUNNING;
+ pdev->state = PHY_RUNNING;
netif_carrier_on(pdev->attached_dev);
pdev->adjust_link(pdev->attached_dev);
@@ -1724,7 +1724,7 @@
struct ag71xx_mdio *am;
#endif
struct device *miidev;
- uint8_t busid[MII_BUS_ID_SIZE];
+ char busid[MII_BUS_ID_SIZE];
snprintf(busid, MII_BUS_ID_SIZE, "%s.%d",
IPQ806X_MDIO_BUS_NAME, IPQ806X_MDIO_BUS_NUM);
diff --git a/src/ref/ref_fdb.c b/src/ref/ref_fdb.c
index c48d89e..42d3120 100755
--- a/src/ref/ref_fdb.c
+++ b/src/ref/ref_fdb.c
@@ -49,7 +49,9 @@
int
-qca_ar8327_sw_atu_flush(struct qca_phy_priv *priv)
+qca_ar8327_sw_atu_flush(struct switch_dev *dev,
+ const struct switch_attr *attr,
+ struct switch_val *val)
{
/* 0: dynamic 1:dynamic, static */
fal_fdb_del_all(0, 1);
@@ -97,7 +99,7 @@
rv = fal_fdb_extend_next(0, &option, &entry);
}
- val->value.s = priv->buf;
+ val->value.s = (char*)(priv->buf);
val->len = len;
return 0;
diff --git a/src/ref/ref_mib.c b/src/ref/ref_mib.c
index 6719a56..31a8852 100755
--- a/src/ref/ref_mib.c
+++ b/src/ref/ref_mib.c
@@ -237,7 +237,7 @@
int pos = 0;
struct qca_phy_priv *priv = qca_phy_priv_get(dev);
- char *buf = priv->buf;
+ char *buf = (char *)(priv->buf);
port = val->port_vlan;
if (port >= dev->ports)
diff --git a/src/ref/ref_port_ctrl.c b/src/ref/ref_port_ctrl.c
index 84169c4..577c511 100755
--- a/src/ref/ref_port_ctrl.c
+++ b/src/ref/ref_port_ctrl.c
@@ -157,18 +157,20 @@
a_uint32_t qm_val;
struct qca_phy_priv *priv = qca_phy_priv_get(dev);
- if (port_id < 0 || port_id > 6)
+ if (port_id < 0 || port_id > 6) {
+ *qm_buffer_err = 0;
return -1;
+ }
if (port_id < 4) {
reg = 0x1D;
priv->mii_write(0x820, reg);
qm_val = priv->mii_read(0x824);
- qm_buffer_err = (qm_val >> (port_id * 8)) & 0xFF;
+ *qm_buffer_err = (qm_val >> (port_id * 8)) & 0xFF;
} else {
reg = 0x1E;
priv->mii_write(0x820, reg);
qm_val = priv->mii_read(0x824);
- qm_buffer_err = (qm_val >> ((port_id-4) * 8)) & 0xFF;
+ *qm_buffer_err = (qm_val >> ((port_id-4) * 8)) & 0xFF;
}
return 0;
@@ -247,11 +249,8 @@
a_uint32_t phy_addr;
a_uint32_t phy_reg;
a_uint16_t phy_val;
- a_uint32_t qm_val;
a_uint32_t qm_buffer_err;
a_uint16_t port_phy_status[AR8327_NUM_PORTS];
- static a_uint32_t qm_err_flag = 0;
- static a_uint32_t qm_err_step = 300;
static a_uint32_t mac_err_flag[AR8327_NUM_PORTS] = {0,0,0,0,0,0,0};
static a_uint32_t qm_err_cnt[AR8327_NUM_PORTS] = {0,0,0,0,0,0,0};
@@ -348,12 +347,13 @@
else
mac_err_flag[i] = 0;
}
-
+#if 0
/* Check Queue Buffer */
qca_switch_get_qm_status(dev, i, &qm_buffer_err);
if (qm_buffer_err) {
qm_err_flag = qm_val;
}
+#endif
/* Change port status */
reg = AR8327_REG_PORT_STATUS(i);
value = priv->mii_read(reg);
@@ -429,7 +429,7 @@
}
}
- return 0;
+ return ;
}
void
diff --git a/src/shell_lib/shell.c b/src/shell_lib/shell.c
index be6512d..65f36c0 100755
--- a/src/shell_lib/shell.c
+++ b/src/shell_lib/shell.c
@@ -429,9 +429,6 @@
rtn_code = cmd_parse_api(tmp_str, arg_val);
}
- else if (arg_val[0] > SW_API_MAX)
- {
- }
else
{
rtn_code = SW_BAD_PARAM;