commit b995ab228b7ca5751a5898d809ab7c4e13125d55
author Linux Build Service Account <lnxbuild@localhost> Wed May 20 04:22:21 2015 -0700
committer Gerrit - the friendly Code Review server <code-review@localhost> Wed May 20 04:22:21 2015 -0700
tree cb352c810b1b000f8ce7e29a73eeb0b799344f68
parent 5948e3d0a0fda08c52b8db250ff5e205f3cb2a87
parent 8681a89802a3b3de66a6745e70f6f631a774cc78

Merge "[qca-ssdk]Modify PSGMII configuration for Dakota"

include/init/ssdk_plat.h

diff --git a/include/init/ssdk_plat.h b/include/init/ssdk_plat.h
index 584c1c7..a9424b6 100755
--- a/include/init/ssdk_plat.h
+++ b/include/init/ssdk_plat.h
@@ -120,6 +120,11 @@
 #define AR8327_REG_PORT_LOOKUP(_i) (0x660 + (_i) * 0xc)
 #define AR8327_REG_PORT_VLAN0(_i) (0x420 + (_i) * 0x8)
 
+#define DESS_PSGMII_PLL_VCO_RELATED_CONTROL_1	0x78c
+#define   DESS_PSGMII_MII_REG_UPHY_PLL_LCKDT_EN	BIT(0)
+
+#define DESS_PSGMII_VCO_CALIBRATION_CONTROL_1  0x9c
+
 #define AR8327_NUM_PHYS		5
 #define AR8327_PORT_CPU     0
 #define AR8327_NUM_PORTS	7

src/init/ssdk_init.c

diff --git a/src/init/ssdk_init.c b/src/init/ssdk_init.c
index d14af10..34bc640 100755
--- a/src/init/ssdk_init.c
+++ b/src/init/ssdk_init.c
@@ -1643,6 +1643,9 @@
 	if (len != sizeof (a_uint32_t))
         return SW_BAD_LEN;
 
+	if (psgmii_hw_addr == NULL)
+		return SW_NOT_SUPPORTED;
+
 	reg_val = readl(psgmii_hw_addr + reg_addr);
 
 	aos_mem_copy(reg_data, &reg_val, sizeof (a_uint32_t));
@@ -1656,6 +1659,9 @@
 	if (len != sizeof (a_uint32_t))
         return SW_BAD_LEN;
 
+	if (psgmii_hw_addr == NULL)
+		return SW_NOT_SUPPORTED;
+
 	aos_mem_copy(&reg_val, reg_data, sizeof (a_uint32_t));
 	writel(reg_val, psgmii_hw_addr + reg_addr);
 	return 0;
@@ -1825,6 +1831,18 @@
 	fal_ip_vrf_base_addr_set(0, 0, 0);
 
 	/*TODO:set mac mode in gcc*/
+	/*Config PSGMII module for Dakota*/
+	reg_value = 0x2803;
+	qca_psgmii_reg_write(0, DESS_PSGMII_PLL_VCO_RELATED_CONTROL_1,
+						(a_uint8_t *)&reg_value, 4);
+	reg_value = 0x4ADA;
+	qca_psgmii_reg_write(0, DESS_PSGMII_VCO_CALIBRATION_CONTROL_1,
+						(a_uint8_t *)&reg_value, 4);
+	udelay(1000);
+	reg_value = 0xADA;
+	qca_psgmii_reg_write(0, DESS_PSGMII_VCO_CALIBRATION_CONTROL_1,
+						(a_uint8_t *)&reg_value, 4);
+	udelay(1000);
 	return 0;
 }