vppinfra: Multiarch support for AMD EPYC processors

Type: feature

- Added multiarch support for AMD Zen architectures

Change-Id: I65d3fe94b6cc622ebecbe1ac803efa674e87c87a
Signed-off-by: Sivaprasad Tummala <sivaprasad.tummala@amd.com>
diff --git a/src/vppinfra/cpu.h b/src/vppinfra/cpu.h
index 29992bb..017ecb1 100644
--- a/src/vppinfra/cpu.h
+++ b/src/vppinfra/cpu.h
@@ -27,7 +27,9 @@
   _ (skx, "Intel Skylake (server) / Cascade Lake")                            \
   _ (icl, "Intel Ice Lake")                                                   \
   _ (adl, "Intel Alder Lake")                                                 \
-  _ (spr, "Intel Sapphire Rapids")
+  _ (spr, "Intel Sapphire Rapids")                                            \
+  _ (znver3, "AMD Milan")                                                     \
+  _ (znver4, "AMD Genoa")
 #elif defined(__aarch64__)
 #define foreach_march_variant                                                 \
   _ (octeontx2, "Marvell Octeon TX2")                                         \
@@ -147,7 +149,8 @@
   _ (movdir64b, 7, ecx, 28)                                                   \
   _ (enqcmd, 7, ecx, 29)                                                      \
   _ (avx512_fp16, 7, edx, 23)                                                 \
-  _ (invariant_tsc, 0x80000007, edx, 8)
+  _ (invariant_tsc, 0x80000007, edx, 8)                                       \
+  _ (monitorx, 0x80000001, ecx, 29)
 
 #define foreach_aarch64_flags \
 _ (fp,          0) \
@@ -300,6 +303,22 @@
   return -1;
 }
 
+static inline int
+clib_cpu_march_priority_znver4 ()
+{
+  if (clib_cpu_supports_avx512_bitalg () && clib_cpu_supports_monitorx ())
+    return 250;
+  return -1;
+}
+
+static inline int
+clib_cpu_march_priority_znver3 ()
+{
+  if (clib_cpu_supports_avx2 () && clib_cpu_supports_monitorx ())
+    return 70;
+  return -1;
+}
+
 #define X86_CPU_ARCH_PERF_FUNC 0xA
 
 static inline int