vppinfra: add atomic macros for __sync builtins

This is first part of addition of atomic macros with only macros for
__sync builtins.

- Based on earlier patch by Damjan (https://gerrit.fd.io/r/#/c/10729/)
Additionally
- clib_atomic_release macro added and used in the absence
of any memory barrier.
- clib_atomic_bool_cmp_and_swap added

Change-Id: Ie4e48c1e184a652018d1d0d87c4be80ddd180a3b
Original-patch-by: Damjan Marion <damarion@cisco.com>
Signed-off-by: Sirshak Das <sirshak.das@arm.com>
Reviewed-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>
Reviewed-by: Ola Liljedahl <ola.liljedahl@arm.com>
Reviewed-by: Steve Capper <steve.capper@arm.com>
diff --git a/src/vppinfra/lock.h b/src/vppinfra/lock.h
index dd79c40..4645378 100644
--- a/src/vppinfra/lock.h
+++ b/src/vppinfra/lock.h
@@ -73,7 +73,7 @@
 static_always_inline void
 clib_spinlock_lock (clib_spinlock_t * p)
 {
-  while (__sync_lock_test_and_set (&(*p)->lock, 1))
+  while (clib_atomic_test_and_set (&(*p)->lock))
     CLIB_PAUSE ();
   CLIB_LOCK_DBG (p);
 }
@@ -138,13 +138,13 @@
 always_inline void
 clib_rwlock_reader_lock (clib_rwlock_t * p)
 {
-  while (__sync_lock_test_and_set (&(*p)->n_readers_lock, 1))
+  while (clib_atomic_test_and_set (&(*p)->n_readers_lock))
     CLIB_PAUSE ();
 
   (*p)->n_readers += 1;
   if ((*p)->n_readers == 1)
     {
-      while (__sync_lock_test_and_set (&(*p)->writer_lock, 1))
+      while (clib_atomic_test_and_set (&(*p)->writer_lock))
 	CLIB_PAUSE ();
     }
   CLIB_MEMORY_BARRIER ();
@@ -159,7 +159,7 @@
   ASSERT ((*p)->n_readers > 0);
   CLIB_LOCK_DBG_CLEAR (p);
 
-  while (__sync_lock_test_and_set (&(*p)->n_readers_lock, 1))
+  while (clib_atomic_test_and_set (&(*p)->n_readers_lock))
     CLIB_PAUSE ();
 
   (*p)->n_readers -= 1;
@@ -176,7 +176,7 @@
 always_inline void
 clib_rwlock_writer_lock (clib_rwlock_t * p)
 {
-  while (__sync_lock_test_and_set (&(*p)->writer_lock, 1))
+  while (clib_atomic_test_and_set (&(*p)->writer_lock))
     CLIB_PAUSE ();
   CLIB_LOCK_DBG (p);
 }