commit 66bff59f7c8873e7f959e147cb69a731b4914edb
author Nitin Saxena <nitin.saxena@cavium.com> Thu Sep 06 13:45:41 2018 +0000
committer Marco Varlese <marco.varlese@suse.de> Fri Sep 07 07:26:15 2018 +0000
tree 0defe1bb4773b251cbca420a6af95b033d54fd4b
parent c5cb6380e187e67444cb489f93eb17c4541819ef

cmake: Fix compilation for OCTEONTx

Change-Id: I7b7183b4603076e5afac096545d820091ee7c495
Signed-off-by: Nitin Saxena <nitin.saxena@cavium.com>

src/cmake/cpu.cmake

diff --git a/src/cmake/cpu.cmake b/src/cmake/cpu.cmake
index 1439be1..ef03936 100644
--- a/src/cmake/cpu.cmake
+++ b/src/cmake/cpu.cmake
@@ -30,12 +30,12 @@
       set(CPU_PART ${value})
      endif()
   endforeach()
-  # Implementer 0x0a1 - Cavium
-  #  Part 0x0a1 - ThunderX
-  if (${CPU_IMPLEMENTER} STREQUAL "0x43" AND ${CPU_PART} STREQUAL "0x0a1")
-    set(VPP_LOG2_CACHE_LINE_SIZE 7)
-  else()
+  # Implementer 0x43 - Cavium
+  #  Part 0x0af - ThunderX2 is 64B, rest all are 128B
+  if (${CPU_IMPLEMENTER} STREQUAL "0x43" AND ${CPU_PART} STREQUAL "0x0af")
     set(VPP_LOG2_CACHE_LINE_SIZE 6)
+  else()
+    set(VPP_LOG2_CACHE_LINE_SIZE 7)
   endif()
   math(EXPR VPP_CACHE_LINE_SIZE "1 << ${VPP_LOG2_CACHE_LINE_SIZE}")
   message(STATUS "ARM AArch64 CPU implementer ${CPU_IMPLEMENTER} part ${CPU_PART} cacheline size ${VPP_CACHE_LINE_SIZE}")