ip: remove archaic vector code from mtrie
Type: improvement
Change-Id: Ib39478a2e6991d721c4ba3ea61c97bfb07238016
Signed-off-by: Damjan Marion <damarion@cisco.com>
diff --git a/src/vnet/ip/ip4_mtrie.h b/src/vnet/ip/ip4_mtrie.h
index ec417c9..16c5247 100644
--- a/src/vnet/ip/ip4_mtrie.h
+++ b/src/vnet/ip/ip4_mtrie.h
@@ -65,14 +65,7 @@
/**
* The leaves/slots/buckets to be filed with leafs
*/
- union
- {
- ip4_mtrie_leaf_t leaves[PLY_16_SIZE];
-
-#ifdef CLIB_HAVE_VEC128
- u32x4 leaves_as_u32x4[PLY_16_SIZE / 4];
-#endif
- };
+ ip4_mtrie_leaf_t leaves[PLY_16_SIZE];
/**
* Prefix length for terminal leaves.
@@ -85,17 +78,11 @@
*/
typedef struct ip4_mtrie_8_ply_t_
{
+ CLIB_CACHE_LINE_ALIGN_MARK (cacheline0);
/**
* The leaves/slots/buckets to be filed with leafs
*/
- union
- {
- ip4_mtrie_leaf_t leaves[256];
-
-#ifdef CLIB_HAVE_VEC128
- u32x4 leaves_as_u32x4[256 / 4];
-#endif
- };
+ ip4_mtrie_leaf_t leaves[256];
/**
* Prefix length for leaves/ply.
@@ -113,9 +100,6 @@
* 'non-empty'. Otherwise it is the value of the cover.
*/
i32 dst_address_bits_base;
-
- /* Pad to cache line boundary. */
- u8 pad[CLIB_CACHE_LINE_BYTES - 2 * sizeof (i32)];
} ip4_mtrie_8_ply_t;
STATIC_ASSERT (0 == sizeof (ip4_mtrie_8_ply_t) % CLIB_CACHE_LINE_BYTES,