commit af7fb04b81c765c3e3f621c6b23fc3390310715b
author Damjan Marion <damarion@cisco.com> Thu Jul 15 11:54:41 2021 +0200
committer Andrew Yourtchenko <ayourtch@gmail.com> Thu Jul 15 11:25:08 2021 +0000
tree fec5e2de4dc1ec64026c7339eb898797ce66fba0
parent 0aea808ac5cb1132b9787c8f7d5f9d995cd3413b

misc: replace CLIB_PREFETCH with clib_prefetch_{load,store}

Type: refactor
Change-Id: Id10cbf52e8f2dd809080a228d8fa282308be84ac
Signed-off-by: Damjan Marion <damarion@cisco.com>

src/vnet/l2/l2_input_vtr.c

diff --git a/src/vnet/l2/l2_input_vtr.c b/src/vnet/l2/l2_input_vtr.c
index be3e6ba..3c1235b 100644
--- a/src/vnet/l2/l2_input_vtr.c
+++ b/src/vnet/l2/l2_input_vtr.c
@@ -126,8 +126,8 @@
 	    vlib_prefetch_buffer_header (p4, LOAD);
 	    vlib_prefetch_buffer_header (p5, LOAD);
 
-	    CLIB_PREFETCH (p4->data, CLIB_CACHE_LINE_BYTES, STORE);
-	    CLIB_PREFETCH (p5->data, CLIB_CACHE_LINE_BYTES, STORE);
+	    clib_prefetch_store (p4->data);
+	    clib_prefetch_store (p5->data);
 
 	    /*
 	     * Prefetch the input config for the N+1 loop iteration