blob: fb64e50563399d1e417076650cba116e2e0aed3c [file] [log] [blame]
Neale Ranns5e575b12016-10-03 09:40:25 +01001/*
2 * Copyright (c) 2016 Cisco and/or its affiliates.
3 * Licensed under the Apache License, Version 2.0 (the "License");
4 * you may not use this file except in compliance with the License.
5 * You may obtain a copy of the License at:
6 *
7 * http://www.apache.org/licenses/LICENSE-2.0
8 *
9 * Unless required by applicable law or agreed to in writing, software
10 * distributed under the License is distributed on an "AS IS" BASIS,
11 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
12 * See the License for the specific language governing permissions and
13 * limitations under the License.
14 */
15
16#include <vnet/vnet.h>
17#include <vnet/adj/adj_l2.h>
18#include <vnet/ethernet/ethernet.h>
19#include <vnet/ip/ip.h>
20
21/**
22 * @brief Trace data for a L2 Midchain
23 */
24typedef struct adj_l2_trace_t_ {
25 /** Adjacency index taken. */
26 u32 adj_index;
27} adj_l2_trace_t;
28
29static u8 *
30format_adj_l2_trace (u8 * s, va_list * args)
31{
32 CLIB_UNUSED (vlib_main_t * vm) = va_arg (*args, vlib_main_t *);
33 CLIB_UNUSED (vlib_node_t * node) = va_arg (*args, vlib_node_t *);
34 adj_l2_trace_t * t = va_arg (*args, adj_l2_trace_t *);
Neale Ranns5e575b12016-10-03 09:40:25 +010035
36 s = format (s, "adj-idx %d : %U",
37 t->adj_index,
Neale Rannsb80c5362016-10-08 13:03:40 +010038 format_ip_adjacency, t->adj_index, FORMAT_IP_ADJACENCY_NONE);
Neale Ranns5e575b12016-10-03 09:40:25 +010039 return s;
40}
41
42typedef enum adj_l2_rewrite_next_t_
43{
44 ADJ_L2_REWRITE_NEXT_DROP,
45} adj_l2_rewrite_next_t;
46
47always_inline uword
48adj_l2_rewrite_inline (vlib_main_t * vm,
49 vlib_node_runtime_t * node,
50 vlib_frame_t * frame,
51 int is_midchain)
52{
53 u32 * from = vlib_frame_vector_args (frame);
54 u32 n_left_from, n_left_to_next, * to_next, next_index;
55 u32 cpu_index = os_get_cpu_number();
Damjan Marion8b3191e2016-11-09 19:54:20 +010056 ethernet_main_t * em = &ethernet_main;
Neale Ranns5e575b12016-10-03 09:40:25 +010057
58 n_left_from = frame->n_vectors;
59 next_index = node->cached_next_index;
60
61 while (n_left_from > 0)
62 {
63 vlib_get_next_frame (vm, node, next_index, to_next, n_left_to_next);
64
65 while (n_left_from > 0 && n_left_to_next > 0)
66 {
67 ip_adjacency_t * adj0;
68 vlib_buffer_t * p0;
69 char *h0;
Damjan Marion8b3191e2016-11-09 19:54:20 +010070 u32 pi0, rw_len0, adj_index0, next0 = 0;
Neale Ranns5e575b12016-10-03 09:40:25 +010071 u32 tx_sw_if_index0;
72
73 pi0 = to_next[0] = from[0];
74 from += 1;
75 n_left_from -= 1;
76 to_next += 1;
77 n_left_to_next -= 1;
78
79 p0 = vlib_get_buffer (vm, pi0);
80 h0 = vlib_buffer_get_current (p0);
81
82 adj_index0 = vnet_buffer (p0)->ip.adj_index[VLIB_TX];
83
84 /* We should never rewrite a pkt using the MISS adjacency */
85 ASSERT(adj_index0);
86
87 adj0 = adj_get (adj_index0);
88
89 /* Guess we are only writing on simple Ethernet header. */
90 vnet_rewrite_one_header (adj0[0], h0,
91 sizeof (ethernet_header_t));
92
93 /* Update packet buffer attributes/set output interface. */
94 rw_len0 = adj0[0].rewrite_header.data_bytes;
95 vnet_buffer(p0)->ip.save_rewrite_length = rw_len0;
Filip Tehlar4868ff62017-03-09 16:48:39 +010096 vnet_buffer(p0)->sw_if_index[VLIB_TX] = adj0->rewrite_header.sw_if_index;
Neale Ranns5e575b12016-10-03 09:40:25 +010097
Neale Ranns044183f2017-01-24 01:34:25 -080098 vlib_increment_combined_counter(&adjacency_counters,
99 cpu_index,
100 adj_index0,
101 /* packet increment */ 0,
102 /* byte increment */ rw_len0);
Neale Ranns5e575b12016-10-03 09:40:25 +0100103
104 /* Check MTU of outgoing interface. */
105 if (PREDICT_TRUE((vlib_buffer_length_in_chain (vm, p0) <=
106 adj0[0].rewrite_header.max_l3_packet_bytes)))
107 {
108 /* Don't adjust the buffer for ttl issue; icmp-error node wants
109 * to see the IP headerr */
110 p0->current_data -= rw_len0;
111 p0->current_length += rw_len0;
112 tx_sw_if_index0 = adj0[0].rewrite_header.sw_if_index;
113
114 if (is_midchain)
115 {
116 adj0->sub_type.midchain.fixup_func(vm, adj0, p0);
117 }
118
119 vnet_buffer (p0)->sw_if_index[VLIB_TX] = tx_sw_if_index0;
120
121 /*
122 * Follow the feature ARC. this will result eventually in
123 * the midchain-tx node
124 */
Damjan Marion8b3191e2016-11-09 19:54:20 +0100125 vnet_feature_arc_start(em->output_feature_arc_index, tx_sw_if_index0, &next0, p0);
Neale Ranns5e575b12016-10-03 09:40:25 +0100126 }
127 else
128 {
129 /* can't fragment L2 */
130 next0 = ADJ_L2_REWRITE_NEXT_DROP;
131 }
132
133 if (PREDICT_FALSE(p0->flags & VLIB_BUFFER_IS_TRACED))
134 {
135 adj_l2_trace_t *tr = vlib_add_trace (vm, node,
136 p0, sizeof (*tr));
137 tr->adj_index = vnet_buffer(p0)->ip.adj_index[VLIB_TX];
138 }
139
140 vlib_validate_buffer_enqueue_x1 (vm, node, next_index,
141 to_next, n_left_to_next,
142 pi0, next0);
143 }
144
145 vlib_put_next_frame (vm, node, next_index, n_left_to_next);
146 }
147
148 return frame->n_vectors;
149}
150
151static uword
152adj_l2_rewrite (vlib_main_t * vm,
153 vlib_node_runtime_t * node,
154 vlib_frame_t * frame)
155{
156 return adj_l2_rewrite_inline (vm, node, frame, 0);
157}
158
159static uword
160adj_l2_midchain (vlib_main_t * vm,
161 vlib_node_runtime_t * node,
162 vlib_frame_t * frame)
163{
164 return adj_l2_rewrite_inline (vm, node, frame, 1);
165}
166
167VLIB_REGISTER_NODE (adj_l2_rewrite_node) = {
168 .function = adj_l2_rewrite,
169 .name = "adj-l2-rewrite",
170 .vector_size = sizeof (u32),
171
172 .format_trace = format_adj_l2_trace,
173
174 .n_next_nodes = 1,
175 .next_nodes = {
176 [ADJ_L2_REWRITE_NEXT_DROP] = "error-drop",
177 },
178};
179
180VLIB_NODE_FUNCTION_MULTIARCH (adj_l2_rewrite_node, adj_l2_rewrite)
181
182VLIB_REGISTER_NODE (adj_l2_midchain_node) = {
183 .function = adj_l2_midchain,
184 .name = "adj-l2-midchain",
185 .vector_size = sizeof (u32),
186
187 .format_trace = format_adj_l2_trace,
188
189 .n_next_nodes = 1,
190 .next_nodes = {
191 [ADJ_L2_REWRITE_NEXT_DROP] = "error-drop",
192 },
193};
194
195VLIB_NODE_FUNCTION_MULTIARCH (adj_l2_midchain_node, adj_l2_midchain)