| Sirshak Das | 2f6d7bb | 2018-10-03 22:53:51 +0000 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2018 Cisco and/or its affiliates. |
| 3 | * Copyright (c) 2018 Arm Limited. and/or its affiliates. |
| 4 | * Licensed under the Apache License, Version 2.0 (the "License"); |
| 5 | * you may not use this file except in compliance with the License. |
| 6 | * You may obtain a copy of the License at: |
| 7 | * |
| 8 | * http://www.apache.org/licenses/LICENSE-2.0 |
| 9 | * |
| 10 | * Unless required by applicable law or agreed to in writing, software |
| 11 | * distributed under the License is distributed on an "AS IS" BASIS, |
| 12 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
| 13 | * See the License for the specific language governing permissions and |
| 14 | * limitations under the License. |
| 15 | */ |
| 16 | |
| 17 | #ifndef included_clib_atomics_h |
| 18 | #define included_clib_atomics_h |
| 19 | |
| 20 | /* Legacy __sync builtins */ |
| 21 | |
| 22 | /* Full Barrier */ |
| 23 | #define clib_atomic_fetch_add(a, b) __sync_fetch_and_add(a, b) |
| 24 | #define clib_atomic_fetch_sub(a, b) __sync_fetch_and_sub(a, b) |
| 25 | #define clib_atomic_fetch_and(a, b) __sync_fetch_and_and(a, b) |
| 26 | #define clib_atomic_fetch_xor(a, b) __sync_fetch_and_xor(a, b) |
| 27 | #define clib_atomic_fetch_or(a, b) __sync_fetch_and_or(a, b) |
| 28 | #define clib_atomic_fetch_nand(a, b) __sync_fetch_nand(a, b) |
| 29 | |
| 30 | #define clib_atomic_add_fetch(a, b) __sync_add_and_fetch(a, b) |
| 31 | #define clib_atomic_sub_fetch(a, b) __sync_sub_and_fetch(a, b) |
| 32 | #define clib_atomic_and_fetch(a, b) __sync_and_and_fetch(a, b) |
| 33 | #define clib_atomic_xor_fetch(a, b) __sync_xor_and_fetch(a, b) |
| 34 | #define clib_atomic_or_fetch(a, b) __sync_or_and_fetch(a, b) |
| 35 | #define clib_atomic_nand_fetch(a, b) __sync_nand_and_fetch(a, b) |
| 36 | |
| 37 | #define clib_atomic_cmp_and_swap(addr,old,new) __sync_val_compare_and_swap(addr, old, new) |
| 38 | #define clib_atomic_bool_cmp_and_swap(addr,old,new) __sync_bool_compare_and_swap(addr, old, new) |
| 39 | |
| 40 | /*Accquire Barrier*/ |
| 41 | #define clib_atomic_test_and_set(a) __sync_lock_test_and_set(a, 1) |
| 42 | /*Release Barrier*/ |
| 43 | #define clib_atomic_release(a) __sync_lock_release(a) |
| 44 | |
| 45 | #endif /* included_clib_atomics_h */ |