blob: 58256f191cf6e882fa1a84dd0d700f9fa3cc0cb6 [file] [log] [blame]
Damjan Marion1f0da172016-07-13 22:44:18 +02001From 5917bd1cf9857979a7cae89f362d2c885f09d034 Mon Sep 17 00:00:00 2001
2From: Damjan Marion <damarion@cisco.com>
3Date: Thu, 14 Jul 2016 09:59:02 -0700
4Subject: [PATCH 2/2] i40e: Enable bad checksum flags in i40e vPMD
5
6Decode the checksum flags from the rx descriptor, setting
7the appropriate bit in the mbuf ol_flags field when the flag
8indicates a bad checksum.
9
10Signed-off-by: Damjan Marion <damarion@cisco.com>
11Signed-off-by: Jeff Shaw <jeffrey.b.shaw@intel.com>
12---
13 drivers/net/i40e/i40e_rxtx_vec.c | 48 +++++++++++++++++++++++-----------------
14 1 file changed, 28 insertions(+), 20 deletions(-)
15
16diff --git a/drivers/net/i40e/i40e_rxtx_vec.c b/drivers/net/i40e/i40e_rxtx_vec.c
17index e78ac63..ace51df 100644
18--- a/drivers/net/i40e/i40e_rxtx_vec.c
19+++ b/drivers/net/i40e/i40e_rxtx_vec.c
20@@ -138,19 +138,14 @@ i40e_rxq_rearm(struct i40e_rx_queue *rxq)
21 static inline void
22 desc_to_olflags_v(__m128i descs[4], struct rte_mbuf **rx_pkts)
23 {
24- __m128i vlan0, vlan1, rss;
25- union {
26- uint16_t e[4];
27- uint64_t dword;
28- } vol;
29+ __m128i vlan0, vlan1, rss, l3_l4e;
30
31 /* mask everything except RSS, flow director and VLAN flags
32 * bit2 is for VLAN tag, bit11 for flow director indication
33 * bit13:12 for RSS indication.
34 */
35- const __m128i rss_vlan_msk = _mm_set_epi16(
36- 0x0000, 0x0000, 0x0000, 0x0000,
37- 0x3804, 0x3804, 0x3804, 0x3804);
38+ const __m128i rss_vlan_msk = _mm_set_epi32(
39+ 0x1c03004, 0x1c03004, 0x1c03004, 0x1c03004);
40
41 /* map rss and vlan type to rss hash and vlan flag */
42 const __m128i vlan_flags = _mm_set_epi8(0, 0, 0, 0,
43@@ -163,23 +158,36 @@ desc_to_olflags_v(__m128i descs[4], struct rte_mbuf **rx_pkts)
44 PKT_RX_RSS_HASH | PKT_RX_FDIR, PKT_RX_RSS_HASH, 0, 0,
45 0, 0, PKT_RX_FDIR, 0);
46
47- vlan0 = _mm_unpackhi_epi16(descs[0], descs[1]);
48- vlan1 = _mm_unpackhi_epi16(descs[2], descs[3]);
49- vlan0 = _mm_unpacklo_epi32(vlan0, vlan1);
50+ const __m128i l3_l4e_flags = _mm_set_epi8(0, 0, 0, 0, 0, 0, 0, 0,
51+ PKT_RX_EIP_CKSUM_BAD | PKT_RX_L4_CKSUM_BAD | PKT_RX_IP_CKSUM_BAD,
52+ PKT_RX_EIP_CKSUM_BAD | PKT_RX_L4_CKSUM_BAD,
53+ PKT_RX_EIP_CKSUM_BAD | PKT_RX_IP_CKSUM_BAD,
54+ PKT_RX_EIP_CKSUM_BAD,
55+ PKT_RX_L4_CKSUM_BAD | PKT_RX_IP_CKSUM_BAD,
56+ PKT_RX_L4_CKSUM_BAD,
57+ PKT_RX_IP_CKSUM_BAD,
58+ 0);
59+
60+ vlan0 = _mm_unpackhi_epi32(descs[0], descs[1]);
61+ vlan1 = _mm_unpackhi_epi32(descs[2], descs[3]);
62+ vlan0 = _mm_unpacklo_epi64(vlan0, vlan1);
63
64 vlan1 = _mm_and_si128(vlan0, rss_vlan_msk);
65 vlan0 = _mm_shuffle_epi8(vlan_flags, vlan1);
66
67- rss = _mm_srli_epi16(vlan1, 11);
68+ rss = _mm_srli_epi32(vlan1, 12);
69 rss = _mm_shuffle_epi8(rss_flags, rss);
70
71+ l3_l4e = _mm_srli_epi32(vlan1, 22);
72+ l3_l4e = _mm_shuffle_epi8(l3_l4e_flags, l3_l4e);
73+
74 vlan0 = _mm_or_si128(vlan0, rss);
75- vol.dword = _mm_cvtsi128_si64(vlan0);
76+ vlan0 = _mm_or_si128(vlan0, l3_l4e);
77
78- rx_pkts[0]->ol_flags = vol.e[0];
79- rx_pkts[1]->ol_flags = vol.e[1];
80- rx_pkts[2]->ol_flags = vol.e[2];
81- rx_pkts[3]->ol_flags = vol.e[3];
82+ rx_pkts[0]->ol_flags = _mm_extract_epi16(vlan0, 0);
83+ rx_pkts[1]->ol_flags = _mm_extract_epi16(vlan0, 2);
84+ rx_pkts[2]->ol_flags = _mm_extract_epi16(vlan0, 4);
85+ rx_pkts[3]->ol_flags = _mm_extract_epi16(vlan0, 6);
86 }
87 #else
88 #define desc_to_olflags_v(desc, rx_pkts) do {} while (0)
89@@ -754,7 +762,8 @@ i40e_rx_vec_dev_conf_condition_check(struct rte_eth_dev *dev)
90 #ifndef RTE_LIBRTE_I40E_RX_OLFLAGS_ENABLE
91 /* whithout rx ol_flags, no VP flag report */
92 if (rxmode->hw_vlan_strip != 0 ||
93- rxmode->hw_vlan_extend != 0)
94+ rxmode->hw_vlan_extend != 0 ||
95+ rxmode->hw_ip_checksum != 0)
96 return -1;
97 #endif
98
99@@ -765,8 +774,7 @@ i40e_rx_vec_dev_conf_condition_check(struct rte_eth_dev *dev)
100 /* - no csum error report support
101 * - no header split support
102 */
103- if (rxmode->hw_ip_checksum == 1 ||
104- rxmode->header_split == 1)
105+ if (rxmode->header_split == 1)
106 return -1;
107
108 return 0;
109--
1102.7.4
111