blob: ddefea5a644ca120934a48f9319b269f977b16a4 [file] [log] [blame]
Denis Vlasenko7d219aa2006-10-05 10:17:08 +00001# ==========================================================================
2# Building
3# ==========================================================================
4
5src := $(obj)
6
7PHONY := __build
8__build:
9
10# Read .config if it exist, otherwise ignore
11-include .config
12
13include scripts/Kbuild.include
14
15# The filename Kbuild has precedence over Makefile
16kbuild-dir := $(if $(filter /%,$(src)),$(src),$(srctree)/$(src))
17include $(if $(wildcard $(kbuild-dir)/Kbuild), $(kbuild-dir)/Kbuild, $(kbuild-dir)/Makefile)
18
19include scripts/Makefile.lib
20
21ifdef host-progs
22ifneq ($(hostprogs-y),$(host-progs))
23$(warning kbuild: $(obj)/Makefile - Usage of host-progs is deprecated. Please replace with hostprogs-y!)
24hostprogs-y += $(host-progs)
25endif
26endif
27
28# Do not include host rules unles needed
29ifneq ($(hostprogs-y)$(hostprogs-m),)
30include scripts/Makefile.host
31endif
32
33ifneq ($(KBUILD_SRC),)
34# Create output directory if not already present
35_dummy := $(shell [ -d $(obj) ] || mkdir -p $(obj))
36
37# Create directories for object files if directory does not exist
38# Needed when obj-y := dir/file.o syntax is used
39_dummy := $(foreach d,$(obj-dirs), $(shell [ -d $(d) ] || mkdir -p $(d)))
40endif
41
42
43ifdef EXTRA_TARGETS
44$(warning kbuild: $(obj)/Makefile - Usage of EXTRA_TARGETS is obsolete in 2.6. Please fix!)
45endif
46
47ifdef build-targets
48$(warning kbuild: $(obj)/Makefile - Usage of build-targets is obsolete in 2.6. Please fix!)
49endif
50
51ifdef export-objs
52$(warning kbuild: $(obj)/Makefile - Usage of export-objs is obsolete in 2.6. Please fix!)
53endif
54
55ifdef O_TARGET
56$(warning kbuild: $(obj)/Makefile - Usage of O_TARGET := $(O_TARGET) is obsolete in 2.6. Please fix!)
57endif
58
59ifdef L_TARGET
60$(error kbuild: $(obj)/Makefile - Use of L_TARGET is replaced by lib-y in 2.6. Please fix!)
61endif
62
63ifdef list-multi
64$(warning kbuild: $(obj)/Makefile - list-multi := $(list-multi) is obsolete in 2.6. Please fix!)
65endif
66
67ifndef obj
68$(warning kbuild: Makefile.build is included improperly)
69endif
70
71# ===========================================================================
72
73ifneq ($(strip $(lib-y) $(lib-m) $(lib-n) $(lib-)),)
74lib-target := $(obj)/lib.a
75endif
76
77ifneq ($(strip $(obj-y) $(obj-m) $(obj-n) $(obj-) $(lib-target)),)
78builtin-target := $(obj)/built-in.o
79endif
80
81# We keep a list of all modules in $(MODVERDIR)
82
83__build: $(if $(KBUILD_BUILTIN),$(builtin-target) $(lib-target) $(extra-y)) \
84 $(if $(KBUILD_MODULES),$(obj-m)) \
85 $(subdir-ym) $(always)
86 @:
87
88# Linus' kernel sanity checking tool
89ifneq ($(KBUILD_CHECKSRC),0)
90 ifeq ($(KBUILD_CHECKSRC),2)
91 quiet_cmd_force_checksrc = CHECK $<
92 cmd_force_checksrc = $(CHECK) $(CHECKFLAGS) $(c_flags) $< ;
93 else
94 quiet_cmd_checksrc = CHECK $<
95 cmd_checksrc = $(CHECK) $(CHECKFLAGS) $(c_flags) $< ;
96 endif
97endif
98
99
100# Compile C sources (.c)
101# ---------------------------------------------------------------------------
102
103# Default is built-in, unless we know otherwise
104modkern_cflags := $(CFLAGS_KERNEL)
105quiet_modtag := $(empty) $(empty)
106
107$(real-objs-m) : modkern_cflags := $(CFLAGS_MODULE)
108$(real-objs-m:.o=.i) : modkern_cflags := $(CFLAGS_MODULE)
109$(real-objs-m:.o=.s) : modkern_cflags := $(CFLAGS_MODULE)
110$(real-objs-m:.o=.lst): modkern_cflags := $(CFLAGS_MODULE)
111
112$(real-objs-m) : quiet_modtag := [M]
113$(real-objs-m:.o=.i) : quiet_modtag := [M]
114$(real-objs-m:.o=.s) : quiet_modtag := [M]
115$(real-objs-m:.o=.lst): quiet_modtag := [M]
116
117$(obj-m) : quiet_modtag := [M]
118
119# Default for not multi-part modules
120modname = $(*F)
121
122$(multi-objs-m) : modname = $(modname-multi)
123$(multi-objs-m:.o=.i) : modname = $(modname-multi)
124$(multi-objs-m:.o=.s) : modname = $(modname-multi)
125$(multi-objs-m:.o=.lst) : modname = $(modname-multi)
126$(multi-objs-y) : modname = $(modname-multi)
127$(multi-objs-y:.o=.i) : modname = $(modname-multi)
128$(multi-objs-y:.o=.s) : modname = $(modname-multi)
129$(multi-objs-y:.o=.lst) : modname = $(modname-multi)
130
131quiet_cmd_cc_s_c = CC $(quiet_modtag) $@
132cmd_cc_s_c = $(CC) $(c_flags) -fverbose-asm -S -o $@ $<
133
134%.s: %.c FORCE
135 $(call if_changed_dep,cc_s_c)
136
137quiet_cmd_cc_i_c = CPP $(quiet_modtag) $@
138cmd_cc_i_c = $(CPP) $(c_flags) -o $@ $<
139
140%.i: %.c FORCE
141 $(call if_changed_dep,cc_i_c)
142
143# C (.c) files
144# The C file is compiled and updated dependency information is generated.
145# (See cmd_cc_o_c + relevant part of rule_cc_o_c)
146
147quiet_cmd_cc_o_c = CC $(quiet_modtag) $@
148
149ifndef CONFIG_MODVERSIONS
150cmd_cc_o_c = $(CC) $(c_flags) -c -o $@ $<
151
152else
153# When module versioning is enabled the following steps are executed:
154# o compile a .tmp_<file>.o from <file>.c
155# o if .tmp_<file>.o doesn't contain a __ksymtab version, i.e. does
156# not export symbols, we just rename .tmp_<file>.o to <file>.o and
157# are done.
158# o otherwise, we calculate symbol versions using the good old
159# genksyms on the preprocessed source and postprocess them in a way
160# that they are usable as a linker script
161# o generate <file>.o from .tmp_<file>.o using the linker to
162# replace the unresolved symbols __crc_exported_symbol with
163# the actual value of the checksum generated by genksyms
164
165cmd_cc_o_c = $(CC) $(c_flags) -c -o $(@D)/.tmp_$(@F) $<
166cmd_modversions = \
167 if $(OBJDUMP) -h $(@D)/.tmp_$(@F) | grep -q __ksymtab; then \
168 $(CPP) -D__GENKSYMS__ $(c_flags) $< \
169 | $(GENKSYMS) -a $(ARCH) \
170 > $(@D)/.tmp_$(@F:.o=.ver); \
171 \
172 $(LD) $(LDFLAGS) -r -o $@ $(@D)/.tmp_$(@F) \
173 -T $(@D)/.tmp_$(@F:.o=.ver); \
174 rm -f $(@D)/.tmp_$(@F) $(@D)/.tmp_$(@F:.o=.ver); \
175 else \
176 mv -f $(@D)/.tmp_$(@F) $@; \
177 fi;
178endif
179
180define rule_cc_o_c
181 $(call echo-cmd,checksrc) $(cmd_checksrc) \
182 $(call echo-cmd,cc_o_c) $(cmd_cc_o_c); \
183 $(cmd_modversions) \
184 scripts/basic/fixdep $(depfile) $@ '$(call make-cmd,cc_o_c)' > $(@D)/.$(@F).tmp; \
185 rm -f $(depfile); \
186 mv -f $(@D)/.$(@F).tmp $(@D)/.$(@F).cmd
187endef
188
189# Built-in and composite module parts
190
191%.o: %.c FORCE
192 $(call cmd,force_checksrc)
193 $(call if_changed_rule,cc_o_c)
194
195# Single-part modules are special since we need to mark them in $(MODVERDIR)
196
197$(single-used-m): %.o: %.c FORCE
198 $(call cmd,force_checksrc)
199 $(call if_changed_rule,cc_o_c)
200 @{ echo $(@:.o=.ko); echo $@; } > $(MODVERDIR)/$(@F:.o=.mod)
201
202quiet_cmd_cc_lst_c = MKLST $@
203 cmd_cc_lst_c = $(CC) $(c_flags) -g -c -o $*.o $< && \
204 $(CONFIG_SHELL) $(srctree)/scripts/makelst $*.o \
205 System.map $(OBJDUMP) > $@
206
207%.lst: %.c FORCE
208 $(call if_changed_dep,cc_lst_c)
209
210# Compile assembler sources (.S)
211# ---------------------------------------------------------------------------
212
213modkern_aflags := $(AFLAGS_KERNEL)
214
215$(real-objs-m) : modkern_aflags := $(AFLAGS_MODULE)
216$(real-objs-m:.o=.s): modkern_aflags := $(AFLAGS_MODULE)
217
218quiet_cmd_as_s_S = CPP $(quiet_modtag) $@
Denis Vlasenkof7996f32007-01-11 17:20:00 +0000219cmd_as_s_S = $(CPP) $(a_flags) -o $@ $<
Denis Vlasenko7d219aa2006-10-05 10:17:08 +0000220
221%.s: %.S FORCE
222 $(call if_changed_dep,as_s_S)
223
224quiet_cmd_as_o_S = AS $(quiet_modtag) $@
225cmd_as_o_S = $(CC) $(a_flags) -c -o $@ $<
226
227%.o: %.S FORCE
228 $(call if_changed_dep,as_o_S)
229
230targets += $(real-objs-y) $(real-objs-m) $(lib-y)
231targets += $(extra-y) $(MAKECMDGOALS) $(always)
232
233# Linker scripts preprocessor (.lds.S -> .lds)
234# ---------------------------------------------------------------------------
235quiet_cmd_cpp_lds_S = LDS $@
236 cmd_cpp_lds_S = $(CPP) $(cpp_flags) -D__ASSEMBLY__ -o $@ $<
237
238%.lds: %.lds.S FORCE
239 $(call if_changed_dep,cpp_lds_S)
240
241# Build the compiled-in targets
242# ---------------------------------------------------------------------------
243
244# To build objects in subdirs, we need to descend into the directories
245$(sort $(subdir-obj-y)): $(subdir-ym) ;
246
247#
248# Rule to compile a set of .o files into one .o file
249#
250ifdef builtin-target
251quiet_cmd_link_o_target = LD $@
252# If the list of objects to link is empty, just create an empty built-in.o
253cmd_link_o_target = $(if $(strip $(obj-y)),\
254 $(LD) $(ld_flags) -r -o $@ $(filter $(obj-y), $^),\
255 rm -f $@; $(AR) rcs $@)
256
257$(builtin-target): $(obj-y) FORCE
258 $(call if_changed,link_o_target)
259
260targets += $(builtin-target)
261endif # builtin-target
262
263#
264# Rule to compile a set of .o files into one .a file
265#
266ifdef lib-target
267quiet_cmd_link_l_target = AR $@
268cmd_link_l_target = rm -f $@; $(AR) $(EXTRA_ARFLAGS) rcs $@ $(lib-y)
269
270$(lib-target): $(lib-y) FORCE
271 $(call if_changed,link_l_target)
272
273targets += $(lib-target)
274endif
275
276#
277# Rule to link composite objects
278#
279# Composite objects are specified in kbuild makefile as follows:
280# <composite-object>-objs := <list of .o files>
281# or
282# <composite-object>-y := <list of .o files>
283link_multi_deps = \
284$(filter $(addprefix $(obj)/, \
285$($(subst $(obj)/,,$(@:.o=-objs))) \
286$($(subst $(obj)/,,$(@:.o=-y)))), $^)
Denis Vlasenkof7996f32007-01-11 17:20:00 +0000287
Denis Vlasenko7d219aa2006-10-05 10:17:08 +0000288quiet_cmd_link_multi-y = LD $@
289cmd_link_multi-y = $(LD) $(ld_flags) -r -o $@ $(link_multi_deps)
290
291quiet_cmd_link_multi-m = LD [M] $@
292cmd_link_multi-m = $(LD) $(ld_flags) $(LDFLAGS_MODULE) -o $@ $(link_multi_deps)
293
294# We would rather have a list of rules like
295# foo.o: $(foo-objs)
296# but that's not so easy, so we rather make all composite objects depend
297# on the set of all their parts
298$(multi-used-y) : %.o: $(multi-objs-y) FORCE
299 $(call if_changed,link_multi-y)
300
301$(multi-used-m) : %.o: $(multi-objs-m) FORCE
302 $(call if_changed,link_multi-m)
303 @{ echo $(@:.o=.ko); echo $(link_multi_deps); } > $(MODVERDIR)/$(@F:.o=.mod)
304
305targets += $(multi-used-y) $(multi-used-m)
306
307
308# Descending
309# ---------------------------------------------------------------------------
310
311PHONY += $(subdir-ym)
312$(subdir-ym):
313 $(Q)$(MAKE) $(build)=$@
314
315# Add FORCE to the prequisites of a target to force it to be always rebuilt.
316# ---------------------------------------------------------------------------
317
318PHONY += FORCE
319
320FORCE:
321
322# Read all saved command lines and dependencies for the $(targets) we
323# may be building above, using $(if_changed{,_dep}). As an
324# optimization, we don't need to read them if the target does not
325# exist, we will rebuild anyway in that case.
326
327targets := $(wildcard $(sort $(targets)))
328cmd_files := $(wildcard $(foreach f,$(targets),$(dir $(f)).$(notdir $(f)).cmd))
329
330ifneq ($(cmd_files),)
331 include $(cmd_files)
332endif
333
334
335# Declare the contents of the .PHONY variable as phony. We keep that
336# information in a variable se we can use it in if_changed and friends.
337
338.PHONY: $(PHONY)