blob: 9eba51b92f72346b8288705bf8aaa73ab81ee214 [file] [log] [blame]
Kyle Swenson8d8f6542021-03-15 11:02:55 -06001/**
2 * dwc3-exynos.c - Samsung EXYNOS DWC3 Specific Glue layer
3 *
4 * Copyright (c) 2012 Samsung Electronics Co., Ltd.
5 * http://www.samsung.com
6 *
7 * Author: Anton Tikhomirov <av.tikhomirov@samsung.com>
8 *
9 * This program is free software: you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 of
11 * the License as published by the Free Software Foundation.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 */
18
19#include <linux/module.h>
20#include <linux/kernel.h>
21#include <linux/slab.h>
22#include <linux/platform_device.h>
23#include <linux/dma-mapping.h>
24#include <linux/clk.h>
25#include <linux/usb/otg.h>
26#include <linux/usb/usb_phy_generic.h>
27#include <linux/of.h>
28#include <linux/of_platform.h>
29#include <linux/regulator/consumer.h>
30
31struct dwc3_exynos {
32 struct platform_device *usb2_phy;
33 struct platform_device *usb3_phy;
34 struct device *dev;
35
36 struct clk *clk;
37 struct clk *susp_clk;
38 struct clk *axius_clk;
39
40 struct regulator *vdd33;
41 struct regulator *vdd10;
42};
43
44static int dwc3_exynos_register_phys(struct dwc3_exynos *exynos)
45{
46 struct usb_phy_generic_platform_data pdata;
47 struct platform_device *pdev;
48 int ret;
49
50 memset(&pdata, 0x00, sizeof(pdata));
51
52 pdev = platform_device_alloc("usb_phy_generic", PLATFORM_DEVID_AUTO);
53 if (!pdev)
54 return -ENOMEM;
55
56 exynos->usb2_phy = pdev;
57 pdata.type = USB_PHY_TYPE_USB2;
58 pdata.gpio_reset = -1;
59
60 ret = platform_device_add_data(exynos->usb2_phy, &pdata, sizeof(pdata));
61 if (ret)
62 goto err1;
63
64 pdev = platform_device_alloc("usb_phy_generic", PLATFORM_DEVID_AUTO);
65 if (!pdev) {
66 ret = -ENOMEM;
67 goto err1;
68 }
69
70 exynos->usb3_phy = pdev;
71 pdata.type = USB_PHY_TYPE_USB3;
72
73 ret = platform_device_add_data(exynos->usb3_phy, &pdata, sizeof(pdata));
74 if (ret)
75 goto err2;
76
77 ret = platform_device_add(exynos->usb2_phy);
78 if (ret)
79 goto err2;
80
81 ret = platform_device_add(exynos->usb3_phy);
82 if (ret)
83 goto err3;
84
85 return 0;
86
87err3:
88 platform_device_del(exynos->usb2_phy);
89
90err2:
91 platform_device_put(exynos->usb3_phy);
92
93err1:
94 platform_device_put(exynos->usb2_phy);
95
96 return ret;
97}
98
99static int dwc3_exynos_remove_child(struct device *dev, void *unused)
100{
101 struct platform_device *pdev = to_platform_device(dev);
102
103 platform_device_unregister(pdev);
104
105 return 0;
106}
107
108static int dwc3_exynos_probe(struct platform_device *pdev)
109{
110 struct dwc3_exynos *exynos;
111 struct device *dev = &pdev->dev;
112 struct device_node *node = dev->of_node;
113
114 int ret;
115
116 exynos = devm_kzalloc(dev, sizeof(*exynos), GFP_KERNEL);
117 if (!exynos)
118 return -ENOMEM;
119
120 /*
121 * Right now device-tree probed devices don't get dma_mask set.
122 * Since shared usb code relies on it, set it here for now.
123 * Once we move to full device tree support this will vanish off.
124 */
125 ret = dma_coerce_mask_and_coherent(dev, DMA_BIT_MASK(32));
126 if (ret)
127 return ret;
128
129 platform_set_drvdata(pdev, exynos);
130
131 exynos->dev = dev;
132
133 exynos->clk = devm_clk_get(dev, "usbdrd30");
134 if (IS_ERR(exynos->clk)) {
135 dev_err(dev, "couldn't get clock\n");
136 return -EINVAL;
137 }
138 clk_prepare_enable(exynos->clk);
139
140 exynos->susp_clk = devm_clk_get(dev, "usbdrd30_susp_clk");
141 if (IS_ERR(exynos->susp_clk)) {
142 dev_info(dev, "no suspend clk specified\n");
143 exynos->susp_clk = NULL;
144 }
145 clk_prepare_enable(exynos->susp_clk);
146
147 if (of_device_is_compatible(node, "samsung,exynos7-dwusb3")) {
148 exynos->axius_clk = devm_clk_get(dev, "usbdrd30_axius_clk");
149 if (IS_ERR(exynos->axius_clk)) {
150 dev_err(dev, "no AXI UpScaler clk specified\n");
151 ret = -ENODEV;
152 goto axius_clk_err;
153 }
154 clk_prepare_enable(exynos->axius_clk);
155 } else {
156 exynos->axius_clk = NULL;
157 }
158
159 exynos->vdd33 = devm_regulator_get(dev, "vdd33");
160 if (IS_ERR(exynos->vdd33)) {
161 ret = PTR_ERR(exynos->vdd33);
162 goto err2;
163 }
164 ret = regulator_enable(exynos->vdd33);
165 if (ret) {
166 dev_err(dev, "Failed to enable VDD33 supply\n");
167 goto err2;
168 }
169
170 exynos->vdd10 = devm_regulator_get(dev, "vdd10");
171 if (IS_ERR(exynos->vdd10)) {
172 ret = PTR_ERR(exynos->vdd10);
173 goto err3;
174 }
175 ret = regulator_enable(exynos->vdd10);
176 if (ret) {
177 dev_err(dev, "Failed to enable VDD10 supply\n");
178 goto err3;
179 }
180
181 ret = dwc3_exynos_register_phys(exynos);
182 if (ret) {
183 dev_err(dev, "couldn't register PHYs\n");
184 goto err4;
185 }
186
187 if (node) {
188 ret = of_platform_populate(node, NULL, NULL, dev);
189 if (ret) {
190 dev_err(dev, "failed to add dwc3 core\n");
191 goto err5;
192 }
193 } else {
194 dev_err(dev, "no device node, failed to add dwc3 core\n");
195 ret = -ENODEV;
196 goto err5;
197 }
198
199 return 0;
200
201err5:
202 platform_device_unregister(exynos->usb2_phy);
203 platform_device_unregister(exynos->usb3_phy);
204err4:
205 regulator_disable(exynos->vdd10);
206err3:
207 regulator_disable(exynos->vdd33);
208err2:
209 clk_disable_unprepare(exynos->axius_clk);
210axius_clk_err:
211 clk_disable_unprepare(exynos->susp_clk);
212 clk_disable_unprepare(exynos->clk);
213 return ret;
214}
215
216static int dwc3_exynos_remove(struct platform_device *pdev)
217{
218 struct dwc3_exynos *exynos = platform_get_drvdata(pdev);
219
220 device_for_each_child(&pdev->dev, NULL, dwc3_exynos_remove_child);
221 platform_device_unregister(exynos->usb2_phy);
222 platform_device_unregister(exynos->usb3_phy);
223
224 clk_disable_unprepare(exynos->axius_clk);
225 clk_disable_unprepare(exynos->susp_clk);
226 clk_disable_unprepare(exynos->clk);
227
228 regulator_disable(exynos->vdd33);
229 regulator_disable(exynos->vdd10);
230
231 return 0;
232}
233
234static const struct of_device_id exynos_dwc3_match[] = {
235 { .compatible = "samsung,exynos5250-dwusb3" },
236 { .compatible = "samsung,exynos7-dwusb3" },
237 {},
238};
239MODULE_DEVICE_TABLE(of, exynos_dwc3_match);
240
241#ifdef CONFIG_PM_SLEEP
242static int dwc3_exynos_suspend(struct device *dev)
243{
244 struct dwc3_exynos *exynos = dev_get_drvdata(dev);
245
246 clk_disable(exynos->axius_clk);
247 clk_disable(exynos->clk);
248
249 regulator_disable(exynos->vdd33);
250 regulator_disable(exynos->vdd10);
251
252 return 0;
253}
254
255static int dwc3_exynos_resume(struct device *dev)
256{
257 struct dwc3_exynos *exynos = dev_get_drvdata(dev);
258 int ret;
259
260 ret = regulator_enable(exynos->vdd33);
261 if (ret) {
262 dev_err(dev, "Failed to enable VDD33 supply\n");
263 return ret;
264 }
265 ret = regulator_enable(exynos->vdd10);
266 if (ret) {
267 dev_err(dev, "Failed to enable VDD10 supply\n");
268 return ret;
269 }
270
271 clk_enable(exynos->clk);
272 clk_enable(exynos->axius_clk);
273
274 /* runtime set active to reflect active state. */
275 pm_runtime_disable(dev);
276 pm_runtime_set_active(dev);
277 pm_runtime_enable(dev);
278
279 return 0;
280}
281
282static const struct dev_pm_ops dwc3_exynos_dev_pm_ops = {
283 SET_SYSTEM_SLEEP_PM_OPS(dwc3_exynos_suspend, dwc3_exynos_resume)
284};
285
286#define DEV_PM_OPS (&dwc3_exynos_dev_pm_ops)
287#else
288#define DEV_PM_OPS NULL
289#endif /* CONFIG_PM_SLEEP */
290
291static struct platform_driver dwc3_exynos_driver = {
292 .probe = dwc3_exynos_probe,
293 .remove = dwc3_exynos_remove,
294 .driver = {
295 .name = "exynos-dwc3",
296 .of_match_table = exynos_dwc3_match,
297 .pm = DEV_PM_OPS,
298 },
299};
300
301module_platform_driver(dwc3_exynos_driver);
302
303MODULE_ALIAS("platform:exynos-dwc3");
304MODULE_AUTHOR("Anton Tikhomirov <av.tikhomirov@samsung.com>");
305MODULE_LICENSE("GPL v2");
306MODULE_DESCRIPTION("DesignWare USB3 EXYNOS Glue Layer");