| Kyle Swenson | 8d8f654 | 2021-03-15 11:02:55 -0600 | [diff] [blame] | 1 | /* |
| 2 | * pata_cypress.c - Cypress PATA for new ATA layer |
| 3 | * (C) 2006 Red Hat Inc |
| 4 | * Alan Cox |
| 5 | * |
| 6 | * Based heavily on |
| 7 | * linux/drivers/ide/pci/cy82c693.c Version 0.40 Sep. 10, 2002 |
| 8 | * |
| 9 | */ |
| 10 | |
| 11 | #include <linux/kernel.h> |
| 12 | #include <linux/module.h> |
| 13 | #include <linux/pci.h> |
| 14 | #include <linux/blkdev.h> |
| 15 | #include <linux/delay.h> |
| 16 | #include <scsi/scsi_host.h> |
| 17 | #include <linux/libata.h> |
| 18 | |
| 19 | #define DRV_NAME "pata_cypress" |
| 20 | #define DRV_VERSION "0.1.5" |
| 21 | |
| 22 | /* here are the offset definitions for the registers */ |
| 23 | |
| 24 | enum { |
| 25 | CY82_IDE_CMDREG = 0x04, |
| 26 | CY82_IDE_ADDRSETUP = 0x48, |
| 27 | CY82_IDE_MASTER_IOR = 0x4C, |
| 28 | CY82_IDE_MASTER_IOW = 0x4D, |
| 29 | CY82_IDE_SLAVE_IOR = 0x4E, |
| 30 | CY82_IDE_SLAVE_IOW = 0x4F, |
| 31 | CY82_IDE_MASTER_8BIT = 0x50, |
| 32 | CY82_IDE_SLAVE_8BIT = 0x51, |
| 33 | |
| 34 | CY82_INDEX_PORT = 0x22, |
| 35 | CY82_DATA_PORT = 0x23, |
| 36 | |
| 37 | CY82_INDEX_CTRLREG1 = 0x01, |
| 38 | CY82_INDEX_CHANNEL0 = 0x30, |
| 39 | CY82_INDEX_CHANNEL1 = 0x31, |
| 40 | CY82_INDEX_TIMEOUT = 0x32 |
| 41 | }; |
| 42 | |
| 43 | /** |
| 44 | * cy82c693_set_piomode - set initial PIO mode data |
| 45 | * @ap: ATA interface |
| 46 | * @adev: ATA device |
| 47 | * |
| 48 | * Called to do the PIO mode setup. |
| 49 | */ |
| 50 | |
| 51 | static void cy82c693_set_piomode(struct ata_port *ap, struct ata_device *adev) |
| 52 | { |
| 53 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); |
| 54 | struct ata_timing t; |
| 55 | const unsigned long T = 1000000 / 33; |
| 56 | short time_16, time_8; |
| 57 | u32 addr; |
| 58 | |
| 59 | if (ata_timing_compute(adev, adev->pio_mode, &t, T, 1) < 0) { |
| 60 | printk(KERN_ERR DRV_NAME ": mome computation failed.\n"); |
| 61 | return; |
| 62 | } |
| 63 | |
| 64 | time_16 = clamp_val(t.recover - 1, 0, 15) | |
| 65 | (clamp_val(t.active - 1, 0, 15) << 4); |
| 66 | time_8 = clamp_val(t.act8b - 1, 0, 15) | |
| 67 | (clamp_val(t.rec8b - 1, 0, 15) << 4); |
| 68 | |
| 69 | if (adev->devno == 0) { |
| 70 | pci_read_config_dword(pdev, CY82_IDE_ADDRSETUP, &addr); |
| 71 | |
| 72 | addr &= ~0x0F; /* Mask bits */ |
| 73 | addr |= clamp_val(t.setup - 1, 0, 15); |
| 74 | |
| 75 | pci_write_config_dword(pdev, CY82_IDE_ADDRSETUP, addr); |
| 76 | pci_write_config_byte(pdev, CY82_IDE_MASTER_IOR, time_16); |
| 77 | pci_write_config_byte(pdev, CY82_IDE_MASTER_IOW, time_16); |
| 78 | pci_write_config_byte(pdev, CY82_IDE_MASTER_8BIT, time_8); |
| 79 | } else { |
| 80 | pci_read_config_dword(pdev, CY82_IDE_ADDRSETUP, &addr); |
| 81 | |
| 82 | addr &= ~0xF0; /* Mask bits */ |
| 83 | addr |= (clamp_val(t.setup - 1, 0, 15) << 4); |
| 84 | |
| 85 | pci_write_config_dword(pdev, CY82_IDE_ADDRSETUP, addr); |
| 86 | pci_write_config_byte(pdev, CY82_IDE_SLAVE_IOR, time_16); |
| 87 | pci_write_config_byte(pdev, CY82_IDE_SLAVE_IOW, time_16); |
| 88 | pci_write_config_byte(pdev, CY82_IDE_SLAVE_8BIT, time_8); |
| 89 | } |
| 90 | } |
| 91 | |
| 92 | /** |
| 93 | * cy82c693_set_dmamode - set initial DMA mode data |
| 94 | * @ap: ATA interface |
| 95 | * @adev: ATA device |
| 96 | * |
| 97 | * Called to do the DMA mode setup. |
| 98 | */ |
| 99 | |
| 100 | static void cy82c693_set_dmamode(struct ata_port *ap, struct ata_device *adev) |
| 101 | { |
| 102 | int reg = CY82_INDEX_CHANNEL0 + ap->port_no; |
| 103 | |
| 104 | /* Be afraid, be very afraid. Magic registers in low I/O space */ |
| 105 | outb(reg, 0x22); |
| 106 | outb(adev->dma_mode - XFER_MW_DMA_0, 0x23); |
| 107 | |
| 108 | /* 0x50 gives the best behaviour on the Alpha's using this chip */ |
| 109 | outb(CY82_INDEX_TIMEOUT, 0x22); |
| 110 | outb(0x50, 0x23); |
| 111 | } |
| 112 | |
| 113 | static struct scsi_host_template cy82c693_sht = { |
| 114 | ATA_BMDMA_SHT(DRV_NAME), |
| 115 | }; |
| 116 | |
| 117 | static struct ata_port_operations cy82c693_port_ops = { |
| 118 | .inherits = &ata_bmdma_port_ops, |
| 119 | .cable_detect = ata_cable_40wire, |
| 120 | .set_piomode = cy82c693_set_piomode, |
| 121 | .set_dmamode = cy82c693_set_dmamode, |
| 122 | }; |
| 123 | |
| 124 | static int cy82c693_init_one(struct pci_dev *pdev, const struct pci_device_id *id) |
| 125 | { |
| 126 | static const struct ata_port_info info = { |
| 127 | .flags = ATA_FLAG_SLAVE_POSS, |
| 128 | .pio_mask = ATA_PIO4, |
| 129 | .mwdma_mask = ATA_MWDMA2, |
| 130 | .port_ops = &cy82c693_port_ops |
| 131 | }; |
| 132 | const struct ata_port_info *ppi[] = { &info, &ata_dummy_port_info }; |
| 133 | |
| 134 | /* Devfn 1 is the ATA primary. The secondary is magic and on devfn2. |
| 135 | For the moment we don't handle the secondary. FIXME */ |
| 136 | |
| 137 | if (PCI_FUNC(pdev->devfn) != 1) |
| 138 | return -ENODEV; |
| 139 | |
| 140 | return ata_pci_bmdma_init_one(pdev, ppi, &cy82c693_sht, NULL, 0); |
| 141 | } |
| 142 | |
| 143 | static const struct pci_device_id cy82c693[] = { |
| 144 | { PCI_VDEVICE(CONTAQ, PCI_DEVICE_ID_CONTAQ_82C693), }, |
| 145 | |
| 146 | { }, |
| 147 | }; |
| 148 | |
| 149 | static struct pci_driver cy82c693_pci_driver = { |
| 150 | .name = DRV_NAME, |
| 151 | .id_table = cy82c693, |
| 152 | .probe = cy82c693_init_one, |
| 153 | .remove = ata_pci_remove_one, |
| 154 | #ifdef CONFIG_PM_SLEEP |
| 155 | .suspend = ata_pci_device_suspend, |
| 156 | .resume = ata_pci_device_resume, |
| 157 | #endif |
| 158 | }; |
| 159 | |
| 160 | module_pci_driver(cy82c693_pci_driver); |
| 161 | |
| 162 | MODULE_AUTHOR("Alan Cox"); |
| 163 | MODULE_DESCRIPTION("low-level driver for the CY82C693 PATA controller"); |
| 164 | MODULE_LICENSE("GPL"); |
| 165 | MODULE_DEVICE_TABLE(pci, cy82c693); |
| 166 | MODULE_VERSION(DRV_VERSION); |