Kyle Swenson | 8d8f654 | 2021-03-15 11:02:55 -0600 | [diff] [blame] | 1 | /* |
| 2 | * Broadcom specific AMBA |
| 3 | * ChipCommon B Unit driver |
| 4 | * |
| 5 | * Copyright 2014, Hauke Mehrtens <hauke@hauke-m.de> |
| 6 | * |
| 7 | * Licensed under the GNU/GPL. See COPYING for details. |
| 8 | */ |
| 9 | |
| 10 | #include "bcma_private.h" |
| 11 | #include <linux/export.h> |
| 12 | #include <linux/bcma/bcma.h> |
| 13 | |
| 14 | static bool bcma_wait_reg(struct bcma_bus *bus, void __iomem *addr, u32 mask, |
| 15 | u32 value, int timeout) |
| 16 | { |
| 17 | unsigned long deadline = jiffies + timeout; |
| 18 | u32 val; |
| 19 | |
| 20 | do { |
| 21 | val = readl(addr); |
| 22 | if ((val & mask) == value) |
| 23 | return true; |
| 24 | cpu_relax(); |
| 25 | udelay(10); |
| 26 | } while (!time_after_eq(jiffies, deadline)); |
| 27 | |
| 28 | bcma_err(bus, "Timeout waiting for register %p\n", addr); |
| 29 | |
| 30 | return false; |
| 31 | } |
| 32 | |
| 33 | void bcma_chipco_b_mii_write(struct bcma_drv_cc_b *ccb, u32 offset, u32 value) |
| 34 | { |
| 35 | struct bcma_bus *bus = ccb->core->bus; |
| 36 | |
| 37 | writel(offset, ccb->mii + 0x00); |
| 38 | bcma_wait_reg(bus, ccb->mii + 0x00, 0x0100, 0x0000, 100); |
| 39 | writel(value, ccb->mii + 0x04); |
| 40 | bcma_wait_reg(bus, ccb->mii + 0x00, 0x0100, 0x0000, 100); |
| 41 | } |
| 42 | EXPORT_SYMBOL_GPL(bcma_chipco_b_mii_write); |
| 43 | |
| 44 | int bcma_core_chipcommon_b_init(struct bcma_drv_cc_b *ccb) |
| 45 | { |
| 46 | if (ccb->setup_done) |
| 47 | return 0; |
| 48 | |
| 49 | ccb->setup_done = 1; |
| 50 | ccb->mii = ioremap_nocache(ccb->core->addr_s[1], BCMA_CORE_SIZE); |
| 51 | if (!ccb->mii) |
| 52 | return -ENOMEM; |
| 53 | |
| 54 | return 0; |
| 55 | } |
| 56 | |
| 57 | void bcma_core_chipcommon_b_free(struct bcma_drv_cc_b *ccb) |
| 58 | { |
| 59 | if (ccb->mii) |
| 60 | iounmap(ccb->mii); |
| 61 | } |