Kyle Swenson | 8d8f654 | 2021-03-15 11:02:55 -0600 | [diff] [blame] | 1 | /* |
| 2 | * Standalone EHCI usb debug driver |
| 3 | * |
| 4 | * Originally written by: |
| 5 | * Eric W. Biederman" <ebiederm@xmission.com> and |
| 6 | * Yinghai Lu <yhlu.kernel@gmail.com> |
| 7 | * |
| 8 | * Changes for early/late printk and HW errata: |
| 9 | * Jason Wessel <jason.wessel@windriver.com> |
| 10 | * Copyright (C) 2009 Wind River Systems, Inc. |
| 11 | * |
| 12 | */ |
| 13 | |
| 14 | #include <linux/console.h> |
| 15 | #include <linux/errno.h> |
| 16 | #include <linux/module.h> |
| 17 | #include <linux/pci_regs.h> |
| 18 | #include <linux/pci_ids.h> |
| 19 | #include <linux/usb/ch9.h> |
| 20 | #include <linux/usb/ehci_def.h> |
| 21 | #include <linux/delay.h> |
| 22 | #include <linux/serial_core.h> |
| 23 | #include <linux/kconfig.h> |
| 24 | #include <linux/kgdb.h> |
| 25 | #include <linux/kthread.h> |
| 26 | #include <asm/io.h> |
| 27 | #include <asm/pci-direct.h> |
| 28 | #include <asm/fixmap.h> |
| 29 | |
| 30 | /* The code here is intended to talk directly to the EHCI debug port |
| 31 | * and does not require that you have any kind of USB host controller |
| 32 | * drivers or USB device drivers compiled into the kernel. |
| 33 | * |
| 34 | * If you make a change to anything in here, the following test cases |
| 35 | * need to pass where a USB debug device works in the following |
| 36 | * configurations. |
| 37 | * |
| 38 | * 1. boot args: earlyprintk=dbgp |
| 39 | * o kernel compiled with # CONFIG_USB_EHCI_HCD is not set |
| 40 | * o kernel compiled with CONFIG_USB_EHCI_HCD=y |
| 41 | * 2. boot args: earlyprintk=dbgp,keep |
| 42 | * o kernel compiled with # CONFIG_USB_EHCI_HCD is not set |
| 43 | * o kernel compiled with CONFIG_USB_EHCI_HCD=y |
| 44 | * 3. boot args: earlyprintk=dbgp console=ttyUSB0 |
| 45 | * o kernel has CONFIG_USB_EHCI_HCD=y and |
| 46 | * CONFIG_USB_SERIAL_DEBUG=y |
| 47 | * 4. boot args: earlyprintk=vga,dbgp |
| 48 | * o kernel compiled with # CONFIG_USB_EHCI_HCD is not set |
| 49 | * o kernel compiled with CONFIG_USB_EHCI_HCD=y |
| 50 | * |
| 51 | * For the 4th configuration you can turn on or off the DBGP_DEBUG |
| 52 | * such that you can debug the dbgp device's driver code. |
| 53 | */ |
| 54 | |
| 55 | static int dbgp_phys_port = 1; |
| 56 | |
| 57 | static struct ehci_caps __iomem *ehci_caps; |
| 58 | static struct ehci_regs __iomem *ehci_regs; |
| 59 | static struct ehci_dbg_port __iomem *ehci_debug; |
| 60 | static int dbgp_not_safe; /* Cannot use debug device during ehci reset */ |
| 61 | static unsigned int dbgp_endpoint_out; |
| 62 | static unsigned int dbgp_endpoint_in; |
| 63 | |
| 64 | struct ehci_dev { |
| 65 | u32 bus; |
| 66 | u32 slot; |
| 67 | u32 func; |
| 68 | }; |
| 69 | |
| 70 | static struct ehci_dev ehci_dev; |
| 71 | |
| 72 | #define USB_DEBUG_DEVNUM 127 |
| 73 | |
| 74 | #ifdef DBGP_DEBUG |
| 75 | #define dbgp_printk printk |
| 76 | static void dbgp_ehci_status(char *str) |
| 77 | { |
| 78 | if (!ehci_debug) |
| 79 | return; |
| 80 | dbgp_printk("dbgp: %s\n", str); |
| 81 | dbgp_printk(" Debug control: %08x", readl(&ehci_debug->control)); |
| 82 | dbgp_printk(" ehci cmd : %08x", readl(&ehci_regs->command)); |
| 83 | dbgp_printk(" ehci conf flg: %08x\n", |
| 84 | readl(&ehci_regs->configured_flag)); |
| 85 | dbgp_printk(" ehci status : %08x", readl(&ehci_regs->status)); |
| 86 | dbgp_printk(" ehci portsc : %08x\n", |
| 87 | readl(&ehci_regs->port_status[dbgp_phys_port - 1])); |
| 88 | } |
| 89 | #else |
| 90 | static inline void dbgp_ehci_status(char *str) { } |
| 91 | static inline void dbgp_printk(const char *fmt, ...) { } |
| 92 | #endif |
| 93 | |
| 94 | static inline u32 dbgp_len_update(u32 x, u32 len) |
| 95 | { |
| 96 | return (x & ~0x0f) | (len & 0x0f); |
| 97 | } |
| 98 | |
| 99 | #ifdef CONFIG_KGDB |
| 100 | static struct kgdb_io kgdbdbgp_io_ops; |
| 101 | #define dbgp_kgdb_mode (dbg_io_ops == &kgdbdbgp_io_ops) |
| 102 | #else |
| 103 | #define dbgp_kgdb_mode (0) |
| 104 | #endif |
| 105 | |
| 106 | /* Local version of HC_LENGTH macro as ehci struct is not available here */ |
| 107 | #define EARLY_HC_LENGTH(p) (0x00ff & (p)) /* bits 7 : 0 */ |
| 108 | |
| 109 | /* |
| 110 | * USB Packet IDs (PIDs) |
| 111 | */ |
| 112 | |
| 113 | /* token */ |
| 114 | #define USB_PID_OUT 0xe1 |
| 115 | #define USB_PID_IN 0x69 |
| 116 | #define USB_PID_SOF 0xa5 |
| 117 | #define USB_PID_SETUP 0x2d |
| 118 | /* handshake */ |
| 119 | #define USB_PID_ACK 0xd2 |
| 120 | #define USB_PID_NAK 0x5a |
| 121 | #define USB_PID_STALL 0x1e |
| 122 | #define USB_PID_NYET 0x96 |
| 123 | /* data */ |
| 124 | #define USB_PID_DATA0 0xc3 |
| 125 | #define USB_PID_DATA1 0x4b |
| 126 | #define USB_PID_DATA2 0x87 |
| 127 | #define USB_PID_MDATA 0x0f |
| 128 | /* Special */ |
| 129 | #define USB_PID_PREAMBLE 0x3c |
| 130 | #define USB_PID_ERR 0x3c |
| 131 | #define USB_PID_SPLIT 0x78 |
| 132 | #define USB_PID_PING 0xb4 |
| 133 | #define USB_PID_UNDEF_0 0xf0 |
| 134 | |
| 135 | #define USB_PID_DATA_TOGGLE 0x88 |
| 136 | #define DBGP_CLAIM (DBGP_OWNER | DBGP_ENABLED | DBGP_INUSE) |
| 137 | |
| 138 | #define PCI_CAP_ID_EHCI_DEBUG 0xa |
| 139 | |
| 140 | #define HUB_ROOT_RESET_TIME 50 /* times are in msec */ |
| 141 | #define HUB_SHORT_RESET_TIME 10 |
| 142 | #define HUB_LONG_RESET_TIME 200 |
| 143 | #define HUB_RESET_TIMEOUT 500 |
| 144 | |
| 145 | #define DBGP_MAX_PACKET 8 |
| 146 | #define DBGP_TIMEOUT (250 * 1000) |
| 147 | #define DBGP_LOOPS 1000 |
| 148 | |
| 149 | static inline u32 dbgp_pid_write_update(u32 x, u32 tok) |
| 150 | { |
| 151 | static int data0 = USB_PID_DATA1; |
| 152 | data0 ^= USB_PID_DATA_TOGGLE; |
| 153 | return (x & 0xffff0000) | (data0 << 8) | (tok & 0xff); |
| 154 | } |
| 155 | |
| 156 | static inline u32 dbgp_pid_read_update(u32 x, u32 tok) |
| 157 | { |
| 158 | return (x & 0xffff0000) | (USB_PID_DATA0 << 8) | (tok & 0xff); |
| 159 | } |
| 160 | |
| 161 | static int dbgp_wait_until_complete(void) |
| 162 | { |
| 163 | u32 ctrl; |
| 164 | int loop = DBGP_TIMEOUT; |
| 165 | |
| 166 | do { |
| 167 | ctrl = readl(&ehci_debug->control); |
| 168 | /* Stop when the transaction is finished */ |
| 169 | if (ctrl & DBGP_DONE) |
| 170 | break; |
| 171 | udelay(1); |
| 172 | } while (--loop > 0); |
| 173 | |
| 174 | if (!loop) |
| 175 | return -DBGP_TIMEOUT; |
| 176 | |
| 177 | /* |
| 178 | * Now that we have observed the completed transaction, |
| 179 | * clear the done bit. |
| 180 | */ |
| 181 | writel(ctrl | DBGP_DONE, &ehci_debug->control); |
| 182 | return (ctrl & DBGP_ERROR) ? -DBGP_ERRCODE(ctrl) : DBGP_LEN(ctrl); |
| 183 | } |
| 184 | |
| 185 | static inline void dbgp_mdelay(int ms) |
| 186 | { |
| 187 | int i; |
| 188 | |
| 189 | while (ms--) { |
| 190 | for (i = 0; i < 1000; i++) |
| 191 | outb(0x1, 0x80); |
| 192 | } |
| 193 | } |
| 194 | |
| 195 | static void dbgp_breath(void) |
| 196 | { |
| 197 | /* Sleep to give the debug port a chance to breathe */ |
| 198 | } |
| 199 | |
| 200 | static int dbgp_wait_until_done(unsigned ctrl, int loop) |
| 201 | { |
| 202 | u32 pids, lpid; |
| 203 | int ret; |
| 204 | |
| 205 | retry: |
| 206 | writel(ctrl | DBGP_GO, &ehci_debug->control); |
| 207 | ret = dbgp_wait_until_complete(); |
| 208 | pids = readl(&ehci_debug->pids); |
| 209 | lpid = DBGP_PID_GET(pids); |
| 210 | |
| 211 | if (ret < 0) { |
| 212 | /* A -DBGP_TIMEOUT failure here means the device has |
| 213 | * failed, perhaps because it was unplugged, in which |
| 214 | * case we do not want to hang the system so the dbgp |
| 215 | * will be marked as unsafe to use. EHCI reset is the |
| 216 | * only way to recover if you unplug the dbgp device. |
| 217 | */ |
| 218 | if (ret == -DBGP_TIMEOUT && !dbgp_not_safe) |
| 219 | dbgp_not_safe = 1; |
| 220 | if (ret == -DBGP_ERR_BAD && --loop > 0) |
| 221 | goto retry; |
| 222 | return ret; |
| 223 | } |
| 224 | |
| 225 | /* |
| 226 | * If the port is getting full or it has dropped data |
| 227 | * start pacing ourselves, not necessary but it's friendly. |
| 228 | */ |
| 229 | if ((lpid == USB_PID_NAK) || (lpid == USB_PID_NYET)) |
| 230 | dbgp_breath(); |
| 231 | |
| 232 | /* If I get a NACK reissue the transmission */ |
| 233 | if (lpid == USB_PID_NAK) { |
| 234 | if (--loop > 0) |
| 235 | goto retry; |
| 236 | } |
| 237 | |
| 238 | return ret; |
| 239 | } |
| 240 | |
| 241 | static inline void dbgp_set_data(const void *buf, int size) |
| 242 | { |
| 243 | const unsigned char *bytes = buf; |
| 244 | u32 lo, hi; |
| 245 | int i; |
| 246 | |
| 247 | lo = hi = 0; |
| 248 | for (i = 0; i < 4 && i < size; i++) |
| 249 | lo |= bytes[i] << (8*i); |
| 250 | for (; i < 8 && i < size; i++) |
| 251 | hi |= bytes[i] << (8*(i - 4)); |
| 252 | writel(lo, &ehci_debug->data03); |
| 253 | writel(hi, &ehci_debug->data47); |
| 254 | } |
| 255 | |
| 256 | static inline void dbgp_get_data(void *buf, int size) |
| 257 | { |
| 258 | unsigned char *bytes = buf; |
| 259 | u32 lo, hi; |
| 260 | int i; |
| 261 | |
| 262 | lo = readl(&ehci_debug->data03); |
| 263 | hi = readl(&ehci_debug->data47); |
| 264 | for (i = 0; i < 4 && i < size; i++) |
| 265 | bytes[i] = (lo >> (8*i)) & 0xff; |
| 266 | for (; i < 8 && i < size; i++) |
| 267 | bytes[i] = (hi >> (8*(i - 4))) & 0xff; |
| 268 | } |
| 269 | |
| 270 | static int dbgp_bulk_write(unsigned devnum, unsigned endpoint, |
| 271 | const char *bytes, int size) |
| 272 | { |
| 273 | int ret; |
| 274 | u32 addr; |
| 275 | u32 pids, ctrl; |
| 276 | |
| 277 | if (size > DBGP_MAX_PACKET) |
| 278 | return -1; |
| 279 | |
| 280 | addr = DBGP_EPADDR(devnum, endpoint); |
| 281 | |
| 282 | pids = readl(&ehci_debug->pids); |
| 283 | pids = dbgp_pid_write_update(pids, USB_PID_OUT); |
| 284 | |
| 285 | ctrl = readl(&ehci_debug->control); |
| 286 | ctrl = dbgp_len_update(ctrl, size); |
| 287 | ctrl |= DBGP_OUT; |
| 288 | ctrl |= DBGP_GO; |
| 289 | |
| 290 | dbgp_set_data(bytes, size); |
| 291 | writel(addr, &ehci_debug->address); |
| 292 | writel(pids, &ehci_debug->pids); |
| 293 | ret = dbgp_wait_until_done(ctrl, DBGP_LOOPS); |
| 294 | |
| 295 | return ret; |
| 296 | } |
| 297 | |
| 298 | static int dbgp_bulk_read(unsigned devnum, unsigned endpoint, void *data, |
| 299 | int size, int loops) |
| 300 | { |
| 301 | u32 pids, addr, ctrl; |
| 302 | int ret; |
| 303 | |
| 304 | if (size > DBGP_MAX_PACKET) |
| 305 | return -1; |
| 306 | |
| 307 | addr = DBGP_EPADDR(devnum, endpoint); |
| 308 | |
| 309 | pids = readl(&ehci_debug->pids); |
| 310 | pids = dbgp_pid_read_update(pids, USB_PID_IN); |
| 311 | |
| 312 | ctrl = readl(&ehci_debug->control); |
| 313 | ctrl = dbgp_len_update(ctrl, size); |
| 314 | ctrl &= ~DBGP_OUT; |
| 315 | ctrl |= DBGP_GO; |
| 316 | |
| 317 | writel(addr, &ehci_debug->address); |
| 318 | writel(pids, &ehci_debug->pids); |
| 319 | ret = dbgp_wait_until_done(ctrl, loops); |
| 320 | if (ret < 0) |
| 321 | return ret; |
| 322 | |
| 323 | if (size > ret) |
| 324 | size = ret; |
| 325 | dbgp_get_data(data, size); |
| 326 | return ret; |
| 327 | } |
| 328 | |
| 329 | static int dbgp_control_msg(unsigned devnum, int requesttype, |
| 330 | int request, int value, int index, void *data, int size) |
| 331 | { |
| 332 | u32 pids, addr, ctrl; |
| 333 | struct usb_ctrlrequest req; |
| 334 | int read; |
| 335 | int ret; |
| 336 | |
| 337 | read = (requesttype & USB_DIR_IN) != 0; |
| 338 | if (size > (read ? DBGP_MAX_PACKET : 0)) |
| 339 | return -1; |
| 340 | |
| 341 | /* Compute the control message */ |
| 342 | req.bRequestType = requesttype; |
| 343 | req.bRequest = request; |
| 344 | req.wValue = cpu_to_le16(value); |
| 345 | req.wIndex = cpu_to_le16(index); |
| 346 | req.wLength = cpu_to_le16(size); |
| 347 | |
| 348 | pids = DBGP_PID_SET(USB_PID_DATA0, USB_PID_SETUP); |
| 349 | addr = DBGP_EPADDR(devnum, 0); |
| 350 | |
| 351 | ctrl = readl(&ehci_debug->control); |
| 352 | ctrl = dbgp_len_update(ctrl, sizeof(req)); |
| 353 | ctrl |= DBGP_OUT; |
| 354 | ctrl |= DBGP_GO; |
| 355 | |
| 356 | /* Send the setup message */ |
| 357 | dbgp_set_data(&req, sizeof(req)); |
| 358 | writel(addr, &ehci_debug->address); |
| 359 | writel(pids, &ehci_debug->pids); |
| 360 | ret = dbgp_wait_until_done(ctrl, DBGP_LOOPS); |
| 361 | if (ret < 0) |
| 362 | return ret; |
| 363 | |
| 364 | /* Read the result */ |
| 365 | return dbgp_bulk_read(devnum, 0, data, size, DBGP_LOOPS); |
| 366 | } |
| 367 | |
| 368 | /* Find a PCI capability */ |
| 369 | static u32 __init find_cap(u32 num, u32 slot, u32 func, int cap) |
| 370 | { |
| 371 | u8 pos; |
| 372 | int bytes; |
| 373 | |
| 374 | if (!(read_pci_config_16(num, slot, func, PCI_STATUS) & |
| 375 | PCI_STATUS_CAP_LIST)) |
| 376 | return 0; |
| 377 | |
| 378 | pos = read_pci_config_byte(num, slot, func, PCI_CAPABILITY_LIST); |
| 379 | for (bytes = 0; bytes < 48 && pos >= 0x40; bytes++) { |
| 380 | u8 id; |
| 381 | |
| 382 | pos &= ~3; |
| 383 | id = read_pci_config_byte(num, slot, func, pos+PCI_CAP_LIST_ID); |
| 384 | if (id == 0xff) |
| 385 | break; |
| 386 | if (id == cap) |
| 387 | return pos; |
| 388 | |
| 389 | pos = read_pci_config_byte(num, slot, func, |
| 390 | pos+PCI_CAP_LIST_NEXT); |
| 391 | } |
| 392 | return 0; |
| 393 | } |
| 394 | |
| 395 | static u32 __init __find_dbgp(u32 bus, u32 slot, u32 func) |
| 396 | { |
| 397 | u32 class; |
| 398 | |
| 399 | class = read_pci_config(bus, slot, func, PCI_CLASS_REVISION); |
| 400 | if ((class >> 8) != PCI_CLASS_SERIAL_USB_EHCI) |
| 401 | return 0; |
| 402 | |
| 403 | return find_cap(bus, slot, func, PCI_CAP_ID_EHCI_DEBUG); |
| 404 | } |
| 405 | |
| 406 | static u32 __init find_dbgp(int ehci_num, u32 *rbus, u32 *rslot, u32 *rfunc) |
| 407 | { |
| 408 | u32 bus, slot, func; |
| 409 | |
| 410 | for (bus = 0; bus < 256; bus++) { |
| 411 | for (slot = 0; slot < 32; slot++) { |
| 412 | for (func = 0; func < 8; func++) { |
| 413 | unsigned cap; |
| 414 | |
| 415 | cap = __find_dbgp(bus, slot, func); |
| 416 | |
| 417 | if (!cap) |
| 418 | continue; |
| 419 | if (ehci_num-- != 0) |
| 420 | continue; |
| 421 | *rbus = bus; |
| 422 | *rslot = slot; |
| 423 | *rfunc = func; |
| 424 | return cap; |
| 425 | } |
| 426 | } |
| 427 | } |
| 428 | return 0; |
| 429 | } |
| 430 | |
| 431 | static int dbgp_ehci_startup(void) |
| 432 | { |
| 433 | u32 ctrl, cmd, status; |
| 434 | int loop; |
| 435 | |
| 436 | /* Claim ownership, but do not enable yet */ |
| 437 | ctrl = readl(&ehci_debug->control); |
| 438 | ctrl |= DBGP_OWNER; |
| 439 | ctrl &= ~(DBGP_ENABLED | DBGP_INUSE); |
| 440 | writel(ctrl, &ehci_debug->control); |
| 441 | udelay(1); |
| 442 | |
| 443 | dbgp_ehci_status("EHCI startup"); |
| 444 | /* Start the ehci running */ |
| 445 | cmd = readl(&ehci_regs->command); |
| 446 | cmd &= ~(CMD_LRESET | CMD_IAAD | CMD_PSE | CMD_ASE | CMD_RESET); |
| 447 | cmd |= CMD_RUN; |
| 448 | writel(cmd, &ehci_regs->command); |
| 449 | |
| 450 | /* Ensure everything is routed to the EHCI */ |
| 451 | writel(FLAG_CF, &ehci_regs->configured_flag); |
| 452 | |
| 453 | /* Wait until the controller is no longer halted */ |
| 454 | loop = 1000; |
| 455 | do { |
| 456 | status = readl(&ehci_regs->status); |
| 457 | if (!(status & STS_HALT)) |
| 458 | break; |
| 459 | udelay(1); |
| 460 | } while (--loop > 0); |
| 461 | |
| 462 | if (!loop) { |
| 463 | dbgp_printk("ehci can not be started\n"); |
| 464 | return -ENODEV; |
| 465 | } |
| 466 | dbgp_printk("ehci started\n"); |
| 467 | return 0; |
| 468 | } |
| 469 | |
| 470 | static int dbgp_ehci_controller_reset(void) |
| 471 | { |
| 472 | int loop = 250 * 1000; |
| 473 | u32 cmd; |
| 474 | |
| 475 | /* Reset the EHCI controller */ |
| 476 | cmd = readl(&ehci_regs->command); |
| 477 | cmd |= CMD_RESET; |
| 478 | writel(cmd, &ehci_regs->command); |
| 479 | do { |
| 480 | cmd = readl(&ehci_regs->command); |
| 481 | } while ((cmd & CMD_RESET) && (--loop > 0)); |
| 482 | |
| 483 | if (!loop) { |
| 484 | dbgp_printk("can not reset ehci\n"); |
| 485 | return -1; |
| 486 | } |
| 487 | dbgp_ehci_status("ehci reset done"); |
| 488 | return 0; |
| 489 | } |
| 490 | static int ehci_wait_for_port(int port); |
| 491 | /* Return 0 on success |
| 492 | * Return -ENODEV for any general failure |
| 493 | * Return -EIO if wait for port fails |
| 494 | */ |
| 495 | static int _dbgp_external_startup(void) |
| 496 | { |
| 497 | int devnum; |
| 498 | struct usb_debug_descriptor dbgp_desc; |
| 499 | int ret; |
| 500 | u32 ctrl, portsc, cmd; |
| 501 | int dbg_port = dbgp_phys_port; |
| 502 | int tries = 3; |
| 503 | int reset_port_tries = 1; |
| 504 | int try_hard_once = 1; |
| 505 | |
| 506 | try_port_reset_again: |
| 507 | ret = dbgp_ehci_startup(); |
| 508 | if (ret) |
| 509 | return ret; |
| 510 | |
| 511 | /* Wait for a device to show up in the debug port */ |
| 512 | ret = ehci_wait_for_port(dbg_port); |
| 513 | if (ret < 0) { |
| 514 | portsc = readl(&ehci_regs->port_status[dbg_port - 1]); |
| 515 | if (!(portsc & PORT_CONNECT) && try_hard_once) { |
| 516 | /* Last ditch effort to try to force enable |
| 517 | * the debug device by using the packet test |
| 518 | * ehci command to try and wake it up. */ |
| 519 | try_hard_once = 0; |
| 520 | cmd = readl(&ehci_regs->command); |
| 521 | cmd &= ~CMD_RUN; |
| 522 | writel(cmd, &ehci_regs->command); |
| 523 | portsc = readl(&ehci_regs->port_status[dbg_port - 1]); |
| 524 | portsc |= PORT_TEST_PKT; |
| 525 | writel(portsc, &ehci_regs->port_status[dbg_port - 1]); |
| 526 | dbgp_ehci_status("Trying to force debug port online"); |
| 527 | mdelay(50); |
| 528 | dbgp_ehci_controller_reset(); |
| 529 | goto try_port_reset_again; |
| 530 | } else if (reset_port_tries--) { |
| 531 | goto try_port_reset_again; |
| 532 | } |
| 533 | dbgp_printk("No device found in debug port\n"); |
| 534 | return -EIO; |
| 535 | } |
| 536 | dbgp_ehci_status("wait for port done"); |
| 537 | |
| 538 | /* Enable the debug port */ |
| 539 | ctrl = readl(&ehci_debug->control); |
| 540 | ctrl |= DBGP_CLAIM; |
| 541 | writel(ctrl, &ehci_debug->control); |
| 542 | ctrl = readl(&ehci_debug->control); |
| 543 | if ((ctrl & DBGP_CLAIM) != DBGP_CLAIM) { |
| 544 | dbgp_printk("No device in debug port\n"); |
| 545 | writel(ctrl & ~DBGP_CLAIM, &ehci_debug->control); |
| 546 | return -ENODEV; |
| 547 | } |
| 548 | dbgp_ehci_status("debug ported enabled"); |
| 549 | |
| 550 | /* Completely transfer the debug device to the debug controller */ |
| 551 | portsc = readl(&ehci_regs->port_status[dbg_port - 1]); |
| 552 | portsc &= ~PORT_PE; |
| 553 | writel(portsc, &ehci_regs->port_status[dbg_port - 1]); |
| 554 | |
| 555 | dbgp_mdelay(100); |
| 556 | |
| 557 | try_again: |
| 558 | /* Find the debug device and make it device number 127 */ |
| 559 | for (devnum = 0; devnum <= 127; devnum++) { |
| 560 | ret = dbgp_control_msg(devnum, |
| 561 | USB_DIR_IN | USB_TYPE_STANDARD | USB_RECIP_DEVICE, |
| 562 | USB_REQ_GET_DESCRIPTOR, (USB_DT_DEBUG << 8), 0, |
| 563 | &dbgp_desc, sizeof(dbgp_desc)); |
| 564 | if (ret > 0) |
| 565 | break; |
| 566 | } |
| 567 | if (devnum > 127) { |
| 568 | dbgp_printk("Could not find attached debug device\n"); |
| 569 | goto err; |
| 570 | } |
| 571 | dbgp_endpoint_out = dbgp_desc.bDebugOutEndpoint; |
| 572 | dbgp_endpoint_in = dbgp_desc.bDebugInEndpoint; |
| 573 | |
| 574 | /* Move the device to 127 if it isn't already there */ |
| 575 | if (devnum != USB_DEBUG_DEVNUM) { |
| 576 | ret = dbgp_control_msg(devnum, |
| 577 | USB_DIR_OUT | USB_TYPE_STANDARD | USB_RECIP_DEVICE, |
| 578 | USB_REQ_SET_ADDRESS, USB_DEBUG_DEVNUM, 0, NULL, 0); |
| 579 | if (ret < 0) { |
| 580 | dbgp_printk("Could not move attached device to %d\n", |
| 581 | USB_DEBUG_DEVNUM); |
| 582 | goto err; |
| 583 | } |
| 584 | devnum = USB_DEBUG_DEVNUM; |
| 585 | dbgp_printk("debug device renamed to 127\n"); |
| 586 | } |
| 587 | |
| 588 | /* Enable the debug interface */ |
| 589 | ret = dbgp_control_msg(USB_DEBUG_DEVNUM, |
| 590 | USB_DIR_OUT | USB_TYPE_STANDARD | USB_RECIP_DEVICE, |
| 591 | USB_REQ_SET_FEATURE, USB_DEVICE_DEBUG_MODE, 0, NULL, 0); |
| 592 | if (ret < 0) { |
| 593 | dbgp_printk(" Could not enable the debug device\n"); |
| 594 | goto err; |
| 595 | } |
| 596 | dbgp_printk("debug interface enabled\n"); |
| 597 | /* Perform a small write to get the even/odd data state in sync |
| 598 | */ |
| 599 | ret = dbgp_bulk_write(USB_DEBUG_DEVNUM, dbgp_endpoint_out, " ", 1); |
| 600 | if (ret < 0) { |
| 601 | dbgp_printk("dbgp_bulk_write failed: %d\n", ret); |
| 602 | goto err; |
| 603 | } |
| 604 | dbgp_printk("small write done\n"); |
| 605 | dbgp_not_safe = 0; |
| 606 | |
| 607 | return 0; |
| 608 | err: |
| 609 | if (tries--) |
| 610 | goto try_again; |
| 611 | return -ENODEV; |
| 612 | } |
| 613 | |
| 614 | static int ehci_reset_port(int port) |
| 615 | { |
| 616 | u32 portsc; |
| 617 | u32 delay_time, delay; |
| 618 | int loop; |
| 619 | |
| 620 | dbgp_ehci_status("reset port"); |
| 621 | /* Reset the usb debug port */ |
| 622 | portsc = readl(&ehci_regs->port_status[port - 1]); |
| 623 | portsc &= ~PORT_PE; |
| 624 | portsc |= PORT_RESET; |
| 625 | writel(portsc, &ehci_regs->port_status[port - 1]); |
| 626 | |
| 627 | delay = HUB_ROOT_RESET_TIME; |
| 628 | for (delay_time = 0; delay_time < HUB_RESET_TIMEOUT; |
| 629 | delay_time += delay) { |
| 630 | dbgp_mdelay(delay); |
| 631 | portsc = readl(&ehci_regs->port_status[port - 1]); |
| 632 | if (!(portsc & PORT_RESET)) |
| 633 | break; |
| 634 | } |
| 635 | if (portsc & PORT_RESET) { |
| 636 | /* force reset to complete */ |
| 637 | loop = 100 * 1000; |
| 638 | writel(portsc & ~(PORT_RWC_BITS | PORT_RESET), |
| 639 | &ehci_regs->port_status[port - 1]); |
| 640 | do { |
| 641 | udelay(1); |
| 642 | portsc = readl(&ehci_regs->port_status[port-1]); |
| 643 | } while ((portsc & PORT_RESET) && (--loop > 0)); |
| 644 | } |
| 645 | |
| 646 | /* Device went away? */ |
| 647 | if (!(portsc & PORT_CONNECT)) |
| 648 | return -ENOTCONN; |
| 649 | |
| 650 | /* bomb out completely if something weird happened */ |
| 651 | if ((portsc & PORT_CSC)) |
| 652 | return -EINVAL; |
| 653 | |
| 654 | /* If we've finished resetting, then break out of the loop */ |
| 655 | if (!(portsc & PORT_RESET) && (portsc & PORT_PE)) |
| 656 | return 0; |
| 657 | return -EBUSY; |
| 658 | } |
| 659 | |
| 660 | static int ehci_wait_for_port(int port) |
| 661 | { |
| 662 | u32 status; |
| 663 | int ret, reps; |
| 664 | |
| 665 | for (reps = 0; reps < 300; reps++) { |
| 666 | status = readl(&ehci_regs->status); |
| 667 | if (status & STS_PCD) |
| 668 | break; |
| 669 | dbgp_mdelay(1); |
| 670 | } |
| 671 | ret = ehci_reset_port(port); |
| 672 | if (ret == 0) |
| 673 | return 0; |
| 674 | return -ENOTCONN; |
| 675 | } |
| 676 | |
| 677 | typedef void (*set_debug_port_t)(int port); |
| 678 | |
| 679 | static void __init default_set_debug_port(int port) |
| 680 | { |
| 681 | } |
| 682 | |
| 683 | static set_debug_port_t __initdata set_debug_port = default_set_debug_port; |
| 684 | |
| 685 | static void __init nvidia_set_debug_port(int port) |
| 686 | { |
| 687 | u32 dword; |
| 688 | dword = read_pci_config(ehci_dev.bus, ehci_dev.slot, ehci_dev.func, |
| 689 | 0x74); |
| 690 | dword &= ~(0x0f<<12); |
| 691 | dword |= ((port & 0x0f)<<12); |
| 692 | write_pci_config(ehci_dev.bus, ehci_dev.slot, ehci_dev.func, 0x74, |
| 693 | dword); |
| 694 | dbgp_printk("set debug port to %d\n", port); |
| 695 | } |
| 696 | |
| 697 | static void __init detect_set_debug_port(void) |
| 698 | { |
| 699 | u32 vendorid; |
| 700 | |
| 701 | vendorid = read_pci_config(ehci_dev.bus, ehci_dev.slot, ehci_dev.func, |
| 702 | 0x00); |
| 703 | |
| 704 | if ((vendorid & 0xffff) == 0x10de) { |
| 705 | dbgp_printk("using nvidia set_debug_port\n"); |
| 706 | set_debug_port = nvidia_set_debug_port; |
| 707 | } |
| 708 | } |
| 709 | |
| 710 | /* The code in early_ehci_bios_handoff() is derived from the usb pci |
| 711 | * quirk initialization, but altered so as to use the early PCI |
| 712 | * routines. */ |
| 713 | #define EHCI_USBLEGSUP_BIOS (1 << 16) /* BIOS semaphore */ |
| 714 | #define EHCI_USBLEGCTLSTS 4 /* legacy control/status */ |
| 715 | static void __init early_ehci_bios_handoff(void) |
| 716 | { |
| 717 | u32 hcc_params = readl(&ehci_caps->hcc_params); |
| 718 | int offset = (hcc_params >> 8) & 0xff; |
| 719 | u32 cap; |
| 720 | int msec; |
| 721 | |
| 722 | if (!offset) |
| 723 | return; |
| 724 | |
| 725 | cap = read_pci_config(ehci_dev.bus, ehci_dev.slot, |
| 726 | ehci_dev.func, offset); |
| 727 | dbgp_printk("dbgp: ehci BIOS state %08x\n", cap); |
| 728 | |
| 729 | if ((cap & 0xff) == 1 && (cap & EHCI_USBLEGSUP_BIOS)) { |
| 730 | dbgp_printk("dbgp: BIOS handoff\n"); |
| 731 | write_pci_config_byte(ehci_dev.bus, ehci_dev.slot, |
| 732 | ehci_dev.func, offset + 3, 1); |
| 733 | } |
| 734 | |
| 735 | /* if boot firmware now owns EHCI, spin till it hands it over. */ |
| 736 | msec = 1000; |
| 737 | while ((cap & EHCI_USBLEGSUP_BIOS) && (msec > 0)) { |
| 738 | mdelay(10); |
| 739 | msec -= 10; |
| 740 | cap = read_pci_config(ehci_dev.bus, ehci_dev.slot, |
| 741 | ehci_dev.func, offset); |
| 742 | } |
| 743 | |
| 744 | if (cap & EHCI_USBLEGSUP_BIOS) { |
| 745 | /* well, possibly buggy BIOS... try to shut it down, |
| 746 | * and hope nothing goes too wrong */ |
| 747 | dbgp_printk("dbgp: BIOS handoff failed: %08x\n", cap); |
| 748 | write_pci_config_byte(ehci_dev.bus, ehci_dev.slot, |
| 749 | ehci_dev.func, offset + 2, 0); |
| 750 | } |
| 751 | |
| 752 | /* just in case, always disable EHCI SMIs */ |
| 753 | write_pci_config_byte(ehci_dev.bus, ehci_dev.slot, ehci_dev.func, |
| 754 | offset + EHCI_USBLEGCTLSTS, 0); |
| 755 | } |
| 756 | |
| 757 | static int __init ehci_setup(void) |
| 758 | { |
| 759 | u32 ctrl, portsc, hcs_params; |
| 760 | u32 debug_port, new_debug_port = 0, n_ports; |
| 761 | int ret, i; |
| 762 | int port_map_tried; |
| 763 | int playtimes = 3; |
| 764 | |
| 765 | early_ehci_bios_handoff(); |
| 766 | |
| 767 | try_next_time: |
| 768 | port_map_tried = 0; |
| 769 | |
| 770 | try_next_port: |
| 771 | |
| 772 | hcs_params = readl(&ehci_caps->hcs_params); |
| 773 | debug_port = HCS_DEBUG_PORT(hcs_params); |
| 774 | dbgp_phys_port = debug_port; |
| 775 | n_ports = HCS_N_PORTS(hcs_params); |
| 776 | |
| 777 | dbgp_printk("debug_port: %d\n", debug_port); |
| 778 | dbgp_printk("n_ports: %d\n", n_ports); |
| 779 | dbgp_ehci_status(""); |
| 780 | |
| 781 | for (i = 1; i <= n_ports; i++) { |
| 782 | portsc = readl(&ehci_regs->port_status[i-1]); |
| 783 | dbgp_printk("portstatus%d: %08x\n", i, portsc); |
| 784 | } |
| 785 | |
| 786 | if (port_map_tried && (new_debug_port != debug_port)) { |
| 787 | if (--playtimes) { |
| 788 | set_debug_port(new_debug_port); |
| 789 | goto try_next_time; |
| 790 | } |
| 791 | return -1; |
| 792 | } |
| 793 | |
| 794 | /* Only reset the controller if it is not already in the |
| 795 | * configured state */ |
| 796 | if (!(readl(&ehci_regs->configured_flag) & FLAG_CF)) { |
| 797 | if (dbgp_ehci_controller_reset() != 0) |
| 798 | return -1; |
| 799 | } else { |
| 800 | dbgp_ehci_status("ehci skip - already configured"); |
| 801 | } |
| 802 | |
| 803 | ret = _dbgp_external_startup(); |
| 804 | if (ret == -EIO) |
| 805 | goto next_debug_port; |
| 806 | |
| 807 | if (ret < 0) { |
| 808 | /* Things didn't work so remove my claim */ |
| 809 | ctrl = readl(&ehci_debug->control); |
| 810 | ctrl &= ~(DBGP_CLAIM | DBGP_OUT); |
| 811 | writel(ctrl, &ehci_debug->control); |
| 812 | return -1; |
| 813 | } |
| 814 | return 0; |
| 815 | |
| 816 | next_debug_port: |
| 817 | port_map_tried |= (1<<(debug_port - 1)); |
| 818 | new_debug_port = ((debug_port-1+1)%n_ports) + 1; |
| 819 | if (port_map_tried != ((1<<n_ports) - 1)) { |
| 820 | set_debug_port(new_debug_port); |
| 821 | goto try_next_port; |
| 822 | } |
| 823 | if (--playtimes) { |
| 824 | set_debug_port(new_debug_port); |
| 825 | goto try_next_time; |
| 826 | } |
| 827 | |
| 828 | return -1; |
| 829 | } |
| 830 | |
| 831 | int __init early_dbgp_init(char *s) |
| 832 | { |
| 833 | u32 debug_port, bar, offset; |
| 834 | u32 bus, slot, func, cap; |
| 835 | void __iomem *ehci_bar; |
| 836 | u32 dbgp_num; |
| 837 | u32 bar_val; |
| 838 | char *e; |
| 839 | int ret; |
| 840 | u8 byte; |
| 841 | |
| 842 | if (!early_pci_allowed()) |
| 843 | return -1; |
| 844 | |
| 845 | dbgp_num = 0; |
| 846 | if (*s) |
| 847 | dbgp_num = simple_strtoul(s, &e, 10); |
| 848 | dbgp_printk("dbgp_num: %d\n", dbgp_num); |
| 849 | |
| 850 | cap = find_dbgp(dbgp_num, &bus, &slot, &func); |
| 851 | if (!cap) |
| 852 | return -1; |
| 853 | |
| 854 | dbgp_printk("Found EHCI debug port on %02x:%02x.%1x\n", bus, slot, |
| 855 | func); |
| 856 | |
| 857 | debug_port = read_pci_config(bus, slot, func, cap); |
| 858 | bar = (debug_port >> 29) & 0x7; |
| 859 | bar = (bar * 4) + 0xc; |
| 860 | offset = (debug_port >> 16) & 0xfff; |
| 861 | dbgp_printk("bar: %02x offset: %03x\n", bar, offset); |
| 862 | if (bar != PCI_BASE_ADDRESS_0) { |
| 863 | dbgp_printk("only debug ports on bar 1 handled.\n"); |
| 864 | |
| 865 | return -1; |
| 866 | } |
| 867 | |
| 868 | bar_val = read_pci_config(bus, slot, func, PCI_BASE_ADDRESS_0); |
| 869 | dbgp_printk("bar_val: %02x offset: %03x\n", bar_val, offset); |
| 870 | if (bar_val & ~PCI_BASE_ADDRESS_MEM_MASK) { |
| 871 | dbgp_printk("only simple 32bit mmio bars supported\n"); |
| 872 | |
| 873 | return -1; |
| 874 | } |
| 875 | |
| 876 | /* double check if the mem space is enabled */ |
| 877 | byte = read_pci_config_byte(bus, slot, func, 0x04); |
| 878 | if (!(byte & 0x2)) { |
| 879 | byte |= 0x02; |
| 880 | write_pci_config_byte(bus, slot, func, 0x04, byte); |
| 881 | dbgp_printk("mmio for ehci enabled\n"); |
| 882 | } |
| 883 | |
| 884 | /* |
| 885 | * FIXME I don't have the bar size so just guess PAGE_SIZE is more |
| 886 | * than enough. 1K is the biggest I have seen. |
| 887 | */ |
| 888 | set_fixmap_nocache(FIX_DBGP_BASE, bar_val & PAGE_MASK); |
| 889 | ehci_bar = (void __iomem *)__fix_to_virt(FIX_DBGP_BASE); |
| 890 | ehci_bar += bar_val & ~PAGE_MASK; |
| 891 | dbgp_printk("ehci_bar: %p\n", ehci_bar); |
| 892 | |
| 893 | ehci_caps = ehci_bar; |
| 894 | ehci_regs = ehci_bar + EARLY_HC_LENGTH(readl(&ehci_caps->hc_capbase)); |
| 895 | ehci_debug = ehci_bar + offset; |
| 896 | ehci_dev.bus = bus; |
| 897 | ehci_dev.slot = slot; |
| 898 | ehci_dev.func = func; |
| 899 | |
| 900 | detect_set_debug_port(); |
| 901 | |
| 902 | ret = ehci_setup(); |
| 903 | if (ret < 0) { |
| 904 | dbgp_printk("ehci_setup failed\n"); |
| 905 | ehci_debug = NULL; |
| 906 | |
| 907 | return -1; |
| 908 | } |
| 909 | dbgp_ehci_status("early_init_complete"); |
| 910 | |
| 911 | return 0; |
| 912 | } |
| 913 | |
| 914 | static void early_dbgp_write(struct console *con, const char *str, u32 n) |
| 915 | { |
| 916 | int chunk, ret; |
| 917 | char buf[DBGP_MAX_PACKET]; |
| 918 | int use_cr = 0; |
| 919 | u32 cmd, ctrl; |
| 920 | int reset_run = 0; |
| 921 | |
| 922 | if (!ehci_debug || dbgp_not_safe) |
| 923 | return; |
| 924 | |
| 925 | cmd = readl(&ehci_regs->command); |
| 926 | if (unlikely(!(cmd & CMD_RUN))) { |
| 927 | /* If the ehci controller is not in the run state do extended |
| 928 | * checks to see if the acpi or some other initialization also |
| 929 | * reset the ehci debug port */ |
| 930 | ctrl = readl(&ehci_debug->control); |
| 931 | if (!(ctrl & DBGP_ENABLED)) { |
| 932 | dbgp_not_safe = 1; |
| 933 | _dbgp_external_startup(); |
| 934 | } else { |
| 935 | cmd |= CMD_RUN; |
| 936 | writel(cmd, &ehci_regs->command); |
| 937 | reset_run = 1; |
| 938 | } |
| 939 | } |
| 940 | while (n > 0) { |
| 941 | for (chunk = 0; chunk < DBGP_MAX_PACKET && n > 0; |
| 942 | str++, chunk++, n--) { |
| 943 | if (!use_cr && *str == '\n') { |
| 944 | use_cr = 1; |
| 945 | buf[chunk] = '\r'; |
| 946 | str--; |
| 947 | n++; |
| 948 | continue; |
| 949 | } |
| 950 | if (use_cr) |
| 951 | use_cr = 0; |
| 952 | buf[chunk] = *str; |
| 953 | } |
| 954 | if (chunk > 0) { |
| 955 | ret = dbgp_bulk_write(USB_DEBUG_DEVNUM, |
| 956 | dbgp_endpoint_out, buf, chunk); |
| 957 | } |
| 958 | } |
| 959 | if (unlikely(reset_run)) { |
| 960 | cmd = readl(&ehci_regs->command); |
| 961 | cmd &= ~CMD_RUN; |
| 962 | writel(cmd, &ehci_regs->command); |
| 963 | } |
| 964 | } |
| 965 | |
| 966 | struct console early_dbgp_console = { |
| 967 | .name = "earlydbg", |
| 968 | .write = early_dbgp_write, |
| 969 | .flags = CON_PRINTBUFFER, |
| 970 | .index = -1, |
| 971 | }; |
| 972 | |
| 973 | #if IS_ENABLED(CONFIG_USB) |
| 974 | int dbgp_reset_prep(struct usb_hcd *hcd) |
| 975 | { |
| 976 | int ret = xen_dbgp_reset_prep(hcd); |
| 977 | u32 ctrl; |
| 978 | |
| 979 | if (ret) |
| 980 | return ret; |
| 981 | |
| 982 | dbgp_not_safe = 1; |
| 983 | if (!ehci_debug) |
| 984 | return 0; |
| 985 | |
| 986 | if ((early_dbgp_console.index != -1 && |
| 987 | !(early_dbgp_console.flags & CON_BOOT)) || |
| 988 | dbgp_kgdb_mode) |
| 989 | return 1; |
| 990 | /* This means the console is not initialized, or should get |
| 991 | * shutdown so as to allow for reuse of the usb device, which |
| 992 | * means it is time to shutdown the usb debug port. */ |
| 993 | ctrl = readl(&ehci_debug->control); |
| 994 | if (ctrl & DBGP_ENABLED) { |
| 995 | ctrl &= ~(DBGP_CLAIM); |
| 996 | writel(ctrl, &ehci_debug->control); |
| 997 | } |
| 998 | return 0; |
| 999 | } |
| 1000 | EXPORT_SYMBOL_GPL(dbgp_reset_prep); |
| 1001 | |
| 1002 | int dbgp_external_startup(struct usb_hcd *hcd) |
| 1003 | { |
| 1004 | return xen_dbgp_external_startup(hcd) ?: _dbgp_external_startup(); |
| 1005 | } |
| 1006 | EXPORT_SYMBOL_GPL(dbgp_external_startup); |
| 1007 | #endif /* USB */ |
| 1008 | |
| 1009 | #ifdef CONFIG_KGDB |
| 1010 | |
| 1011 | static char kgdbdbgp_buf[DBGP_MAX_PACKET]; |
| 1012 | static int kgdbdbgp_buf_sz; |
| 1013 | static int kgdbdbgp_buf_idx; |
| 1014 | static int kgdbdbgp_loop_cnt = DBGP_LOOPS; |
| 1015 | |
| 1016 | static int kgdbdbgp_read_char(void) |
| 1017 | { |
| 1018 | int ret; |
| 1019 | |
| 1020 | if (kgdbdbgp_buf_idx < kgdbdbgp_buf_sz) { |
| 1021 | char ch = kgdbdbgp_buf[kgdbdbgp_buf_idx++]; |
| 1022 | return ch; |
| 1023 | } |
| 1024 | |
| 1025 | ret = dbgp_bulk_read(USB_DEBUG_DEVNUM, dbgp_endpoint_in, |
| 1026 | &kgdbdbgp_buf, DBGP_MAX_PACKET, |
| 1027 | kgdbdbgp_loop_cnt); |
| 1028 | if (ret <= 0) |
| 1029 | return NO_POLL_CHAR; |
| 1030 | kgdbdbgp_buf_sz = ret; |
| 1031 | kgdbdbgp_buf_idx = 1; |
| 1032 | return kgdbdbgp_buf[0]; |
| 1033 | } |
| 1034 | |
| 1035 | static void kgdbdbgp_write_char(u8 chr) |
| 1036 | { |
| 1037 | early_dbgp_write(NULL, &chr, 1); |
| 1038 | } |
| 1039 | |
| 1040 | static struct kgdb_io kgdbdbgp_io_ops = { |
| 1041 | .name = "kgdbdbgp", |
| 1042 | .read_char = kgdbdbgp_read_char, |
| 1043 | .write_char = kgdbdbgp_write_char, |
| 1044 | }; |
| 1045 | |
| 1046 | static int kgdbdbgp_wait_time; |
| 1047 | |
| 1048 | static int __init kgdbdbgp_parse_config(char *str) |
| 1049 | { |
| 1050 | char *ptr; |
| 1051 | |
| 1052 | if (!ehci_debug) { |
| 1053 | if (early_dbgp_init(str)) |
| 1054 | return -1; |
| 1055 | } |
| 1056 | ptr = strchr(str, ','); |
| 1057 | if (ptr) { |
| 1058 | ptr++; |
| 1059 | kgdbdbgp_wait_time = simple_strtoul(ptr, &ptr, 10); |
| 1060 | } |
| 1061 | kgdb_register_io_module(&kgdbdbgp_io_ops); |
| 1062 | kgdbdbgp_io_ops.is_console = early_dbgp_console.index != -1; |
| 1063 | |
| 1064 | return 0; |
| 1065 | } |
| 1066 | early_param("kgdbdbgp", kgdbdbgp_parse_config); |
| 1067 | |
| 1068 | static int kgdbdbgp_reader_thread(void *ptr) |
| 1069 | { |
| 1070 | int ret; |
| 1071 | |
| 1072 | while (readl(&ehci_debug->control) & DBGP_ENABLED) { |
| 1073 | kgdbdbgp_loop_cnt = 1; |
| 1074 | ret = kgdbdbgp_read_char(); |
| 1075 | kgdbdbgp_loop_cnt = DBGP_LOOPS; |
| 1076 | if (ret != NO_POLL_CHAR) { |
| 1077 | if (ret == 0x3 || ret == '$') { |
| 1078 | if (ret == '$') |
| 1079 | kgdbdbgp_buf_idx--; |
| 1080 | kgdb_breakpoint(); |
| 1081 | } |
| 1082 | continue; |
| 1083 | } |
| 1084 | schedule_timeout_interruptible(kgdbdbgp_wait_time * HZ); |
| 1085 | } |
| 1086 | return 0; |
| 1087 | } |
| 1088 | |
| 1089 | static int __init kgdbdbgp_start_thread(void) |
| 1090 | { |
| 1091 | if (dbgp_kgdb_mode && kgdbdbgp_wait_time) |
| 1092 | kthread_run(kgdbdbgp_reader_thread, NULL, "%s", "dbgp"); |
| 1093 | |
| 1094 | return 0; |
| 1095 | } |
| 1096 | module_init(kgdbdbgp_start_thread); |
| 1097 | #endif /* CONFIG_KGDB */ |