blob: ad368a93a46a6c5c7e1bf0d25ab17f08ebc19fd8 [file] [log] [blame]
Kyle Swenson8d8f6542021-03-15 11:02:55 -06001/*
2 * include/asm-alpha/cache.h
3 */
4#ifndef __ARCH_ALPHA_CACHE_H
5#define __ARCH_ALPHA_CACHE_H
6
7
8/* Bytes per L1 (data) cache line. */
9#if defined(CONFIG_ALPHA_GENERIC) || defined(CONFIG_ALPHA_EV6)
10# define L1_CACHE_BYTES 64
11# define L1_CACHE_SHIFT 6
12#else
13/* Both EV4 and EV5 are write-through, read-allocate,
14 direct-mapped, physical.
15*/
16# define L1_CACHE_BYTES 32
17# define L1_CACHE_SHIFT 5
18#endif
19
20#define SMP_CACHE_BYTES L1_CACHE_BYTES
21
22#endif