blob: d64a96f8515ada58b27599122d775960889e2a3f [file] [log] [blame]
Kyle Swenson8d8f6542021-03-15 11:02:55 -06001/*
2 * Copyright (C) 2014-15 Synopsys, Inc. (www.synopsys.com)
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8/dts-v1/;
9
10/include/ "skeleton.dtsi"
11
12/ {
13 compatible = "snps,nsimosci_hs";
14 clock-frequency = <20000000>; /* 20 MHZ */
15 #address-cells = <1>;
16 #size-cells = <1>;
17 interrupt-parent = <&core_intc>;
18
19 chosen {
20 /* this is for console on PGU */
21 /* bootargs = "console=tty0 consoleblank=0"; */
22 /* this is for console on serial */
23 bootargs = "earlycon=uart8250,mmio32,0xf0000000,115200n8 console=tty0 console=ttyS0,115200n8 consoleblank=0 debug";
24 };
25
26 aliases {
27 serial0 = &uart0;
28 };
29
30 fpga {
31 compatible = "simple-bus";
32 #address-cells = <1>;
33 #size-cells = <1>;
34
35 /* child and parent address space 1:1 mapped */
36 ranges;
37
38 core_intc: core-interrupt-controller {
39 compatible = "snps,archs-intc";
40 interrupt-controller;
41 #interrupt-cells = <1>;
42 };
43
44 uart0: serial@f0000000 {
45 compatible = "ns8250";
46 reg = <0xf0000000 0x2000>;
47 interrupts = <24>;
48 clock-frequency = <3686400>;
49 baud = <115200>;
50 reg-shift = <2>;
51 reg-io-width = <4>;
52 no-loopback-test = <1>;
53 };
54
55 pgu0: pgu@f9000000 {
56 compatible = "snps,arcpgufb";
57 reg = <0xf9000000 0x400>;
58 };
59
60 ps2: ps2@f9001000 {
61 compatible = "snps,arc_ps2";
62 reg = <0xf9000400 0x14>;
63 interrupts = <27>;
64 interrupt-names = "arc_ps2_irq";
65 };
66
67 eth0: ethernet@f0003000 {
68 compatible = "snps,oscilan";
69 reg = <0xf0003000 0x44>;
70 interrupts = <25>, <26>;
71 interrupt-names = "rx", "tx";
72 };
73
74 arcpct0: pct {
75 compatible = "snps,archs-pct";
76 #interrupt-cells = <1>;
77 interrupts = <20>;
78 };
79 };
80};