blob: b17fdb7fbd3472d85b30dabf529a9df23e9ff643 [file] [log] [blame]
Kyle Swenson8d8f6542021-03-15 11:02:55 -06001/*
2 * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
3 * http://www.samsung.com
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8*/
9
10/* pull in the relevant register and map files. */
11
12#define S3C_ADDR_BASE 0xF6000000
13#define S3C_VA_UART S3C_ADDR_BASE + 0x01000000
14#define EXYNOS4_PA_UART 0x13800000
15#define EXYNOS5_PA_UART 0x12C00000
16
17 /* note, for the boot process to work we have to keep the UART
18 * virtual address aligned to an 1MiB boundary for the L1
19 * mapping the head code makes. We keep the UART virtual address
20 * aligned and add in the offset when we load the value here.
21 */
22
23 .macro addruart, rp, rv, tmp
24 mrc p15, 0, \tmp, c0, c0, 0
25 and \tmp, \tmp, #0xf0
26 teq \tmp, #0xf0 @@ A15
27 ldreq \rp, =EXYNOS5_PA_UART
28 movne \rp, #EXYNOS4_PA_UART @@ EXYNOS4
29 ldr \rv, =S3C_VA_UART
30#if CONFIG_DEBUG_S3C_UART != 0
31 add \rp, \rp, #(0x10000 * CONFIG_DEBUG_S3C_UART)
32 add \rv, \rv, #(0x10000 * CONFIG_DEBUG_S3C_UART)
33#endif
34 .endm
35
36#define fifo_full fifo_full_s5pv210
37#define fifo_level fifo_level_s5pv210
38
39#include <debug/samsung.S>