| Kyle Swenson | 8d8f654 | 2021-03-15 11:02:55 -0600 | [diff] [blame^] | 1 | /* |
| 2 | * arch/arm/mach-iop33x/include/mach/iop33x.h |
| 3 | * |
| 4 | * Intel IOP33X Chip definitions |
| 5 | * |
| 6 | * Author: Dave Jiang (dave.jiang@intel.com) |
| 7 | * Copyright (C) 2003, 2004 Intel Corp. |
| 8 | * |
| 9 | * This program is free software; you can redistribute it and/or modify |
| 10 | * it under the terms of the GNU General Public License version 2 as |
| 11 | * published by the Free Software Foundation. |
| 12 | */ |
| 13 | |
| 14 | #ifndef __IOP33X_H |
| 15 | #define __IOP33X_H |
| 16 | |
| 17 | /* |
| 18 | * Peripherals that are shared between the iop32x and iop33x but |
| 19 | * located at different addresses. |
| 20 | */ |
| 21 | #define IOP3XX_TIMER_REG(reg) (IOP3XX_PERIPHERAL_VIRT_BASE + 0x07d0 + (reg)) |
| 22 | |
| 23 | #include <asm/hardware/iop3xx.h> |
| 24 | |
| 25 | /* UARTs */ |
| 26 | #define IOP33X_UART0_PHYS (IOP3XX_PERIPHERAL_PHYS_BASE + 0x1700) |
| 27 | #define IOP33X_UART0_VIRT (IOP3XX_PERIPHERAL_VIRT_BASE + 0x1700) |
| 28 | #define IOP33X_UART1_PHYS (IOP3XX_PERIPHERAL_PHYS_BASE + 0x1740) |
| 29 | #define IOP33X_UART1_VIRT (IOP3XX_PERIPHERAL_VIRT_BASE + 0x1740) |
| 30 | |
| 31 | /* ATU Parameters |
| 32 | * set up a 1:1 bus to physical ram relationship |
| 33 | * w/ pci on top of physical ram in memory map |
| 34 | */ |
| 35 | #define IOP33X_MAX_RAM_SIZE 0x80000000UL |
| 36 | #define IOP3XX_MAX_RAM_SIZE IOP33X_MAX_RAM_SIZE |
| 37 | #define IOP3XX_PCI_LOWER_MEM_BA (PHYS_OFFSET + IOP33X_MAX_RAM_SIZE) |
| 38 | |
| 39 | |
| 40 | #endif |