Kyle Swenson | 8d8f654 | 2021-03-15 11:02:55 -0600 | [diff] [blame^] | 1 | /* |
| 2 | * arch/arm/mach-mediatek/platsmp.c |
| 3 | * |
| 4 | * Copyright (c) 2014 Mediatek Inc. |
| 5 | * Author: Shunli Wang <shunli.wang@mediatek.com> |
| 6 | * Yingjoe Chen <yingjoe.chen@mediatek.com> |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or modify |
| 9 | * it under the terms of the GNU General Public License version 2 as |
| 10 | * published by the Free Software Foundation. |
| 11 | * |
| 12 | * This program is distributed in the hope that it will be useful, |
| 13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 15 | * GNU General Public License for more details. |
| 16 | * |
| 17 | */ |
| 18 | #include <linux/io.h> |
| 19 | #include <linux/memblock.h> |
| 20 | #include <linux/of.h> |
| 21 | #include <linux/of_address.h> |
| 22 | #include <linux/string.h> |
| 23 | #include <linux/threads.h> |
| 24 | |
| 25 | #define MTK_MAX_CPU 8 |
| 26 | #define MTK_SMP_REG_SIZE 0x1000 |
| 27 | |
| 28 | struct mtk_smp_boot_info { |
| 29 | unsigned long smp_base; |
| 30 | unsigned int jump_reg; |
| 31 | unsigned int core_keys[MTK_MAX_CPU - 1]; |
| 32 | unsigned int core_regs[MTK_MAX_CPU - 1]; |
| 33 | }; |
| 34 | |
| 35 | static const struct mtk_smp_boot_info mtk_mt8135_tz_boot = { |
| 36 | 0x80002000, 0x3fc, |
| 37 | { 0x534c4131, 0x4c415332, 0x41534c33 }, |
| 38 | { 0x3f8, 0x3f8, 0x3f8 }, |
| 39 | }; |
| 40 | |
| 41 | static const struct mtk_smp_boot_info mtk_mt6589_boot = { |
| 42 | 0x10002000, 0x34, |
| 43 | { 0x534c4131, 0x4c415332, 0x41534c33 }, |
| 44 | { 0x38, 0x3c, 0x40 }, |
| 45 | }; |
| 46 | |
| 47 | static const struct of_device_id mtk_tz_smp_boot_infos[] __initconst = { |
| 48 | { .compatible = "mediatek,mt8135", .data = &mtk_mt8135_tz_boot }, |
| 49 | { .compatible = "mediatek,mt8127", .data = &mtk_mt8135_tz_boot }, |
| 50 | }; |
| 51 | |
| 52 | static const struct of_device_id mtk_smp_boot_infos[] __initconst = { |
| 53 | { .compatible = "mediatek,mt6589", .data = &mtk_mt6589_boot }, |
| 54 | }; |
| 55 | |
| 56 | static void __iomem *mtk_smp_base; |
| 57 | static const struct mtk_smp_boot_info *mtk_smp_info; |
| 58 | |
| 59 | static int mtk_boot_secondary(unsigned int cpu, struct task_struct *idle) |
| 60 | { |
| 61 | if (!mtk_smp_base) |
| 62 | return -EINVAL; |
| 63 | |
| 64 | if (!mtk_smp_info->core_keys[cpu-1]) |
| 65 | return -EINVAL; |
| 66 | |
| 67 | writel_relaxed(mtk_smp_info->core_keys[cpu-1], |
| 68 | mtk_smp_base + mtk_smp_info->core_regs[cpu-1]); |
| 69 | |
| 70 | arch_send_wakeup_ipi_mask(cpumask_of(cpu)); |
| 71 | |
| 72 | return 0; |
| 73 | } |
| 74 | |
| 75 | static void __init __mtk_smp_prepare_cpus(unsigned int max_cpus, int trustzone) |
| 76 | { |
| 77 | int i, num; |
| 78 | const struct of_device_id *infos; |
| 79 | |
| 80 | if (trustzone) { |
| 81 | num = ARRAY_SIZE(mtk_tz_smp_boot_infos); |
| 82 | infos = mtk_tz_smp_boot_infos; |
| 83 | } else { |
| 84 | num = ARRAY_SIZE(mtk_smp_boot_infos); |
| 85 | infos = mtk_smp_boot_infos; |
| 86 | } |
| 87 | |
| 88 | /* Find smp boot info for this SoC */ |
| 89 | for (i = 0; i < num; i++) { |
| 90 | if (of_machine_is_compatible(infos[i].compatible)) { |
| 91 | mtk_smp_info = infos[i].data; |
| 92 | break; |
| 93 | } |
| 94 | } |
| 95 | |
| 96 | if (!mtk_smp_info) { |
| 97 | pr_err("%s: Device is not supported\n", __func__); |
| 98 | return; |
| 99 | } |
| 100 | |
| 101 | if (trustzone) { |
| 102 | /* smp_base(trustzone-bootinfo) is reserved by device tree */ |
| 103 | mtk_smp_base = phys_to_virt(mtk_smp_info->smp_base); |
| 104 | } else { |
| 105 | mtk_smp_base = ioremap(mtk_smp_info->smp_base, MTK_SMP_REG_SIZE); |
| 106 | if (!mtk_smp_base) { |
| 107 | pr_err("%s: Can't remap %lx\n", __func__, |
| 108 | mtk_smp_info->smp_base); |
| 109 | return; |
| 110 | } |
| 111 | } |
| 112 | |
| 113 | /* |
| 114 | * write the address of slave startup address into the system-wide |
| 115 | * jump register |
| 116 | */ |
| 117 | writel_relaxed(virt_to_phys(secondary_startup_arm), |
| 118 | mtk_smp_base + mtk_smp_info->jump_reg); |
| 119 | } |
| 120 | |
| 121 | static void __init mtk_tz_smp_prepare_cpus(unsigned int max_cpus) |
| 122 | { |
| 123 | __mtk_smp_prepare_cpus(max_cpus, 1); |
| 124 | } |
| 125 | |
| 126 | static void __init mtk_smp_prepare_cpus(unsigned int max_cpus) |
| 127 | { |
| 128 | __mtk_smp_prepare_cpus(max_cpus, 0); |
| 129 | } |
| 130 | |
| 131 | static struct smp_operations mt81xx_tz_smp_ops __initdata = { |
| 132 | .smp_prepare_cpus = mtk_tz_smp_prepare_cpus, |
| 133 | .smp_boot_secondary = mtk_boot_secondary, |
| 134 | }; |
| 135 | CPU_METHOD_OF_DECLARE(mt81xx_tz_smp, "mediatek,mt81xx-tz-smp", &mt81xx_tz_smp_ops); |
| 136 | |
| 137 | static struct smp_operations mt6589_smp_ops __initdata = { |
| 138 | .smp_prepare_cpus = mtk_smp_prepare_cpus, |
| 139 | .smp_boot_secondary = mtk_boot_secondary, |
| 140 | }; |
| 141 | CPU_METHOD_OF_DECLARE(mt6589_smp, "mediatek,mt6589-smp", &mt6589_smp_ops); |